JP5100012B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device capable of transmitting and receiving data without contact and a method for manufacturing the semiconductor device.

  2. Description of the Related Art In recent years, attention has been focused on an individual recognition technique in which an ID (individual identification number) is given to an individual object to clarify information such as a history of the object and to be useful for production and management. Among them, development of semiconductor devices capable of transmitting and receiving data without contact is underway. As such a semiconductor device, an RFID tag (Radio Frequency Identification) (ID tag, IC tag, IC chip, RF tag (Radio Frequency), wireless tag, electronic tag, also referred to as a wireless chip) is used in an enterprise, a market, or the like. It has begun to be introduced.

  Many semiconductor devices such as RFID tags that are currently in practical use have an element formation layer (also referred to as an IC (Integrated Circuit) chip) having a circuit including a transistor and an antenna. These semiconductor devices can exchange data with a reader / writer via an antenna using electromagnetic waves.

  In general, as a method for forming a conductive film functioning as an antenna in the semiconductor device, a method capable of increasing the thickness is used for the purpose of increasing the surface area and reducing resistance. Therefore, in many cases, the formation of a conductive film by using a plating method is widely performed. However, when a conductive film that functions as an antenna is formed by a plating method, there are problems such as insufficient film quality of the formed conductive film and adverse effects on the environment and the like due to waste liquid and the like. On the other hand, when a conductive film is formed using a method other than the plating method, there is a problem that it is difficult to increase the film thickness and it is difficult to ensure a sufficient cross-sectional area and surface area of the conductive film.

  In view of the above circumstances, an object of the present invention is to provide a semiconductor device having a conductive film that functions sufficiently as an antenna and a method for manufacturing the semiconductor device.

  In order to solve the above problems, the present invention takes the following measures.

  A semiconductor device of the present invention includes an element formation layer including a transistor provided over a substrate and a conductive film functioning as an antenna provided over the element formation layer, and the transistor and the conductive film are electrically connected to each other. The cross-sectional shape of the conductive film is concave. As the transistor, a thin film transistor (TFT), a field effect transistor (FET), or the like can be used.

  As another structure of the semiconductor device of the present invention, the semiconductor device functions as an element formation layer including a transistor provided over a substrate, an insulating film provided over the element formation layer, and an antenna provided over the insulating film. The transistor and the conductive film are electrically connected, the insulating film has a groove, and the conductive film is provided along the surface of the insulating film and the groove. The groove included in the insulating film may be provided so as to penetrate the insulating film, or may be provided so as to form a recess in the insulating film without penetrating the insulating film. The groove structure may be provided in any manner. For example, the groove may be provided so that the cross section has a tapered shape.

  As another structure of the semiconductor device of the present invention, the semiconductor device includes an element formation layer including a transistor provided over a substrate, and an antenna formation layer including an insulating film and a conductive film, and the insulating film has a groove. A conductive film is provided along the surface of the insulating film and the groove, and the transistor and the conductive film are electrically connected by conductive fine particles.

  The semiconductor device can be used for an RFID tag or the like, and can be applied to any of an electromagnetic induction method, an electromagnetic coupling method, a microwave method, and the like. In the case of the electromagnetic induction method and the electromagnetic coupling method, the antenna is preferably formed in a coil shape. In the case of the microwave method, since the shape of the antenna depends on the wavelength of the electromagnetic wave to be received, it is preferable to change the shape depending on the use situation.

  As a method for manufacturing a semiconductor device of the present invention, an element formation layer including a transistor is formed over a substrate, an insulating film having a groove is formed over the element formation layer, and the conductive film is formed along the insulating film surface and the groove. A conductive film pattern is formed by selectively removing part of the conductive film formed on the surface of the insulating film, and a protective film is formed so as to cover the conductive film.

  As another method for manufacturing the semiconductor device of the present invention, a separation layer is formed over a substrate, an element formation layer including a transistor is formed over the separation layer, an insulating film having a groove is formed over the element formation layer, and insulation is performed. A conductive film is formed along the film surface and the groove, and a part of the conductive film formed on the surface of the insulating film is selectively removed to form a conductive film pattern so that the conductive film is covered. Forming a film, selectively removing the protective film, the insulating film, and the element formation layer to provide an opening, exposing the peeling layer, and removing the peeling layer by introducing an etchant into the opening; The element forming layer is peeled from the substrate.

  As another method for manufacturing a semiconductor device of the present invention, a separation layer is formed over a first substrate, an element formation layer including a transistor is formed over the separation layer, and an insulating film having a groove is formed over the element formation layer. Then, a conductive film is formed along the surface of the insulating film and the groove, and a part of the conductive film formed on the surface of the insulating film is selectively removed to form a conductive film pattern and cover the conductive film Forming a protective film, selectively removing the protective film, the insulating film, and the element formation layer to provide an opening, exposing the peeling layer, and introducing an etching agent into the opening to The portion is removed, the second substrate is attached to the surface of the protective film, and the element formation layer is peeled from the first substrate using physical means.

  By the method for manufacturing a semiconductor device of the present invention, generation of harmful substances such as waste liquid can be suppressed, and the cross-sectional area and surface area of a conductive film functioning as an antenna can be increased. In addition, since the semiconductor device of the present invention can have a larger surface area and cross-sectional area of the conductive film than in the case where the conductive film functioning as an antenna is provided on a flat surface, the communication distance, the communication band, and the like are improved. It becomes possible. Further, adhesion can be improved by increasing the contact area between the conductive film functioning as an antenna and the insulating film.

  Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in the structures of the present invention described below, the same reference numerals may be used in common in different drawings.

(Embodiment 1)
In this embodiment mode, a structural example of a semiconductor device of the present invention will be described with reference to the drawings.

  In the semiconductor device illustrated in FIG. 1, the element formation layer 101 including the transistor 107, the second insulating film 104, and the like is provided over the surface of the substrate 100 with the first insulating film 103 interposed therebetween. A conductive film 102 functioning as an antenna is provided. In FIG. 1, the conductive film 102 is provided so as to be in contact with at least the second insulating film 104 and the third insulating film 105.

  The third insulating film 105 is provided on the second insulating film 104 and includes a groove 140 having a concave shape in cross section. The groove 140 may be provided so as to penetrate the third insulating film 105 and expose the second insulating film 104, or may be provided so as to be recessed without penetrating the third insulating film 105. Here, an example in which the groove 140 is provided through the third insulating film 105 is shown.

  The conductive film 102 is provided so as to cover the surface of the second insulating film 104 exposed by the groove 140 and the end portion of the third insulating film 105 in the groove 140. In this case, the conductive film 102 is in contact with part of the surface of the third insulating film 105 and the side surface of the third insulating film 105 in the groove 140. Note that the conductive film 102 is not necessarily provided on the surface of the third insulating film, and the second insulating film 104 and the side surface of the third insulating film 105 in the groove 140 can be provided. Further, when viewed from a direction perpendicular to the surface of the substrate, at least a part of the groove 140 formed in the third insulating film 105 is formed in a coil shape.

  In FIG. 1, a fourth insulating film 106 that functions as a protective film is provided so as to cover the conductive film 102. In this case, the fourth insulating film 106 is also provided in the recessed portion of the conductive film 102. 1A is a top view of the semiconductor device described in this embodiment mode, and FIG. 1B is a cross-sectional view taken along line ab in FIG. 1A. Note that in FIG. 1, for convenience of description, the conductive film 102 functioning as an antenna is illustrated over the plurality of transistors 107 with the same size. Is larger at each stage.

  As the substrate 100, a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, a ceramic substrate, or the like can be used. Alternatively, a metal substrate containing stainless steel or a semiconductor substrate with an insulating film formed on the surface thereof may be used. In addition, it is also possible to use a substrate made of a plastic such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyethersulfone (PES), or a flexible synthetic resin such as acrylic. is there. By using a flexible substrate, the semiconductor device can be bent.

  The first insulating film 103 includes oxygen or nitrogen such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y), or the like. A single-layer structure of an insulating film or a stacked structure thereof can be used. In the case where a flexible substrate or the like is used as the substrate 100 and the element formation layer 101 is provided to be bonded to the substrate 100, silicon oxide, silicon nitride, or silicon oxynitride is used for the first insulating film 103. In addition, an adhesive layer may be included. As the adhesive layer, a material made of a resin material containing an acrylic resin or a synthetic rubber material, a thermosetting resin, an ultraviolet curable resin, an epoxy resin adhesive, a photocurable adhesive, a moisture curable adhesive, a resin additive And the like. Note that the first insulating film 103 is not necessarily provided in the case where there is no fear of contamination from the substrate 100 to the transistor 107 and the like.

  As the second insulating film 104, the third insulating film 105, and the fourth insulating film 106, an insulating film containing oxygen or nitrogen such as silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide, polyimide, polyamide, By using an organic material such as polyvinylphenol, benzocyclobutene, acrylic, or epoxy, a siloxane-based material, or the like, a single layer or a stacked structure can be provided. Note that the siloxane-based material has a skeletal structure composed of a bond of silicon and oxygen, a substance containing at least hydrogen as a substituent, or a skeleton structure composed of a bond of silicon and oxygen, and fluorine, It corresponds to a substance containing at least one of an alkyl group and an aromatic hydrocarbon.

  The element formation layer 101 includes at least the transistor 107. As the transistor 107, for example, a thin film transistor (TFT) may be provided over a substrate such as glass, or a field effect transistor (FET) may be provided over a semiconductor substrate such as Si using the substrate as a channel. Alternatively, an organic TFT may be provided over a flexible substrate. In addition, the transistor 107 can provide a variety of integrated circuits such as a CPU, a memory, or a microprocessor. FIG. 1 illustrates an example in which a thin film transistor is provided as the transistor 107. Further, the transistor 107 is provided as a CMOS in which an n-channel semiconductor and a p-channel semiconductor are combined. Further, an impurity region (including a source region, a drain region, and an LDD region) is provided in the semiconductor film, and an insulating film (side wall) is provided so as to be in contact with the side surface of the gate electrode. In the first embodiment, an example in which an LDD is formed in an n-channel type semiconductor film and an LDD is not provided in a p-channel type semiconductor film is shown. Of course, an n-channel type semiconductor film is also formed in a p-channel type semiconductor film. Similarly to the semiconductor film, an LDD region may be provided. Further, a silicide layer of nickel, molybdenum, cobalt, or the like may be formed on one or both of the source and drain regions and the gate electrode.

  As the conductive film 102, copper (Cu), aluminum (Al), silver (Ag), gold (Au), chromium (Cr), molybdenum (Mo), titanium (Ti) formed by sputtering, CVD, or the like is used. , Tantalum (Ta), tungsten (W), nickel (Ni), carbon (C) and other conductive materials having one or more metal compounds or metal compounds can be used.

  In FIG. 1, a third insulating film 105 having a groove 140 with a concave cross section is formed on the second insulating film 104, and the surface of the second insulating film 104 and the third insulating film 105 in the groove 140 are formed. A conductive film 102 is provided along the side surface. Here, the conductive film can be formed over the entire surface by a sputtering method or a CVD method, and then selectively etched by a photolithography method. By providing the conductive film 102 in this manner (FIG. 1D), the conductive film is compared with the case where the conductive film is provided on a flat surface so that the cross section is rectangular (FIG. 1C). The cross-sectional area and surface area of 102 can be increased. That is, in the case where the conductive film 102 is provided over the second insulating film 104 (FIG. 1C), the conductive film 102 has a rectangular cross section. On the other hand, by providing the third insulating film 105 with a groove 140 having a concave cross section and forming the conductive film 102 along the groove 140, the conductive film 102 has a concave shape in cross section. Therefore, in the case where the conductive film 102 is provided along the concave groove 140 provided in the third insulating film 105 (FIG. 1D), the third insulating film is compared with FIG. Only the portion 108 in contact with the side surface of the film 105 has a larger cross-sectional area and surface area. As described above, when the cross-sectional area and surface area of the conductive film functioning as an antenna are increased, when data is exchanged in a non-contact manner, the communication distance and communication band between the semiconductor device and the external device (reader / writer) are reduced. It becomes possible to improve. Further, adhesion can be improved by increasing the contact area between the conductive film functioning as an antenna and the insulating film.

  In FIG. 1, a third insulating film 105 having a groove 140 is provided over the second insulating film 104, and the conductive film 102 is selectively formed over the second insulating film 104 and the third insulating film 105. Although provided, the semiconductor device described in this embodiment is not limited to this structure. Specific examples of semiconductor devices having other structures are shown in FIGS.

  In the semiconductor device illustrated in FIG. 2A, a third insulating film 105 including a groove having a concave cross section is provided over the second insulating film 104, and the conductive film 102 is provided along the groove. (Area 251). Specifically, the groove provided in the third insulating film 105 does not penetrate, the conductive film 102 is in contact with only the third insulating film 105, and the third insulating film 105 is recessed. A conductive film 102 is provided so as to cover the surface and the end of the recess. The concave portion of the third insulating film 105 can be provided by selectively etching a portion to be recessed after the third insulating film is provided over the second insulating film 104. At this time, a concave portion having an arbitrary shape can be formed by controlling the etching conditions. In addition, after the third insulating film 105 is provided over the second insulating film 104, a concave portion is formed in the third insulating film 105 and the second insulating film 104, and the conductive film 102 is provided. (Region 252).

  In the semiconductor device illustrated in FIG. 2B, the third insulating film 105 having a groove with a tapered cross section is formed over the second insulating film 104 by curving the corner 253 of the third insulating film 105. The conductive film 102 is provided so as to cover the surface of the second insulating film 104 and the tapered portion of the third insulating film 105 in the trench. That is, FIG. 2B corresponds to the case where the cross section of the groove 140 of the third insulating film 105 in FIG. 1 is tapered. By providing the groove 140 with a tapered cross section in the third insulating film 105, it is possible to prevent disconnection of the conductive film 102 in the depth direction when the conductive film 102 is provided.

  In the semiconductor device illustrated in FIG. 2C, the number of recesses formed in the third insulating film 105 provided over the second insulating film 104 in the structure in FIG. Are provided in an uneven shape. That is, by increasing the number of grooves 140 in the third insulating film 105 and providing the conductive film 102 in the groove, the cross-sectional area and surface area of the conductive film 102 can be increased. In addition, although the number of recesses is doubled here, it is of course possible to further increase the number of recesses.

  The semiconductor device illustrated in FIG. 2D illustrates the case where the conductive film 102 in FIG. In this manner, by providing the conductive film 102 in an uneven shape, the cross-sectional area and surface area of the conductive film 102 in a certain region can be increased.

  2B to 2D can also be provided similarly to FIG. 2A. That is, in FIGS. 2B to 2D, a groove is provided so as to expose the second insulating film 104, but the cross section is concave without completely passing through the groove portion of the third insulating film 105. A structure in which the conductive film 102 is provided so as to be in contact with only the third insulating film 105 can also be provided. Alternatively, as illustrated in a region 252 in FIG. 2A, a groove with a concave cross section can be provided in the second insulating film 104.

  In the semiconductor device illustrated in FIGS. 1 and 2, the third insulating film 105 is provided over the second insulating film 104; however, the source of the transistor 107 is not provided without the second insulating film 104. Alternatively, the third insulating film 105 can be provided over the drain wiring. In this case, the groove provided in the third insulating film 105 may be provided to penetrate or may be provided without being penetrated. In the case where the conductive film 102 is provided so as to penetrate, the conductive film 102 can be provided in the same layer as the source or drain wiring of the transistor 107. In this case, the process can be simplified by forming the conductive film 102 and the source or drain wiring with the same material.

  In FIG. 1, in order to reduce the size of the semiconductor device, the element formation layer 101 and the conductive film 102 are arranged so that at least part of them overlaps with each other; however, the semiconductor device described in this embodiment is not limited to this structure. The element formation layer 101 and the conductive film 102 may be arranged so as not to overlap each other. 1 and 2 show the case of the electromagnetic coupling method or the electromagnetic induction method, the above-described structure can also be applied to a semiconductor device using a microwave method. A specific example in this case is shown in FIG.

  In general, an antenna of a semiconductor device using an electromagnetic coupling method or an electromagnetic induction method needs to be provided in a coil shape, but the shape of the antenna of a semiconductor device using a microwave method depends on received electromagnetic waves. Here, in order to simplify the description, a case where a pole-shaped antenna having a simple structure is used is shown (FIG. 3).

  3A, an element formation layer 111 is provided over a substrate 100, and conductive films 112a and 112b functioning as antennas are provided so as to be connected to the element formation layer 111. 3B and 3C show cross-sectional structures between ab and cd in FIG. 3A, respectively.

  An element formation layer 111 including the transistor 107 and the like is provided over the substrate 100 with the first insulating film 103 interposed therebetween, and a conductive film 112a functioning as an antenna with the second insulating film 104 disposed above the element formation layer 111. 112b is provided (FIGS. 3B and 3C). The conductive films 112a and 112b are formed over the second insulating film 104 and the third insulating film 105 so as to cover the end portions of the third insulating film 105 selectively provided over the second insulating film 104. It is provided and is electrically connected to one of the transistors in the element formation layer 111. Here, the third insulating film 105 has an opening, and the conductive films 112a and 112b are provided in contact with the side surfaces of the third insulating film. A fourth insulating film 106 is provided so as to cover the conductive films 112a and 112b.

  The conductive films 112 a and 112 b functioning as antennas are provided so as to cover the second insulating film 104 and the end of the third insulating film 105. The conductive films 112a and 112b can be formed using the same method and material as the conductive film 102 described above.

  In FIGS. 1 to 3, in order to increase the cross-sectional area of the conductive film 102 functioning as an antenna or the conductive films 112a and 112b functioning as an antenna, a conductor is selectively provided in the concave portion of the conductive film 102. It is preferable. For example, as shown in FIG. 16A, the cross-sectional area can be increased by selectively providing a conductive composition 146 from a nozzle 145 to a concave portion of the conductive film 102 by a droplet discharge method. As the conductive composition 146, a conductive material including one or more metals such as Ag, Au, Cu, and Pd and a metal compound is used. Note that a conductive material having one or more metals, such as Cr, Mo, Ti, Ta, W, and Al, or a metal compound, can be used as long as aggregation can be suppressed by the dispersant. is there. In addition, a conductive composition 146 may be selectively formed in the concave portion of the conductive film 102 by using a screen printing method or a dispenser method. As a result, the cross-sectional area of the conductive film functioning as an antenna is the sum of the conductive film 102 and the conductor 147, so that the cross-sectional area can be increased (FIG. 16B). In this case, the thickness of the conductive film formed over the second insulating film 104 and the thickness of the conductive film formed over the third insulating film 105 are different.

  As described above, by providing a semiconductor device so as to increase the cross-sectional area and surface area of the conductive film functioning as an antenna, the communication distance and communication band of the semiconductor device can be improved. Further, adhesion can be improved by increasing the contact area between the conductive film functioning as an antenna and the insulating film.

(Embodiment 2)
In this embodiment, an example of a method for manufacturing the semiconductor device described in the above embodiment will be described with reference to drawings. In this embodiment, after the element formation layer and the antenna are once provided over a rigid substrate such as glass, the element formation layer and the antenna are peeled from the rigid substrate and provided over the flexible substrate. To show.

  First, the base insulating film 201 is formed over the substrate 200, the peeling layer 202 is provided thereover, and the insulating film 203 and the semiconductor film 204 are stacked over the peeling layer 202 (FIG. 4A). The insulating film 201 serving as a base is provided in order to prevent contamination from the substrate 200 to the peeling layer 202, but the insulating film 201 is not necessarily provided when there is no fear of contamination from the substrate 200. Further, here, the insulating film 201, the peeling layer 202, the insulating film 203, and the semiconductor film 204 can be successively formed in a vacuum process.

  Next, a plurality of island-shaped semiconductor films are provided by selectively etching the semiconductor film 204, and a plurality of thin film transistors 205 are provided by forming a gate electrode over the island-shaped semiconductor film with a gate insulating film interposed therebetween ( FIG. 4 (B)).

  Next, an insulating film 206 is formed so as to cover the thin film transistor 205, and an insulating film 207 is formed for further planarization. Next, an opening is selectively provided in the insulating film 206 and the insulating film 207, and a conductive film 208 is provided so as to be electrically connected to a source region and a drain region of the thin film transistor 205, and then the conductive film 208 is covered. An insulating film 209 is formed (FIG. 4C).

  Next, the insulating film 210 is selectively provided over the insulating film 209 (FIG. 4D). The insulating film 210 has a groove 218. After the insulating film 210 is formed over the entire surface of the insulating film 209, the groove 218 may be formed by a photolithography method, or screen printing or the like may be performed on the insulating film 209. The groove 218 may be provided by selectively forming the insulating film 210 by using a printing method or a droplet discharge method. The number of manufacturing steps can be reduced by using a printing method, a droplet discharge method, or the like. Note that any of the structures described in the above embodiments can be used for the groove 218 of the insulating film 210.

  Next, a conductive film 211 is formed so as to cover the insulating film 209 and the insulating film 210 (FIG. 5A). Here, the conductive film 211 is provided in contact with the surface of the insulating film 209 exposed by the groove 218 included in the insulating film 210 and the side surface and surface of the insulating film 210. Note that in order to prevent disconnection in the groove 218 of the conductive film 211, the groove 218 is preferably provided in a tapered shape by forming the insulating film 210 to have a curved corner.

  Next, the conductive film 211 is selectively etched to form the conductive film 212, and then the insulating film 213 is formed so as to cover the conductive film 212 (FIG. 5B).

  Next, by selectively removing the insulating films 203, 206, 207, 209, 210, and 213, an opening 214 is formed so as to expose the peeling layer 202 (FIG. 5D). Note that the opening 214 is provided in a region where the thin film transistor 205 is avoided. The opening 214 can be formed by laser light irradiation or a photolithography method.

  Next, the peeling layer 202 is removed by introducing an etching agent 215 from the opening 214 (FIG. 5D). The release layer 202 may be completely removed or may be removed so as to leave a part of the release layer 202 by controlling the etching conditions. By leaving a part of the separation layer 202, it is possible to prevent the element formation layer 219 and the like from being separated completely without being separated from the substrate 200 even after the separation layer 202 is removed. Furthermore, since the etching time can be shortened and the etching agent can be reduced, the working efficiency can be improved and the cost can be reduced.

  Next, an adhesive substrate 216 is attached to the insulating film 213, and the element formation layer 219 is separated from the substrate 200 (FIG. 6A). Here, since the substrate 200 and the insulating film 203 in the element formation layer 219 are connected to each other by the remaining separation layer, the element formation layer 219 and the like are separated from the substrate 200 using physical means.

  Note that although the example in which the peeling layer 202 is removed using the etching agent 215 is described here, the peeling layer 202 is not necessarily removed by the etching agent. That is, in the case where the adhesion between the element formation layer 219 and the separation layer 202 is not sufficient after the opening 214 is formed, the element formation layer 219 can be separated from the substrate 200 using physical means. In this case, since it is not necessary to use an etching agent, the process can be shortened and the cost can be reduced.

  Next, a flexible substrate 217 is attached to the surface of the insulating film 203 (FIG. 6B).

  Through the above steps, a semiconductor device including an element formation layer, an antenna, and the like can be provided over a flexible substrate. Below, the material etc. which are used in the said process are demonstrated concretely.

  As the substrate 200, a glass substrate, a quartz substrate, a metal substrate, or a stainless substrate having an insulating film formed on one surface can be used. If such a substrate is used, there is no significant limitation on the area or shape thereof. For example, if the substrate 200 is a rectangular substrate having a side of 1 meter or more and a rectangular shape, the productivity is remarkably improved. be able to. Such an advantage is a great advantage compared to the case of using a circular silicon substrate. In this embodiment, since the peeled substrate 200 can be reused, a semiconductor device can be manufactured at lower cost. For example, even when a high-cost quartz substrate is used, there is an advantage that a semiconductor device can be manufactured at low cost by repeatedly using the quartz substrate.

  As the insulating film 201, an insulating film containing oxygen or nitrogen, such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y), or the like. A single layer structure or a stacked structure of these can be used. These insulating films can be formed using known means (various CVD methods such as sputtering and plasma CVD).

As the separation layer 202, a metal film, a stacked structure of a metal film and a metal oxide film, or the like can be used. As the metal film, tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nb), nickel (Ni), cobalt (Co), zirconium (Zr), zinc (Zn), A single layer or a stack of films made of an element selected from ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), or an alloy material or compound material containing the element as a main component To form. These materials can be formed by using various CVD methods such as a sputtering method and a plasma CVD method. A stacked structure of a metal film and a metal oxide film, after forming a metal film described above, the plasma treatment in or under N _{2 O} atmosphere an oxygen atmosphere, by performing heat treatment in or under N _{2 O} atmosphere an oxygen atmosphere The oxide or oxynitride of the metal film can be provided on the surface of the metal film. For example, in the case where a tungsten film is provided as a metal film by a sputtering method, a CVD method, or the like, a metal oxide film made of tungsten oxide can be formed on the tungsten film surface by performing plasma treatment on the tungsten film. In this case, the oxide of tungsten is represented by WOx, x is 2 to 3, and when x is 2 (WO ₂ ), when x is 2.5 (W ₂ O ₅ ), x is In the case of 2.75 (W ₄ O ₁₁ ), x is 3 (WO ₃ ) and the like. In forming the tungsten oxide, the value of x mentioned above is not particularly limited, and it is preferable to determine which oxide is formed based on the etching rate or the like. In addition, for example, after a metal film (for example, tungsten) is formed, an insulating film such as silicon oxide (SiO ₂ ) is provided on the metal film by a sputtering method, and a metal oxide (for example, for example, Tungsten oxide) may be formed over tungsten. Further, as the plasma treatment, for example, the above-described high-density plasma treatment may be performed. In addition to the metal oxide film, metal nitride or metal oxynitride may be used. In this case, plasma treatment or heat treatment may be performed on the metal film in a nitrogen atmosphere or a nitrogen and oxygen atmosphere.

  As the insulating film 203, silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) are formed by known means (sputtering method, plasma CVD method, etc.). A single-layer structure of an insulating film containing oxygen or nitrogen such as (x> y) or a stacked structure thereof can be used. For example, in the case where the insulating film 203 is provided with a two-layer structure, a silicon nitride oxide film may be formed as a first insulating film and a silicon oxynitride film may be formed as a second insulating film. In the case where the insulating film 203 is provided with a three-layer structure, a silicon oxynitride film is formed as a first insulating film, a silicon nitride oxide film is formed as a second insulating film, and a third insulating film is formed. A silicon oxynitride film is preferably formed.

As the semiconductor film 204, an amorphous semiconductor, a SAS in which an amorphous state and a crystalline state are mixed, a microcrystalline semiconductor in which crystal grains of 0.5 nm to 20 nm can be observed in the amorphous semiconductor, and a crystal The conductive semiconductor can be provided in any state. If a substrate that can withstand the film formation temperature, for example, a quartz substrate, is used as the substrate 200, a crystalline semiconductor film may be formed on the substrate by a CVD method or the like. The crystalline semiconductor film can be formed by forming an amorphous semiconductor film and crystallizing by heat treatment. Note that heat treatment can be performed using a heating furnace, laser irradiation, irradiation of light emitted from a lamp instead of laser light (lamp annealing), or a combination thereof. In the case of using laser irradiation, a continuous wave laser (CW laser) or a pulsed laser (pulse laser) can be used. As lasers, Ar laser, Kr laser, excimer laser, YAG laser, Y ₂ O ₃ laser, YVO ₄ laser, YLF laser, YAlO ₃ laser, glass laser, ruby laser, alexandrite laser, Ti: sapphire laser, copper vapor laser Alternatively, one or a plurality of gold vapor lasers can be used. By irradiating the fundamental wave of such a laser and the second to fourth harmonics of the fundamental wave, a crystal having a large grain size can be obtained.

  The thin film transistor 205 may have any structure, for example, an impurity region (including a source region, a drain region, and an LDD region) may be formed, or a p-channel type, an n-channel type, or a p-channel type and an n-channel type. Alternatively, a CMOS circuit in which types of semiconductors are combined may be provided. In addition, an insulating film (side wall) may be formed so as to be in contact with the side surface of the gate electrode provided above the semiconductor film, and nickel, molybdenum, or cobalt may be formed on one or both of the source region, the drain region, and the gate electrode. A silicide layer such as may be formed.

  As the insulating film 206, silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) is formed by a known means (sputtering method, plasma CVD method, or the like). It can be formed using an insulating film containing oxygen or nitrogen such as (x> y) or a single layer structure of a film containing carbon such as DLC (diamond-like carbon) or a stacked structure thereof.

  As the insulating films 207, 209, 210, and 213, the silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y), and the like are used. In addition to insulating films containing oxygen or nitrogen and films containing carbon such as DLC (diamond-like carbon), other organic materials such as epoxy, polyimide, polyamide, polyvinylphenol, benzocyclobutene, acrylic, siloxane-based materials, etc. It can be formed using a single layer or a stacked structure. In particular, organic materials such as epoxy, polyimide, polyamide, polyvinylphenol, benzocyclobutene, and acrylic, and materials such as siloxane materials can be formed by using a spin coating method, a droplet discharge method, a printing method, or the like. In addition, the planarization and the processing time can be made more efficient. The insulating films 207, 209, 210, and 213 may all be formed using the same material, or may be formed using different materials.

  As the conductive film 208, a single layer or a stacked structure made of one kind of element selected from Al, Ni, C, W, Mo, Ti, Pt, Cu, Ta, Au, and Mn or an alloy containing a plurality of such elements is used. be able to. For example, as a conductive film made of an alloy containing a plurality of such elements, for example, an Al alloy containing C and Ti (Al-Ti-C), an Al alloy containing Ni (Al-Ni), and an Al alloy containing C and Ni An alloy (Al—Ni—C), an Al alloy containing C and Mn (Al—Mn—C), or the like can be used.

  As the conductive film 211, copper (Cu), aluminum (Al), silver (Ag), gold (Au), chromium (Cr), molybdenum (Mo), titanium (Ti), formed by sputtering or CVD, A conductive material including one or a plurality of metals and metal compounds such as tantalum (Ta), tungsten (W), nickel (Ni), and carbon (C) can be used. In addition, a conductive paste (for example, a silver paste) can be selectively formed using a screen printing method.

  As the substrate 216, a laminate film can be used. Here, what formed the hot-melt film on films, such as polyester, can be utilized. In addition, when the substrate 216 is bonded to the insulating film 213, the substrate 216 can be bonded efficiently by performing one or both of pressure treatment and heat treatment. In addition, silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), nitriding is performed in advance on the substrate 216 so that moisture or the like does not enter the element formation layer 219 through the film after sealing. It is preferable to coat a silicon oxide (SiNxOy) (x> y) film.

  Further, as the substrate 216, a film provided with an antistatic measure for preventing static electricity or the like (hereinafter referred to as an antistatic film) can be used. Examples of the antistatic film include a film in which an antistatic material is dispersed in a resin, a film on which an antistatic material is attached, and the like. The film provided with an antistatic material may be a film provided with an antistatic material on one side, or a film provided with an antistatic material on both sides. Furthermore, a film provided with an antistatic material on one side may be attached to the layer so that the surface provided with the antistatic material is on the inside of the film, or on the outside of the film. It may be pasted. Note that the antistatic material may be provided on the entire surface or a part of the film. As the antistatic material here, a surfactant such as metal, indium and tin oxide (ITO), an amphoteric surfactant, a cationic surfactant or a nonionic surfactant is used. it can. In addition, as the antistatic material, a resin material containing a crosslinkable copolymer polymer having a carboxyl group and a quaternary ammonium base in the side chain can be used. An antistatic film can be obtained by sticking, kneading, or applying these materials to a film. By sealing with an antistatic film, it is possible to prevent the semiconductor element from being adversely affected by external static electricity or the like when handled as a product.

  Note that although the case where a semiconductor device having a coiled antenna is manufactured has been described in this embodiment mode, it is needless to say that semiconductor devices having antennas having other shapes can be manufactured in the same manner.

  This embodiment can be freely combined with the above embodiment.

(Embodiment 3)
In this embodiment, a semiconductor device and a manufacturing method thereof which are different from those in the above embodiment will be described with reference to drawings. Specifically, a case where an element formation layer and an antenna are separately manufactured and the element formation layer and the antenna are connected to each other will be described. Note that although a case where a coiled antenna is applied is described in this embodiment mode, the present invention can be similarly performed even when antennas of other shapes are applied.

  The element formation layer can be formed by using the manufacturing method shown in FIG. Here, a method for manufacturing an antenna will be described with reference to the drawings.

  First, an insulating film 311 having a groove 315 is selectively formed over the substrate 310 (FIG. 9A). The groove of the insulating film 311 may be formed using a photolithography method after the insulating film 311 is provided over the entire surface of the substrate 310, or may be formed on the substrate 310 using a printing method such as screen printing or a droplet discharge method. Alternatively, the insulating film 311 may be selectively provided.

  Next, a conductive film 312 is formed so as to cover the surface of the substrate 310 and the insulating film 311 in the groove 315 (FIG. 9B). The conductive film 312 may be formed by any method other than a plating method, such as a CVD method, a sputtering method, or a screen printing method.

  Next, the conductive film 312 is provided by selectively removing the conductive film 312 using an etching method or the like, and the insulating film 313 is provided so as to cover the conductive film 316 (FIG. 9C). The conductive film 316 is formed so as to remove a part of the conductive film 312 provided over the insulating film 311 and cover the inside of the groove 315 and the end of the insulating film 311.

  Next, an opening 314 is provided in the insulating film 313 (FIG. 9D). The opening 314 is provided by photolithography or irradiation with laser light. Note that when the insulating film 313 is provided, the opening 314 may be provided by selectively forming the insulating film 313 in a region other than the region to be the opening 314 by using a printing method such as screen printing or a droplet discharge method. Good.

  Through the above steps, the antenna formation layer 317 can be obtained. Next, FIG. 7 illustrates the case where the element formation layer and the antenna formation layer are provided to be bonded to each other. 7A to 7C illustrate a configuration example in the case where the element formation layer 101 and the antenna formation layer 317 that are separately formed are electrically connected.

  The semiconductor device illustrated in FIG. 7A is provided by bonding the antenna formation layer 317 and the element formation layer 101 illustrated in FIG. 9 with an adhesive resin 305. Then, the conductive film 304 electrically connected to the source or drain region of the transistor 107 and the conductive film 312 functioning as an antenna are electrically connected to each other through the conductive fine particles 306 contained in the resin 305 in the connection region 307. It is connected. Here, an example is shown in which the element formation layer and the antenna formation layer are electrically connected using conductive fine particles, but a conductive adhesive such as silver paste, copper paste, or carbon paste, solder bonding, or the like is used. It is also possible to connect.

  The semiconductor device illustrated in FIG. 7B illustrates the case where the conductive film 316 provided in a concave shape in FIG. 9 is provided in a convex shape. In the connection region 307, the convex surface of the conductive film 316 and the conductive film 304 are electrically connected through the conductive fine particles 306. Note that by providing the convex portion of the conductive film 316 disposed in the connection region 307 higher than the convex portion of the conductive film 316 disposed outside the connection region, the distance from the conductive film 304 can be reduced. Connection in the case of using the fine particles 306 can be made more reliable. In this case, the insulating film 311 positioned below the conductive film 316 provided in the connection region 307 may be formed thicker than the other insulating films 311 when the antenna formation layer is manufactured.

  In the semiconductor device illustrated in FIG. 7C, the antenna formation layer 317 and the element formation layer 101 are electrically connected to each other by a wire bonding method using a wiring 318. In this case, the antenna formation layer 317 may be provided by being bonded to the element formation layer 101 using an adhesive or the like as shown in FIG. 7C. It is also possible to provide it.

  This embodiment can be freely combined with the above embodiment.

(Embodiment 4)
In this embodiment, a semiconductor device different from the above embodiment will be described with reference to drawings. Specifically, a case in which an element formation layer and an antenna formation layer are separately formed and the element formation layer and the antenna formation layer are connected and provided is different from that in Embodiment Mode 3. Note that although a case where a coiled antenna is applied is described in this embodiment mode, the present invention can be similarly performed even when antennas of other shapes are applied.

  The element formation layer can be formed by using the manufacturing method shown in FIG. A method for manufacturing the antenna formation layer will be described below with reference to FIGS.

  First, the insulating film 321 functioning as a base film, the peeling layer 322, and the insulating film 323 are stacked over the substrate 320, and the insulating film 324 having the groove 315 is provided over the insulating film 323 (FIG. 10A).

  Next, using the method illustrated in FIGS. 5A to 5C, the conductive film 325 and the insulating film 326 are formed so as to cover the conductive film 325 (FIG. 10B).

  Next, the insulating films 323, 324, and 326 are selectively removed to expose the peeling layer 322 to form an opening 327, and the peeling layer 322 is removed by introducing an etchant into the opening 327 (FIG. 10 (C)).

  Next, a flexible substrate 328 is attached to the surface of the insulating film 326, and the substrate 320 is separated from the insulating film 323 (FIG. 10D).

  Next, part of the insulating film 323 is selectively removed by laser light irradiation or an etching method, and an opening 329 is provided to expose the conductive film 325 (FIG. 10E).

  Through the above steps, the antenna formation layer can be formed. Note that the manufacturing method in FIG. 10 is the same as the manufacturing method shown in FIGS. 4 to 6 except that an antenna formation layer is provided over the separation layer instead of the element formation layer. Therefore, the materials shown in FIGS. 4 to 6 in FIG. 10 can be applied.

  Next, FIG. 8 illustrates the case where an element formation layer and an antenna formation layer are provided to be bonded to each other. 8A to 8C illustrate a configuration example in the case where the element formation layer 101 and the antenna formation layer 330 that are separately formed are electrically connected.

  The semiconductor device illustrated in FIG. 8A is provided by bonding the antenna formation layer 330 and the element formation layer 101 illustrated in FIG. 10 with an adhesive resin 305. A conductive film 304 electrically connected to the source or drain region of the transistor 107 and a conductive film 325 functioning as an antenna are electrically connected to each other in the connection region 307 through conductive fine particles 306 contained in the resin 305. ing. Here, an example is shown in which the element formation layer and the antenna formation layer are electrically connected using conductive fine particles, but the connection is made using a conductive adhesive such as silver paste, copper paste, or carbon paste, or solder bonding. It is also possible to do.

  The semiconductor device illustrated in FIG. 8B illustrates the case where the conductive film 316 provided in a concave shape in FIG. 10 is provided in a convex shape. In the connection region 307, the convex surface of the conductive film 325 and the conductive film 304 are electrically connected through the conductive fine particles 306.

  In the semiconductor device illustrated in FIG. 8C, the antenna formation layer 317 and the element formation layer 101 are electrically connected to each other by a wire bonding method using a wiring 318. In this case, the antenna formation layer 317 may be provided by being bonded to the element formation layer 101 using an adhesive or the like as shown in FIG. 7C. It is also possible to provide it.

  The method described in this embodiment mode is particularly effective when the conductive film 325 that functions as an antenna is formed at a high temperature and it is difficult to provide the conductive film 325 directly over a flexible substrate. . In other words, an antenna is formed on a flexible substrate by separating the antenna forming layer from the substrate after the antenna forming layer is provided on the substrate that can withstand the processing temperature of the manufacturing process. A layer can be provided.

  This embodiment can be freely combined with the above embodiment.

(Embodiment 5)
In this embodiment, an example of a method for manufacturing a semiconductor device of the present invention will be described with reference to drawings. Specifically, an example in which a thin film transistor (TFT) is used as a transistor in an element formation layer and a semiconductor device is manufactured by a separation method in which an element formation layer including a TFT is provided over a support substrate and then the element formation layer is separated from the support substrate. Indicates.

  First, the separation layer 702 is formed over one surface of the substrate 701 (FIG. 11A). As the substrate 701, a glass substrate, a quartz substrate, a metal substrate, a stainless steel substrate with an insulating film formed on one surface, a heat-resistant plastic substrate that can withstand the processing temperature in this step, or the like may be used. With such a substrate 701, there is no significant limitation on the area and shape thereof. For example, if the substrate 701 is a rectangular substrate having a side of 1 meter or more and a rectangular shape, productivity is remarkably improved. Can be made. Such an advantage is a great advantage compared to the case of using a circular silicon substrate. Note that in this step, the separation layer 702 is provided over the entire surface of the substrate 701; however, if necessary, a separation layer is provided over the entire surface of the substrate 701 and then selectively etched by a photolithography method. Also good. In addition, although the separation layer 702 is formed so as to be in contact with the substrate 701, an insulating film serving as a base is formed so as to be in contact with the substrate 701 as necessary, and the separation layer 702 is formed so as to be in contact with the insulation film. May be.

  The peeling layer 702 is formed of a metal film and the metal oxide film. The metal film is formed by a known means (sputtering method, plasma CVD method, etc.) tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nd), nickel (Ni), cobalt ( An element selected from Co), zirconium (Zr), zinc (Zn), ruthenium (Ru), rhodium (Rh), lead (Pd), osmium (Os), iridium (Ir), or the element as a main component A layer made of an alloy material or a compound material is formed as a single layer or a stacked layer. The metal oxide film is formed on the surface of the metal film by performing plasma treatment on the metal film in an oxygen atmosphere or by performing heat treatment on the metal film in an oxygen atmosphere. In addition to the metal oxide film, metal oxynitride may be used.

  In the case where the metal film has a single-layer structure, for example, a tungsten layer, a molybdenum layer, or a layer containing a mixture of tungsten and molybdenum is formed. Then, a layer containing tungsten oxide or oxynitride, a layer containing molybdenum oxide or oxynitride, or a layer containing oxide or oxynitride of a mixture of tungsten and molybdenum is formed on the surface of the metal film. . Note that the mixture of tungsten and molybdenum corresponds to, for example, an alloy of tungsten and molybdenum.

  Alternatively, after forming a metal film over the substrate 701 as the separation layer 702, a metal oxide film may be formed by a sputtering method using the material of the metal film as a target in an oxygen atmosphere. In this case, the metal film and the metal oxide film can be formed using different metal elements. Note that a metal oxide film may be directly formed over the substrate 701 and used as the separation layer 702.

  Next, an insulating film 703 serving as a base is formed so as to cover the separation layer 702. As the insulating film 703, a film containing a silicon oxide or a silicon nitride is formed as a single layer or a stacked layer by a known means (such as a sputtering method or a plasma CVD method). In the case where the base insulating film has a two-layer structure, for example, a silicon nitride oxide film may be formed as the first layer and a silicon oxynitride film may be formed as the second layer. When the base insulating film has a three-layer structure, a silicon oxide film is formed as the first insulating film, a silicon nitride oxide film is formed as the second insulating film, and oxynitriding is performed as the third insulating film. A silicon film is preferably formed. Alternatively, a silicon oxynitride film may be formed as the first insulating film, a silicon nitride oxide film may be formed as the second insulating film, and a silicon oxynitride film may be formed as the third insulating film. The insulating film serving as a base functions as a blocking film that prevents impurities from entering from the substrate 701.

  Next, an amorphous semiconductor film 704 (eg, a film containing amorphous silicon) is formed over the insulating film 703. The amorphous semiconductor film 704 is formed with a thickness of 25 to 200 nm (preferably 30 to 150 nm) by a known means (a sputtering method, an LPCVD method, a plasma CVD method, or the like). Subsequently, the amorphous semiconductor film 704 is subjected to a known crystallization method (laser crystallization method, thermal crystallization method using an RTA or furnace annealing furnace, thermal crystallization method using a metal element that promotes crystallization, or crystallization. A crystalline semiconductor film is formed by crystallization by a combination of a thermal crystallization method using a promoting metal element and a laser crystallization method). After that, the obtained crystalline semiconductor film is etched into a desired shape to form crystalline semiconductor films 706 to 710 (FIG. 11B). Note that the separation layer 702, the insulating film 703, and the amorphous semiconductor film 704 can be formed successively.

  An example of a manufacturing process of the crystalline semiconductor films 706 to 710 will be briefly described below. First, an amorphous semiconductor film having a thickness of 66 nm is formed using a plasma CVD method. Next, after a solution containing nickel, which is a metal element that promotes crystallization, is held on the amorphous semiconductor film, the amorphous semiconductor film is subjected to dehydrogenation treatment (500 ° C., 1 hour), heat Crystallization treatment (550 ° C., 4 hours) is performed to form a crystalline semiconductor film. Thereafter, laser light is irradiated as necessary, and crystalline semiconductor films 706 to 710 are formed by using a photolithography method.

In the case of forming a crystalline semiconductor film by a laser crystallization method, a continuous wave or pulsed gas laser or solid state laser is used. As the gas laser, excimer laser, YAG laser, YVO ₄ laser, YLF laser, YAlO ₃ laser, glass laser, ruby laser, Ti: sapphire laser, or the like is used. As the solid-state laser, a laser using a crystal such as YAG, YVO ₄ , YLF, or YAlO ₃ doped with Cr, Nd, Er, Ho, Ce, Co, Ti, or Tm is used. In particular, a crystal having a large grain size can be obtained by irradiating a fundamental wave of a continuous wave laser and a second to fourth harmonic laser of the fundamental wave. For example, a second harmonic (532 nm) or a third harmonic (355 nm) of an Nd: YVO ₄ laser (fundamental wave 1064 nm) can be used. The continuous wave fundamental laser beam and the continuous wave harmonic laser beam may be irradiated, or the continuous wave fundamental laser beam and the pulsed harmonic laser beam may be irradiated. You may do it. By irradiating a plurality of laser beams, energy can be supplemented. Also, it is a pulse oscillation type laser that oscillates the laser light at an oscillation frequency that can be irradiated with the laser light of the next pulse after the semiconductor film is melted by the laser light and solidifies in the scanning direction. Crystal grains grown continuously can be obtained. That is, it is possible to use a pulsed laser in which the lower limit of the oscillation frequency is set so that the period of pulse oscillation is shorter than the time until the semiconductor film is completely solidified after being melted. As such a laser, a pulsed laser beam having an oscillation frequency of 10 MHz or more may be used.

  In addition, when an amorphous semiconductor film is crystallized using a metal element that promotes crystallization, it is possible to perform crystallization at a low temperature for a short time, and the crystal orientation is aligned. Remains in the crystalline semiconductor film, so that the off-current increases and the characteristics are not stable. Therefore, an amorphous semiconductor film functioning as a gettering site is preferably formed over the crystalline semiconductor film. Since the amorphous semiconductor film serving as a gettering site needs to contain an impurity element such as phosphorus or argon, it is preferably formed by a sputtering method which can contain argon at a high concentration. Then, heat treatment (RTA method or thermal annealing using a furnace annealing furnace) is performed to diffuse the metal element in the amorphous semiconductor film, and then the amorphous semiconductor film containing the metal element is removed. To do. Then, the content of the metal element in the crystalline semiconductor film can be reduced or removed.

  Next, a gate insulating film 705 covering the crystalline semiconductor films 706 to 710 is formed. The gate insulating film 705 is formed as a single layer or a stack of films containing a silicon oxide or a silicon nitride by a known means (plasma CVD method or sputtering method). Specifically, a film containing silicon oxide, a film containing silicon oxynitride, or a film containing silicon nitride oxide is formed as a single layer or a stacked layer.

  Next, a first conductive film and a second conductive film are stacked over the gate insulating film 705. The first conductive film is formed with a thickness of 20 to 100 nm by a known means (plasma CVD method or sputtering method). The second conductive film is formed with a thickness of 100 to 400 nm by a known means. The first conductive film and the second conductive film include tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), niobium ( Nd) or the like or an alloy material or a compound material containing these elements as a main component. Alternatively, a semiconductor material typified by polycrystalline silicon doped with an impurity element such as phosphorus is used. As examples of combinations of the first conductive film and the second conductive film, a tantalum nitride (TaN) film and a tungsten (W) film, a tungsten nitride (WN) film and a tungsten film, a molybdenum nitride (MoN) film and molybdenum (Mo) film | membrane etc. are mentioned. Since tungsten and tantalum nitride have high heat resistance, heat treatment for thermal activation can be performed after the first conductive film and the second conductive film are formed. In the case of a three-layer structure instead of a two-layer structure, a stacked structure of a molybdenum film, an aluminum film, and a molybdenum film is preferably employed.

  Next, a resist mask is formed using a photolithography method, etching treatment for forming a gate electrode and a gate line is performed, and a conductive film functioning as a gate electrode (also referred to as a gate electrode) 716 ~ 725 are formed.

  Next, a resist mask is formed by photolithography, and an impurity element imparting N-type is added to the crystalline semiconductor films 706 and 708 to 710 at a low concentration by ion doping or ion implantation. N-type impurity regions 711 and 713 to 715 and channel formation regions 780 and 782 to 784 are formed. The impurity element imparting N-type may be an element belonging to Group 15, for example, phosphorus (P) or arsenic (As).

  Next, a resist mask is formed by photolithography, and an impurity element imparting P-type conductivity is added to the crystalline semiconductor film 707 to form a P-type impurity region 712 and a channel formation region 781. For example, boron (B) is used as the impurity element imparting P-type.

  Next, an insulating film is formed so as to cover the gate insulating film 705 and the conductive films 716 to 725. As the insulating film, a single layer or a film containing an inorganic material such as silicon, an oxide of silicon, or a silicon nitride, or an organic material such as an organic resin is formed by a known means (plasma CVD method or sputtering method). It is formed by stacking. Next, the insulating film is selectively etched by anisotropic etching mainly in the vertical direction to form insulating films (also referred to as sidewalls) 739 to 743 that are in contact with the side surfaces of the conductive films 716 to 725 (FIG. 11 (C)). Simultaneously with the formation of the insulating films 739 to 743, insulating films 734 to 738 obtained by etching the insulating film 705 are formed. The insulating films 739 to 743 are used as a mask for doping when an LDD (Lightly Doped Drain) region is formed later.

  Next, an impurity element imparting n-type conductivity is added to the crystalline semiconductor films 706 and 708 to 710 using a resist mask formed by a photolithography method and the insulating films 739 to 743 as masks. N-type impurity regions (also referred to as LDD regions) 727, 729, 731 and 733, and second N-type impurity regions 726, 728, 730 and 732 are formed. The concentration of the impurity element contained in the first N-type impurity regions 727, 729, 731, and 733 is lower than the concentration of the impurity element in the second N-type impurity regions 726, 728, 730, and 732. Through the above steps, N-type thin film transistors 744 and 746 to 748 and a P-type thin film transistor 745 are completed.

  Note that when forming the LDD region, an insulating layer of a sidewall is preferably used as a mask. The technique using the sidewall insulating layer as a mask makes it easy to control the width of the LDD region, and the LDD region can be reliably formed.

  Next, an insulating film is formed as a single layer or a stacked layer so as to cover the thin film transistors 744 to 748 (FIG. 12A). The insulating film covering the thin film transistors 744 to 748 is formed by a known means (SOG method, droplet discharge method, etc.), an inorganic material such as silicon oxide or silicon nitride, polyimide, polyamide, benzocyclobutene, acrylic, epoxy. It is formed of a single layer or a laminated layer using an organic material such as siloxane. A siloxane-based material includes, for example, a skeleton structure composed of a bond between silicon and oxygen, a substance containing at least hydrogen as a substituent, or a skeleton structure composed of a bond between silicon and oxygen, and fluorine as a substituent. , A substance containing at least one of an alkyl group and an aromatic hydrocarbon. For example, when the insulating film covering the thin film transistors 744 to 748 has a three-layer structure, a film containing silicon oxide is formed as the first insulating film 749, a film containing resin is formed as the second insulating film 750, A film containing silicon nitride is preferably formed as the third insulating film 751.

  Note that before the insulating films 749 to 751 are formed or after one or more thin films of the insulating films 749 to 751 are formed, the crystallinity of the semiconductor film is restored and the activity of the impurity element added to the semiconductor film is increased. Heat treatment for the purpose of hydrogenation of the semiconductor film is preferably performed. For the heat treatment, thermal annealing, laser annealing, RTA, or the like is preferably applied.

  Next, the insulating films 749 to 751 are etched by photolithography to form contact holes that expose the N-type impurity regions 726 and 728 to 732 and the P-type impurity region 785. Subsequently, a conductive film is formed so as to fill the contact hole, and the conductive film is patterned to form conductive films 752 to 761 functioning as a source wiring or a drain wiring.

  The conductive films 752 to 761 are made of an element selected from titanium (Ti), aluminum (Al), and neodymium (Nd) by known means (plasma CVD method or sputtering method), or an alloy containing these elements as a main component. The material or compound material is formed as a single layer or a stacked layer. The alloy material containing aluminum as a main component corresponds to, for example, a material containing aluminum as a main component and containing nickel, or an alloy material containing aluminum as a main component and containing nickel and one or both of carbon and silicon. The conductive films 752 to 761 include, for example, a stacked structure of a barrier film, an aluminum silicon (Al—Si) film, and a barrier film, and a stacked structure of a barrier film, an aluminum silicon (Al—Si) film, a titanium nitride (TiN) film, and a barrier film. A structure should be adopted. Note that the barrier film corresponds to a thin film formed of titanium, titanium nitride, molybdenum, or molybdenum nitride. Aluminum and aluminum silicon are suitable materials for forming the conductive films 752 to 761 because they have low resistance and are inexpensive. In addition, when an upper layer and a lower barrier layer are provided, generation of hillocks of aluminum or aluminum silicon can be prevented. In addition, when a barrier film made of titanium, which is a highly reducing element, is formed, even if a thin natural oxide film is formed on the crystalline semiconductor film, the natural oxide film is reduced, and the crystalline semiconductor film is excellent. Contact can be made.

  Next, an insulating film 762 is formed so as to cover the conductive films 752 to 761 (FIG. 12B). The insulating film 762 is formed as a single layer or a stacked layer using an inorganic material or an organic material by a known means (SOG method, droplet discharge method, or the like). The insulating film 762 is preferably formed with a thickness of 0.75 to 3 μm.

  Subsequently, the insulating film 762 is etched by photolithography to form contact holes that expose the conductive films 757, 759, and 761. Subsequently, a conductive film is formed so as to fill the contact hole. The conductive film is formed of a conductive material using a known means (plasma CVD method or sputtering method). Next, the conductive film is patterned to form conductive films 763 to 765. Note that the conductive films 763 to 765 are one of a pair of conductive films included in the memory element. Therefore, the conductive films 763 to 765 are preferably formed in a single layer or a stacked layer using titanium or an alloy material or a compound material containing titanium as a main component. Since titanium has a low resistance value, it leads to a reduction in the size of the memory element, and high integration can be realized. In the photolithography method for forming the conductive films 763 to 765, wet etching may be performed in order to prevent damage to the lower thin film transistors 744 to 748, and hydrogen fluoride (HF) is used as an etchant. Alternatively, ammonia overwater may be used.

  Next, an insulating film 766 is formed so as to cover the conductive films 763 to 765. The insulating film 766 is formed as a single layer or a stacked layer using an inorganic material or an organic material by a known means (SOG method, droplet discharge method, or the like). The insulating film 762 is preferably formed with a thickness of 0.75 to 3 μm. Subsequently, the insulating film 766 is etched by photolithography to form contact holes 767 to 769 that expose the conductive films 763 to 765.

  Next, a conductive film 786 functioning as an antenna is formed in contact with the conductive film 765 (FIG. 13A). The conductive film 786 is formed using a conductive material by a known means (plasma CVD method, sputtering method, printing method, droplet discharge method). Preferably, the conductive film 786 is an element selected from aluminum (Al), titanium (Ti), silver (Ag), and copper (Cu), or an alloy material or a compound material containing these elements as a main component. It is formed by layer or lamination. Here, the conductive film 786 is formed using a paste containing silver by a screen printing method, and then heat-treated at 50 to 350 degrees. Alternatively, an aluminum film is formed by a sputtering method, and the aluminum film is formed by patterning. For the patterning of the aluminum film, a wet etching process may be used, and after the wet etching process, a heat treatment of 200 to 300 degrees may be performed. Further, the conductive film 786 is formed in any of the shapes shown in Embodiment Mode 1.

  Next, an organic compound layer 787 is formed so as to be in contact with the conductive films 763 and 764 (FIG. 13B). The organic compound layer 787 is formed by a known means (such as a droplet discharge method or a vapor deposition method). Subsequently, a conductive film 771 is formed so as to be in contact with the organic compound layer 787. The conductive film 771 is formed by a known means (a sputtering method or a vapor deposition method).

  Through the above steps, a memory element portion 789 including a stack of the conductive film 763, the organic compound layer 787, and the conductive film 771, and a memory element portion 790 including a stack of the conductive film 764, the organic compound layer 787, and the conductive film 771. Is completed.

  Note that in the above manufacturing process, the heat resistance of the organic compound layer 787 is not strong; therefore, the step of forming the organic compound layer 787 is performed after the step of forming the conductive film 786 functioning as an antenna. The conductive film 786 functioning as an antenna is provided in the same layer as the conductive films 716 to 725, the same layer as the conductive films 752 to 761, the same layer as the conductive films 763 to 765, or the same layer as the conductive film 771. It is also possible. The antenna is not formed directly by the conductive film 786 functioning as an antenna, but is provided by bonding a conductive film separately provided over another substrate and the conductive film 765 using an adhesive containing conductive fine particles or the like. It is also possible. In this case, an antenna can be formed even after the organic compound layer 787 is provided.

  Note that here, an example in which an organic compound material is used as the memory element portions 789 and 790 is described, but the present invention is not limited thereto. For example, a phase change material such as a material that reversibly changes between a crystalline state and an amorphous state or a material that reversibly changes between a first crystalline state and a second crystalline state can be used. It is also possible to use a material that changes only from an amorphous state to a crystalline state.

Materials that reversibly change between a crystalline state and an amorphous state include germanium (Ge), tellurium (Te), antimony (Sb), sulfur (S), tellurium oxide (TeOx), tin (Sn), A material having a plurality of materials selected from gold (Au), gallium (Ga), selenium (Se), indium (In), thallium (Tl), Co (cobalt), and silver (Ag), for example, Ge-Te _{-Sb-S, Te-TeO 2} -Ge-Sn, Te-Ge-Sn-Au, Ge-Te-Sn, Sn-Se-Te, Sb-Se-Te, Sb-Se, Ga-Se-Te, Ga-Se-Te-Ge, In-Se, In-Se-Tl-Co, Ge-Sb-Te, In-Se-Te, and Ag-In-Sb-Te-based materials can be given. The materials that reversibly change between the first crystal state and the second crystal state are silver (Ag), zinc (Zn), copper (Cu), aluminum (Al), nickel (Ni), A material having a plurality selected from indium (In), antimony (Sb), selenium (Se), and tellurium (Te), for example, Te—TeO ₂ , Te—TeO ₂ —Pd, Sb ₂ Se ₃ / Bi. ₂ Te ₃ is mentioned. In this material, the phase change takes place between two different crystalline states. The material changing only from the amorphous state to the crystalline state is a material having a plurality selected from tellurium (Te), tellurium oxide (TeOx), antimony (Sb), selenium (Se), and bismuth (Bi). Examples thereof include Ag—Zn, Cu—Al—Ni, In—Sb, In—Sb—Se, and In—Sb—Te.

  Next, an insulating film 772 functioning as a protective film is formed by a known means (an SOG method, a droplet discharge method, or the like) so as to cover the memory element portions 789 and 790 and the conductive film 786 functioning as an antenna. The insulating film 772 is formed using a film containing carbon such as DLC (diamond-like carbon), a film containing silicon nitride, a film containing silicon nitride oxide, or an organic material, preferably an epoxy resin.

  Next, the insulating film is etched by photolithography or laser light irradiation so that the separation layer 702 is exposed, so that openings 773 and 774 are formed (FIG. 14A).

Next, an etchant is introduced into the openings 773 and 774 to remove the peeling layer 702 (FIG. 14B). As the etchant, a gas or liquid containing halogen fluoride or an interhalogen compound is used. For example, chlorine trifluoride (ClF ₃ ) is used as a gas containing halogen fluoride. Then, the element layer 791 is peeled from the substrate 701. Note that here, the element layer 791 is a combination of the element groups of the thin film transistors 744 to 748 and the memory element portions 789 and 790 and the conductive film 786 functioning as an antenna. Note that the peeling layer 702 may be partially left without being completely removed. By doing so, it is possible to suppress the consumption of the etching agent and shorten the processing time required for removing the release layer. Further, the element layer 791 can be held on the substrate 701 even after the peeling layer 702 is removed.

  The substrate 701 from which the element layer 791 has been peeled is preferably reused for cost reduction. The insulating film 772 is formed so that the element layer 791 is not scattered after the peeling layer 702 is removed. Since the element layer 791 is small and thin, the element layer 791 is not closely attached to the substrate 701 after the peeling layer 702 is removed, and thus the element layer 791 is likely to be scattered. However, by forming the insulating film 772 over the element layer 791, the element layer 791 is weighted and scattering from the substrate 701 can be prevented. In addition, although the element layer 791 alone is thin and light, by forming the insulating film 772, the element layer 791 peeled off from the substrate 701 does not become a shape wound by stress or the like, and a certain degree of strength is secured. Can do.

  Note that although the example in which the peeling layer 702 is removed using an etching agent is described here, the peeling layer 702 is not necessarily removed by the etching agent. That is, in the case where the adhesion between the element layer 791 and the separation layer 702 is not sufficient after the openings 773 and 774 are formed, the element layer 791 can be separated from the substrate 701 using physical means. In this case, since it is not necessary to use an etching agent, the process can be shortened and the cost can be reduced.

  Next, one surface of the element layer 791 is bonded to the first sheet material 775 and completely peeled from the substrate 701 (FIG. 15A). In the case where a part of the separation layer 702 is not removed and a part is left, the element layer 791 is separated from the substrate 701 using physical means. Subsequently, a second sheet material 776 is provided on the other surface of the element layer 791, and then one or both of heat treatment and pressure treatment are performed, and the second sheet material 776 is attached. In addition, the first sheet material 775 is peeled off at the same time or after the second sheet material 776 is provided, and a third sheet material 777 is provided instead. Then, one or both of heat treatment and pressure treatment is performed, and the third sheet material 777 is bonded. Then, a semiconductor device sealed with the second sheet material 776 and the third sheet material 777 is completed (FIG. 15B).

  Note that the first sheet material 775 and the second sheet material 776 may be sealed, but the sheet material for peeling the element layer 791 from the substrate 701 and the sheet material for sealing the element layer 791 are used. When different sheet materials are used, the element layer 791 is sealed with the second sheet material 776 and the third sheet material 777 as described above. This is because, for example, when the element layer 791 is peeled from the substrate 701, the first sheet material 775 uses a sheet material having a weak adhesive force when there is a concern about adhesion not only to the element layer 791 but also to the substrate 701. Effective when you want to.

  As the second sheet material 776 and the third sheet material 777 used for sealing, a film made of polypropylene, polyester, vinyl, polyvinyl fluoride, vinyl chloride, paper made of a fibrous material, a base film (polyester, A laminated film of an adhesive synthetic resin film (such as an acrylic synthetic resin or an epoxy synthetic resin) and the like can be used. In addition, the film is subjected to heat treatment and pressure treatment by thermocompression bonding, and when performing heat treatment and pressure treatment, the adhesive layer provided on the outermost surface of the film, Alternatively, a layer (not an adhesive layer) provided in the outermost layer is melted by heat treatment and bonded by pressure. Further, an adhesive layer may be provided on the surface of the second sheet material 776 and the third sheet material 777, or the adhesive layer may not be provided. The adhesive layer corresponds to a layer containing an adhesive such as a thermosetting resin, an ultraviolet curable resin, an epoxy resin adhesive, or a resin additive. In addition, it is preferable to perform silica coating on the sheet material to be sealed in order to prevent moisture and the like from entering the inside after sealing. For example, a sheet material in which an adhesive layer, a film of polyester, etc. and a silica coat are laminated is used. be able to.

  In addition, as the second sheet material 776 and the third sheet material 777, films provided with antistatic measures for preventing static electricity (hereinafter referred to as antistatic films) can be used. Examples of the antistatic film include a film in which an antistatic material is dispersed in a resin, a film on which an antistatic material is attached, and the like. The film provided with an antistatic material may be a film provided with an antistatic material on one side, or a film provided with an antistatic material on both sides. Furthermore, a film provided with an antistatic material on one side may be attached to the layer so that the surface provided with the antistatic material is on the inside of the film, or on the outside of the film. It may be pasted. Note that the antistatic material may be provided on the entire surface or a part of the film. As the antistatic material here, a surfactant such as metal, indium and tin oxide (ITO), an amphoteric surfactant, a cationic surfactant or a nonionic surfactant is used. it can. In addition, as the antistatic material, a resin material containing a crosslinkable copolymer polymer having a carboxyl group and a quaternary ammonium base in the side chain can be used. An antistatic film can be obtained by sticking, kneading, or applying these materials to a film. By sealing with an antistatic film, it is possible to prevent the semiconductor element from being adversely affected by external static electricity or the like when handled as a product.

  Note that this embodiment can be freely combined with the above embodiment.

(Embodiment 6)
In this embodiment, the case where the semiconductor device of the present invention is used as an RFID tag capable of transmitting and receiving data without contact will be described with reference to FIGS.

  The RFID tag 80 has a function of communicating data without contact, and includes a power supply circuit 81, a clock generation circuit 82, a data demodulation circuit 83, a data modulation circuit 84, a control circuit 85 that controls other circuits, a storage circuit 86, and An antenna 87 is provided (FIG. 17A). Note that the number of memory circuits is not limited to one, and a plurality of memory circuits may be used. An SRAM, a flash memory, a ROM, an FeRAM, or the like or an organic compound layer described in the above embodiment is used for a memory element portion. Can do.

  A signal transmitted as a radio wave from the reader / writer 88 is converted into an AC electrical signal by electromagnetic induction in the antenna 87. In the power supply circuit 81, a power supply voltage is generated using an AC electrical signal, and the power supply voltage is supplied to each circuit using a power supply wiring. The clock generation circuit 82 generates various clock signals based on the AC signal input from the antenna 87 and supplies the generated clock signal to the control circuit 85. The demodulation circuit 83 demodulates the AC electric signal and supplies it to the control circuit 85. The control circuit 85 performs various arithmetic processes according to the input signal. The storage circuit 86 stores programs and data used in the control circuit 85, and can also be used as a work area during arithmetic processing. Then, data is sent from the control circuit 85 to the modulation circuit 84, and load modulation can be applied to the antenna 87 from the modulation circuit 84 in accordance with the data. The reader / writer 88 can read the data as a result by receiving the load modulation applied to the antenna 87 by radio waves.

  The RFID tag may be of a type in which the power supply voltage is supplied to each circuit by radio waves without mounting the power source (battery), or the power source (battery) is mounted on each circuit by the radio waves and the power source (battery). The power supply voltage may be supplied.

  When the semiconductor device of the present invention is used for an RFID tag or the like, the point of performing contactless communication, the point that multiple reading is possible, the point that data can be written, the point that it can be processed into various shapes, and the selection Depending on the frequency to be used, there are advantages such as wide directivity and wide recognition range. RFID tags can be used for IC tags that can identify individual information about people and objects by wireless communication without contact, labels that can be attached to target objects by label processing, wristbands for events and amusements, etc. Can be applied. Further, the RFID tag may be molded using a resin material, or may be directly fixed to a metal that hinders wireless communication. Furthermore, the RFID tag can be used for system operation such as an entrance / exit management system and a payment system.

  Next, one mode when the semiconductor device is actually used as an RFID tag will be described. A reader / writer 3200 is provided on the side surface of the portable terminal including the display portion 3210, and an RFID tag 3230 is provided on the side surface of the article 3220 (FIG. 17B). When the reader / writer 3200 is held over the RFID tag 3230 included in the product 3220, information about the product such as the description of the product, such as the raw material and origin of the product, the inspection result for each production process and the history of the distribution process, is displayed on the display unit 3210. Is done. In addition, when the product 3260 is conveyed by the belt conveyor, the product 3260 can be inspected using the reader / writer 3240 and the RFID tag 3250 provided on the product 3260 (FIG. 17C). In this manner, by using the RFID tag in the system, information can be easily acquired, and high functionality and high added value are realized.

  Note that this embodiment can be freely combined with the above embodiment.

(Embodiment 7)
The application of the semiconductor device of the present invention is wide-ranging, and can be applied to any product that can be used for production and management by clarifying information such as the history of an object without contact. For example, banknotes, coins, securities, certificate documents, bearer bonds, packaging containers, books, recording media, personal belongings, vehicles, foods, clothing, health supplies, daily necessities, chemicals, etc. The semiconductor device 20 can be provided and used in an electronic device or the like. These examples will be described with reference to FIG.

  Banknotes and coins are money that circulates in the market, and include those that are used in the same way as money in a specific area (cash vouchers), commemorative coins, and the like. Securities refer to checks, securities, promissory notes, and the like (see FIG. 18A). The certificate refers to a driver's license, a resident's card, etc. (see FIG. 18B). Bearer bonds refer to stamps, gift tickets, various gift certificates, and the like (see FIG. 18C). Packaging containers refer to wrapping paper for lunch boxes, plastic bottles, and the like (see FIG. 18D). Books refer to books, books, and the like (see FIG. 18E). The recording media refer to DVD software, video tapes, and the like (see FIG. 18F). The vehicles refer to vehicles such as bicycles, ships, and the like (see FIG. 18G). Personal belongings refer to bags, glasses, and the like (see FIG. 18H). Foods refer to food products, beverages, and the like. Clothing refers to clothing, footwear, and the like. Health supplies refer to medical equipment, health equipment, and the like. Livingware refers to furniture, lighting equipment, and the like. Chemicals refer to pharmaceuticals, agricultural chemicals, and the like. Electronic devices refer to liquid crystal display devices, EL display devices, television devices (TV receivers, flat-screen TV receivers), mobile phones, and the like.

  Forgery can be prevented by providing RFID tags on bills, coins, securities, certificates, bearer bonds, and the like. In addition, it is possible to improve the efficiency of inspection systems and rental store systems by providing RFID tags for personal items such as packaging containers, books, and recording media, foods, daily necessities, and electronic devices. it can. By providing RFID tags on vehicles, health supplies, medicines, etc., counterfeiting and theft can be prevented, and medicines can prevent mistakes in taking medicines. The RFID tag is provided by being attached to the surface of the article or embedded in the article. For example, a book may be embedded in paper, and a package made of an organic resin may be embedded in the organic resin. In the case where writing (additional writing) is performed by applying an optical action later, it is preferable to form a transparent material so that light can be applied to the portion of the memory element provided in the RFID tag. Furthermore, forgery can be effectively prevented by using a memory element in which data once written cannot be rewritten. In addition, problems such as privacy after a user purchases a product can be solved by providing a system for erasing data in a storage element provided in the RFID tag.

  In this way, by providing RFID tags on packaging containers, recording media, personal items, foods, clothing, daily necessities, electronic devices, etc., it is possible to improve the efficiency of inspection systems and rental store systems. it can. In addition, forgery and theft can be prevented by providing an RFID tag in vehicles. Moreover, by embedding it in creatures such as animals, it is possible to easily identify individual creatures. For example, by embedding an RFID tag equipped with a sensor in a living creature such as livestock, it is possible to easily manage the current health condition such as the body temperature as well as the year of birth, gender or type.

  As described above, the semiconductor device of the present invention can be provided and used in any device. Note that this embodiment can be freely combined with the above embodiment.

FIG. 6 illustrates a structural example of a semiconductor device of the present invention. FIG. 6 illustrates a structural example of a semiconductor device of the present invention. FIG. 6 illustrates a structural example of a semiconductor device of the present invention. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. FIG. 6 illustrates a structural example of a semiconductor device of the present invention. FIG. 6 illustrates a structural example of a semiconductor device of the present invention. 8A and 8B illustrate an example of a method for manufacturing an antenna formation layer in a semiconductor device of the present invention. 8A and 8B illustrate an example of a method for manufacturing an antenna formation layer in a semiconductor device of the present invention. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. FIG. 6 illustrates a structural example of a semiconductor device of the present invention. FIG. 11 shows a usage pattern of a semiconductor device of the invention. FIG. 11 shows a usage pattern of a semiconductor device of the invention.

Explanation of symbols

20 Semiconductor device 100 Substrate 101 Element formation layer 102 Conductive film 103 First insulating film 104 Second insulating film 105 Third insulating film 106 Fourth insulating film 107 Transistor 140 Groove 111 Element forming layer 112a Conductive film 112b Conductive film 145 Nozzle 146 Composition 147 Conductor 200 Substrate 201 Insulating film 202 Release layer 203 Insulating film 204 Semiconductor film 205 Thin film transistor 206 Insulating film 207 Insulating film 208 Conductive film 209 Insulating film 210 Insulating film 211 Conductive film 212 Conductive film 213 Insulating film 214 Opening 215 Etching agent 216 Substrate 217 Substrate 218 Groove 219 Element formation layer 304 Conductive film 305 Resin 306 Conductive fine particle 307 Connection region 310 Substrate 311 Insulating film 312 Conductive film 313 Insulating film 314 Opening 315 Groove 316 Conductive film 317 Antenna forming layer 18 wiring 320 substrate 321 insulating film 322 peeling layer 323 insulating film 324 insulating film 325 conductive film 326 insulating film 327 opening 328 substrate 329 opening 330 antenna formation layer 335 wiring 701 substrate 702 peeling layer 703 insulating film 704 amorphous semiconductor film 705 Insulating film 706 Crystalline semiconductor film 707 Crystalline semiconductor film 708 Crystalline semiconductor film 709 Crystalline semiconductor film 710 Crystalline semiconductor film 711 N-type impurity region 712 P-type impurity region 713 N-type impurity region 714 N-type impurity region 715 N N-type impurity region 728 N-type impurity region 728 N-type impurity region 729 N-type impurity region 728 N-type impurity region 728 N-type impurity region 729 N-type impurity region 716 Type impurity region 730 N type impurity Region 731 N-type impurity region 732 N-type impurity region 733 N-type impurity region 734 Insulating film 735 Insulating film 736 Insulating film 737 Insulating film 738 Insulating film 739 Insulating film 740 Insulating film 741 Insulating film 742 Insulating film 743 Insulating film 744 Thin film transistor 745 Thin film transistor 746 thin film transistor 747 thin film transistor 748 thin film transistor 749 insulating film 750 insulating film 751 insulating film 752 conductive film 753 conductive film 754 conductive film 755 conductive film 756 conductive film 757 conductive film 758 conductive film 759 conductive film 760 conductive film 761 conductive film 762 insulating film 763 conductive Film 764 Conductive film 765 Conductive film 766 Insulating film 767 Contact hole 768 Contact hole 769 Contact hole 771 Conductive film 772 Insulating film 773 Opening 774 Opening 780 Channel Formation region 781 channel formation region 782 channel formation region 783 channel formation region 784 channel formation region 785 P-type impurity region 786 conductive film 787 organic compound layer 789 storage element portion 790 storage element portion 791 element layer 775 first sheet material 776 second Sheet material 777 Third sheet material 81 Power supply circuit 82 Clock generation circuit 83 Data demodulation circuit 84 Data modulation circuit 85 Control circuit 86 Memory circuit 87 Antenna 88 Reader / writer 3210 Display unit 3200 Reader / writer 3220 Product 3230 RFID tag 3240 Reader / Writer 3250 RFID Tag 3260 Products

Claims (13)

A first layer including a transistor on a substrate;
A second layer including an insulating film and a conductive film on the insulating film on the first layer;
The first layer and the second layer are bonded together by a conductive adhesive,
The insulating film has at least a first groove and a second groove;
The conductive film extends along the side surface and bottom surface of the first groove, the top surface of the insulating film provided between the first groove and the second groove, and the side surface and bottom surface of the second groove. Provided,
The semiconductor, wherein the conductive film is in contact with the adhesive at the bottom surface of the first groove or the second groove, and is electrically connected to the transistor through the adhesive apparatus. In claim 1 ,
The semiconductor device, wherein the first groove and the second groove are provided in a coil shape in a direction perpendicular to the surface of the substrate. In claim 1 or 2 ,
The semiconductor device, wherein the substrate has flexibility. In any one of Claims 1 thru | or 3 ,
An end portion of the insulating film in contact with the first groove or the second groove is curved. In any one of Claims 1 thru | or 4 ,
The semiconductor device, wherein the conductive film is in contact with an upper surface of the insulating film at an end portion of the insulating film in contact with the first groove or the second groove. In any one of Claims 1 thru | or 5 ,
The semiconductor device, wherein the conductive film contains copper, aluminum, silver, gold, chromium, molybdenum, titanium, tantalum, tungsten, nickel, or carbon. In any one of Claims 1 thru | or 6 ,
The insulating film has a third groove and a fourth groove;
The conductive film includes a side surface and a bottom surface of the third groove, a top surface of the insulating film provided between the third groove and the fourth groove, and a side surface and a bottom surface of the fourth groove. Is provided along with
The distance between the bottom surface of the first or second groove and the top surface of the insulating film is larger than the distance between the bottom surface of the third or fourth groove and the top surface of the insulating film. A semiconductor device. Forming a release layer on the first substrate;
Forming a first insulating film on the release layer;
Forming a second insulating film on the first insulating film;
Forming at least a first groove and a second groove in the second insulating film;
Along the side surface and bottom surface of the first groove, the top surface of the second insulating film provided between the first groove and the second groove, and the side surface and bottom surface of the second groove. Forming a conductive film;
Removing the first and second insulating films partially to form an opening exposing the release layer;
Removing the release layer by introducing an etchant into the opening;
A second substrate is bonded to the second insulating film and the conductive film, and the first substrate is peeled from the first insulating film.
The first insulating film is partially removed, the conductive film is partially exposed at the bottom surface of the first groove or the second groove, and the first and second insulating films and the Forming a first layer including a conductive film and the second substrate;
The first layer is attached to the second layer including the transistor provided over the third substrate using a conductive adhesive,
By the bonding, the conductive film is in contact with the adhesive at the bottom surface of the first groove or the second groove, and is electrically connected to the transistor through the adhesive. A method for manufacturing a semiconductor device. In claim 8 ,
A method for manufacturing a semiconductor device, wherein the first groove and the second groove are formed in a coil shape in a direction perpendicular to the surface of the first substrate. In claim 8 or 9 ,
The method for manufacturing a semiconductor device, wherein the second and third substrates have flexibility. Any one to Oite of claims 8 to 10,
A manufacturing method of a semiconductor device, wherein an end portion of the second insulating film in contact with the first groove or the second groove is curved. In any one of Claims 8 thru | or 11 ,
The method for manufacturing a semiconductor device, wherein the conductive film is in contact with an upper surface of the second insulating film at an end portion of the second insulating film in contact with the first groove or the second groove. In any one of Claims 8 thru | or 12 ,
The method for manufacturing a semiconductor device, wherein the conductive film contains copper, aluminum, silver, gold, chromium, molybdenum, titanium, tantalum, tungsten, nickel, or carbon.

Images