JP4908936B2 - Method for manufacturing semiconductor device - Google Patents

Description

  The invention disclosed in this specification relates to a method for manufacturing a semiconductor device. In particular, the present invention relates to a method for manufacturing a semiconductor device capable of communicating data by wireless communication.

  In recent years, development of semiconductor devices capable of communicating data by wireless communication has been actively promoted. Such semiconductor devices are called IC tags, ID tags, RF (Radio Frequency) tags, RFID (Radio Frequency Identification) tags, wireless tags, electronic tags, wireless processors, wireless memories, wireless chips, etc. (for example, , See Patent Document 1).

  Generally, a wireless chip is composed of an antenna and an IC chip, and the IC chip is formed by an element layer having a transistor or the like provided on a silicon wafer. In recent years, it has been required to reduce the cost of wireless chips and to manufacture flexible wireless chips. The wireless chip may be used by being fixed on the surface of the article or by being embedded in the article. When the wireless chip is attached to the article having curvature or flexibility, the wireless chip may be fixed. This is because the wireless chip itself is desired to be flexible.

  As one method for reducing the cost, there is a method in which a wireless chip is manufactured by providing an element layer over a substrate typified by glass or the like as a substitute for a silicon wafer.

Further, as a solution to the problem relating to the flexibility of the wireless chip itself, the thickness of the substrate (including a silicon wafer) on which the wireless chip is formed is typically reduced to 100 μm or less. There is a way.
JP 2004-282050 A

A wireless chip is usually manufactured by forming a plurality of chips on a substrate and then dividing them into individual chips. In this cutting process, there has been a problem that an edge or corner of the substrate is chipped (hereinafter referred to as “chipping”). In particular, when the substrate is thinned, the problem is remarkable. Further, when chipping occurs, there is a problem that the glass substrate is easily cracked. As a result, the reliability and the yield of the wireless chip are reduced.

  In view of the above problems, an object of the present invention is to provide a method for manufacturing a semiconductor device having flexibility and excellent physical strength.

The structure of the invention related to the method for manufacturing a semiconductor device disclosed in this specification is as follows.
Forming an element layer including a plurality of integrated circuits on one surface of the substrate;
Forming a hole having a curvature in a part of one side of the substrate;
Thin the substrate,
Corresponding to the position where the hole is formed, the substrate is cut so that the cut surface of the substrate has a curvature to form a laminate having at least one of the plurality of integrated circuits. To do.

  Further, in the structure of the invention relating to the method for manufacturing a semiconductor device disclosed in this specification, an element layer including a plurality of integrated circuits is formed over one surface of a substrate, and a curvature is partially formed on one surface side of the substrate. Forming a hole having Then, the other surface of the substrate is ground, the other ground surface of the substrate is polished, and the cut surface of the substrate has a curvature corresponding to the position where the hole is formed. Is cut to form a laminate having at least one of the plurality of integrated circuits.

  In another structure of the invention relating to a method for manufacturing a semiconductor device disclosed in this specification, an element layer including a plurality of integrated circuits is formed on one surface of a substrate, and laser is irradiated from the upper surface of the element layer. In this way, a hole having a curvature is formed in a part of one surface side of the substrate. Then, the other surface of the substrate is ground, the other ground surface of the substrate is polished, and a laser is irradiated from the other polished surface of the substrate corresponding to the position where the hole is formed. Thus, the substrate is cut so that the cut surface of the substrate has a curvature, and a stacked body including at least one of the plurality of integrated circuits is formed.

  In another structure of the invention relating to a method for manufacturing a semiconductor device disclosed in this specification, an element layer including a plurality of integrated circuits is formed on one surface of a substrate, and laser is irradiated from the upper surface of the element layer. In this way, a hole having a curvature is formed in a part of one surface side of the substrate. Then, the other surface of the substrate is ground, the other ground surface of the substrate is polished, and a laser is irradiated from the other polished surface of the substrate corresponding to the position where the hole is formed. Thus, the substrate is cut so that the cut surface of the substrate has a curvature to form a laminate including at least one of the plurality of integrated circuits, and two flexible films are used. The both sides of the laminated body are sealed. Moreover, it is good also as a structure which seals the single side | surface of the said laminated body using the film which has flexibility instead of sealing both surfaces of the said laminated body.

  In the above structure, the laser is an ultraviolet (UV) laser.

  In the above structure, the cut surface of the polished substrate is convex.

  In the above structure, the polished substrate has a thickness of 2 μm to 50 μm.

  In the above structure, the stacked body includes an antenna.

  In this specification, an “element layer” refers to a layer in which a plurality of integrated circuits such as a CPU (central processing unit), a memory, and a microprocessor are provided by using at least an element typified by a thin film transistor (TFT). . Further, the element layer can take a form having an antenna in addition to the integrated circuit.

  Since the semiconductor device of the present invention has a curvature on a cut surface (hereinafter, sometimes referred to as an “end face”) of a substrate having a thickness of less than 100 μm (preferably 2 μm or more and 50 μm or less), chipping is performed. It is possible to prevent the occurrence of cracks and the occurrence of cracks from the end face of the substrate. As a result, a highly reliable semiconductor device that has flexibility and can withstand long-term use can be provided with high yield. In addition, although it is difficult to process the substrate after grinding and polishing, the present invention provides a curvature on one surface side of the substrate before thinning the substrate using physical means (for example, grinding or polishing). In order to form the opening having the curvature, the end surface of the substrate can be easily curved.

  Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments and examples below. Note that in the structures of the present invention described below, the same reference numerals are used in common in different drawings.

  Also, in this specification, various materials and numerical conditions are described below, but these are the target material and numerical conditions to be formed to the last, and the elemental composition of what was actually formed It is easily understood by those skilled in the art that some errors may occur in the physical property values. In addition, it is easily understood by those skilled in the art that the results themselves measured by various analysis methods usually include errors. Therefore, the present invention is not construed as being limited to the description of the embodiments and examples shown below, and includes some errors from conditions such as materials and numerical values described in this specification. Are also included in the scope of the present invention.

(Embodiment 1)
In this embodiment, a structural example of a method for manufacturing a semiconductor device of the present invention including a thin film transistor and an antenna will be described with reference to drawings.

  First, the base film 12 is formed on one surface of the substrate 11 (FIG. 1A). Note that when there is a concern about contamination from the substrate, it is preferable to form the base film 12 on the substrate 11, but the base film 12 is not necessarily provided. In this specification, “one surface of the substrate 11” refers to a surface on the side where the base film 12 and the element layer 13 to be formed later are provided.

  As the substrate 11, a glass substrate, a quartz substrate, a silicon substrate, a metal substrate, a ceramic substrate, a stainless steel substrate, a plastic substrate, an acrylic substrate, or the like can be used, but a glass substrate is preferably used. There is no big restriction | limiting in the area and shape of a glass substrate. For this reason, when a glass substrate is used as the substrate 11, for example, one side is 1 meter or longer and a rectangular shape can be easily used, and productivity can be significantly improved. This is a significant advantage compared to the case of using a circular silicon substrate. In view of the cost of the substrate itself, it is preferable to use a glass substrate rather than a quartz substrate, a silicon substrate, a metal substrate, a ceramic substrate, a stainless steel substrate, or the like. In particular, when it is required to increase the size of the substrate, this becomes remarkable, and it is preferable to use a glass substrate even in view of mass productivity. In the present embodiment, a glass substrate is used as the substrate 11.

  The base film 12 may be provided as a single layer, or a plurality of films may be stacked. The base film 12 has a function of preventing an alkali metal such as sodium (Na) contained in a glass substrate from entering an element such as a thin film transistor included in an element layer 13 provided later. Yes.

The base film 12 is formed by a silicon oxide film (SiOx film), a silicon nitride film (SiNx film), a silicon oxide film containing nitrogen (SiO _x N _y film) (x> y) (x , Y is a positive integer), a silicon nitride film containing oxygen (SiN _x O _y film) (x> y) (x, y are positive integers), or a single layer structure of an insulating film having at least oxygen or nitrogen, Alternatively, these stacked structures can be used. For example, in the case where the base film 12 is provided with a two-layer structure, a silicon nitride film containing oxygen may be formed as a first insulating film, and a silicon oxide film containing nitrogen may be formed as a second insulating film. In this embodiment, the base film 12 is formed as a two-layer structure of a silicon nitride film containing oxygen and a silicon oxide film containing nitrogen formed on the silicon nitride film containing oxygen.

  Next, a layer 13 (hereinafter referred to as “element layer 13”) provided with a plurality of integrated circuits each including an element such as a thin film transistor is formed on the base film 12. Subsequently, an insulating film 14 is formed so as to cover the base film 12 and the element layer 13 (FIG. 1B). Since the insulating film 14 has a function as a protective layer for ensuring the strength of the element layer 13, hereinafter, the insulating film 14 may be referred to as a “protective layer” in this specification. The insulating film 14 is preferably formed so as to also cover the side surfaces of the base film 12 and the element layer 13. In this embodiment mode, the insulating film 14 is provided over the entire surface so as to cover the base film 12 and the element layer 13, but it is not necessarily provided over the entire surface and may be selectively provided. Further, although the insulating film 14 is provided in this embodiment mode, the present invention can also be implemented as a structure in which the insulating film 14 is not provided.

  The element layer 13 includes a plurality of integrated circuits, and the plurality of integrated circuits are divided later to become part of a semiconductor device (chip). That is, a later semiconductor device (chip) has a layer provided with at least one integrated circuit. An integrated circuit includes at least an element typified by a thin film transistor (TFT) or a resistor. By using the element, any integrated circuit such as a CPU, a memory, or a microprocessor can be formed. The element layer 13 may take a form having an antenna in addition to an element such as a thin film transistor. For example, an integrated circuit including a thin film transistor operates using an alternating voltage generated by an antenna and modulates an alternating voltage applied to the antenna to transmit electromagnetic waves or radio waves to a reader / writer. be able to. The antenna may be formed together with the thin film transistor, or may be formed separately from the thin film transistor and electrically connected later. In the case where the antenna is formed separately from the thin film transistor, the insulating film 14 is preferably not provided over the element layer 13 in order to facilitate electrical connection between the antenna and the thin film transistor in a later step.

  The insulating film 14 is formed of a film containing carbon such as DLC (diamond-like carbon), a silicon oxide film containing nitrogen, a silicon nitride film containing oxygen, a film made of an organic material (for example, a resin material such as epoxy), or the like. . As a method for forming the insulating film 14, various CVD methods such as a sputtering method and a plasma CVD method, a spin coating method, a droplet discharge method, a printing method, and the like can be used.

  Next, an opening (also referred to as “cut” or “hole”) having a curvature is formed in the substrate 11, the base film 12, the element layer 13, and the insulating film 14 (FIG. 1C). An opening having a curvature refers to one whose cross-sectional area changes (preferably continuously changes) when cut perpendicular to the depth of the opening. For example, as shown in FIG. 1C, the opening is preferably formed so that the cross-sectional area decreases as the depth of the opening increases. Further, the opening is provided in a region avoiding the thin film transistor or the like constituting the element layer 13 or the end face of the substrate 11. In the present invention, it is important to form an opening having a curvature in a part of one surface side of the substrate 11 before performing subsequent grinding and polishing steps of the substrate 11. The substrate after grinding and polishing is difficult to process because the substrate is thinned, but the present invention has an opening (hole) having a curvature on one surface side of the substrate before grinding and polishing. Since it forms, a curvature can be easily given to the end surface of a board | substrate.

  As a method of forming the opening, a method of irradiating a laser beam (for example, an ultraviolet (UV) laser (a laser having a wavelength in the ultraviolet region)) can be used. The laser light conditions are not particularly limited, and those having a large absorption coefficient with respect to the materials used for the base film 12, the element layer 13, and the insulating film 14 are preferably used. Note that a method other than laser light irradiation may be used as long as the opening is formed as illustrated in FIG.

  Next, the substrate 11 is thinned using physical means. For example, the other surface of the substrate 11 is ground by the grinding means 31 (FIG. 2A). At this time, the substrate 11 is ground to a thickness of 100 μm or less. Generally, in this grinding process, the other surface of the substrate 11 is ground by rotating one or both of the stage 53 to which the substrate 11 is fixed and the grinding means 31. The grinding means 31 corresponds to, for example, a grindstone. In this specification, “the other surface of the substrate 11” is a surface opposite to the surface on which the base film 12 and the element layer 13 are provided, and is the side to be ground by the grinding means 31. Of the face.

  In the present embodiment, in the grinding process, grinding is performed using a jig as shown in FIG. First, the film 15 is pasted so as to cover the insulating film 14. Next, the film 15 is bonded to the frame 51. Although the reverse order may be used, it is preferable to apply the insulating film 14 to the film 15 and bond the frame 51 at the same time.

  The film 15 is used to fix the substrate when the substrate 11 is ground and polished, and the film 15 and the insulating film 14 are separated in a later step. For this reason, it is preferable to use a film having a property that the adhesive strength is strong in a normal state and the adhesive strength is weakened when irradiated with light, and specifically, the adhesive strength when irradiated with ultraviolet light. It is better to use a UV tape that weakens. That is, by using a UV tape as the film 15, the film 15 and the insulating film 14 can be easily separated in a later process. It is also preferable to use a film having a property of stretching when pulled (referred to as an “expanded film”). For example, a vinyl chloride resin or a silicon resin may be used as the film 15.

  Next, the film 15 to which the substrate 11 is bonded is placed on the suction jig. At this time, the film 15 is installed so that one surface of the substrate 11 is higher than one surface of the frame 51. The suction jig is composed of a porous chuck 52 and a stage 53, for example. The porous chuck 52 is made of a porous material and has a vacuum chuck mechanism. Thereafter, as described above, the other surface of the substrate 11 is ground by the grinding means 31. Through the above steps, the grinding of the substrate 11 is completed.

  Next, the other surface of the substrate 11 is polished by the polishing means 32 while the film 15 to which the substrate 11 is bonded is placed on the suction jig used in the grinding step (FIG. 2B). . The substrate 11 may be polished so as to be thinner than 100 μm, but is preferably polished to be 2 μm to 50 μm (more preferably 4 μm to 30 μm). Thus, by thinning the substrate 11 (for example, grinding and polishing), the substrate 11 becomes flexible, and a flexible semiconductor without using a method of peeling the element layer from the substrate 11. An apparatus can be manufactured. Also in this polishing step, the surface of the substrate 11 is polished by rotating one or both of the stage 53 to which the substrate 11 is fixed and the polishing means 32, as in the above-described grinding step. The polishing means 32 corresponds to, for example, a polishing pad. Thereafter, cleaning is performed as necessary to remove dust generated by the grinding and polishing processes. Moreover, you may perform the process dried after wash | cleaning.

  Next, the boundary line between the integrated circuits (between the integrated circuits) is formed by irradiating the region corresponding to the position where the above-described opening (hole) is formed from the other surface of the substrate 11. Disconnect. (FIG. 2 (C)). At this time, it is important in the present invention to cut the substrate 11 so that the cut surface has a curved shape, and preferably the end surface of the substrate becomes convex as shown in FIG. By doing so, generation of chipping and cracks can be suppressed to the maximum. In addition, although the cut surface of the board | substrate 11 has shown the structure which has the center C1 of the curvature radius r1 like the enlarged view of the cut surface of the board | substrate 11 shown in FIG.2 (C), as shown in FIG. Formed when the laser beam is irradiated to the area corresponding to the center C2 of the radius of curvature r2 of the hole and the position where the hole is formed from the other surface of the substrate 11 when the hole having the curvature is formed. The center C3 of the curvature radius r3 of the cut surface may be different. The element provided in the element layer 13 is not cut, and the insulating film provided in the element layer 13 is cut. In this way, the element layer 13 (a layer including a plurality of integrated circuits) is separated into each integrated circuit, and a stacked body 16 (hereinafter referred to as “a stacked body including an integrated circuit”) having at least one of the plurality of integrated circuits. Abbreviated as “16”).

  Next, the film 15 is stretched so that a gap is formed between the stacked bodies 16 having integrated circuits (FIG. 3A). At this time, in order to make the gaps between the stacked bodies 16 each having an integrated circuit uniform, it may be pulled evenly in the plane direction. Subsequently, the film 15 is irradiated with light (FIG. 3B). For example, when the film 15 is a UV tape, ultraviolet light is irradiated. By irradiating the film 15 with light, the adhesive force of the film 15 is weakened, and the adhesion between the film 15 and the laminate 16 having an integrated circuit is reduced. And it will be in the state which can isolate | separate the laminated body 16 which has an integrated circuit from the film 15 by a physical means.

  In this specification, a physical means is a means recognized by physics, and specifically refers to a mechanical means or a mechanical means having a process that can be applied to the laws of mechanics. It refers to a means of changing the mechanical energy (mechanical energy). In other words, peeling using physical means means peeling by applying an impact (stress) from the outside using, for example, the wind pressure of a gas blown from a nozzle, a load using an ultrasonic wave or a wedge-shaped member, or the like. Say.

  In the above step, the step of irradiating the film 15 with light is performed after the step of stretching the film 15, but the present invention is not limited to this order. A step of stretching the film 15 may be performed after the step of irradiating the film 15 with light.

  Next, sealing treatment is performed using a substrate (film) as necessary. There are two methods for the sealing process. First, the first method will be described.

  In the first method, first, the laminate 16 having an integrated circuit is separated from the film 15 by the pickup means 21. Subsequently, in order to adhere one surface of the laminate 16 having an integrated circuit to the first substrate 18, the laminate 16 having an integrated circuit is placed on the first substrate 18 by the pickup means 21.

  Next, the other surface of the stacked body 16 having an integrated circuit is bonded to the second base 19 (FIG. 3C). This process is performed using a laminating apparatus (bonding apparatus), and the laminating apparatus includes a supply roll 23 around which the second substrate 19 is wound, and a laminating apparatus having one or both of a heating unit and a pressing unit. And a roll 22. And the laminating process of the laminated body 16 which has an integrated circuit is performed continuously by the laminating roll 22 and the supply roll 23 rotating sequentially. Specifically, the other surface of the laminate 16 having an integrated circuit is adhered to the second base 19 by the laminate roll 22, and one or both of heat treatment and pressure treatment are performed to have the integrated circuit. The stacked body 16 is sealed with the first base 18 and the second base 19.

  As the first base 18 and the second base 19 used for sealing, a film with antistatic measures (hereinafter referred to as “antistatic film”), polypropylene, polyester, vinyl, polyvinyl fluoride, vinyl chloride, etc. Film made of fiber, paper made of fibrous material, base film (polyester, polyamide, inorganic vapor-deposited film (film on which inorganic material such as silicon oxide or alumina is vapor-deposited), paper, etc.) and adhesive synthetic resin A laminated film with a film (acrylic synthetic resin, epoxy synthetic resin or the like) can be used. Examples of the antistatic film include a film in which an antistatic material is dispersed in a resin, a film on which an antistatic material is attached, and the like. The film with an antistatic material attached may be a film with an antistatic material attached to one side, or a film with an antistatic material attached to both sides. Good. Also, a film with an antistatic material affixed on one side may be affixed so that the surface with the antistatic material affixed is on the inside of the film, or on the outside of the film It may be pasted. The antistatic material may be attached to the entire surface or a part of the film. The antistatic materials include metals such as aluminum, oxides (ITO) containing indium and tin, metal salts of amphoteric surfactants, imidazoline type amphoteric surfactants, carboxyl groups and quaternary ammonium in the side chain. Examples thereof include a resin material containing a crosslinkable copolymer polymer having a base. By using the antistatic film as the first base 18 and the second base 19, it is possible to prevent the integrated circuit from being adversely affected by external static electricity.

  The film is bonded to the laminate 16 having an integrated circuit by thermocompression bonding (heat treatment and pressure treatment). When performing the heat treatment and the pressure treatment, the adhesive layer provided on the outermost surface of the film or the layer (not the adhesive layer) provided on the outermost layer is melted by the heat treatment and adhered by pressure. Further, an adhesive layer may be provided on the surfaces of the first base 18 and the second base 19, or the adhesive layer may not be provided. The adhesive layer corresponds to a layer containing an adhesive such as a thermosetting resin, an ultraviolet curable resin, an epoxy resin adhesive, or a resin additive. In addition, it is preferable to perform silica coating on the sheet material to be sealed in order to prevent moisture and the like from entering the inside after sealing. For example, a sheet material obtained by laminating an adhesive layer, a film such as polyester, and silica coating is used. be able to.

  Hereinafter, the laminating process will be described in more detail. The laminate roll 22 and the supply roll 23 are sequentially rotated, and the supply roll 23 supplies the second base 19 to the laminate roll 22. The first substrate 18 provided with the stacked body 16 having a plurality of integrated circuits is sequentially conveyed by the conveying means 24. In the lamination process, when the first substrate 18 to which the laminated body 16 having an integrated circuit is bonded passes between the laminating roll 22 and the conveying means 24, the laminated circuit 22 and the conveying means 24 are used to form the integrated circuit. This corresponds to a process in which one or both of the pressure treatment and the heat treatment are performed on the stacked body 16, the first base 18, and the second base 19. When the lamination process is performed, the stacked body 16 having an integrated circuit is sealed by the first base 18 and the second base 19. The transport unit 24 corresponds to a belt conveyor, a plurality of rollers, or a robot arm. When the heat treatment is performed by the laminating roll 22 and the conveying unit 24, the laminating roll 22 has a heating unit corresponding to a heater or oil of a heating wire.

  Next, the first base 18 and the second base 19 are cut by the cutting means 25 (FIG. 3D). The cutting means 25 corresponds to a dicer, a laser, a wire saw or the like. The semiconductor device 17 (chip) is completed through the above steps.

  Next, the second method will be described.

  First, the first base 18 is provided so as to cover one surface of the stacked body 16 having an integrated circuit (FIG. 4A). Next, the first base 18 is heated by the heating means 26 so that one surface of the laminate 16 having an integrated circuit is bonded to the first base 18. Subsequently, in order to separate the laminate 16 having an integrated circuit from the film 15, the first base 18 and the film 15 to which the laminate 16 having an integrated circuit is bonded are separated (FIG. 4B).

  Next, the other surface of the multilayer body 16 having an integrated circuit is bonded to the second base 19, and the multilayer body 16 having an integrated circuit is sealed by the first base 18 and the second base 19 ( FIG. 3 (C)). Subsequently, the first base 18 and the second base 19 are cut (FIG. 3D). These steps may be performed in the same manner as the first method. The semiconductor device 17 (chip) is completed through the above steps.

  According to the second method, the first base 18 is provided so as to cover one surface of the laminate 16 having an integrated circuit after the film 15 is irradiated with light (FIG. 4 ( A)). However, the present invention is not limited to this order, and the first base 18 is provided so as to cover one surface of the laminate 16 having an integrated circuit, and the first base 18 is heated, In order to reduce the adhesion between the laminated body 16 having an integrated circuit, the film 15 may be irradiated with light.

  In this embodiment, the laminate 16 having an integrated circuit is sealed using two films of the first base 18 and the second base 19, but the integrated circuit is formed using only the first base 18. You may seal the laminated body 16 which has. This is because the substrate 11 itself in the stacked body 16 having an integrated circuit plays a role of preventing entry of moisture and impurities from the outside. Therefore, the structure may be such that the surface of the insulating film 14 (the element layer 13 in the case where the insulating film 14 is not provided) in the stacked body 16 having an integrated circuit is covered with the first base 18.

  As described above, after the element layer is formed on the substrate, the substrate is thinned (for example, ground or polished) so that the thickness of the substrate is 2 μm or more and 50 μm or less, preferably 4 μm or more and 30 μm or less. By forming so that has a curvature, a highly reliable semiconductor device can be manufactured. In addition, since a layer including a plurality of integrated circuits is divided into individual integrated circuits and at the same time a curvature is given to the end surface of the substrate, a highly reliable semiconductor device can be manufactured without increasing the number of steps. .

(Embodiment 2)
In this embodiment, a method for manufacturing a semiconductor device of the present invention including a thin film transistor and an antenna will be described with reference to drawings. In particular, the structure of the element layer will be described in detail.

  First, a base film 703 is formed over a substrate 701 (FIG. 5A). As the material and the formation method of the substrate 701 and the base film 703, those described in Embodiment Mode 1 can be used, and description thereof is omitted here.

  Next, an amorphous semiconductor film 704 (eg, a film containing amorphous silicon as a main component) is formed over the base film 703. The amorphous semiconductor film 704 is formed with a thickness of 25 to 200 nm (preferably 30 to 150 nm) by various CVD methods such as a sputtering method and a plasma CVD method. Subsequently, the amorphous semiconductor film 704 is crystallized to form a crystalline semiconductor film. As crystallization methods, laser crystallization, thermal crystallization using an RTA or furnace annealing furnace, thermal crystallization using a metal element that promotes crystallization, thermal crystallization using a metal element that promotes crystallization A method combining a laser crystallization method and a laser crystallization method can be used. After that, the obtained crystalline semiconductor film is patterned to form crystalline semiconductor films 706 to 710 (FIG. 5B). Note that the base film 703 and the amorphous semiconductor film 704 can be formed successively without being exposed to the air. In this specification, “patterning” refers to etching into a desired shape.

  An example of a manufacturing process of the crystalline semiconductor films 706 to 710 will be briefly described below. As a method for crystallizing an amorphous semiconductor film, a laser crystallization method, a thermal crystallization method using an RTA or a furnace annealing furnace, a thermal crystallization method using a metal element that promotes crystallization, or a metal that promotes crystallization Examples include a combination of a thermal crystallization method using an element and a laser crystallization method. As another crystallization method, crystallization may be performed by applying a DC bias to generate thermal plasma and applying the thermal plasma to the semiconductor film.

  In this embodiment, after an amorphous semiconductor film with a thickness of 40 to 300 nm is formed by a plasma CVD method, the amorphous semiconductor film is crystallized by heat treatment to form crystalline semiconductor films 706 to 710. As the heat treatment, a laser heating furnace, laser irradiation, irradiation of light emitted from a lamp instead of laser light (hereinafter referred to as lamp annealing), or a combination thereof can be used.

When laser irradiation is used, continuous wave laser light (CW laser light) or pulsed laser light (pulse laser light) can be used. Usable laser beams include gas lasers such as Ar laser, Kr laser, and excimer laser, single crystal YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline (ceramic) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ of Nd, Yb, Cr, Ti, Ho, Er, Tm, Ta as dopants are added as a medium. Lasers, glass lasers, ruby lasers, alexandrite lasers, Ti: sapphire lasers, copper vapor lasers, and gold vapor lasers that oscillate from one or more types can be used. By irradiating the fundamental wave of such laser light and the second to fourth harmonics of these fundamental waves, a crystal having a large grain size can be obtained. For example, the second harmonic (532 nm) or the third harmonic (355 nm) of an Nd: YVO ₄ laser (fundamental wave 1064 nm) can be used. Energy density of the laser is about 0.01 to 100 MW / cm ² (preferably 0.1 to 10 MW / cm ²⁾ is required. Then, irradiation is performed at a scanning speed of about 10 to 2000 cm / sec.

Note that single crystal YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline (ceramic) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ , dopants Nd, Yb, Cr, Ti, Ho, Er, Tm, Ta, one or more added lasers, Ar ion lasers, and Ti: sapphire lasers that are continuously oscillated. It is also possible to perform pulse oscillation at an oscillation frequency of 10 MHz or more by performing Q switch operation, mode synchronization, or the like. When laser light is oscillated at an oscillation frequency of 10 MHz or more, the semiconductor film is irradiated with the next pulse during the period from when the semiconductor film is melted by the laser to solidification. Therefore, unlike the case of using a pulse laser having a low oscillation frequency, the solid-liquid interface can be continuously moved in the semiconductor film, so that crystal grains continuously grown in the scanning direction can be obtained.

  In the case of crystallization using the above-described continuous wave laser or laser light oscillated at a frequency of 10 MHz or more, the surface of the crystallized semiconductor film can be made flat. As a result, it is possible to reduce the thickness of the gate insulating film 705 to be formed later, and contribute to improving the breakdown voltage of the gate insulating film.

  In addition, when ceramic (polycrystal) is used as a medium, it is possible to form the medium in a free shape in a short time and at low cost. When a single crystal is used, a cylindrical medium having a diameter of several millimeters and a length of several tens of millimeters is usually used. However, when ceramic is used, a larger one can be made.

  Since it is difficult to change the concentration of dopants such as Nd and Yb in the medium that directly contributes to light emission, whether it is single crystal or polycrystal, there is a certain limit to improving the laser output by increasing the dopant concentration. . However, in the case of ceramic, since the size of the medium can be remarkably increased as compared with the single crystal, a great improvement in output can be expected.

  Further, in the case of ceramic, a medium having a parallelepiped shape or a rectangular parallelepiped shape can be easily formed. When a medium having such a shape is used to cause oscillation light to travel in a zigzag manner inside the medium, the oscillation optical path can be made longer. As a result, amplification is increased and oscillation can be performed with high output. Further, since the laser light emitted from the medium having such a shape has a quadrangular cross-sectional shape at the time of emission, it is advantageous for shaping into a linear beam as compared with a round beam. By shaping the emitted laser light by using an optical system, it is possible to easily obtain a linear beam having a short side length of 1 mm or less and a long side length of several mm to several m. Become. In addition, by irradiating the medium with the excitation light uniformly, the linear beam has a uniform energy distribution in the long side direction.

  By irradiating the semiconductor film with this linear beam, the semiconductor film can be annealed more uniformly. If uniform annealing is required up to both ends of the linear beam, it is sufficient to arrange a slit at both ends to shield the energy attenuation portion.

  When a semiconductor film is annealed using a linear beam having a uniform intensity obtained in this way and a semiconductor device is manufactured using this semiconductor film, the characteristics of the semiconductor device are made good and uniform. Can do.

  An example of a specific method is given as a thermal crystallization method using a metal element that promotes crystallization. After a solution containing nickel, which is a metal element that promotes crystallization, is held on the amorphous semiconductor film, the amorphous semiconductor film is subjected to dehydrogenation treatment (500 ° C., 1 hour), and thermal crystallization. Processing (550 ° C., 4 hours) is performed to form a crystalline semiconductor film. Thereafter, laser light may be irradiated as necessary, and the crystalline semiconductor films 706 to 710 may be formed by a patterning process using a photolithography method.

  The thermal crystallization method using a metal element that promotes crystallization is advantageous in that the amorphous semiconductor film can be crystallized at a low temperature in a short time and the crystal orientation is aligned. Since it remains in the semiconductor film, the off-current increases and the characteristics are not stable. Therefore, an amorphous semiconductor film functioning as a gettering site is preferably formed over the crystalline semiconductor film. Since the amorphous semiconductor film serving as a gettering site needs to contain an impurity element such as phosphorus or argon, it is preferably formed by a sputtering method which can contain argon at a high concentration. Then, heat treatment (RTA method or thermal annealing using a furnace annealing furnace) is performed to diffuse the metal element in the amorphous semiconductor film, and then the amorphous semiconductor film containing the metal element is removed. To do. By performing such a gettering process, the content of the metal element in the crystalline semiconductor film can be reduced or removed.

Next, a gate insulating film 705 covering the crystalline semiconductor films 706 to 710 is formed. The gate insulating film 705 may be formed by various CVD methods such as a sputtering method and a plasma CVD method. Specifically, a silicon oxide film (SiOx film), a silicon nitride film (SiNx film), a silicon oxide film containing nitrogen (SiO _x N _y film) (x> y) (x and y are positive integers), oxygen A silicon nitride film containing Si (SiN _x O _y film) (x> y) (x and y are positive integers) is formed as a single layer structure, or these films are appropriately stacked. Further, by performing high-density plasma treatment on the crystalline semiconductor films 706 to 710 in an atmosphere containing oxygen, nitrogen, or oxygen and nitrogen, the surfaces of the crystalline semiconductor films 706 to 710 are oxidized or nitrided, and the gate An insulating film may be formed. A gate insulating film formed by high-density plasma treatment has excellent uniformity in film thickness, film quality, and the like as compared with a film formed by a CVD method, a sputtering method, or the like, and can form a dense film.

In this specification, “high density plasma treatment” means that the electron density of plasma is 1 × 10 ¹¹ cm ⁻³ or more and 1 × 10 ¹³ cm ⁻³ or less, and the electron temperature of plasma is 0.5 eV or more and 1.5 eV or less. It is characterized by being. Hereinafter, in the present specification, when simply described as “high-density plasma treatment”, the plasma treatment is performed under the above-described conditions. Although the electron density of the plasma is high, the electron temperature in the vicinity of the object to be processed (metal film) formed on the substrate is low, so that plasma damage to the substrate can be prevented. Further, since the electron density of plasma is as high as 1 × 10 ¹¹ cm ⁻³ or more, the film thickness uniformity of oxide (or nitride) formed by oxidation (or nitriding) treatment is excellent and dense. A film can be formed. In addition, since the electron temperature of plasma is as low as 1.5 eV or less, oxidation treatment (or nitridation treatment) can be performed at a lower temperature than plasma treatment or thermal oxidation. For example, plasma oxidation treatment (or plasma nitridation treatment) can be sufficiently performed even if the plasma treatment is performed at a temperature lower than the strain point temperature of the glass substrate by 100 degrees or more (typically 250 to 550 ° C.). Note that a microwave (2.45 GHz) is used as a power supply frequency for forming plasma. Further, the plasma potential is as low as 5 V or less, and excessive dissociation of source molecules can be suppressed.

As an atmosphere containing oxygen, oxygen (O ₂ ), nitrogen dioxide (NO ₂ ), a mixed gas of dinitrogen monoxide (N ₂ O) and a rare gas, or oxygen (O ₂ ) and nitrogen dioxide ( A mixed gas of NO ₂ ) or dinitrogen monoxide (N ₂ O), a rare gas, and hydrogen (H ₂ ) can be used. Examples of the rare gas include argon (Ar), xenon (Xe), and krypton (Kr). What is necessary is just to determine suitably the flow ratio (or pressure ratio) of each gas in mixed gas. As an example of the combination of mixed gases, oxygen (or nitrogen dioxide or dinitrogen monoxide) may be 0.1 to 100 sccm, and argon may be 100 to 5000 sccm. As another example of the combination of mixed gases, oxygen (or nitrogen dioxide or dinitrogen monoxide) may be 0.1 to 100 sccm, hydrogen may be 0.1 to 100 sccm, and argon may be 100 to 5000 sccm. (Or nitrogen dioxide or dinitrogen monoxide): It is preferable to introduce the mixed gas at a ratio of hydrogen: argon = 1: 1: 100. For example, the mixed gas may be introduced with oxygen (or nitrogen dioxide or dinitrogen monoxide) at 5 sccm, hydrogen at 5 sccm, and argon at 500 sccm. By introducing hydrogen into the mixed gas, the oxidation treatment time can be shortened.

As the atmosphere containing nitrogen, nitrogen _{(N 2)} or ammonia (NH _3), a mixed gas of a rare gas or a nitrogen _{(N 2)} or ammonia (NH _3), and a rare gas, hydrogen _{(H 2} ) And a mixed gas can be used. As an example of a combination of mixed gases, nitrogen (or ammonia) may be 20 to 2000 sccm, and argon may be 100 to 10,000 sccm. As another example of the combination of the mixed gases, nitrogen (or ammonia) may be 20 to 2000 sccm, hydrogen may be 1 to 500 sccm, and argon may be 100 to 10,000 sccm. Nitrogen (or ammonia): hydrogen: argon = 20 It is preferable to introduce the mixed gas at a ratio of 1: 100. For example, the mixed gas may be introduced with nitrogen (or ammonia) as 100 sccm, hydrogen as 5 sccm, and argon as 500 sccm. By introducing hydrogen into the mixed gas, the nitriding treatment time can be shortened.

As an atmosphere containing oxygen and nitrogen, a mixed gas of N ₂ or NH ₃ , O _2, and a rare gas can be used. As an example of the mixed gas combination, nitrogen (or ammonia) may be 20 to 1000 sccm, oxygen may be 10 to 500 sccm, and argon may be 100 to 5000 sccm. Nitrogen (or ammonia): oxygen: argon = 2: 1: 10 It is preferable to introduce the mixed gas at a ratio of

  In the case where the gate insulating film 705 is formed by performing high-density plasma treatment, an insulating film with a thickness of 1 to 20 nm, typically 5 to 10 nm, is formed over the crystalline semiconductor films 706 to 710. Since the reaction in this case is a solid-phase reaction, the interface state density between the insulating film and the crystalline semiconductor films 706 to 710 can be extremely low. Further, since the crystalline semiconductor films 706 to 710 are directly oxidized or nitrided, the thickness of the formed gate insulating film 705 can ideally be extremely small. Furthermore, since strong oxidation does not occur even at the crystal grain boundaries of crystalline silicon, a very favorable state is obtained. That is, by subjecting the surface of the semiconductor film to solid phase oxidation by the high-density plasma treatment shown here, the insulating film has a good uniformity and low interface state density without causing an abnormal oxidation reaction at the crystal grain boundary. Can be formed.

  Note that the gate insulating film 705 may be formed using only an insulating film formed by high-density plasma treatment. In addition, silicon oxide, silicon nitride containing oxygen, or nitrogen may be formed by a CVD method using plasma or thermal reaction. An insulating film such as silicon oxide may be deposited and stacked. In any case, a transistor formed by including an insulating film formed by high-density plasma in part or all of the gate insulating film can reduce variation in characteristics.

  Further, the crystalline semiconductor films 706 to 710 which are crystallized by scanning in one direction while irradiating the amorphous semiconductor film 704 with a continuous wave laser or laser light oscillated at a frequency of 10 MHz or more are scanned with the beam. The crystal grows in the direction. Therefore, by arranging the transistor so that the scanning direction matches the channel length direction (the direction in which carriers flow when the channel formation region is formed) and combining the gate insulating film 705 formed by high-density plasma treatment, characteristic variation can be obtained. Thus, a transistor having a smaller field-effect mobility can be obtained.

  Next, a first conductive film and a second conductive film are stacked over the gate insulating film 705. The first conductive film and the second conductive film may be formed by various CVD methods such as a sputtering method and a plasma CVD method. In this embodiment mode, the first conductive film is formed with a thickness of 20 to 100 nm, and the second conductive film is formed with a thickness of 100 to 400 nm. The first conductive film and the second conductive film include tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), It can be formed using an element selected from niobium (Nb) or the like, or an alloy material or a compound material containing these elements as main components. Alternatively, a semiconductor material typified by polycrystalline silicon doped with an impurity element such as phosphorus can be used. Examples of the combination of the first conductive film and the second conductive film include tantalum nitride (TaN) film and tungsten (W) film, tungsten nitride (WN) film and tungsten film, molybdenum nitride (MoN) film and molybdenum ( Mo) film etc. are mentioned. Since tungsten and tantalum nitride have high heat resistance, heat treatment for thermal activation can be performed after the first conductive film and the second conductive film are formed. Further, instead of the two-layer structure including the first conductive film and the second conductive film, a single-layer structure or a three-layer structure may be employed. In the case of using a single-layer structure or a three-layer structure, a material similar to the above-described first conductive film and second conductive film can be freely selected as a conductive film material.

  Next, a resist mask is formed using a photolithography method, and etching treatment for forming a gate electrode and a gate line is performed, so that conductive films 716 to 725 functioning as the gate electrode (hereinafter, referred to in this specification) Sometimes referred to as “gate electrode”).

  Next, after forming a resist mask by photolithography, an impurity element imparting N-type is added to the crystalline semiconductor films 706 and 708 to 710 at a low concentration by ion doping or ion implantation. . In this manner, N-type impurity regions 711 and 713 to 715 and channel formation regions 780 and 782 to 784 are formed. The impurity element imparting N-type may be an element belonging to Group 15, for example, phosphorus (P) or arsenic (As).

  Next, a resist mask is formed by photolithography, and an impurity element imparting P-type conductivity is added to the crystalline semiconductor film 707 to form a P-type impurity region 712 and a channel formation region 781. For example, boron (B) is used as the impurity element imparting P-type. Note that the N-type impurity regions 711 and 713 to 715 and the P-type impurity region 712 are formed in the order of forming the P-type impurity regions 712 after the N-type impurity regions 711 and 713 to 715 are formed as in this embodiment. Alternatively, the N-type impurity regions 711 and 713 to 715 may be formed after the P-type impurity region 712 is formed.

  Next, an insulating film is formed so as to cover the gate insulating film 705 and the conductive films 716 to 725. The insulating film is a single layer formed of a film made of an inorganic material such as silicon, an oxide of silicon, or a nitride of silicon, or a film made of an organic material such as an organic resin by various CVD methods such as a sputtering method or a plasma CVD method. Alternatively, they are stacked. Next, the insulating film is selectively etched by anisotropic etching mainly in the vertical direction to form insulating films (also referred to as sidewalls) 739 to 743 that are in contact with the side surfaces of the conductive films 716 to 725 (FIG. 5 (C)). Simultaneously with the formation of the insulating films 739 to 743, insulating films 734 to 738 formed by etching the gate insulating film 705 are formed. The insulating films 739 to 743 are used as a mask for doping when an LDD (Lightly Doped Drain) region is formed later.

  Next, an impurity element imparting n-type conductivity is added to the crystalline semiconductor films 706 and 708 to 710 using a resist mask formed by a photolithography method and the insulating films 739 to 743 as masks. N-type impurity regions (also referred to as LDD regions) 727, 729, 731 and 733, and second N-type impurity regions 726, 728, 730 and 732 are formed. The concentration of the impurity element contained in the first N-type impurity regions 727, 729, 731, and 733 is lower than the concentration of the impurity element in the second N-type impurity regions 726, 728, 730, and 732. Through the above steps, N-type thin film transistors 744 and 746 to 748 and a P-type thin film transistor 745 are completed.

  In order to form the LDD region, the gate electrode has a stacked structure of two or more layers, and the gate electrode is tapered and anisotropic etching is performed to form a conductive layer under the gate electrode. There are a method using a film as a mask and a method using an insulating film on a sidewall as a mask. The thin film transistor formed by using the former method has a structure in which the LDD region is disposed so as to overlap the gate electrode through the gate insulating film. This structure is etched so that the gate electrode is tapered. In addition, since the anisotropic etching is used, it is difficult to control the width of the LDD region, and the LDD region may not be formed unless the etching process is performed well. On the other hand, the latter method using the sidewall insulating film as a mask makes it easier to control the width of the LDD region than the former method, and the LDD region can be formed reliably. Note that “etching in which the gate electrode is tapered” refers to etching in which the side surface of the gate electrode is tapered.

After removing the natural oxide film formed on the exposed N-type impurity regions 726, 728, 730, and 732 and the surface of the P-type impurity region 712, a silicide region is appropriately formed using a metal film. Also good. As the metal film, a nickel film, a titanium film, a cobalt film, a platinum film, or a film made of an alloy containing at least two of these elements can be used. More specifically, for example, a nickel film is used as a metal film, and after a nickel film is formed by sputtering at a film formation power of 500 W to 1 kW at room temperature, a silicide region is formed by heat treatment. As the heat treatment, RTA, furnace annealing, or the like can be used. At this time, by controlling the film thickness, heating temperature, and heating time of the metal film, only the surfaces of the N-type impurity regions 726, 728, 730, and 732 and the P-type impurity region 712 can be made silicide regions. The entire region may be a silicide region. Finally, unreacted nickel is removed. For example, unreacted nickel is removed using an etching solution of HCl: HNO ₃ : H ₂ O = 3: 2: 1.

  Note that although an example in which the thin film transistors 744 to 748 are top gate type is described in this embodiment mode, it is needless to say that each may be a bottom gate type thin film transistor. Further, the single gate structure in which one channel formation region of each of the thin film transistors 744 to 748 is formed has been described, but a double gate structure in which two channel formation regions are formed or a triple gate structure in which three channel formation regions are formed. Also good. Alternatively, a dual gate type or other structure having two gate electrodes disposed above and below the channel formation region with a gate insulating film interposed therebetween may be used.

  The structure of the semiconductor film included in the thin film transistors 744 to 748 may be different from that described in this embodiment mode. For example, impurity regions (including a source region, a drain region, and an LDD region) are formed. Alternatively, a P channel type, an N channel type, or a CMOS circuit may be formed. In addition, an insulating film (side wall) may be formed so as to be in contact with the side surface of the gate electrode provided above or below the semiconductor film.

After completing the N-type thin film transistors 744 and 746 to 748 and the P-type thin film transistor 745 through the above steps, the purpose is to restore the crystallinity of the semiconductor film and to activate the impurity element added to the semiconductor film. Heat treatment may be performed. Preferably, after the heat treatment, the exposed surface of the gate insulating film 705 is subjected to high-density plasma treatment in an atmosphere containing hydrogen so that the surface of the gate insulating film 705 contains hydrogen. It may be. This is because this hydrogen can be used when a subsequent step of hydrogenating the semiconductor film is performed. Alternatively, the semiconductor film can be hydrogenated by performing high-density plasma treatment in an atmosphere containing hydrogen while heating the substrate at 350 to 450 ° C. Note that as the atmosphere containing hydrogen, a gas in which hydrogen (H ₂ ) or ammonia (NH ₃ ) and a rare gas (eg, argon (Ar)) are mixed can be used. When a mixed gas of ammonia (NH ₃ ) and a rare gas (eg, argon (Ar)) is used as the atmosphere containing hydrogen, the surface can be nitrided simultaneously with hydrogenation of the surface of the gate insulating film 705.

Next, an insulating film is formed as a single layer or a stacked layer so as to cover the thin film transistors 744 to 748 (FIG. 6A). An insulating film covering the thin film transistors 744 to 748 is formed by an SOG method, a droplet discharge method, or the like, an inorganic material such as silicon oxide or silicon nitride, or an organic material such as polyimide, polyamide, benzocyclobutene, acrylic, epoxy, or siloxane. Depending on the material or the like, it is formed as a single layer or a laminate. In this specification, siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O), and an organic group containing at least hydrogen (for example, an alkyl group or aromatic hydrocarbon) is used as a substituent. . Further, as a substituent, a fluoro group may be used, or an organic group containing at least hydrogen and a fluoro group may be used. For example, when the insulating film covering the thin film transistors 744 to 748 has a three-layer structure, a film containing silicon oxide as a main component is formed as the first insulating film 749 and a resin is used as the main insulating film 750 in the second layer. A film containing silicon nitride as a main component is preferably formed as the third-layer insulating film 751. In the case where the insulating film covering the thin film transistors 744 to 748 has a single-layer structure, a silicon nitride film or a silicon nitride film containing oxygen is preferably formed. At this time, hydrogen is preferably applied to the surface of the silicon nitride film or the silicon nitride film containing oxygen by performing high-density plasma treatment in an atmosphere containing hydrogen on the silicon nitride film or the silicon nitride film containing oxygen. Make it contain. This is because this hydrogen can be used when a subsequent step of hydrogenating the semiconductor film is performed. Alternatively, the semiconductor film can be hydrogenated by performing high-density plasma treatment in an atmosphere containing hydrogen while heating the substrate at 350 to 450 ° C. Note that as the atmosphere containing hydrogen, a gas in which hydrogen (H ₂ ) or ammonia (NH ₃ ) and a rare gas (eg, argon (Ar)) are mixed can be used. Further, when a mixed gas of ammonia (NH ₃ ) and a rare gas (eg, argon (Ar)) is used as an atmosphere containing hydrogen, the surface can be nitrided simultaneously with hydrogenation of the surface of the gate insulating film 705. .

  Note that before the insulating films 749 to 751 are formed or after one or more thin films of the insulating films 749 to 751 are formed, the crystallinity of the semiconductor film is restored and the activity of the impurity element added to the semiconductor film is increased. Heat treatment for the purpose of hydrogenation of the semiconductor film is preferably performed. As the heat treatment, thermal annealing, a laser neil method, an RTA method, or the like is preferably applied. For example, for the purpose of activating the impurity element, thermal annealing at 500 ° C. or higher may be performed. In addition, when the semiconductor film is to be hydrogenated, thermal annealing at 350 to 450 ° C. may be performed.

  Next, the insulating films 749 to 751 are etched by photolithography to form contact holes that expose the N-type impurity regions 726, 728, 730, and 732, and the P-type impurity region 712. Subsequently, a conductive film is formed so as to fill the contact hole, and the conductive film is patterned to form conductive films 752 to 761 functioning as source or drain wirings.

  The conductive films 752 to 761 are formed using a conductive film containing aluminum (Al) as a main component by various CVD methods such as a sputtering method and a plasma CVD method. The conductive film containing aluminum as a main component corresponds to, for example, a material containing aluminum as a main component and containing nickel, or an alloy material containing aluminum as a main component and containing nickel and one or both of carbon and silicon. Since a conductive film containing aluminum as a main component generally has a difficulty in heat resistance, it is preferable that a conductive film containing aluminum as a main component be sandwiched between barrier films. A barrier film refers to a film having a function of suppressing hillocks of a conductive film mainly composed of aluminum and improving heat resistance. Materials having such functions include chromium, tantalum, tungsten, molybdenum, titanium, and silicon. , Nickel or a nitride thereof.

As an example of the structure of the conductive films 752 to 761, a structure in which a titanium film, an aluminum film, and a titanium film are sequentially stacked from the substrate side can be given. Since titanium is a highly reducing element, even if a thin natural oxide film is formed on the crystalline semiconductor film, the natural oxide film can be reduced and good contact can be made with the crystalline semiconductor film. . In addition, it is preferable to nitride the surface of the titanium film formed between the crystalline semiconductor film and the aluminum film by performing high-density plasma treatment in an atmosphere containing nitrogen. As the atmosphere containing nitrogen, and _{N 2} or NH _3, mixed gas of a noble gas or a _{N 2} or NH _3, a rare gas, may be used a mixed gas of _{H 2.} By nitriding the surface of the titanium film, it is possible to prevent titanium and aluminum from being alloyed in the subsequent heat treatment process, etc., and to prevent the aluminum from diffusing into the crystalline semiconductor film by breaking through the titanium film. it can. Although an example in which an aluminum film is sandwiched between titanium films has been described here, the same can be said when a chromium film, a tungsten film, or the like is used instead of the titanium film. More preferably, using a multi-chamber apparatus, the titanium film is formed, the titanium film surface is nitrided, the aluminum film is formed, and the titanium film is continuously formed without being exposed to the atmosphere.

  Next, an insulating film 762 is formed so as to cover the conductive films 752 to 761 (FIG. 6B). The insulating film 762 is formed as a single layer or a stacked layer using an inorganic material or an organic material by an SOG method, a droplet discharge method, or the like. In this embodiment mode, the insulating film 762 is formed to a thickness of 0.75 to 3 μm.

  Next, the insulating film 762 is etched by photolithography to form a contact hole that exposes the conductive film 761. Subsequently, a conductive film 763 is formed so as to fill the upper surface of the insulating film 762 and the contact hole. Since the conductive film 763 functions as an antenna, it may be hereinafter referred to as “antenna”. Note that the conductive film 763 is not limited to a single layer structure, and may have a stacked structure.

  The shape of the conductive film 763 functioning as an antenna is described. As a signal transmission method in a semiconductor device (RFID tag) having an antenna (conductive film 763) and capable of exchanging contactless data, an electromagnetic coupling method, an electromagnetic induction method, a microwave method, or the like can be used. The transmission method may be appropriately selected by the practitioner in consideration of the intended use, and an optimal antenna may be appropriately provided according to the transmission method.

  For example, when an electromagnetic coupling method or an electromagnetic induction method (for example, 13.56 MHz band) is applied as a signal transmission method in a semiconductor device, the conductive film functioning as an antenna is used because electromagnetic induction due to a change in magnetic field density is used. Is formed in a ring shape (for example, a loop antenna) or a spiral shape.

  When a microwave method (for example, UHF band (860 to 960 MHz band), 2.45 GHz band, or the like) is applied as a signal transmission method in a semiconductor device, an antenna is used in consideration of the wavelength of an electromagnetic wave used for signal transmission. The shape such as the length of the conductive layer functioning as a layer may be set as appropriate. For example, the conductive film 763 can be formed into a linear shape (for example, a dipole antenna) or a flat shape (for example, a patch antenna). Further, the shape of the conductive film 763 is not limited to a linear shape, and may be a curved shape, a meandering shape, or a combination thereof in consideration of the wavelength of electromagnetic waves.

  Next, a method and a material for forming the conductive film 763 functioning as an antenna will be described. As a method for forming the conductive film 763, a CVD method, a sputtering method, a printing method such as screen printing or gravure printing, a droplet discharge method, a dispenser method, a plating method, or the like can be used. As a material of the conductive film 763, aluminum (Al), titanium (Ti), silver (Ag), copper (Cu), gold (Au), platinum (Pt) nickel (Ni), palladium (Pd), tantalum An element selected from (Ta) and molybdenum (Mo), or an alloy material or a compound material containing these elements as main components can be used. Further, fine particles mainly composed of solder (preferably lead-free solder) may be used. In this case, it is preferable to use fine particles having a particle diameter of 20 μm or less. Solder has the advantage of low cost. Moreover, ceramic, ferrite, or the like can be applied to the antenna.

  For example, when the conductive film 763 is formed by a screen printing method, a conductive paste in which conductive particles having a particle size of several nanometers to several tens of micrometers are dissolved or dispersed in an organic resin is selectively printed. Can be provided. As the conductive particles, silver (Ag), gold (Au), copper (Cu), nickel (Ni), platinum (Pt), palladium (Pd), tantalum (Ta), molybdenum (Mo), and titanium (Ti) 1) or more metal particles, silver halide fine particles, or dispersible nanoparticles. In addition, as the organic resin contained in the conductive paste, one or more selected from organic resins functioning as a binder of metal particles, a solvent, a dispersant, and a coating material can be used. Typically, an organic resin such as an epoxy resin or a silicon resin can be given. In forming the conductive film 763, it is preferable to fire after the conductive paste is extruded. For example, in the case where fine particles containing silver as a main component (for example, a particle size of 1 nm to 100 nm) is used as a conductive paste material, the conductive film 763 is formed by baking and curing in a temperature range of 150 to 300 degrees. Can be formed.

  In addition, when an electromagnetic coupling method or an electromagnetic induction method is applied and a semiconductor device having an antenna (RFID tag) is provided in contact with a metal, a magnetic permeability is provided between the semiconductor device and the metal. It is preferable to provide a magnetic material. When a semiconductor device including an antenna is provided in contact with a metal, an eddy current flows in the metal with a change in the magnetic field, and the change in the magnetic field is weakened by the eddy current, so that a communication distance is reduced. Therefore, by providing a material having magnetic permeability between the semiconductor device and the metal, it is possible to suppress the eddy current of the metal and suppress the decrease in the communication distance. As the magnetic material, ferrite or metal thin film having high magnetic permeability and low high-frequency loss can be used.

  The element layer is completed through the above steps.

  Next, an insulating film 772 is formed by an SOG method, a droplet discharge method, or the like so as to cover the conductive film 763 functioning as an antenna (FIG. 7). The insulating film 772 functions as a protective layer for ensuring the strength of the element layer. The insulating film 772 is preferably formed so as to cover the base film 703 and the side surfaces of the element layer. In this embodiment mode, the insulating film 772 is provided over the entire surface so as to cover the base film 703 and the element layer; however, the insulating film 772 is not necessarily provided over the entire surface and may be selectively provided. In addition, the present invention can be implemented even when the insulating film 772 is not provided.

  The insulating film 772 is a film containing carbon such as DLC (diamond-like carbon), a silicon oxide film containing nitrogen, a silicon nitride film containing oxygen, a film made of an organic material (for example, a film made of a resin material such as epoxy), or the like. What is necessary is just to form using. As a method for forming the insulating film 772, various CVD methods such as a sputtering method and a plasma CVD method, a spin coating method, a droplet discharge method, or a screen printing method can be used.

  Thereafter, a semiconductor device (chip) can be formed by applying the method described in Embodiment Mode 1 to the process after the insulating film 772 (protective layer) is formed, and thus description thereof is omitted here.

  This embodiment can be freely combined with the above embodiment. That is, the material and the formation method described in the above embodiment can be used in this embodiment, and the material and the formation method described in this embodiment can be used in the above embodiment.

(Embodiment 3)
In this embodiment mode, a formation method different from the antenna formation method described in Embodiment Mode 2 will be described. That is, in Embodiment 2, the structure in which the antenna is formed as part of the element layer has been described. However, in this embodiment, a substrate provided with the antenna is prepared separately, and the substrate provided with the antenna A structure in which a substrate provided with an element layer is bonded will be described.

  First, as described in Embodiment Mode 2, the conductive film 763 is formed over the substrate 701 (FIG. 6B). Since the steps until the conductive film 763 is formed are described in Embodiment Mode 2, description thereof is omitted here.

  Next, the substrate 781 provided with the antenna 782 and the substrate 701 provided with the element layer are attached to each other (FIG. 8). In FIG. 8, an anisotropic conductive material is used as a bonding means. The anisotropic conductive material has conductive particles 783 and a fluid, and the fluid becomes an adhesive layer 784 by baking and curing. The conductive film 763 and the antenna 782 can be electrically connected to each other by pressure bonding of the conductive particles 783. In other regions, the conductive particles 783 are not electrically connected to each other because the conductive particles 783 are sufficiently spaced from the insulating film 762 and the antenna 782. In addition to the method of bonding using an anisotropic conductive material, a method of bonding metal to metal by ultrasonic waves (referred to as “ultrasonic bonding”), an ultraviolet curable resin, a double-sided tape, or the like is used. Can also be used. As the substrate 781 provided with the antenna 782, a film made of polypropylene, polyester, vinyl, polyvinyl fluoride, vinyl chloride, paper made of a fibrous material, or the like can be used.

  Next, the bonded substrate is irradiated with laser light from one surface of the substrate 781 (the surface opposite to the surface bonded to the substrate 701), whereby an opening having a curvature is formed. The opening is provided in a region avoiding the thin film transistor, the antenna 782, and the like which form the element layer, or in an end surface of the substrate 701. In the present invention, it is important that the opening is formed so as to be partially opened on one surface of the substrate 701 and the region of the opening formed in the substrate 701 has a curvature.

  The laser light conditions are not particularly limited, and those having a large absorption coefficient relative to the materials used for the base film 703 and the element layer are preferably used.

  Thereafter, for the thinning (for example, grinding, polishing) and cutting process of the substrate 701, the method described in Embodiment 1 is applied to manufacture a semiconductor device (chip) in which the end surface of the substrate has a curvature. Since it is possible, explanation is omitted here. Then, a sealing process is performed as needed.

  In this embodiment mode, an element layer is formed over the substrate 701, and the substrate 781 provided with the antenna 782 and the substrate 701 provided with the element layer are bonded to each other before being divided into chips. It is not limited to. For example, an element layer 13 is formed over the substrate 11 and divided into chips to form a stacked body 16 having an integrated circuit, and then an element constituting the integrated circuit provided in the stacked body 16 having the integrated circuit and an antenna A semiconductor device (chip) may be manufactured so as to be connected to the substrate 781 provided with 782 (FIG. 9). Thereafter, a sealing process is performed as necessary. In the semiconductor device (chip) manufactured in this manner, since the end surface of the stacked body 16 having an integrated circuit has a curvature, the stacked layer including the antenna 782 and the integrated circuit when the semiconductor device (chip) is bent. Stress applied to the connecting portion with the body 16 is relaxed, and poor contact is unlikely to occur.

  This embodiment can be freely combined with the above embodiment. That is, the material and the formation method described in the above embodiment can be used in this embodiment, and the material and the formation method described in this embodiment can be used in the above embodiment.

(Embodiment 4)
In this embodiment, an embodiment in which the semiconductor device of the present invention is used as an RFID tag capable of transmitting and receiving data without contact will be described with reference to FIGS.

  The RFID tag 2020 has a function of communicating data without contact, and includes a power supply circuit 2011, a clock generation circuit 2012, a data demodulation / modulation circuit 2013, a control circuit 2014 for controlling other circuits, an interface circuit 2015, a memory 2016, A data bus 2017 and an antenna (antenna coil) 2018 are included (FIG. 10A).

  The power supply circuit 2011 is a circuit that generates various power supplies to be supplied to each circuit inside the semiconductor device, based on the AC signal input from the antenna 2018. The clock generation circuit 2012 is a circuit that generates various clock signals to be supplied to each circuit in the semiconductor device based on the AC signal input from the antenna 2018. The data demodulation / modulation circuit 2013 has a function of demodulating / modulating data communicated with the reader / writer 2019. The control circuit 2014 has a function of controlling the memory 2016. The antenna 2018 has a function of transmitting and receiving electromagnetic waves. The reader / writer 2019 controls communication with the semiconductor device, control, and processing related to the data. Note that the RFID tag is not limited to the above-described configuration, and may be a configuration in which other elements such as a power supply voltage limiter circuit and cryptographic processing dedicated hardware are added.

  The RFID tag may be of a type in which power supply voltage is supplied to each circuit by radio waves without mounting a power supply (battery), or power supply (battery) is supplied to each circuit instead of an antenna. It may be a type that is mounted, or may be a type that supplies power supply voltage by radio waves and a power source.

  When the semiconductor device of the present invention is used for an RFID tag or the like, the point of performing contactless communication, the point that multiple reading is possible, the point that data can be written, the point that it can be processed into various shapes, and the selection Depending on the frequency to be used, there are advantages such as wide directivity and wide recognition range. RFID tags can be used for IC tags that can identify individual information about people and objects by wireless communication without contact, labels that can be attached to target objects by label processing, wristbands for events and amusements, etc. Can be applied. Further, the RFID tag may be molded using a resin material, or may be directly fixed to a metal that hinders wireless communication. Furthermore, the RFID tag can be used for system operation such as an entrance / exit management system and a payment system.

  Next, one mode when the semiconductor device of the present invention is actually used as an RFID tag will be described. A reader / writer 2030 is provided on the side surface of the portable terminal including the display portion 2031 and an RFID tag 2033 is provided on the side surface of the product 2032 (FIG. 10B). The RFID tag 2033 manufactured according to the present invention is flexible. And the end face has a curvature. For this reason, it can be easily provided on the curved surface of the article 2032 and can be configured not to easily peel off. When the reader / writer 2030 is placed over the RFID tag 2033 provided on the product 2032, information about the product such as the description of the product, such as the raw material and origin of the product, the inspection result for each production process, the history of the distribution process, and the like are displayed on the display unit 2031. Is displayed. In addition, when the product 2036 is conveyed by a belt conveyor, the product 2036 can be inspected using the reader / writer 2034 and the RFID tag 2035 provided in the product 2036 (FIG. 10C). The RFID tag 2035 manufactured according to the present invention has flexibility, and an end surface has a curvature. For this reason, it can be easily provided on the curved surface of the product 2036 and can be configured to be difficult to peel off. In this manner, by using the RFID tag in the system, information can be easily acquired, and high functionality and high added value are realized.

  This embodiment can be freely combined with the above embodiment.

(Embodiment 5)
The semiconductor device of the present invention can be used as an RFID tag. For example, banknotes, coins, securities, certificate documents, bearer bonds, packaging containers, books, recording media, personal belongings, vehicles, foods, clothing, health supplies, daily necessities, chemicals, etc. An RFID tag manufactured according to the present invention can be provided and used in an electronic device or the like. Specific examples of these will be described with reference to FIG. The RFID tag is denoted by 2720 in FIG. An RFID tag manufactured according to the present invention has flexibility and has an end surface with a curvature. For this reason, it can be easily provided on articles having various shapes as shown in FIG. Further, since the RFID tag is thinned, it is difficult to cause a decrease in the design of the article.

  Banknotes and coins are money that circulates in the market, and include those that are used in the same way as money in a specific area (cash vouchers), commemorative coins, and the like. Securities refer to checks, securities, promissory notes, and the like (FIG. 11A). The certificate refers to a driver's license, resident's card, etc. (FIG. 11B). Bearer bonds refer to stamps, gift tickets, various gift certificates, and the like (FIG. 11C). Packaging containers refer to wrapping paper for lunch boxes, plastic bottles, and the like (FIG. 11D). Books refer to books, books, and the like (FIG. 11E). The recording media refer to DVD software, video tapes, and the like (FIG. 11F). The vehicles refer to vehicles such as bicycles, ships, and the like (FIG. 11G). Personal belongings refer to bags, glasses, and the like (FIG. 11H). Foods refer to food products, beverages, and the like. Clothing refers to clothing, footwear, and the like. Health supplies refer to medical equipment, health equipment, and the like. Livingware refers to furniture, lighting equipment, and the like. Chemicals refer to pharmaceuticals, agricultural chemicals, and the like. Electronic devices refer to liquid crystal display devices, EL display devices, television devices (television receivers, thin television receivers), cellular phones, and the like.

  Forgery can be prevented by providing RFID tags on bills, coins, securities, certificates, bearer bonds, and the like. In addition, it is possible to improve the efficiency of inspection systems and rental store systems by providing RFID tags for personal items such as packaging containers, books, and recording media, foods, daily necessities, and electronic devices. it can. By providing RFID tags on vehicles, health supplies, medicines, etc., counterfeiting and theft can be prevented, and medicines can prevent mistakes in taking medicines. The RFID tag is provided by being attached to the surface of the article or embedded in the article. For example, a book may be embedded in paper, and a package made of an organic resin may be embedded in the organic resin.

  In this way, by providing RFID tags on packaging containers, recording media, personal items, foods, clothing, daily necessities, electronic devices, etc., it is possible to improve the efficiency of inspection systems and rental store systems. it can. In addition, forgery and theft can be prevented by providing an RFID tag in vehicles. Moreover, by embedding it in creatures such as animals, it is possible to easily identify individual creatures. For example, by burying an RFID tag in a living creature such as livestock, it is possible to easily identify the year of birth, sex, type, or the like.

  As described above, the semiconductor device of the present invention can be provided and used for any product. This embodiment can be freely combined with any of the other embodiments described above.

8A and 8B illustrate a method for manufacturing a semiconductor device of the present invention (Embodiment Mode 1). 8A and 8B illustrate a method for manufacturing a semiconductor device of the present invention (Embodiment Mode 1). 8A and 8B illustrate a method for manufacturing a semiconductor device of the present invention (Embodiment Mode 1). 8A and 8B illustrate a method for manufacturing a semiconductor device of the present invention (Embodiment Mode 1). 8A and 8B illustrate a method for manufacturing a semiconductor device of the present invention (Embodiment Mode 2). 8A and 8B illustrate a method for manufacturing a semiconductor device of the present invention (Embodiment Mode 2). 8A and 8B illustrate a method for manufacturing a semiconductor device of the present invention (Embodiment Mode 2). 8A and 8B illustrate a method for manufacturing a semiconductor device of the present invention (Embodiment 3). 8A and 8B illustrate a method for manufacturing a semiconductor device of the present invention (Embodiment 3). 4A and 4B illustrate a usage mode of a semiconductor device of the present invention (Embodiment 4). 8A and 8B illustrate a usage mode of a semiconductor device of the present invention (Embodiment 5). 8A and 8B illustrate a method for manufacturing a semiconductor device of the present invention (Embodiment Mode 1).

Explanation of symbols

11 Substrate 12 Base film 13 Element layer 14 Insulating film (protective layer)
15 Film 16 Laminate 17 with Integrated Circuit Semiconductor Device (Chip)
18 First base 19 Second base 21 Pickup means 22 Laminate roll 23 Supply roll 24 Transport means 25 Cutting means 26 Heating means 31 Grinding means 32 Polishing means 51 Frame 52 Porous chuck 53 Stage

Claims (8)

Forming an element layer including a plurality of integrated circuits on one surface of the substrate;
Forming a hole having a curvature at one surface of the substrate and the element layer at a position where the plurality of integrated circuits are cut;
Thin the other side of the substrate,
Then , corresponding to the position where the hole is formed, by forming a hole having a curvature from the other thinned surface of the substrate, the substrate is cut so that the cut surface of the substrate has a curvature. A manufacturing method of a semiconductor device, wherein a stacked body including at least one of a plurality of integrated circuits is formed. Forming an element layer including a plurality of integrated circuits on one surface of the substrate;
Forming a hole having a curvature at one surface of the substrate and the element layer at a position where the plurality of integrated circuits are cut;
Grinding and thinning the other side of the substrate,
Polishing the other ground surface of the substrate;
Then , corresponding to the position where the hole is formed, the substrate is formed so that the cut surface of the substrate has a curvature by forming a hole having a curvature from the other thinned and polished surface of the substrate. A method for manufacturing a semiconductor device, comprising cutting to form a stacked body including at least one of the plurality of integrated circuits. Forming an element layer including a plurality of integrated circuits on one surface of the substrate;
A hole having a curvature is formed on one surface of the substrate and the element layer by irradiating a laser from the upper surface of the element layer at a position where the plurality of integrated circuits are cut.
Grinding and thinning the other side of the substrate,
Polishing the other ground surface of the substrate;
Then , the cut surface of the substrate has a curvature corresponding to the position where the hole is formed by irradiating a laser beam from the other thinned and polished surface of the substrate to form a hole having a curvature. A method for manufacturing a semiconductor device is characterized in that the substrate is cut so as to include a stacked body including at least one of the plurality of integrated circuits. Forming an element layer including a plurality of integrated circuits on one surface of the substrate;
A hole having a curvature is formed on one surface of the substrate and the element layer by irradiating a laser from the upper surface of the element layer at a position where the plurality of integrated circuits are cut.
Grinding and thinning the other side of the substrate,
Polishing the other ground surface of the substrate;
Then , the cut surface of the substrate has a curvature by forming a hole having a curvature by irradiating a laser from the other thinned and polished surface of the substrate corresponding to the position where the hole is formed. Cutting the substrate to form a laminate having at least one of the plurality of integrated circuits,
A method for manufacturing a semiconductor device, comprising sealing two surfaces of the laminate using two flexible films.   5. The method for manufacturing a semiconductor device according to claim 3, wherein the laser is an ultraviolet laser.   6. The method for manufacturing a semiconductor device according to claim 2, wherein a cut surface of the polished substrate is a convex shape.   The method for manufacturing a semiconductor device according to claim 2, wherein the polished substrate has a thickness of 2 μm to 50 μm.   The method for manufacturing a semiconductor device according to claim 1, wherein the stacked body includes an antenna.

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