JP4975700B2 - DAC measurement method and solid-state imaging device - Google Patents

Description

  The present invention generally relates to an image sensor such as a complementary metal oxide semiconductor (CMOS) image sensor, and more particularly, a DAC (digital-analog converter) of a VCM (Voice Coil Motor) driver mounted on a CMOS image sensor. ) Related to the technology for measuring performance.

  An image sensor is a device that captures image data by converting light from an imaging target into an electrical signal (Photo-conversion) using a semiconductor material. In recent years, CMOS image sensors using CMOS transistors have been rapidly developed. Furthermore, an analog output circuit such as a VCM driver for driving the lens of the image sensor has been mounted as an SoC in the LSI chip together with the image sensor.

  Conventionally, when measuring the performance of a DAC (hereinafter, “VCM-DAC”) of a VCM driver mounted in a chip, a measurement circuit is separately provided inside and outside the chip.

  FIG. 8 is a schematic diagram showing a conventional VCM-DAC measurement method, in which a VCM driver 110 is mounted together with a CMOS image sensor 120 on an LSI chip. In order to measure the performance of the VCM-DAC of the VCM driver 110, the LSI chip is provided with a measuring unit 130.

  FIG. 9 is a circuit diagram showing configurations of the VCM driver 110 and the measurement unit 130. The VCM driver 110 includes a VCM-DAC 111, an amplifier 112, and a switch SW113.

  During the test, the switch SW113 is switched so that the output of the VCM driver 110 is input to the measurement unit 130, and the test digital signal is input to the VCM-DAC 111. The test digital signal is converted into an analog signal by the VCM-DAC 111, and the analog signal is amplified through the amplifier 112 and output to the measurement unit 130.

  The measurement unit 130 includes a sample hold (S / H) circuit 131, an ADC (analog-digital converter) 132, and a memory 133. The S / H circuit 131 of the measurement unit 130 extracts and samples an analog signal from the VCM driver 110 and holds (holds) it for a certain period of time.

  The ADC 132 is a sequential conversion type analog-digital converter. Since the ADC 132 performs AD conversion a plurality of times, the input signal to the ADC 132 needs to be constant in order to prevent a conversion failure during AD conversion. For this reason, the analog signal from the VCM driver 110 is temporarily held in the S / H circuit 131 for a predetermined time and then input to the ADC 132.

  In the ADC 132, the analog signal is converted into a digital signal, and the conversion result is stored in the memory 133. The conversion result stored in the memory 133 is output to the outside as measurement data as necessary.

  FIG. 10 is a block diagram showing the configuration of the ADC 132. The ADC 132 includes a comparator 132a, a register 132b, and a DAC 132c. The comparator 132a compares the analog signal V1 from the S / H circuit 131 with the analog signal V2 from the DAC 132c, and outputs the comparison result to the register 132b as a binary signal V3.

  The register 132b is a sequential conversion type search circuit that sequentially outputs an n-bit digital signal to the DAC 132c so that the analog signal V1 and the analog signal V2 are minimized based on the comparison result from the comparator 132a. Search for digital codes. When the digital signal is confirmed, the register 132 b outputs the digital signal to the memory 133.

  FIG. 11A is a waveform diagram showing the analog signals V1 and V2 input to the comparator 132a, and FIG. 11B is a waveform diagram showing the binary signal V3 output from the comparator 132a. . Here, an example in which the number of bits to be converted is 4 bits is shown.

  In STEPs 1 to 4, the register 132b sequentially changes the digital signal output to the DAC 132c, whereby the analog signal V2 also changes corresponding to the digital signal. The comparator 132a compares the analog signal V1 and the analog signal V2 at each STEP, and outputs either High or Low according to the comparison result. The register 132b determines the digital signal at the time when the output from the comparator 132a changes from High to Low as the output of the ADC 132.

As described above, the technique of separately providing an ADC circuit and measuring the performance of the DAC is also disclosed in Patent Document 1 below.
JP-A-61-186867 (published August 20, 1986)

  However, the conventional configuration causes the following problems.

  Specifically, the measurement unit 130 for measuring the performance of the VCM-DAC 111 includes the ADC 132. Therefore, in order to mount the measurement unit 130 on an LSI chip, a DFT circuit for attaching the ADC circuit is separately provided. Necessary.

  The conversion accuracy of the ADC 132 must be higher than the gradation of the VCM-DAC 111. For example, when the gradation of the VCM-DAC 111 is 10 bits, the conversion accuracy of the ADC 132 must be 10 bits or more, and the conversion accuracy of the ADC 132 is desirably 12 bits or more from the viewpoint of measurement reliability. However, since the AD converter is more expensive as the number of bits is increased, there is a problem that the cost of the measurement unit 130 increases as the gradation of the VCM-DAC 111 increases.

  The present invention has been made in view of the above problems, and an object thereof is to realize a DAC measurement method capable of measuring the performance of a DAC mounted on an LSI chip together with a solid-state imaging device at a low cost. .

  The DAC measurement method according to the present invention is a DAC measurement method for measuring the performance of a DA converter mounted on an LSI chip together with a solid-state imaging device having at least one Column-AD converter in order to solve the above-described problem. A digital input step for inputting a test digital signal to the DA converter, a DA conversion step for converting the test digital signal into an analog signal by the DA converter, and the analog signal for the Column-AD converter. An analog input step for inputting to at least one of the above, an AD conversion step for converting the analog signal into a digital signal by the Column-AD converter, and the DA converter based on the digital signal and the test digital signal Measuring step of measuring the performance of It is.

  According to the above configuration, the DA converter and the solid-state imaging device are mounted on the LSI chip. In the DA conversion step, the test digital signal is converted into an analog signal, and in the analog input step, the analog signal is input to the Column-AD converter. Thus, in the AD conversion step, the analog signal is converted into a digital signal, and in the measurement step, the performance of the DA converter is measured based on the digital signal and the test digital signal.

  As described above, since the column AD converter of the solid-state imaging device mounted on the same LSI chip is used for AD conversion, an additional AD converter is provided on the LSI chip for measuring the performance of the DA converter. There is no need. Further, the Column-AD converter is used for pixel output at normal times, and therefore has high conversion accuracy. Therefore, it can be applied to performance measurement of any DAC such as VCM-DAC. Therefore, it is possible to realize a DAC measurement method that can measure the performance of the DAC mounted on the LSI chip together with the solid-state imaging device at a low cost.

  In the DAC measurement method according to the present invention, the solid-state imaging device includes a plurality of the Column-AD converters. In the analog input step, the analog signals are input to the plurality of Column-AD converters, and the AD conversion step. And a correction step of generating a correction digital signal based on a plurality of digital signals output from the plurality of Column-AD converters, and in the measurement step, It is preferable to measure the performance of the DA converter based on a signal and the test digital signal.

  According to the above configuration, the analog signal from the DA converter is AD converted by the plurality of Column-AD converters. Furthermore, a correction digital signal is generated based on a plurality of digital signals output from a plurality of Column-AD converters, and the performance of the DA converter is measured based on the correction digital signal and the test digital signal. . Thus, since the performance of the DA converter is measured using a plurality of Column-AD converters, variations in measurement results can be suppressed.

  In the DAC measurement method according to the present invention, the correction digital signal may be an average value or a median value of the plurality of digital signals. In the DAC measurement method according to the present invention, the correction digital signal may be an average value or a median value of values excluding a maximum value and a minimum value among the plurality of digital signals. In the DAC measurement method according to the present invention, the correction digital signal may be an average value or a median value of values excluding a predetermined range among the plurality of digital signals.

  According to said structure, the influence of the performance individual difference of a Column-AD converter and the influence of misconversion can be suppressed, and the reliability of a measurement result can be improved.

  In the DAC measurement method according to the present invention, the AD conversion step includes a comparison step for comparing the ramp signal whose voltage changes stepwise and the analog signal, and a determination for determining the digital signal from the comparison result in the comparison step. The voltage of the ramp signal changes in a range from a voltage lower than the output voltage of the DA converter by a predetermined voltage to a voltage higher than the output voltage of the DA converter by a predetermined voltage, The predetermined voltage is preferably set to a predetermined ratio of the analog voltage corresponding to the test digital signal.

  According to the above configuration, since the range in which the ramp signal changes is smaller than when the ramp signal changes from the lowest output voltage to the highest output voltage of the DA converter, the ramp signal is within the same AD conversion time. The width of the change can be set more finely. Therefore, more accurate AD conversion is possible.

  In the DAC measurement method according to the present invention, the ramp signal may be input from outside the LSI chip.

  In the DAC measurement method according to the present invention, the solid-state imaging device may further include a test-dedicated Column-AD converter that is not connected to a pixel, and the analog signal may be input to the test-dedicated Column-AD converter. .

  The DAC measurement method according to the present invention includes an output step of outputting the digital signal to the outside of the LSI chip between the AD conversion step and the measurement step, and in the output step, the output of the digital signal The format is preferably equivalent to the output format of pixel data of the solid-state imaging device.

  According to the above configuration, the digital signal output from the Column-AD converter can be subjected to the same image processing as the pixel data and compared with the test digital signal. Is even easier.

  In the DAC measurement method according to the present invention, the test digital signal may be input from outside the LSI chip.

  In order to solve the above problems, a solid-state imaging device according to the present invention is a solid-state imaging device that is mounted on an LSI chip together with a DA converter and has at least one Column-AD converter, An analog signal is configured to be output to the Column-AD converter.

  According to the above configuration, since the analog signal from the DA converter can be output to the Column-AD converter, the digital signal from the Column-AD converter and the digital signal input to the DA converter By comparing these, the performance of the DA converter can be measured. As described above, since the Column-AD converter of the solid-state imaging device can be used in the performance measurement of the DA converter, it is not necessary to separately provide the AD converter in the LSI chip. Therefore, it is possible to measure the performance of the DAC mounted on the LSI chip together with the solid-state imaging device at a low cost.

  In the solid-state imaging device according to the present invention, it is preferable that a plurality of the Column-AD converters are provided and an analog signal from the DA converter can be output to the plurality of Column-AD converters.

  According to said structure, since the performance of a DA converter can be measured using several Column-AD converter, the dispersion | variation in a measurement result can be suppressed.

  In the solid-state imaging device according to the present invention, the Column-AD converter determines a digital signal from a comparison unit that compares the ramp signal whose voltage changes stepwise and the analog signal, and a comparison result in the comparison unit. A voltage of the ramp signal varies in a range from a voltage lower than the output voltage of the DA converter by a predetermined voltage to a voltage higher than the output voltage of the DA converter by a predetermined voltage, The predetermined voltage is preferably set to a predetermined ratio of the analog voltage corresponding to the test digital signal input to the DA converter.

  According to the above configuration, since the range in which the ramp signal changes is smaller than when the ramp signal changes from the lowest output voltage to the highest output voltage of the DA converter, the ramp signal is within the same AD conversion time. The width of the change can be set more finely. Therefore, more accurate AD conversion is possible.

  The solid-state imaging device according to the present invention may further include a test-dedicated Column-AD converter that is not connected to a pixel, and the analog signal may be input to the test-dedicated Column-AD converter.

  In the solid-state imaging device according to the present invention, it is preferable that an output format of a digital signal output from the test-dedicated Column-AD converter is equivalent to an output format of pixel data of the solid-state imaging device.

  According to the above configuration, the digital signal output from the Column-AD converter can be subjected to the same image processing as the pixel data and compared with the test digital signal. Is even easier.

  As described above, the DAC measurement method according to the present invention is a DAC measurement method for measuring the performance of a DA converter mounted on an LSI chip together with a solid-state imaging device having at least one Column-AD converter, A digital input step for inputting a test digital signal to the DA converter; a DA conversion step for converting the test digital signal into an analog signal by the DA converter; and at least one of the column-AD converter for converting the analog signal to the analog-to-digital converter. An analog input step for inputting the analog signal, an AD conversion step for converting the analog signal into a digital signal by the Column-AD converter, and the performance of the DA converter based on the digital signal and the test digital signal. Measurement step for measuring, An effect that the performance of the DAC mounted on the LSI chip can be realized measurable DAC measuring method at a low cost.

Embodiment 1
An embodiment of the present invention will be described below with reference to FIGS.

  FIG. 1 is a schematic diagram showing a VCM-DAC measurement method according to the present embodiment, in which a VCM driver 10 is mounted together with a CMOS image sensor 20 on an LSI chip. In order to measure the performance of the VCM-DAC of the VCM driver 10, a measurement unit 30 is provided in the LSI chip.

  The CMOS image sensor 20 is provided with a plurality of pixels P and a plurality of Column-ADCs 21. The pixel P converts light from the imaging target into an analog electrical signal. The Column-ADC 21 is provided for each column of the pixels P, and converts an electric signal from the pixel P into a digital signal.

  In the present embodiment, the Column-ADC 21 that is normally used for pixel output is used for measuring the performance of the VCM-DAC. That is, at the time of the test, the analog signal from the VCM driver 10 is switched to be input to the Column-ADC 21 and the performance of the VCM-DAC is measured based on the digital signal from the Column-ADC 21.

  FIG. 2 is a circuit diagram showing the configuration of the VCM driver 10, the CMOS image sensor 20, and the measurement unit 30. The VCM driver 10 includes a VCM-DAC 11, an amplifier 12, two switches SW1 and SW2, and a terminal ISINK. The switch SW1 is provided between the VCM-DAC 11 and the amplifier 12. During the test, the switch SW1 is switched so that the test digital signal is input to the VCM-DAC 11 and the output of the VCM-DAC 11 is input to the CMOS image sensor 20. The terminal ISINK is not used during the test and is connected to an actuator that drives the lens of the CMOS image sensor.

  The CMOS image sensor 20 includes a plurality of Column-ADCs 21, a lamp unit 22, a data bus 23, a memory 24, and two switches SW3 and SW4. The lamp unit 22, the data bus 23, and the memory 24 are provided as a standard in a normal CMOS image sensor. The measurement unit 30 includes an initial value calculation circuit 31, a ramp waveform generation circuit 32, a DAC 33, an output value calculation circuit 34, and a switch SW5.

  The output from the VCM-DAC 11 can be input to each Column-ADC 21 via the switch SW1 and the switch SW3. Each Column-ADC 21 can be connected to a pixel (not shown), and whether to connect the Column-ADC 21 and the pixel or between the Column-ADC 21 and the VCM-DAC 11 is switched by SW3. During the test, the switch SW3 is switched so that the Column-ADC 21 and the VCM-DAC 11 are connected.

  The Column-ADC 21 includes a sample hold (S / H) circuit 211, a comparison circuit 212, a latch circuit 213, and a counter circuit 214. An analog signal from the VCM-DAC 11 is input to the S / H circuit 211, and the S / H circuit 211 samples the analog signal as an input signal and holds it for a certain period of time.

  The comparison circuit 212 receives the analog signal and the ramp signal from the S / H circuit 211, and the comparison circuit 212 outputs a comparison result of these signals to the latch circuit 213. The ramp signal is a signal whose voltage changes stepwise, and is input from the lamp unit 22 or the DAC 33 of the measurement unit 30. Switching between inputting the ramp signal from the lamp unit 22 or the DAC 33 is performed by the switch SW4.

  FIG. 3 is a waveform diagram showing an example of a ramp signal input from the lamp unit 22. In the figure, the output gradation level of the VCM-DAC 11 is 0.0 to 1.0 V, and the ramp signal changes in 10 steps within the range according to the clock signal. The number of stages is set in accordance with the time for AD conversion. When the switch SW4 is switched so that the ramp signal from the lamp unit 22 is input to the comparison circuit 212, the comparison circuit 212 compares the ramp signal at each stage with the analog signal from the S / H circuit 211.

  When the ramp signal is input to the comparison circuit 212, the output of the latch circuit 213 becomes High, whereby the counter circuit 214 starts counting the clock signal. The comparison circuit 212 transitions from Low to High when the ramp signal becomes higher than the analog signal from the S / H circuit 211. As a result, the output from the latch circuit 213 becomes Low, and the counter circuit 214 finishes counting. Digital data is generated based on the count value of the counter circuit 214, and AD conversion in the Column-ADC 21 is completed. This digital data is stored in the memory 24 via the data bus 23.

  FIG. 4 is a waveform diagram illustrating an example of a ramp signal input from the DAC 33 of the measurement unit 30. Also in this figure, the output gradation level of the VCM-DAC 11 is 0.0 to 1.0 V, but the ramp signal changes in 10 steps from 0.5 to 1.0 V. That is, since the initial voltage of the ramp signal is set higher than the minimum output voltage of the VCM-DAC 11 by the initial value 0.5V, the difference between the minimum value and the maximum value of the ramp signal of the ramp signal is small.

  Here, comparing FIG. 3 and FIG. 4, since the number of steps for changing the ramp signal is the same, the time required for AD conversion is the same, whereas in FIG. 3, the ramp signal is in units of 0.1V. In contrast, in FIG. 4, the ramp signal can be changed in units of 0.05V. In this way, since a finer gradation level can be obtained within the same AD conversion time, the comparison circuit 212 can perform more accurate comparison.

  The initial value is determined by the initial value calculation circuit 31. The initial value calculation circuit 31 receives a test digital signal input to the VCM-DAC 11. The initial value calculation circuit 31 sets a digital value of a predetermined ratio (for example, 90%) of the digital value of the input test digital signal as an initial value. This ratio is set as appropriate depending on, for example, an assumed DA conversion error of the VCM-DAC 11.

  The initial value set by the initial value calculation circuit 31 is input to the ramp waveform generation circuit 32. The ramp waveform generation circuit 32 generates a digital waveform of the ramp signal based on the initial value and the output gradation level of the VCM-DAC 11. Specifically, the ramp signal is generated so that the ramp signal changes stepwise within a range from a voltage lower than the output voltage of the VCM-DAC 11 by an initial value to a voltage higher than the output voltage of the VCM-DAC 11. . The unit of change of the ramp signal is set to a voltage obtained by equally dividing the above range by a predetermined number of steps. The output of the ramp waveform generation circuit 32 is DA converted to a ramp signal by the DAC 33 and input to the comparison circuit 212.

  Whether or not to input a test digital signal to the initial value calculation circuit 31 is selected by the switch SW2. Further, as the DAC 33, a DA converter that has been confirmed to operate normally in advance is used.

  The ramp signal shown in FIG. 4 has the same unit of change as the ramp signal shown in FIG. 3 with the same number of steps, but the unit of change remains the same as the ramp signal shown in FIG. The number of changing steps may be reduced.

  FIG. 5 is a waveform diagram illustrating another example of the ramp signal input from the DAC 33 of the measurement unit 30. Like the ramp signal shown in FIG. 3, the ramp signal shown in the figure is set to change in units of 0.1 V, but the number of stages to change is five. Therefore, the AD conversion accuracy in the Column-ADC 21 is the same as that when the ramp signal is input from the lamp unit 22, but the time required for AD conversion can be shortened. Therefore, measurement cost can be reduced while ensuring measurement reliability.

  An analog signal from the VCM-DAC 11 is input to a plurality of Column-ADCs 21, and AD conversion is performed in parallel in each Column-ADC 21. A plurality of digital data from each Column-ADC 21 is stored in the memory 24.

  These digital data are output to the output value calculation circuit 34 of the measurement unit 30. The output value calculation circuit 34 generates one correction digital data by performing averaging, Median processing, or the like on the plurality of digital data from each Column-ADC 21.

  The corrected digital data is obtained, for example, by calculating an average value or a median value of the plurality of digital data. In addition, by arranging the above digital data in order and removing any number of upper, lower, or both data (Olympic system), the average value or median value of the remaining digital data is calculated. The corrected digital data may be calculated. The corrected digital data calculated in this way is output to the outside through the switch SW5. Thereafter, the corrected digital data is compared with a test digital signal input to the VCM-DAC 11 in an external arithmetic circuit (not shown), and the quality of the VCM-DAC 11 is determined based on the comparison result.

  When the initial value arithmetic circuit is used, a value obtained by adding the set initial value as an offset to the output digital data is compared with the test digital signal, and the performance of the VCM-DAC 11 is determined based on the comparison result. Pass / fail is determined.

  The switch SW5 can be switched so that the digital data stored in the memory 24 is output to the outside as it is. For example, when an analog signal from the VCM-DAC 11 is AD converted by only one column-ADC 21, there is only one digital data. Therefore, the digital data may be output from the memory 24 as it is.

  However, it is desirable to perform AD conversion with a plurality of Column-ADCs 21 and obtain corrected digital data from a plurality of digital data. Thereby, it is possible to eliminate the influence of measurement variation and erroneous conversion due to individual performance differences of the Column-ADC 21, or to minimize the influence thereof, and to further improve the reliability of the performance measurement.

  As described above, in this embodiment, the measurement unit 30 does not have to have an AD conversion function because the Column-ADC 21 of the CMOS image sensor 20 is used in the measurement of the performance of the VCM-DAC 11. Therefore, unlike the conventional configuration shown in FIG. 9, it is not necessary to attach the ADC 132 to the LSI chip, and the performance of the VCM-DAC can be measured at a low cost. Further, since the Column-ADC 21 is an AD converter for pixel output, the conversion accuracy is higher than the gradation of the VCM-DAC 11 because conversion is performed using a ramp signal whose comparison voltage range is variable. Therefore, even when the gradation of the VCM-DAC 11 is high, highly reliable performance measurement can be performed.

  Here, in the conventional DAC measurement method, as shown in FIG. 9, AD conversion is performed by one ADC. In this case, the output from the comparator 132a shown in FIG. 10 is 1 bit, and AD conversion is performed on the conversion result of each cycle without correcting the conversion error. For this reason, it is impossible to have a means to correct misconversion caused by power supply noise of the circuit, crosstalk, etc., and measurement accuracy differences caused by ADC manufacturing variations, so that sufficient conversion reliability is always ensured. Was difficult.

  On the other hand, in this embodiment, an analog signal from the VCM-DAC 11 is AD converted by a plurality of Column-ADCs 21. Thereby, the performance individual difference of Column-ADC21 and the influence of misconversion can be suppressed, and the reliability of a measurement result can be improved.

  In the conventional VCM driver 110 shown in FIG. 9, the output of the VCM-DAC 111 is amplified by the amplifier 112 and then output to the measuring unit 130. In this case, the measurement result for the VCM-DAC 111 may be affected by the amplification error of the amplifier 112. That is, even if it is determined that the VCM-DAC 111 is defective, there is a problem that it is unclear whether the cause is in the VCM-DAC 111 itself or in another functional block such as the amplifier 112.

  On the other hand, the VCM driver 10 shown in FIG. 2 outputs the output of the VCM-DAC 11 to the CMOS image sensor 20 as it is. Thereby, the performance of the VCM-DAC 11 can be accurately measured without being influenced by other functional blocks such as the amplifier 112.

  Furthermore, in this embodiment, since the analog signal from the VCM-DAC 11 is AD converted by the pixel output Column-ADC 21, the output format of the digital data output from the memory 24 and the output value calculation circuit 34 is This is equivalent to the output format of the pixel data of the image sensor 20. Therefore, the digital data can be subjected to the same image processing as the pixel data and compared with the test digital signal, and the measurement of the performance of the VCM-DAC 11 is further facilitated.

  In the present embodiment, the Column-ADC 21 of the CMOS image sensor 20 is used for pixel output except during a test, but a test-dedicated Column-ADC that is not used for pixel output may be further provided. Since the layout of each Column-ADC is the same, even if a test-only Column-ADC is provided, there is almost no increase in manufacturing cost. Even when the test-dedicated Column-ADC is provided, the output format of the digital data output from the memory 24 and the output value calculation circuit 34 may be equivalent to the output format of the pixel data of the image sensor 20. desirable.

[Embodiment 2]
Another embodiment of the present invention will be described below with reference to FIGS. In the first embodiment described above, the measurement unit 30 is provided in the LSI chip. In the present embodiment, a configuration in which a function corresponding to the measurement unit 30 is provided outside the LSI chip will be described.

  FIG. 6 is a schematic diagram showing a VCM-DAC measurement method according to the present embodiment. In the figure, the VCM driver 10a is mounted on the LSI chip together with the CMOS image sensor 20, while the measurement unit 30a for measuring the VCM-DAC performance of the VCM driver 10a is provided outside the LSI chip. Yes. The point that the output of the VCM-DAC of the VCM driver 10a is input to the Column-ADC 21 of the CMOS image sensor 20 during the test is the same as the configuration shown in FIG.

  FIG. 7 is a circuit diagram showing configurations of the VCM driver 10a, the CMOS image sensor 20, and the measurement unit 30a. The VCM driver 10a has a configuration in which a switch SW6 is provided instead of the switch SW2 in the VCM driver 10 shown in FIG. The measuring unit 30a has a configuration in which a processing instruction circuit 35 and a switch SW7 are further provided in the measuring unit 30 shown in FIG. Note that the switch SW5 shown in FIG. 2 is optional, but is not shown in FIG.

  The processing instruction circuit 35 is a circuit that determines the content of the test digital signal input to the VCM-DAC 11. During the test, the switch SW7 is turned on, and the instruction content from the processing instruction circuit 35 is output to the initial value calculation circuit 31 and the digital code output circuit 40. The initial value calculation circuit 31 calculates the initial value of the ramp signal input to the comparison circuit 212 based on the contents of the instruction. The digital code output circuit 40 generates a test digital signal input to the VCM-DAC 11 based on the contents of the instruction.

  Analog signals from the VCM-DAC 11 are AD-converted in the CMOS image sensor 20 as in the configuration shown in FIG. 2 and output to the output value calculation circuit 34. The output value calculation circuit 34 measures the performance of the VCM-DAC 11 by generating corrected digital data and comparing the corrected digital data with a test digital signal.

  Also in the present embodiment, since it is not necessary to provide an ADC in the measurement unit 30a, the measurement cost of the performance of the VCM-DAC 11 can be suppressed.

[Summary of Embodiment]
The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

  The present invention is applicable not only to measurement of VCM-DAC but also to measurement of performance of any DAC mounted on an LSI chip together with an image sensor.

It is the schematic which shows the measuring method of VCM-DAC which concerns on the 1st Embodiment of this invention. It is a circuit diagram which shows the structure of the VCM driver, CMOS image sensor, and measurement part in the measuring method of VCM-DAC which concerns on the 1st Embodiment of this invention. It is a wave form diagram which shows an example of the ramp signal input from the lamp unit of the said CMOS image sensor. It is a wave form diagram which shows an example of the ramp signal input from DAC of the said measurement part. It is a wave form diagram which shows the other example of the ramp signal input from DAC of the said measurement part. It is the schematic which shows the measuring method of VCM-DAC which concerns on the 2nd Embodiment of this invention. It is a circuit diagram which shows the structure of the VCM driver which concerns on the 2nd Embodiment of this invention, a CMOS image sensor, and a measurement part. It is the schematic which shows the measuring method of the conventional VCM-DAC. It is a circuit diagram which shows the structure of the VCM driver and measurement part in the conventional measuring method. It is a block diagram which shows the structure of ADC of the measurement part shown in FIG. (A) is a waveform diagram showing the analog signals V1 and V2 input to the ADC comparator shown in FIG. 10, and (b) is a waveform diagram showing the binary signal V3 output from the comparator. is there.

Explanation of symbols

11 VCM-DAC (DA converter)
20 Image sensor (solid-state imaging device)
21 Column-ADC (Column-AD converter)
212 Comparator (Comparison means)
213 Latch circuit (decision means)
214 Counter circuit (determination means)

Claims (15)

A DAC measurement method for measuring the performance of a DA converter mounted on an LSI chip together with a solid-state imaging device having at least one Column-AD converter,
A digital input step of inputting a test digital signal to the DA converter;
A DA conversion step of converting the test digital signal into an analog signal by the DA converter;
An analog input step of inputting the analog signal to at least one of the Column-AD converters;
AD conversion step of converting the analog signal into a digital signal by the Column-AD converter;
A DAC measuring method comprising: measuring a performance of the DA converter based on the digital signal and the test digital signal. The solid-state imaging device has a plurality of the Column-AD converters,
In the analog input step, the analog signal is input to a plurality of Column-AD converters,
A correction step of generating a correction digital signal based on a plurality of digital signals output from the plurality of Column-AD converters between the AD conversion step and the measurement step;
The DAC measurement method according to claim 1, wherein in the measurement step, the performance of the DA converter is measured based on the correction digital signal and the test digital signal.   The DAC measurement method according to claim 2, wherein the correction digital signal is an average value or a median value of the plurality of digital signals.   The DAC measurement method according to claim 2, wherein the correction digital signal is an average value or a median value of the plurality of digital signals excluding a maximum value and a minimum value.   3. The DAC measurement method according to claim 2, wherein the correction digital signal is an average value or a median value of values excluding a predetermined range among the plurality of digital signals. The AD conversion step includes
A comparison step of comparing the analog signal with the ramp signal whose voltage changes stepwise;
Determining the digital signal from the comparison result in the comparison step,
The voltage of the ramp signal varies in a range from a voltage lower than the output voltage of the DA converter by a predetermined voltage to a voltage higher than the output voltage of the DA converter by a predetermined voltage,
The DAC measurement method according to claim 1, wherein the predetermined voltage is set to a predetermined ratio of an analog voltage corresponding to the test digital signal.   The DAC measurement method according to claim 6, wherein the ramp signal is input from outside the LSI chip. The solid-state imaging device further includes a test-dedicated Column-AD converter that is not connected to a pixel,
The DAC measurement method according to claim 1, wherein the analog signal is input to the test-dedicated Column-AD converter. An output step of outputting the digital signal to the outside of the LSI chip between the AD conversion step and the measurement step;
9. The DAC measurement method according to claim 8, wherein, in the output step, an output format of the digital signal is equivalent to an output format of pixel data of the solid-state imaging device.   The DAC measurement method according to claim 1, wherein the test digital signal is input from outside the LSI chip. A solid-state imaging device mounted on an LSI chip together with a DA converter and having at least one Column-AD converter,
A solid-state image pickup device configured to be capable of outputting an analog signal from the DA converter to the Column-AD converter. A plurality of the Column-AD converters;
The solid-state imaging device according to claim 11, wherein an analog signal from the DA converter is configured to be output to a plurality of Column-AD converters. The Column-AD converter includes a comparison means for comparing the analog signal with a ramp signal whose voltage changes stepwise.
Determining means for determining a digital signal from the comparison result in the comparing means;
The voltage of the ramp signal varies in a range from a voltage lower than the output voltage of the DA converter by a predetermined voltage to a voltage higher than the output voltage of the DA converter by a predetermined voltage,
The solid-state imaging device according to claim 11 or 12, wherein the predetermined voltage is set to a predetermined ratio of an analog voltage corresponding to a test digital signal input to the DA converter. A test-only Column-AD converter not connected to the pixel;
The solid-state imaging device according to claim 11, wherein the analog signal is input to the test-dedicated Column-AD converter.   The solid-state imaging device according to claim 14, wherein an output format of a digital signal output from the test-dedicated Column-AD converter is equivalent to an output format of pixel data of the solid-state imaging device.

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