JP3253707B2 - Image processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to image processing for processing at least a part of an input image data in an out-of-focus state (hereinafter referred to as soft focus) and forcibly blurring the part. Related to the device.

[0002]

2. Description of the Related Art For example, in a conventional game machine, a character in an image to be displayed (hereinafter, a character in this specification refers to an object such as a person or an animal appearing in a game) is soft-focused. In the case of blurring, image data of a “non-blurred character” that is in focus,
"Blurred character" that is out of focus for a predetermined distance
The image data is stored in a storage device by software in advance, and the data is switched by a hardware circuit.

[0003]

However, according to the above-mentioned method, the "unblurred character" in the in-focus state is used.
Image data and the image data of a "blurred character" that is out of focus by a predetermined distance need to be stored in a storage device in advance, so that the scale of software increases.
There is a problem that a large-capacity storage device is required.
Further, in order to change the degree of blur, it is necessary to previously store image data of a predetermined number of “blurred characters” having different degrees of blur in a storage device, and thus it is necessary to provide a storage device with a larger capacity. is there.

An object of the present invention is to solve the above problems,
An object of the present invention is to provide an image processing apparatus which does not need to store image data of a "blurred character" and can blur an image of input image data.

[0005]

According to the present invention, there is provided an image processing apparatus, comprising: a display unit for displaying input image data and a display indicating whether or not to execute a non-focus state process on a plurality of display surfaces; Based on the soft focus on signal for each surface,
The image data corresponding to each selected display surface, by performing a predetermined addition and subtraction on a predetermined number of image data of adjacent pixels and performing a non-focus state process, thereby obtaining a non-focus state. The image processing apparatus further includes a calculation unit that calculates image data including an image.

According to a second aspect of the present invention, in the image processing apparatus according to the first aspect, the level of the image to be displayed in the depth direction is compared with the level of a predetermined focal plane. Thereby, the determining means for determining whether or not to execute the out-of-focus state processing, and whether or not the calculating means performs the out-of-focus state processing based on the result determined by the determining means are switched. like,
And first control means for controlling the calculation means.

Further, the image processing apparatus according to claim 3 is
2. The image processing apparatus according to claim 1, further comprising: dividing a storage device storing color data indicating a color of an object to be displayed into a predetermined number of color pallets; The calculation means is determined in advance so as to determine whether or not to execute the state processing, and the calculation means switches whether or not to execute the out-of-focus state processing based on the predetermined selection information. And a second control unit for controlling.

According to a fourth aspect of the present invention, there is provided an image processing apparatus according to the fourth aspect, wherein a predetermined focus value is determined based on a soft focus on signal for each display surface indicating whether or not to execute the out-of-focus state processing on the plurality of display surfaces. A rear soft focus enable signal indicating that defocus processing is to be performed on image data on the rear surface located on the rear surface side with respect to the focal plane, and image data on the front surface located on the front side with respect to a predetermined focal plane. A soft focus control means for generating a front soft focus enable signal indicating that defocus processing is to be performed, and an adjacent soft focus control signal based on input image data in response to the generated rear soft focus enable signal. By performing a predetermined addition / subtraction process on a predetermined number of image data for a pixel to be processed and performing an out-of-focus state process, a non-focused image is included. A first calculating means for calculating one image data, and a predetermined number of image data for adjacent pixels in response to the generated front soft focus enable signal based on the input image data. The second calculation means calculates the second image data including the out-of-focus state image by performing predetermined addition / subtraction and performing the out-of-focus state processing, and the first calculation means calculates the second image data. A predetermined addition / subtraction operation is performed on the first image data and the second image data calculated by the second calculation means to obtain a third image including an out-of-focus image.
And a third calculating means for calculating the image data.

According to a fifth aspect of the present invention, in the image processing apparatus of the fourth aspect, the level of the image to be displayed in the depth direction is compared with the level of a predetermined focal plane. Thus, a determining means for determining whether or not to execute the out-of-focus state processing, and the first and second determination means based on a result determined by the determining means.
The first and second calculation means control the first and second calculation means so as to switch whether or not the calculation means performs the out-of-focus state processing.
And control means.

Further, the image processing apparatus according to claim 6 is
5. The image processing apparatus according to claim 4, further comprising: dividing a storage device storing color data indicating a color of an object to be displayed into a predetermined number of color pallets; Selection information as to whether or not to execute the state processing is determined in advance, and whether or not the first and second calculation means execute the out-of-focus state processing is switched based on the predetermined selection information. And a second control means for controlling the first and second calculation means.

[0011]

In the image processing apparatus according to the first aspect of the present invention, the calculating means determines whether or not to execute the out-of-focus state processing on the input image data and the plurality of display surfaces. A predetermined addition / subtraction is performed on a predetermined number of image data of adjacent pixels, which is image data corresponding to each selected display surface, based on the soft focus on signal for each display surface shown in FIG. By executing the in-focus state processing, image data including the out-of-focus state image is calculated. This makes it possible to blur the input image data using a hardware circuit including the calculation means.

Further, in the image processing apparatus according to the present invention, the judging means compares the level of the position in the depth direction of the image to be displayed with the level of a predetermined focal plane, thereby obtaining the non-conformity. The first control means determines whether or not to execute the in-focus state processing, and switches whether or not the calculation means performs the out-of-focus state processing based on a result determined by the determination means. Next, the calculation means is controlled. This makes it possible to switch whether or not to execute the out-of-focus state processing in accordance with the level of the position in the depth direction of the image to be displayed, thereby providing a variety of and more flexibility when applied to a game machine. Image processing can be executed, and characters can be displayed more realistically.

Further, in the image processing apparatus according to the third aspect, the second control means determines whether or not the calculation means executes the out-of-focus state processing based on the predetermined selection information. The calculation means is controlled so as to switch. This makes it possible to switch whether or not to execute the out-of-focus processing for each color palette, so that when applied to a game machine, it is possible to execute a variety of and more flexible image processing. Characters can be displayed realistically.

In the image processing apparatus according to the fourth aspect,
The soft focus control means includes a rear surface positioned rearward of a predetermined focal plane based on a soft focus on signal for each display surface indicating whether or not to execute the out-of-focus state processing on the plurality of display surfaces. A rear soft focus enable signal indicating that defocusing processing is to be performed on the image data, and performing the defocusing processing on the front image data located on the front side of a predetermined focal plane. And a front soft focus enable signal shown in FIG. Next, the first calculation means performs predetermined addition and subtraction on a predetermined number of image data of adjacent pixels in response to the generated rear surface soft focus enable signal based on the input image data. Performing the out-of-focus state processing to calculate the first image data including the out-of-focus state image, and the second calculating means calculates the first image data based on the input image data. In response to the front soft focus enable signal, a predetermined number of image data for adjacent pixels are subjected to a predetermined addition and subtraction to execute an out-of-focus state process, thereby including an out-of-focus state image. Calculate the second image data. Further, the third calculating means may perform a predetermined addition and subtraction on the first image data calculated by the first calculating means and the second image data calculated by the second calculating means. Is performed, and the third image including the out-of-focus image is
Is calculated. As a result, the above-mentioned out-of-focus state processing can be appropriately performed on the front and rear image data, so that the characters to be displayed can be displayed more realistically than in the conventional example.

Further, in the image processing apparatus according to the present invention, the judging means compares the level of the position in the depth direction of the image to be displayed with the level of a predetermined focal plane, thereby obtaining the non-conformity. The first control means determines whether or not to execute the focus state processing, and the first and second calculation means execute the non-focus state processing based on the result determined by the determination means. The first and second calculating means are controlled so as to switch whether or not. With this, it is possible to switch whether or not to execute the above-mentioned out-of-focus state processing on the front and rear image data according to the level of the position in the depth direction of the image to be displayed,
When applied to a game machine, a variety of and more flexible image processing can be executed, and characters can be displayed more realistically.

Further, in the image processing apparatus according to the present invention, the second control means may execute the out-of-focus state processing by the first and second calculation means based on the predetermined selection information. In order to switch whether or not to execute
And the second calculation means. With this, it is possible to switch whether or not to execute the defocusing processing on the front and rear image data for each color palette, so that the method is rich and varied when applied to a game machine. Flexible image processing can be performed, and characters can be displayed more realistically.

[0017]

Embodiments of the present invention will be described below with reference to the drawings.

<First Embodiment> FIG. 1 shows a first embodiment according to the present invention.
It is a block diagram of the image processing system for game machines which is an Example of. In the image processing system of the present embodiment, as shown in FIG. 1, R (red), G (green), B
Image data representing density data of three colors (blue)
It is called RGB data. ) And various control signals for soft-focusing the image of the image data are generated by the image processing control device 1, and in response thereto, the soft focus processing device according to the present invention generates the control signal based on the generated control signal. An out-of-focus state process (hereinafter referred to as a soft focus process) for input RGB data which will be described in detail later.
Is performed to blur the image, and the processed RGB data is
The blurred image is displayed on the CRT display 4 by outputting the image to the CRT display 4 via a known CRT controller 3 that controls the operation of the CRT display 4.

In the soft focus processing apparatus 2 of the present embodiment, the RGB data is displayed in a density of 8 bits for each color, and image data of three colors is obtained by scanning in the main scanning direction and scanning in the sub-scanning direction. And the data of each color is processed in parallel. In addition, RGB data and each signal described in detail below are synchronized with the RGB data,
That is, they are serially input corresponding to the dots of the pixels to be displayed.

FIG. 2 shows the soft focus processing apparatus 2 shown in FIG.
It is a block diagram of. As shown in FIG. 2, a dot clock DOTCK which is a reference signal in each process is generated in the image processing control device 1, and a dot of each pixel of the RGB data corresponds to one clock, and a soft focus processing unit 5 in the device 2. Are input to the soft focus control unit 6 and the mode select control unit 7. Further, a soft focus on signal for each plane and a select signal for each plane shown below, which are generated and output from the image processing control device 1, are input to the soft focus control unit 6. (A) Soft focus on signal for each plane (4 bits): In this embodiment, four different display planes are prepared.
This signal indicates whether or not soft focus is to be performed on each display surface. When the signal is at the H level, it indicates that soft focus processing is on (executed). (B) Select signal for each dot (coded 2 bits): a signal indicating which of the four display surfaces is to be selected for each dot of the displayed dot image, and is selected. It has the form of encoded 2-bit data indicating a surface.

Based on each of the above signals, the soft focus control 6 goes to the H level when the soft focus is on on the selected display surface, and determines whether or not to execute the soft focus processing on the dot to be displayed at present. A soft focus enable signal indicating the above is generated and output to the soft focus processing unit 5.

In the present embodiment, RGB data A0, A1, A2,
A3 (these RGB data correspond to the four pixels arranged side by side along the main scanning line on the CRT display 4) is the number 1 corresponding to the four soft focus modes.
The output data B shown in Expressions (4) to (4) is calculated, and the soft focus processing is performed.

(I) First soft focus mode M1: calculated and realized by Equation 1 based on RGB data of two adjacent dots

## EQU1 ## B = (A0 + A1) / 2 (ii) Second soft focus mode M2 calculated and realized by Equation 2 based on RGB data of three adjacent dots:

## EQU2 ## B = (2A0 + A1 + A2) / 4 (iii) Third Soft Focus Mode M Calculated by Equation 3 Based on RGB Data of Four Adjacent Dots and Realized
3:

## EQU3 ## B = (A0 + A1 + A2 + A3) / 4 (iv) Fourth soft focus mode M4 calculated and realized by Equation 4 based on RGB data of four adjacent dots:

B = (4A0 + 2A1 + A2 + A3) / 8

After the soft focus mode data indicating the mode selected from the four soft focus modes is generated in the image processing control device 1, it is input to the mode select control section 7. In response to this, the mode select control unit 7 generates selection signals S1 to S4, S30, and S40 and outputs them to the soft focus processing unit 5, as shown in Table 1, according to each of the soft focus modes M1 to M4. I do. In Table 1 below,
H indicates an H level, L indicates an L level, and X indicates an undefined level.

[0025]

[Table 1] {Selection signal M1 M2 M3 M4} {S1HHLHSLS2HLLLLS3XHHLLS4XLHLHLS30HLLLLS40HHL} ──────────────────

Further, the soft focus processing section 5 calculates a predetermined addition and subtraction for the RGB data input from the image processing control device 1 based on the input soft focus enable signal and the selection signal, as will be described later in detail. To execute the soft focus process, and output the processed RGB data.

FIG. 3 is a block diagram of the soft focus control section 6 of FIG.

As shown in FIG. 3, a 4-bit surface-by-surface soft focus on signal is supplied to registers RE1 to RE1, respectively.
4 and temporarily stored, then AND gate A
The signals are input to the first input terminals ND1 to AND4.
On the other hand, the 2-bit dot per-plane select signal is supplied to the decoder D
After being input to E1 and decoded into a 4-bit signal, it is input to the second input terminals of AND gates AND1 to AND4. Each signal output from the AND gates AND1 to AND4 is a dot clock DOTCK.
After the signal input to the input terminal D is stored at the rise of the OR gate OR, the signal is output one dot later and the OR gate OR is output via the delay flip-flops FF1 to FF4.
After that, the soft focus enable signal is output to the soft focus processing unit 5 from the output terminal of the OR gate OR1.

Accordingly, the soft focus control unit 6 configured as described above turns on soft focus on the selected display surface based on the input soft focus on signal for each surface and the select signal for each dot. At this time, the level becomes H level, and a soft focus enable signal indicating whether or not to perform soft focus on the dot to be displayed at present is generated and output to the soft focus processing unit 5.

FIG. 4 is a block diagram of the soft focus processing section 5 of FIG.

As shown in FIG. 4, the dot clock DOT
CK is each of the delay type flip-flops FF11 to FF14
Is input to each clock input terminal. The RGB data input from the control device 1 includes three cascade-connected flip-flops FF11 to FF13 and a data selector S
The signal is output via an input terminal A and its output terminal Q of E5 and a flip-flop FF14, and is input via the input terminals A and B of the data selector SE4 and its output terminal Q via an input terminal B of an adder AD2. Is input to Further, R output from the output terminal Q of the flip-flop FF11
The GB data is input to each input terminal A, B of the data selector SE3.
And an input terminal A of the adder AD2 via the output terminal Q
Is input to Further, the RGB data output from the output terminal Q of the flip-flop FF12 is input to the input terminal B of the adder AD1 via the input terminals A and B of the data selector SE2 and the output terminal Q thereof. The RGB data output from the output terminal Q of the FF 13 is input to the input terminal A of the adder AD1 via the input terminals A and B of the data selector SE1 and the output terminal Q.

The selection signals S1, S2, S3, and S4 are input to the respective selection signal input terminals S of the data selectors SE1 to SE4, and the selection signals S30 and S40 are output enable signals of the low enable of the data selectors SE3 and SE4, respectively. Input to the terminal. Each of the data selectors SE1 and SE2 receives an H level selection signal S
RG input to input terminal A when 1, S2 is input
B data is selected and output from the output terminal Q. On the other hand, when L-level selection signals S1 and S2 are input, the input terminal B
Is selected and output from the output terminal Q. Each of the data selectors SE3 and SE4 selects and outputs RGB data input to the input terminal A when the selection signals S3 and S4 at H level are input and the selection signals S30 and S40 at L level are input. Terminal Q
When the L-level selection signals S3 and S4 are input and the L-level selection signals S30 and S40 are input, the RGB data input to the input terminal B is selected and output from the output terminal Q. .

Here, each circuit element in the soft focus processing unit 5 processes three data in parallel. Also,
The input / output terminals of the data selector SE1 are connected as shown in FIG. That is, the data selector SE1
Is an input terminal A having three 9 bits in parallel (hereinafter referred to as 9 × 3 bits), an input terminal B having 9 × 3 bits,
And a 9 × 3 bit output terminal Q. The 8 × 3 bit RGB data input to the data selector SE1 is input to the upper 8 bit RGB terminals of the input terminal A and the lower 8 bit RGB data of the input terminal B.
While being input to each terminal B, 8 × 3 bit RGB data output from the data selector SE1 is output from upper 8 bit RGB terminals of the output terminal Q. Here, among the output terminals Q of the data selector SE1, the RGB terminals of the least significant bit are grounded. Therefore, when the H-level selection signal S1 is input, the data selector SE1 doubles the input RGB data and outputs the data. On the other hand, when the L-level selection signal S1 is input, the data selector SE1 outputs The input RGB data is output as it is, and therefore, the data selector SE1 constitutes a multiplier capable of selecting a double or a multiple. Further, the data selectors SE2 to SE4 are also connected in the same manner as the data selector SE1, and similarly operate as a multiplier capable of selecting a multiple of twice or one.

Further, the adder AD1 adds each data input to the input terminals A and B, and outputs 10 × 3 bit data of the addition result to the input terminal A of the adder AD3. The least significant 1-bit RGB of the output terminal of the adder AD2.
Since each terminal is grounded, the adder AD2 adds each data input to the input terminals A and B and adds 9 ×
After dividing 3-bit data by 2, 8 × 3
The data is output to the input terminal B of the adder AD3. Furthermore, the least significant 2 bits RGB of the output terminal of the adder AD3
Since each terminal is grounded, the adder AD3 adds each data input to the input terminals A and B, and adds
After dividing 3-bit data by 4, 8 ×
The 3-bit data is input to the input terminal B of the data selector SE5.
Output to

The soft focus enable signal is input to the data selector SE5. When the soft focus enable signal is at H level, the data selector SE5 selects the data input to the input terminal B in order to select the data on which the soft focus has been executed. Flip-flop FF
14 and output as 8 × 3 bit RGB data. On the other hand, when the soft focus enable signal is at the L level, the data selector SE5 selects data input to the input terminal A and selects 8 × 3 bit data via the flip-flop FF14 in order to select data not to execute soft focus. Output as RGB data.

The operation of the soft focus processing section 5 in the first embodiment configured as described above will be described below for each of the soft focus modes M1 to M4.

(I) First Soft Focus Mode M1 After the double data 2A0 and 2A1 are output from only the two data selectors SE1 and SE2 of the four data selectors SE1 to SE4, respectively, The addition is performed by the adder AD1. Addition result data 2 (A0
+ A1) is divided by 4 in the adder AD3 to obtain output data B = (A0 + A1) / 2 shown in Expression 1.

(Ii) Second soft focus mode M2 Double data 2A0, double data A1, double double data A3 from only three data selectors SE1, SE2 and SE3 of the four data selectors SE1 to SE4. After the data 2A2 is output, the former two data 2A0 and A1
Are added by the adder AD1, while the latter one data 2A2 is divided by two by the adder AD2.
Next, the data (2A0 + A1) and A2 output from the adders AD1 and AD2 are added and divided by 4 by the adder AD3, and the output data B represented by Expression 2 is obtained.
= (2A0 + A1 + A2) / 4.

(Iii) Third Soft Focus Mode M3 One time data A0, one time data A1, two times data 2A2, 2 from the data selectors SE1 to SE4, respectively.
After the double data 2A3 is output and the data A0 and A1 are added by the adder AD1, the data (A
0 + A1) is input to the adder AD3. On the other hand, after the data 2A2 and 2A3 are added by the adder AD2, 2
And the data (A2 + A3) of the calculation result is input to the adder AD3. Further, the adder AD3 adds the input data and divides it by 4 to obtain output data B = (A0 + A1 + A2 + A3) / 4 shown in Expression 3.

(Iv) Fourth soft focus mode M4 Double data 2A0, 1x data A1, 1x data A2, 1 from data selectors SE1 to SE4, respectively.
After the double data A3 is output and the data 2A0 and A1 are added by the adder AD1, the data (2
A0 + A1) is input to the adder AD3. On the other hand, the data A2 and A3 are added by the adder AD2 and then divided by 2, and the calculation result data (A2 + A3) / 2 is input to the adder AD3. Further, the adder AD3 adds each input data and divides the data by 4 to obtain output data B = (4A0 + 2A1 + A2 + A3) /
Get 8.

As described above, in the first embodiment, a predetermined number of bits of R which are adjacent to each other on the main scanning line are inputted.
Since the soft focus processing is performed by performing a predetermined addition or subtraction of one of Expressions 1 to 4 in accordance with the soft focus mode set for the GB data, the image of the blurred character is displayed as in the conventional example. Since data is not stored in a storage device, a storage device for that purpose is not required. Also, since the soft focus processing is realized by a hardware circuit, there is an advantage that the soft focus processing can be executed at a higher speed than in the conventional example.

<Second Embodiment> FIG. 6 shows a second embodiment according to the present invention.
It is a block diagram of the soft focus control part 6a of the Example of FIG.

The second embodiment differs from the first embodiment only in the soft focus control section 6a, and differs from the first embodiment in that the position of the character to be displayed in the depth direction (the plane parallel to the XY plane) is Is compared with a Z level of a predetermined focal plane. When the Z level of the character is large, that is, when the character is behind the focal plane, H A level soft focus enable signal is output.

FIG. 7 is a diagram showing a coordinate system used in the second embodiment. In FIG. 7, the XY plane is CR
The level in the Z-axis direction (indicated by an arrow A100) that is a plane parallel to the display screen of the T display 4 and perpendicular to the X-axis and the Y-axis defines the focal plane and the screen of the character to be displayed. This is the level in the depth direction. In the present embodiment, the Z level is represented by 3 bits. When the Z level is 000, it is located at the forefront, and when it is 111, it is located at the rearmost.

As shown in FIG. 6, 3-bit focal plane data generated by the image processing controller 1 is stored in a register R.
While being input to the input terminal B of the comparator COM11 via E12, each 3 × 8-bit surface generated by the image processing controller 1 and indicating at which Z level a character to be displayed on each display surface is located Are input to the input terminals A to H of the data selector SE11 via the register RE11. Also, a 3-bit dot-to-dot select signal generated by the image processing control device 1 is transmitted to the select signal input terminal S of the data selector SE11.
, And the data selector SE11 responds to the dot-to-surface select signal by selecting one 3-bit data whose surface is selected by the select signal from the eight 3-bit data input to the input terminals A to H. The data is selected and output to the input terminal A of the comparator COM1. Then, the comparator CO
M1 compares each data input to the input terminals A and B, outputs an H level soft focus enable signal via the delay type flip-flop FF21 when A> B, and outputs an L level soft focus enable signal when A ≦ B. The soft focus enable signal is output via the delay flip-flop FF21. Here, the dot clock DOTCK is input to the clock input terminal of the delay flip-flop FF21,
The flip-flop FF21 has a dot clock DOTCK.
Works in sync with.

In the second embodiment constructed as described above, when the Z level of the character to be displayed is behind the predetermined focal plane, an H level soft focus enable signal is output to output the character. Since the soft focus processing is executed for
Whether or not to execute soft focus processing can be switched according to the level, and when applied to game machines, a variety of and more flexible image processing can be executed, and characters can be displayed more realistically can do.

In the second embodiment, when the character to be displayed is behind the focal plane, the H-level soft focus enable signal is output.
The present invention is not limited to this, and an H-level soft focus enable signal may be output when the character to be displayed is in front of the focal plane.

<Third Embodiment> FIG. 8 shows a third embodiment according to the present invention.
It is a block diagram of the soft focus control part 6b of Example of this.

The third embodiment differs from the first embodiment in that a soft focus control section 6b is provided. The color data of the character to be displayed (indicating in what color the character is to be displayed) is stored in the RAM of the CRT controller 3 in advance. In the third embodiment, the RAM has a predetermined block area. Is divided into 64 color pallets, and whether or not to execute the soft focus processing is switched for each of the color pallets. More specifically, the address of the RAM for storing character color data is divided into a predetermined bit segment and a predetermined bit offset, and the area of the pallet indicated by the segment is used as a unit of processing division of the soft focus processing.

As shown in FIG. 8, a 1 × 64-bit soft focus on signal for each color pallet generated by the image processing controller 1 is input to each input terminal A of the data selector SE21 via the register RE21. On the other hand, 6-bit color palette select data indicating which color palette is to be selected is input to the select signal input terminal S of the data selector SE21. The data selector SE21 selects one signal of the color pallet indicated by the color pallet select data from among the 64 1-bit color pallet soft focus on signals inputted, and performs the soft focus via the delay flip-flop FF22. Output as an enable signal.
Here, the dot clock DOTCK is input to the clock input terminal of the delay flip-flop FF22, and the flip-flop FF22 operates in synchronization with the dot clock DOTCK.

In the third embodiment described above, whether or not to execute the soft focus processing can be switched for each color pallet. Therefore, when the present invention is applied to a game machine, a variety of images and a more flexible image can be obtained. Processing can be executed, and characters can be displayed more realistically.

<Fourth Embodiment> FIG. 9 shows a fourth embodiment according to the present invention.
It is a block diagram of the soft focus processing device 2a of the Example of FIG.

In the fourth embodiment, as shown in FIG.
In order to realize a more realistic image by differentiating the soft focus processing for the character located on the front side with respect to the focal plane and the soft focus processing for the character located on the rear side with respect to the focal plane, And a rear soft focus processing section 10 for performing the latter soft focus processing.

In the first to third embodiments described above,
When soft focus processing is performed on one character of two adjacent characters and soft focus processing is not performed on another character, 2
The edge is emphasized at the boundary between two characters. In this case, when the surface of the character subjected to the soft focus processing is behind the surface of the character not subjected to the soft focus processing, the image of the character can be displayed realistically. However, in this case, when the surface of the character subjected to the soft focus processing is located on the front side of the surface of the character not subjected to the soft focus processing, the character subjected to the soft focus processing appears to be located on the rear side, and the character is realistically displayed. There was a problem that an image could not be displayed.

FIG. 13 shows a cloud character CA and two airplane characters CB on the background plane BG.
1, an image when CB2 approaches and an image when soft focus processing is not performed. Here, the character CB1 of the airplane is being hidden behind the cloud character CA (rear side). As the Z-level condition (hereinafter, referred to as a first Z-level condition), the Z level of the cloud character CA is 000, the Z levels of the airplane characters CB1 and CB2 are 001, and the background plane BG Is set as 011. 13 to 16, D2, D4, D6, D
8 indicates that the density of each pixel is 2, 4, 6, and 8.

When the soft focus processing is not performed on the image, as shown in FIG. 13, the soft focus processing is performed on each surface of all the characters CA, CB1, CB2 and the background surface BG. Is performed as shown in FIG. 14, and when soft focus processing is performed on the character CB and the background surface BG, the result is as shown in FIG. Under the condition of the first Z level, a realistic image as an image can be obtained by using the circuits of the first to third embodiments. However, if the Z level of the cloud character CA is set to 001, the Z levels of the airplane characters CB1 and CB2 are set to 000, and the Z level of the background plane BG is set to 011 as the second Z level condition, Even when soft focus processing is performed on CB1, CB2 and the background plane BG,
As shown in FIG. 15, there is a problem that the cloud character CA appears to be in front of the airplane character CB1 and is displayed differently from the actual image. In order to solve this problem, a circuit according to a fourth embodiment is provided. Hereinafter, the circuit of the fourth embodiment will be described in detail with reference to FIG. In the following, when there are two characters having different display surfaces, the front surface and the rear surface are referred to as a front surface when a character surface on the front side is referred to as a front surface, and a display surface for a character located on the rear side is referred to as a rear surface. .

As shown in FIG. 9, the dot clock DOT
CK is input to the rear soft focus processing unit 10, the front soft focus processing unit 20, the soft focus control unit 60, and the mode select control unit 70. In addition, based on the 4 × 2 bit soft focus on signal for each plane and the 2 bit dot select signal for each plane, the soft focus control 6 is set to the H level when the soft focus is on at the selected front side and is currently displayed. A front soft focus enable signal indicating whether or not to execute soft focus on a dot to be performed,
A front soft focus enable signal which indicates whether or not to execute soft focus on a dot to be displayed at the H level when soft focus is on on the selected rear surface is generated as described in detail later. , And outputs the former signal to the front soft focus processing unit 20 and the latter signal to the rear soft focus processing unit 10. Further, after the soft focus mode data (including the information on the front surface and the back surface) indicating the mode selected from the four soft focus modes is generated in the image processing control device 1, the mode select control unit 7
0, and in response to this, the mode select control unit 7 controls the front and rear soft focus processing units 10 and 20 according to the soft focus modes M1 to M4 as shown in Table 1, respectively. Selection signal S1
To S4, S30 and S40 to generate the processing units 10 and 20
Output to

The R generated by the image processing controller 1
The GB data is input to the processing units 10 and 20. Processing unit 1
A value of 0 performs the soft focus processing on the rear surface when the rear surface soft focus enable signal is at the H level, and then outputs the RGB data after the rear surface processing to the processing unit 20. When the front soft focus enable signal is at the H level based on the input RGB data, the processing unit 20 performs and outputs a soft focus process as described later in detail.

FIG. 10 is a block diagram of the soft focus control section 60 of FIG.

As shown in FIG. 10, a 4-bit soft focus on signal for the front or rear surface is supplied to the register RE3.
1, when the L-level front write-on signal indicating the writing of the front signal is input to the write terminal of the register RE32, the input 4-bit front surface soft focus on signal is input. After being written, it is input to each of the first input terminals of the AND gates AND11 to AND14. At another time interval, a rear write-on signal at the L level indicating the rear signal write is output to the register RE.
When input is made to the write terminal 31, a 4-bit soft focus-on signal for the rear surface of the input 4 bits is written, and then input to the first input terminals of the AND gates AND 21 to AND 24. On the other hand, after the 2-bit dot-by-plane select signal is decoded by the decoder DE11, the 4-bit signal after decoding is applied to each of the second input terminals of the AND gates AND11 to AND14 and each of the AND gates AND21 to AND24. The signal is input to the second input terminal.

Each signal output from the AND gates AND11 to AND14 is input via the OR gate OR11 to the shift register SR1 which serially shifts and outputs the signal input in synchronization with the dot clock DOTCK, and is input. After the signal is shifted by three dots by the shift register SR1 for timing adjustment with another circuit, it is output as a rear surface soft focus enable signal. On the other hand, each signal output from the AND gates AND21 to AND24 is connected to the OR gate OR12.
Is input to a shift register SR2 that serially shifts and outputs a signal input in synchronization with the dot clock DOTCK, and the input signal is input to the shift register SR2 by the shift register SR2 for timing adjustment with another circuit. After being shifted by a dot, it is output as a front soft focus enable signal.

The soft focus control unit 60 configured as described above turns on the soft focus on the selected display surface based on the input front-surface and rear-surface soft-focus on signals and the dot-per-surface select signal. , The front and rear soft focus enable signals indicating whether or not to execute the soft focus on the dot to be currently displayed are generated and output to the processing units 20 and 10, respectively.

The rear soft focus processing unit 10 is configured similarly to the soft focus processing unit 5 of FIG.

FIG. 11 is a block diagram of the front soft focus processing section 20 of FIG.

As shown in FIG. 11, the RGB data after the rear surface processing output from the processing unit 10 is input to the input terminal A of the adder AD11, and is also input to the data selector SE32 via the delay flip-flop FF32. While being input to the terminal B, the RGB data generated by the control device 1 and not processed by the processing unit 10 is input to a soft focus circuit 21 configured similarly to the soft focus processing unit 5 in FIG. The 6-bit selection signal is input to the soft focus circuit 21, and the dot clock DOTCK is supplied to the soft focus circuit 21, the shift register SR11, and each delay flip-flop FF3.
1, is input to FF32. Here, the flip-flop FF31 is provided for forcibly delaying the RGB data subjected to the front soft focus processing by one dot, and the flip-flop FF32 is provided for timing adjustment with another circuit. Further, a front soft focus enable signal is input to the soft focus circuit 21 and the shift register SR11.

The RGB data subjected to soft focus processing by the soft focus circuit 21 is forcibly set to 1
After being delayed by the number of dots, it is input to the input terminal B of the adder AD11.

The shift register SR11 shifts the serially input front soft focus enable signal in synchronization with the dot clock DOTCK, and shifts the 2-bit signal corresponding to two adjacent dots to each of the exclusive OR gates XOR1. Input terminal and OR gate OR2
1 to each input terminal. The signal output from the exclusive OR gate XOR1 is the data selector SE3.
1, while the signal output from the OR gate OR21 is the data selector SE3.
2 select signal input terminal.

The adder AD11 receives each data input to each of the input terminals A and B (here, data subjected to front soft focus processing delayed by one dot with respect to data subjected to rear soft focus processing corresponds to each data). .) Is added, and the least significant bit of the addition result data is rounded down and divided by 2 to output the calculation result 8 × 3 bit data to the input terminal B of the data selector SE31. Further, the data selector SE31 selects data input to the input terminal A when the select signal is at the H level and outputs the data to the input terminal A of the data selector SE32, while inputting the data to the input terminal B when the select signal is at the L level. Select the data to be output and output the same. Further, the data selector SE32 selects the data input to the input terminal A when the select signal is at the H level and outputs the data as the RGB data selector after the front soft focus processing, while the input terminal B when the select signal is at the L level. Is selected and output similarly.

In the processing unit 20 configured as described above, the select signal output from the exclusive OR gate XOR1 becomes H when one of the two adjacent pixels enables front soft focus. Level, and the output data of the adder AD11 is selected. At other times, the level of the select signal goes low, and the soft focus processing circuit 21
The RGB data subjected to the front soft focus processing is selected. Further, when at least one dot of the adjacent two-dot pixels enables the front soft focus, the select signal output from the OR gate OR21 becomes H level, and the data selector SE
While the RGB data selected by 31 is selected, at other times, the RGB signal is at the select signal L level and the RGB data which is not subjected to the front surface processing after the rear surface processing is selected. Therefore, by using the circuit of the processing unit 20, it is possible to add the data of the surface behind the surface at the edge portion of the surface on which the front soft focus is performed, and when actually seeing a blurred image, It has the same function and effect as the rear part can be seen through at the edge part. The operation and effect are the same as those described below with reference to FIGS. 19 and 20.

In the fourth embodiment, the result of processing by the soft focus processing device 2a according to the on / off state of the front soft focus processing and the rear soft focus processing (specifically, the front soft focus enable signal is Table 2 shows an example of data obtained when the L level is switched from the L level to the H level by two dots and then switched to the L level. Here, RGB data A0, A1, of four dots adjacent in the main scanning direction.
A2 # indicates the case where A2 and A3 are input, A0 # indicates the RGB data of which the RGB data A0 has been subjected to the rear soft focus processing, A1 # indicates the RGB data of which the RGB data A1 has been subjected to the rear soft focus processing, and A0 # *
Indicates RGB data obtained by subjecting RGB data A0 to front soft focus processing, and A1 * indicates RGB data obtained by subjecting RGB data A1 to front soft focus processing.

[0071]

[Table 2] 後 Back side processing Front side processing Image data of the processing result (adjacent ４ off off A0 → A1 → A2 → A3 On Off A0 # → A1 # → A2 # → A3 # Off On (A0 + A1) / 2 → A1 * → (A1 * + A2) / 2 → A3 On On (A0 + A1 #) / 2 → A1 * → (A1 * + A2 # ) / 2 → A3 ───────────────────────────────────

Next, the operation and effect of the fourth embodiment will be described below. As shown in FIGS. 17 to 20, images in Table 2 are considered with respect to images in which clouds 200 on the front cover the mountains 100 on the rear. (A) When both the rear surface processing and the front surface processing are off, as shown in FIG. 17, both the mountain 100 and the cloud 200 form an image with clear edge portions. (B) When the rear surface processing is on and the front surface processing is off, as shown in FIG. 18, it is possible to display a state in which the front cloud 200 is used as the focal plane and the rear mountain 100 is blurred. (C) When the rear surface processing is off and the front surface processing is on, as shown in FIG. 19, it is possible to display a state in which the front cloud 200 is blurred and the rear mountain 100 is in focus. (D) When both the rear surface processing and the front surface processing are on, an image is obtained when both the mountain 100 and the cloud 200 are blurred, as shown in FIG. Therefore, by using the circuit of the fourth embodiment,
It is possible to display all states for various actual appearances in the same manner as an actual image.

For example, when the rear soft focus processing is off and the front soft focus enable signal is
When the RGB data changes as shown in FIG. 12, the RGB data obtained by the circuit of the fourth embodiment changes as shown in FIG. In an actual circuit, the timing of input RGB data and the timing of output RGB data are different, but corresponding dots are displayed at the same timing for easy understanding.

As shown in FIGS. 19 and 20, when the soft focus is turned on for the front surface, the edge portion is added to the data on the rear surface to obtain
It can be displayed as if the cloud 200, which is the data on the front, is certainly in front of the mountain 100. On the other hand, when the edge portion is not added, the boundary portion between the mountain 100 and the cloud 200 is not blurred, so that the mountain 100 is displayed as if it were ahead of the cloud 200 that is originally in front. FIG.
8 is a timing chart showing that edge portions are added.

Further, under the above-mentioned second Z-level condition, both the front soft focus processing and the rear soft focus processing are turned on to perform soft focus processing on the characters CB1 and CB2 and the background BG. When the image data of FIG. 13 is processed using the circuit of the fourth embodiment, the image of FIG. 16 can be obtained. As is apparent from FIG. 16, by performing a predetermined addition / subtraction process on each of the RGB data of the two characters CA and CB1, the two characters C
The boundary between A and CB1 can be displayed by approximately the average density of the two characters, and the character CB of the airplane can be displayed.
1 can be displayed as if it were in front of the cloud character CA, and the character to be displayed can be displayed more realistically than in the conventional example.

The circuit of the fourth embodiment described above may be combined with the soft focus control section 6a of the second embodiment or the soft focus control 6b of the third embodiment.

<Other Embodiments> In the above embodiments,
Although the soft focus processing is performed on the character, the present invention is not limited to this, and the soft focus processing may be performed on the entire image or a part of the image to be displayed.

[0078]

As described in detail above, according to the image processing apparatus of the present invention, the input image data and each display surface indicating whether or not to execute the out-of-focus state processing on the plurality of display surfaces. A non-focus state process is performed by performing a predetermined addition and subtraction on a predetermined number of image data of adjacent pixels, which is image data corresponding to each selected display surface, based on each soft focus on signal. By running
Since the calculation means for calculating the image data including the out-of-focus state image is provided, the image can be blurred for each display surface with respect to the input image data by using a hardware circuit. Thus, unlike the conventional example, there is no need to store image data of a blurred character, so there is no need to provide a storage device for that purpose, and the capacity of the storage device of the entire image processing apparatus can be greatly reduced. . This is particularly noticeable when storing image data of a plurality of characters whose degree of defocus is blurred in the conventional example.

[Brief description of the drawings]

FIG. 1 is a block diagram of an image processing system for a game machine according to a first embodiment of the present invention.

FIG. 2 is a block diagram of a soft focus processing device 2 of FIG.

FIG. 3 is a block diagram of a soft focus control unit 6 of FIG.

FIG. 4 is a block diagram of a soft focus processing unit 5 of FIG.

FIG. 5 is a block diagram showing details of connection of input / output terminals of a data selector SE1 of FIG. 4;

FIG. 6 is a block diagram of a soft focus control unit 6a according to a second embodiment of the present invention.

FIG. 7 is a diagram showing a coordinate system used in the second embodiment.

FIG. 8 is a block diagram of a soft focus control unit 6b according to a third embodiment of the present invention.

FIG. 9 is a block diagram of a soft focus processing device 2a according to a fourth embodiment of the present invention.

FIG. 10 shows a soft focus control unit 6 shown in FIG.
0 is a block diagram of FIG.

11 is a block diagram of the front soft focus processing unit 20 of FIG.

12 is a diagram illustrating an operation of the soft focus processing device 2a of FIG.

FIG. 13 is a front view showing an image when two airplane characters CB1 and CB2 approach the cloud character CA on the background plane BG, and when the soft focus processing is not performed. .

14 is a front view showing the image of FIG. 13 when a soft focus process is performed on the entire screen.

FIG. 15 is an image of FIG.
FIG. 10 is a front view showing an image when the soft focus processing according to the first to third embodiments is performed on the surface BG of the first and CB2 and the background.

16 is an image of FIG. 13 showing a character CB
It is a front view showing an image when soft focus processing of a 4th example is performed to surface BG of 1, CB2, and a background.

FIG. 17 is an example of an image when a cloud on the front is applied to the mountain on the rear, for explaining the operation and effect of the circuit of the fourth embodiment, in which both rear processing and front processing are off. It is a front view which shows the image of the case.

FIG. 18 is an example of an image when a cloud on the front is applied to the mountain on the rear, for explaining the operation and effect of the circuit of the fourth embodiment, where the rear processing is on and the front processing is performed. FIG. 6 is a front view showing an image when is off.

FIG. 19 is an example of an image when a front mountain is covered by a front mountain for explaining the operation and effect of the circuit of the fourth embodiment, wherein rear surface processing is off and front surface processing is performed. FIG. 7 is a front view showing an image when is turned on.

FIG. 20 is an example of an image when a cloud on the front surface is applied to the mountain on the rear surface for explaining the operation and effect of the circuit according to the fourth embodiment, and both the rear surface process and the front surface process are on; It is a front view which shows the image of the case.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Image processing control apparatus 2, 2a ... Soft focus processing apparatus, 3 ... CRT controller, 4 ... CRT display, 5 ... Soft focus processing section, 6, 60 ... Soft focus control section, 7, 70 ... Mode select control section Reference numeral 10: Rear soft focus processing unit, 20: Front soft focus processing unit, 21: Soft focus circuit, RE1 to RE4, RE11, RE12, RE21, R
E31, RE32: register, DE1, DE11: decoder, AND1 to AND4, AND11 to AND14, A
ND21 to AND24 ... AND gate, FF1 to FF4, FF11 to FF14, FF21,
FF22, FF31, FF32 ... delay type flip-flop, OR1, OR11, OR12, OR21 ... OR gate, SE1 to SE5, SE11, SE21, SE31, S
E32: Data selector, AD1 to AD3, AD11: Adder, COM1: Comparator, SR1, SR2, SR11: Shift register, XOR1: Exclusive OR gate.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-63-259778 (JP, A) JP-A-64-84295 (JP, A) JP-A-6-83955 (JP, A) JP-A-6-83595 95834 (JP, A) JP-A-60-225280 (JP, A) JP-A-3-44776 (JP, A) JP-A-4-354073 (JP, U) JP-A-5-40951 (JP, U) (58) Field surveyed (Int.Cl. ⁷ , DB name) G06T 5/20

Claims (6)

(57) [Claims] 1. A display surface selected on the basis of input image data and a soft focus on signal for each display surface indicating whether or not to execute an out-of-focus state process on a plurality of display surfaces. By performing a predetermined addition and subtraction on a predetermined number of image data of adjacent pixels and performing an out-of-focus state process, image data including an out-of-focus state image is obtained. An image processing apparatus comprising a calculation unit for calculating. 2. The image processing apparatus according to claim 1, further comprising: comparing a level of a position in a depth direction of the image to be displayed with a level of a predetermined focal plane to determine whether to execute the out-of-focus state processing. Determining means for determining whether or not to execute the out-of-focus state processing based on a result determined by the determining means; and first control means for controlling the calculating means so as to switch whether or not to execute the out-of-focus state process. The image processing apparatus according to claim 1, further comprising: 3. The image processing apparatus further divides a storage device storing color data indicating a color of an object to be displayed into a predetermined number of color pallets, and defocuses each of the divided color pallets. The calculation means is determined in advance so as to determine whether or not to execute the state processing, and the calculation means switches whether or not to execute the out-of-focus state processing based on the predetermined selection information. The image processing apparatus according to claim 1, further comprising a second control unit for controlling. 4. An image of a rear surface located rearward of a predetermined focal plane based on a soft focus-on signal for each display surface indicating whether or not to execute an out-of-focus state process on a plurality of display surfaces. A rear soft focus enable signal indicating that defocus processing is to be performed on data, and a front face indicating that defocus processing is to be performed on image data of a front surface located on the front side with respect to a predetermined focal plane. A soft focus control means for generating a soft focus enable signal; and, in response to the generated rear surface soft focus enable signal, based on input image data, for a predetermined number of image data for adjacent pixels. A first image data including an out-of-focus image is calculated by performing a predetermined addition / subtraction and performing an out-of-focus state process.
Calculating means for calculating a predetermined number of image data of adjacent pixels in response to the generated front soft focus enable signal based on the input image data, A second calculating unit that calculates second image data including an image in an out-of-focus state by executing a focus state process; and the first image data calculated by the first calculating unit and the second image data. A third calculating unit that performs predetermined addition and subtraction with the second image data calculated by the second calculating unit to calculate third image data including an image in an out-of-focus state. An image processing apparatus characterized in that: 5. The image processing apparatus according to claim 1, further comprising comparing the level of a position in the depth direction of the image to be displayed with a level of a predetermined focal plane to determine whether to execute the out-of-focus state processing. Determining means for determining whether or not to execute the out-of-focus state processing based on the result determined by the determining means. 5. The image processing apparatus according to claim 4, further comprising: first control means for controlling said calculation means. 6. The image processing apparatus further divides a storage device storing color data indicating a color of an object to be displayed into a predetermined number of color pallets, and defocuses each of the divided color pallets. Selection information as to whether or not to execute the state processing is determined in advance, and whether or not the first and second calculation means execute the out-of-focus state processing is switched based on the predetermined selection information. 5. The image processing apparatus according to claim 4, further comprising a second control means for controlling said first and second calculation means.