JPS62297895A - Contouring display system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] 3. Detailed Description of the Invention [Summary] Character data is stored in a first memory, and data obtained by shifting the character data by one scanning line is stored in a second memory. The data obtained by superimposing the data in the first memory and the data in the second memory and the data obtained by delaying this data by one dot and two dots are all superimposed. A border signal is obtained by removing data obtained by delaying the character data in the first memory by one dot from this data.

[Industrial application field]

The present invention relates to a border display method for making characters easier to see when displaying characters on a scanning display screen in an overlapping manner with another screen.

When displaying characters and other screens on a horizontal display (superimposing), it is necessary to prevent the characters from becoming difficult to see due to the background screen. The present invention is useful in such cases.

[Conventional technology]

When it is necessary to display text on a videotex screen and other images superimposed on a CRT display, for example, when displaying subtitles for a movie, conventionally, the background image should be as different as possible. A commonly used method is to display characters in different colors to make them easier to read.

However, the color tone of an image displayed on a CRT display is usually not uniform, and often has partially different colors and brightness. Furthermore, the color tone of each part is not always the same, but changes over time. Therefore, the superimposed characters may have the same or similar color as the background screen, making it difficult to distinguish the characters.

On the other hand, there is a method of displaying borders by storing border patterns corresponding to each character in advance in a memory, treating the borders as characters and displaying them in an overlapping manner. In FIG. 5, (a) shows a character pattern, and (b) shows a corresponding border pattern. Patterns (a) and (b) are each created in advance and stored in memory, and when displaying the characters C&), the border patterns of (g)) are read out identically and placed at the same position on the display. By overlapping them, it is possible to display characters with borders as shown in FIG. 2(c). The (&) pattern and the (b) pattern are usually displayed in different colors, thereby clearly separating the background screen and the characters.

In such a border display method, it is necessary to create the character pattern and the border pattern separately in advance and store them in a memo. Therefore, it is time-consuming to create the border pattern. In addition to this, there is a problem in that the memory capacity increases in order to store a large number of border turns.

[Means for solving problems]

In order to solve the problems of the prior art, the present invention has the basic configuration shown in FIG. 1, and has a first memory (101), a second memory (102), It includes sum means (103), delay means (104), and AND means (105).

The first memory (101) stores data such as letters and characters from the dot memory as a set of dots.

The second memory (102) is not a dot memory;
The memory (101) stores data that is advanced by one line and data that is delayed by one line.

The logical sum means (103) outputs the data obtained by superimposing the data of the first memory (101) and the data of the second memory (102), and the data obtained by delaying the superimposed data by one dot. The output is generated by superimposing the data delayed by two dots.

The delay means (104) outputs data obtained by delaying the output data of the first memory (101) by one dot.

The AND means (105) outputs data obtained by removing the output data of the delay means (104) from the output data of the OR means (103).

[Effect]

FIG. 2 shows an example of the bordering performed by the method of the present invention. That is, the character AIC shown in FIG. 2(a)
On the other hand, by adding one-dot borders on the top, bottom, left, and right of each part of the character, a bordered character as shown in FIG. 2('b) is displayed. Figure (e) shows the basics of the border according to the present invention; for one pixel, eight dots around it form a border.

FIG. 3 shows the procedure for generating edge signals according to the method of the present invention, and provides a detailed explanation of the present invention.6 Let us now consider the characters shown in FIG. 3 (&).

This character data is stored in memory (101).

Data A, which is the data in FIG. 3(a) advanced by one scanning line, and data B, which is delayed by one line, are stored in the memory (102).
to be memorized. This data is shown in FIG. 3(g))K.

The data stored in the memory (101) and the memory (102)
) are read out and superimposed on each other to obtain the data shown in FIG. 3(C).

By delaying the data in FIG. 3(e) by one dot, the data shown in FIG. 3(d) is obtained.

By further delaying the data shown in FIG. 3(d) by one dot, the data shown in FIG. 3(e) K is obtained.

The data shown in FIG. 3(c) = (d) and (e) are all superimposed to obtain the data shown in FIG. 3(f).

By removing the character signal shown in FIG. 3(g) from the data shown in FIG. 3(f), the border signal shown in FIG. 3(h) is obtained.

By giving different colors to the character signal and border signal obtained in this way and displaying them simultaneously on a display, a display of characters bordered in different colors can be obtained.

〔Example〕

FIG. 4 shows an embodiment of the present invention, in which 1
, 2 are first and second memories, respectively, 3 is a latch,
4 is an adder, 5 is a subtracter, 6 is a selector latch, 7 is an OR circuit, 8 and 9 are delay circuits (D), 10 is an OR circuit,
11 is a delay circuit (D), ratio is an inverter, and 13 is an AND circuit. In FIG. 5, (A) shows the circuit configuration when writing data to memories 1 and 2, and (B) shows the circuit when creating character signals and border signals using the data written to memories 1 and 2. It shows the configuration. In addition, the signals of each part shown in Fig. 4 are shown in Fig. 3 (a).
) to (h), respectively.

Character data input via the data bus is written into the memory 1 in response to address designation from the address bus. The same data is once held in the latch 3 and then written to the memory 2 according to the address given via the selector/latch 6. Since the added value and the value obtained by subtracting a certain value by the subtracter 5 are switched by the selector/latch 6, the data written to the memory 2 is
The data written in is advanced by one scanning line and delayed by one scanning line.

The data written in the memories 1 and 2 are simultaneously read out according to the display address and are superimposed in the OR circuit 7. The output data of the OR circuit 7 is sequentially delayed by one dot in delay circuits 8 and 9. In the OR circuit 10, an output is obtained by superimposing the output of the OR circuit 7, a signal delayed by one dot, and a signal delayed by two dots. On the other hand, the delay circuit 11 delays the data read from the memory 1 by one dot. The output data of the delay circuit 11 is inverted via an inverter, and is ANDed with the output of the OR circuit 10 in an AND circuit 13.

Therefore, a signal obtained by removing the character data portion from the output signal of the OR circuit 10 is obtained as the output of the AND circuit 13.

The output of the AND circuit 13 is a border signal when the output of the delay circuit 11 is used as a character signal. An image is obtained.

Note that a shift register that causes a delay of one scanning line may be used as the memory 2 in FIG. 4, but the amount of hardware can be reduced by using a memory.

〔Effect of the invention〕

As explained above, according to the border display method of the present invention, it is possible to add borders to the characters displayed on the display, so that they do not become the same color as the background screen and become difficult to read. Prevented.

At this time, there is no need to prepare border data in the memory in advance, so the effort of creating border patterns can be saved and the memory capacity can be reduced.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the basic configuration of the present invention, FIG. 2 is a diagram illustrating a border according to the present invention, and FIG. 3 is a diagram explaining a procedure for generating a border signal in the method of the present invention. FIG. 4 is a diagram showing a circuit configuration of an embodiment of the present invention, and FIG. 5 is a diagram showing a conventional border display method. 1.2...Memory 3...Latch 4...Adder 5...Subtractor 6...Selector latch 7, lO...OR circuit 8, 9, 11...Delay circuit ( D) Inverter 13... AND circuit Patent originator: Fujitsu Co., Ltd. Patent attorney Hisashi Tamamushi (1 other person) Diagram showing the principle structure of non-invention Figure 1 (a) (b)
(C) Figure 5 (b) illustrating the conventional border display method; Figure 2 illustrating the border display method of the present invention.
Figures (a) (b)
(cn(d)
(e) (f) (h
) Illustration of the generator of the edge signal Figure 6

Claims (1)

[Claims] A first memory (101) that stores data such as characters as a set of dots, data obtained by advancing the data in the first memory (101) by one scanning line, and data by one line. a second memory (102) that stores the delayed data; and a second memory (102) that stores the data of the first memory (101) and the second memory (102).
02), data obtained by delaying the superimposed data by one dot, and data obtained by delaying the superimposed data by two dots (103). and the first memory (101
) delay means (104) for delaying the data by one dot.
and the delay means (
logical product means (105) for removing the output data of 104);
A border display method, characterized in that a character signal is obtained by the output of the delay means (104), and a border signal for the character signal is obtained by the output of the AND means (105).