JP2595755B2 - Burst gate pulse switching device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing device in a VTR, and more particularly to a burst gate for switching between a burst gate pulse for extracting a burst signal and a digital gate. The present invention relates to a pulse switching device.

2. Description of the Related Art A color television receiver for receiving a general color television signal and a VTR for recording the image extract a burst signal from a chroma signal, which is a color component signal, and perform color based on the frequency and phase of the burst signal. The component is demodulated. A correction circuit is provided for when a sufficient amplitude cannot be obtained for a burst signal serving as a reference for color demodulation, such as attenuation due to signal propagation or deterioration due to recording.

As one of the methods, a burst gate pulse for digitally extracting a burst signal from a synchronization signal is generated, and when the amplitude of the burst signal is reduced, the burst signal is stably extracted using the burst gate pulse from the synchronization signal. There is something.

FIG. 6 shows an example of a conventional burst gate pulse generator using this type of burst gate pulse switching device. As an analog processing system, a chroma signal a is input from an input terminal 21 and only a burst signal c is extracted from the chroma signal a by a first analog switch 22. The level detector 23 is a circuit for detecting the magnitude of a signal, and includes a synchronous detection circuit and a sample-and-hold circuit. When the output DC voltage d of the level detector 23 becomes lower than the reference DC voltage set therein, the first comparator 24 which outputs a switching signal e of the second analog switch 29, and the output of the first analog switch 22 A double-wave rectifier 25 that performs double-wave rectification on the burst signal c and outputs an envelope thereof, and compares an output f of the double-wave rectifier 25 with a reference voltage set thereto and outputs a burst gate pulse (BGPAN). It is composed of two comparators 26. On the other hand, as a digital processing system, a synchronization pulse b synchronized with the chroma signal applied to the input terminal 21 is applied to the input terminal 27, and the synchronization pulse b is used as a trigger signal to generate a pulse (BGPDW) and a pulse (BGPDN) having a certain width. There is a digital mono-multi 28 that outputs. The output pulse (BGPDN) of the digital monomulti 28 and the output pulse (BGPAN) of the second comparator 26 are switched by the output signal e of the first comparator 24, and the burst gate pulse is output to the burst gate pulse output terminal 3. A second analog switch 29 for outputting a signal is provided, and this second analog switch 29 is a so-called burst gate pulse switching device.

Next, the related operation of the components will be described. When the level of the input chroma signal a is large, there is an output pulse from the second comparator 26, that is, a pulse created from the burst signal c, which is used as a burst gate pulse. Then, when the input level decreases, the burst gate pulse (BGPAN) will not be output soon. Therefore, the level slightly higher than the input level at which the burst gate pulse (BGPAN) is not output is determined by the level detector 23 and the first comparator.
The signal is detected by the level comparing means 24, and the second analog switch 29 is switched to output a burst gate pulse (BGPDN) by the digital mono-multi 28.

Problem to be Solved by the Invention The problem of this conventional example is that when the input signal becomes small,
The output of the first comparator 24 changes in an unstable manner, and the burst gate pulse (BGPAN) based on the burst signal and the burst gate pulse (BGPDN) based on the synchronization signal are randomly and alternately output to the burst gate pulse output terminal 30. The switched signal is output. In particular, in a VTR, noise is generated due to the switching, which causes deterioration in image quality.

An object of the present invention is to provide a burst gate pulse switching device capable of obtaining a stable burst gate pulse even when the burst signal level fluctuates, taking the above problems into consideration.

Means for Solving the Problems In order to achieve the above object of the present invention, a first input terminal for inputting a so-called analog first burst gate pulse extracted from a burst signal and a digital signal based on a synchronization signal are provided. A second input terminal for inputting a second burst gate pulse, which is generated in a special manner, and a third input terminal for inputting a third burst gate pulse having the same phase as the first burst gate pulse and a large pulse width. , First and third
Detection means for detecting that the first burst gate pulse is continuously stopped, an output of the first detection means and a third burst gate pulse , And a second detecting means for detecting that the first burst gate pulse is continuously output from the stop state, and selecting one of the first burst gate pulse and the second burst gate pulse. Output means for outputting the second burst gate pulse when the first burst gate pulse stops continuously from the outputs of the first detection means and the second detection means. A switching means for switching to output the first burst gate pulse and outputting the first burst gate pulse when the first burst gate pulse is continuously output from the stop state. It is over waste gate pulse switching device.

When the first burst gate pulse generated analogously from the burst signal necessary for demodulating the color signal from the video signal is continuously output without any problem, the first burst gate pulse is output as it is. Used as a gate pulse for extracting a burst signal.

When the level of the burst signal drops or stops for some reason, especially when it stops continuously for two or more pulses, it is detected and latched by the first detecting means. From this state, the second burst gate pulse digitally generated from the synchronizing signal by the switching function of the output means is output as a burst gate pulse and used for sampling the burst signal.

From the state where the first burst gate pulse is continuously stopped for two or more pulses, if there is a continuous pulse output for two or more pulses, it is detected and latched by the second detection means. From this state, the output means outputs the first burst gate pulse as a switched burst gate pulse by the switching means so that the first burst gate pulse is output.

Even when the first burst gate pulse (BGPAN) generated from the burst signal is at the threshold level of being output or not being output, the first burst gate pulse (BG) is output to the burst gate pulse switching output terminal. BGPAN) or the second burst gate pulse (BGPDN) is continuously output, so that a burst gate pulse free of noise due to irregularly repeated switching is obtained.

Embodiment An embodiment of the present invention will be described below with reference to the drawings. First
The figure shows a burst gate pulse switching device according to one embodiment of the present invention. A first burst gate pulse (hereinafter referred to as BGPAN) generated from the burst signal and applied to the input terminal 12 and a third burst gate pulse (hereinafter referred to as BGPPDW) generated from the synchronization signal and applied to the input terminal 13 Write)
Match gate 1 (AND
Output terminal of the first D-flip-flop (hereinafter referred to as D-FF) 2 and the reset input terminal R of the second D-FF3, and the clock input terminal CK
BGPDW is applied, the D input terminal of the first D-FF2 is pulled up to the power supply side, and the non-inverting output terminal Q is connected to the second D-FF2.
The non-inverted output terminal Q is connected to the D input terminal of the third D-FF5, and the non-inverted output terminal Q is connected to the D input terminal of the fourth D-FF6. , The clock input terminal CK of the third D-FF5 and the clock input terminal CK of the fourth D-FF6 are connected via the inverting gate (inverter) 4 to the input terminal 13
And the non-inverted output Q of each of the third D-FF5 and the fourth D-FF6 is input to a coincidence gate (OR gate) 7,
The logical sum output switches between a second burst gate pulse (hereinafter referred to as BGPDN) and BGPAN. It should be noted that an inverting gate 8 and a two-input NAND of 9, 10, 11
The switching means is constituted by a gate, and an output terminal 15 is added to the switching means to output a burst gate pulse as the output means.

Next, the related operation of the components will be described. 2 to 4 show output waveforms at each point. In Fig. 2, BGPDW
Has a pulse width including BGPAN, and the output 1a of the AND gate 1 is obtained. Next, at the rise of BGPPDW, the first D-FF2 captures "H", the output 2Q becomes "H", and is reset to "L" level again by the R input of the output 1a. The second D-FF3 captures the output 2Q of the first D-FF2 at the same rising edge of BGPPDW, and the reset is similarly performed by the output 1a. The above constitutes the first detecting means. Further, the third D-FF5 takes in the output 3Q of the second D-FF3 at the falling edge of BGPPDW since it passes through the inverting gate 4. The fourth D-FF6 is the output 5Q of the third D-FF5.
At the falling edge of the same BGPDW. Therefore BGPAN
Is output, the output of the third D-FF5 and the fourth D-FF6 is "L". The above constitutes the second detecting means. As a result, the output 7a of the OR gate 7 is "L", and BGPAN is output to the burst gate pulse output terminal 15 (BGP) by the selection means. However, BGPAN
Is not output, the first D-FF2 and the second D-FF3 are not reset because the pulse of the output 1a is lost.
D-FF2 captures "H" like output 2Q,
Only when AN is not output continuously, the second D-FF3
Also captures "H" like output 3Q. Then the third D-FF
5 captures "H" at the falling edge of BGPDW, like output 5Q, and the output 7a of OR gate 7 becomes "H", and BG is switched by the switching means.
Switch to PDN. When BGPAN is output again, the first D-FF2 and the second D-FF3 are reset,
At the falling edge of BGPDW, the third D-FF5 captures "L" as in the output 5Q, but only when BGPAN is continuously output, the fourth D-FF6 captures "L" as in the output 6Q. In OR
The output of the gate 7 is set to "L". Then, the output terminal 15 is switched to BGPAN again by the switching means.

FIG. 2 is an operation waveform diagram of each part when BGPAN is not output continuously for two horizontal periods (ie, 2H), FIG. 3 is when BGPAN is not output continuously for 3H, and FIG. And as can be seen from these output waveforms, 1H
When only BGPAN is removed, BGPAN is output as it is to the burst gate pulse (BGP) output terminal 15 as it is (the shaded portion of the pulse represents the output of BGPAN).
Only when H or more is lost, the BGPDN is output (pulses in the output burst gate pulse (BGP), which are not shaded, represent the BGPDN output).

In the present embodiment, two stages of D-FF are used for the first detection unit and two stages of D-FF are used for the second detection unit. Therefore, the stop and output of BGPAN of 2H or more are detected. In terms of stability,
It is needless to say that the configuration of the first detection means and the second detection means by using three or more stages of D-FFs is effective as long as the same effect can be obtained.

As described above, since it is detected that the BGPAN is stopped or output continuously and reliably, and is switched to BGPDN for the first time at that time, the burst gate pulse is supplied without the unstable switching being continued.

FIG. 5 is a burst gate pulse switching device according to the present invention.
32 is an example of an entire circuit of a burst gate pulse generator constructed using No. 32.

Advantageous Effects of the Invention As is apparent from the above description, according to the burst gate pulse switching device according to the present invention, stable synchronization is achieved even when BGPAN generated from a burst signal is near the threshold of whether or not a burst gate pulse can be generated. Since the switching operation with the BGPDN generated from the signal can be performed, the burst gate pulse switching does not occur irregularly, and the burst gate pulse output that can reliably demodulate the color signal can be obtained. .

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a burst gate pulse switching device according to the present invention, FIGS. 2, 3, and 4 are operation waveform diagrams of respective parts of the embodiment, and FIG. 5 is a burst gate pulse according to the embodiment. FIG. 6 is a block diagram of a burst gate pulse generator using a switching device, and FIG. 6 is a block diagram of a conventional burst gate pulse generator. 1 ... Match gate (AND gate), 2 ... First DF
F, 3 ... second D-FF, 4 ... inversion gate, 5 ... third D-FF, 6 ... fourth D-FF, 7 ... coincidence gate (OR gate), 8 ... … Inverting gate, 9,10,11 …… 2 inputs N
AND gate, 12 ... BGPAN (first burst gate pulse) input terminal, 13 ... BGPDW (third burst gate pulse), 14 ... BGPDN (second burst gate pulse), 15 ... BGP (burst Gate pulse) output terminal.

Continuing on the front page (72) Inventor Naruhisa Kanazawa 1006 Kadoma, Kadoma, Osaka Prefecture Inside Matsushita Electric Industrial Co., Ltd.

Claims (1)

(57) [Claims] A first input terminal for inputting a first burst gate pulse generated from a burst signal; a second input terminal for inputting a second burst gate pulse digitally generated from a synchronization signal; A third pulse having the same phase as the first gate pulse and a wide pulse width;
A third input terminal for inputting the first burst gate pulse, and detecting that the first burst gate pulse is continuously stopped with the first burst gate pulse and the third burst gate pulse as inputs. A first detecting means for detecting that the output of the first detecting means and the third burst gate pulse are input and that the first burst gate pulse is continuously output from a stopped state. Detecting means; and output means for selecting and outputting one of the first burst gate pulse and the second burst gate pulse, wherein the output means includes first detecting means and second detecting means. Is switched to output the second burst gate pulse when the first burst gate pulse is continuously stopped by the output of the first burst gate pulse. A burst gate pulse switching device having switching means for switching so as to output a first burst gate pulse when signals are continuously output from a stop state.