JP2010044577A - Debugging device and method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a debugging device for easily debugging when debugging two programs of a hardware model program and control software at the same time. <P>SOLUTION: A debugging device 1 debugs an operation program for operating a function block provided on a chip, and includes an additional processing program 31 generating character string information of a definition code for executing predetermined processing of the function block included in a target simulator 25, for generating a character string information transmission program for transmitting the character string information, and adding the generated character string information and the generated character string transmission program to the definition code; a character string information acquisition unit acquiring the character string information of the code on the basis of command correspondence information; and a composite display unit composing the obtained character string information of the definition code with an instructed command to display them. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a debugging device and a debugging method.

  Conventionally, a semiconductor device such as an SoC (System On a Chip) includes one or more functional block hardware (hereinafter abbreviated as H / W) circuits, and the operation of the entire semiconductor device is a software program (hereinafter referred to as S). There is a semiconductor device whose execution is regulated by a control S / W that is abbreviated as / W). In such a semiconductor device, when the H / W circuit and the control S / W are simultaneously developed in parallel, before the H / W circuit is developed, in order to check the operation of the control S / W, Instead of the H / W circuit, a simulation program including a model of the H / W circuit (hereinafter referred to as an H / W model), that is, a simulator is used.

  In addition, when an H / W model is incorporated in a simulator, it is necessary to check the operation by coordinating the H / W model program (hereinafter referred to as the H / W model program) and the control S / W. In this case, the simulator is debugged with a native debugger, and the control S / W is debugged with a cross debugger.

  For this reason, when checking the operation of the corresponding part in a certain H / W model program executed by a certain instruction in the control S / W, the person who performs the debugging must confirm that instruction and the part corresponding to that instruction. The API information must be associated in advance, and the operation must be confirmed while performing complicated operations such as setting a breakpoint at the command and the API information portion.

In addition, a technique regarding cooperative verification between S / W and H / W has been proposed (see, for example, Patent Document 1).
However, the proposal discloses a method for verifying the H / W model program and S / W in cooperation with each other. However, when debugging two programs, the concrete ease of debugging is disclosed. No method has been proposed.
JP 2006-79417 A

  Accordingly, an object of the present invention is to provide a debugging device and a debugging method that are easy to debug when simultaneously debugging two programs of an H / W model program and a control S / W.

  According to one aspect of the present invention, there is provided a debugging device for debugging an operation program for operating a functional block provided on a chip, which is a definition code included in a simulator and performs predetermined processing of the functional block. Generate character string information of the definition code to be executed, generate a character string information transmission program for transmitting the character string information, and transmit the generated character string information and the generated character string information Based on the instruction correspondence information, an addition processing unit that adds a program to the definition code, an instruction in the operation program, an instruction correspondence information storage unit that stores instruction correspondence information with the predetermined process, A character string information acquisition unit that acquires character string information of the definition code, and the acquired character string information of the definition code are combined with a specified instruction and displayed. A composite display of the eye, it is possible to provide a debugging device having a.

  According to the present invention, it is possible to realize a debugging device and a debugging method that are easy to debug when simultaneously debugging two programs of an H / W model program and a control S / W.

  Embodiments of the present invention will be described below with reference to the drawings.

  First, the configuration of the debugging apparatus according to the present embodiment will be described with reference to FIG. FIG. 1 is a configuration diagram showing a configuration of a debugging apparatus according to the present embodiment.

As shown in FIG. 1, the debugging apparatus 1 is a computer such as a personal computer (hereinafter referred to as a PC), a server, or a workstation. The debugging device 1 includes a computer main body 11, a display device 12, and a storage device 13 such as a hard disk device. Various processes described below are executed by a software program. The software program is stored in the storage device 13, and is read and executed by a CPU (hereinafter referred to as a host CPU) 11a in the computer main body 11. On the display screen 12 a of the display device 12, a graphical user interface (GUI) is displayed for a user who performs debugging such as a processor developer to instruct execution of various processes and to display processing results.
The chip (SoC) to be developed by the user has one or more functional blocks defined by the user, that is, H / W circuits, and a user program defined or described by the user (executed by the CPU on the chip). This is a reconfigurable chip in which the operation of the entire chip is determined. The user program is a control S / W that controls the operation of the H / W circuit of one or more functional blocks. The control S / W is an operation program that controls the operation of the entire chip including the operation of one or more functional blocks. One or more functional blocks have respective predetermined functions, and each function is modeled and described by a software program. That is, each functional block is expressed by a definition code for executing a predetermined process for realizing a predetermined function. The user can debug the control S / W of the reconfigurable processor that is the processor of the SoC and the H / W model program of the H / W circuit by using the debug device 1.

  FIG. 2 is a diagram for explaining a configuration of software included in the debugging device 1. The debug device 1 includes a native compiler 21, a native debugger 22, a cross compiler 23, a cross debugger 24, and a target simulator 25 that are executed on the host CPU 11a. These source programs are stored in the storage device 13, and the compiled execution program is executed on the host CPU 11a. Furthermore, the debugging device 1 also includes a user program execution file 26 that is executed on the target simulator 25.

  The user program is a program defined by or written by the user that is executed on the target chip, and is a control S / W program that is executed on a specific chip whose configuration can be changed, that is, an operation program. The user program is described including dedicated instructions. The user program execution file 26 is a program in the user file execution file format.

There are a plurality of H / W model programs described by modeling the function of each functional block, which are defined by the user for each H / W.
The target simulator 25 is an execution file generated by being compiled together with the one or more H / W model programs 27 and the program main body 25a of the target simulator 25 (see FIG. 3). The target simulator 25 can simulate the operation by executing the respective H / W model programs 27. Therefore, the target simulator 25 is an execution file format simulation program including one or more H / W models.

The native compiler 21 and the native debugger 22 are a compiler and a debugger that are executed on the host CPU 11a, respectively.
The cross compiler 23, the cross debugger 24, and the target simulator 25 are executable programs that are compiled by the native compiler 21 and can be executed on the host CPU 11a.

  The cross compiler 23 is a program that compiles a user program and generates a user program execution file 26. Since the user program is described including a dedicated instruction, it can be compiled only by the cross compiler 23.

  The user program execution file 26 can be executed only by the target simulator 25, and the H / W model program 27 can be simulated by the target simulator 25 and can be debugged by the cross debugger 24.

  When debugging the user program, the cross debugger 24 communicates with or exchanges information with the target simulator 25 to perform a composite display as described later.

FIG. 3 is a flowchart for explaining the flow of processing for generating the target simulator execution file 25.
First, as shown in FIG. 3, an additional process for adding predetermined additional information is performed on the H / W model program 27 by the additional process program 31. The H / W model program 27 is a source program, and when there are a plurality of H / W model programs 27, additional processing is performed for each. The contents of the additional process will be described later.

  As a result of the additional processing, a cross debugger H / W model program 27a is generated. The H / W model program 27a for the cross debugger is also a source program.

  The generated cross-debugger H / W model program 27a is combined with the target simulator body program 25a including the processor model to be developed, and is compiled by the native compiler 21 for the host machine to generate the target simulator execution file 25. Is done.

Next, additional processing by the additional processing program 31 will be described with an example.
FIG. 4 is a diagram illustrating an example of the H / W model program 27. FIG. 5 is a diagram showing an example of the cross debugger H / W model program 27a generated by the additional processing.
FIG. 4 shows an H / W model program 27 having a source file name “Simple HWE” as an example. As shown in FIG. 4, the H / W model program 27 is a program having a class name “HWE” and two methods having method names “writeCntlBus” and “readCntlBus”, respectively.

  The H / W model program 27 shown in FIG. 4 is subjected to processing for adding predetermined additional information by the additional processing program 31 which is an additional processing unit. As a result, the cross debugger H / W model program 27a shown in FIG. Is generated. As shown in FIG. 5, the cross debugger H / W model program 27 a includes a structure definition unit 51, method character string units 52 and 53, and a method content transmission method unit 54 as predetermined additional information. This is a program added before the code part of the / W model program 27.

  The structure definition unit 51 includes definition information in which the structure definitions of the method character string units 52 and 53 described as structures are described. The method character string parts 52 and 53 include character string information of two methods “writeCntlBus” and “readCntlBus”. The method content transmission method unit 54 includes method information for transmitting the character string information of the method character string units 52 and 53. The additional information is added before the H / W model program 27 to the cross debugger H / W model program 27a.

The processing contents of the additional processing program 31 in FIG. 3 will be described with reference to FIG.
FIG. 6 is a flowchart showing an example of processing contents of the additional processing program 31 as the additional processing unit. The additional processing program 31 is stored in the storage device 13, and is read and executed by the host CPU 11a.

  When executing the additional processing for the H / W model program 27, the user gives the host CPU 11a information on the source file name of the H / W model program 27 and the class name included in the H / W model program 27. Here, it is assumed that “Simple HWE” is given as the source file name and “HWE” is given as the class name.

  Accordingly, in the case of FIG. 4, the host CPU 11a receives the input source file name “Simple HWE” and class name “HWE” as arguments (step S1).

  The host CPU 11a acquires the method in the target file as character string information based on the received source file name and class name (step S2). At this time, since the H / W model program 27 is described based on the rule “class name :: method name”, first, two methods are acquired as character string information.

  Specifically, in FIG. 4, the character string information of the code part 41 is acquired from the class name “HWE” and the method name “writeCntlBus”, and from the class name “HWE” and the method name “readCntlBus”, The character string information of the code part 42 is acquired. Since the method name is defined in advance by the user, the host CPU 11a can acquire character string information of two methods of “class name :: writeCntlBus” and “class name :: readCntlBus”.

  Next, the host CPU 11a defines the acquired character string information as a structure array (step S3). Here, the structure array is an array of structures including character strings.

  Then, the host CPU 11a defines a method content transmission method for transmitting character string information from the defined structure array when requested (step S4). In FIG. 5, the method content transmission method is described as “getFuncLine” in the method content transmission method unit 54. That is, the method content transmission method code defined and generated in step S4 is a code for transmitting a method content character string to the cross debugger 24 in response to a request from the cross debugger 24.

The host CPU 11a adds additional information including the defined structure array and method content transmission method to the H / W model program 27 (step S5).
As a result of step S5, as shown in FIG. 5, before the portion of the H / W model program 27, a structure defining unit 51 and a structure array unit 52 of character string information defined and generated in step S3, 53 and the method content transmission method section 54 defined and generated in step S4 are added to generate the cross debugger H / W model program 27a.

  When the host debugger native compiler 21 compiles the cross-debugger H / W model program 27a, it becomes an execution format target simulator execution file 25 including the additional information described above.

  As described above, the additional processing program 31 generates character string information of a definition code for executing predetermined processing of each functional block included in the target simulator 25. Then, the additional processing program 31 generates a method content transmission method unit 54 as a character string information transmission program for transmitting the character string information, and generates the generated character string information and the generated character string information transmission program. Is added to the definition code of each functional block.

  Since the target simulator execution file 25 includes the method character string parts 52 and 53 of the code parts 41 and 42 and the method content transmission method part 54, it receives the character string transmission request command from the cross debugger 24. Then, the method content transmission method part 54 is executed to transmit the information of the method character string parts 52 and 53 of the code parts 41 and 42 to the cross debugger 24.

  Then, the cross debugger 24 performs a mix display process for displaying the received information on the method character string parts 52 and 53 in the user program 26.

  FIG. 7 is a diagram showing an example of a screen displayed on the display device 12 in order to debug the user program 26 using the cross debugger 24. FIG. 8 is a diagram showing an example of a screen on which the H / W model program 27 corresponding to an instruction designated by the user in the user program 26 is displayed.

  For example, as shown in FIG. 7, in a state where a part of the user program 26 is displayed on the display screen 12 a of the display device 12, the user displays a certain line (here “stcb (a [0 ], HWE_CBBASE); ”)), when the display of the H / W model program corresponding to the above is performed by a predetermined operation, the screen of FIG. 8 is displayed on the display screen 12a of the display device 12.

If the user has instructed the mix display for the line indicated by the mark 61 in FIG. 7, the corresponding H / W model is displayed under the line “stcb (a [0], HWE_CBBASE);” as shown in FIG. A source code display unit 62 including the source code of the program is displayed. In other words, between the line “stcb (a [0], HWE_CBBASE);” specified by the user and the next line “ldcb (b [0], HWE_CBBASE);”, the line “stcb (a [0], HWE_CBBASE);” The source code of the H / W model program corresponding to “);” is added and synthesized.
If the user designates other lines in the same manner, the source code of the corresponding H / W model program can be displayed in a mixed manner.

Next, processing contents in the cross debugger 24 for the mix display will be described.
Before describing the processing in the cross debugger 24, two table data of a model identification table and an instruction API correspondence table will be described.

  When the native compiler 21 compiles the cross compiler 23, the cross debugger 24, and the target simulator 25, configuration data of the control S / W and H / W model program to be compiled is generated. The configuration data includes information on which address range on the control bus address of the host CPU 11a each of the plurality of H / W model programs is. Therefore, each H / W model, that is, each functional block, can be distinguished or identified based on the data of the control bus address.

  Therefore, a table as shown in FIG. 9 is created in advance based on the configuration data. FIG. 9 is a diagram illustrating an example of a model identification table. The model identification table 71 is stored in the storage device 13 and constitutes a functional block identification information storage unit that stores functional block identification information for identifying each functional block.

  The model identification table 71 as a functional block identification information storage unit has a control bus address column 71a and a model identification number column 71b for specifying a model, and data of a control bus address and a model identification number are registered. . In FIG. 9, for example, it is indicated that the control bus address “0x4 ****” corresponds to the model identification number “0” as the functional block identification number.

  Further, the correspondence between the instructions in the user program and the H / W model program corresponding to the instructions is predetermined by the user. FIG. 10 is a diagram illustrating an example of an instruction API correspondence table. The instruction API correspondence table 72 is stored in the storage device 13 and constitutes an instruction correspondence information storage unit that stores instruction correspondence information between instructions in control S / W as an operation program and predetermined processing in each functional block. .

  The instruction API correspondence table 72 serving as an instruction correspondence information storage unit includes an instruction column 72a, an API column 72b, and an API number column 72c. The instructions in the user program and predetermined processes, that is, methods of the H / W model program The API that indicates the name and the data of the API number that identifies the API are registered. In FIG. 10, for example, it is indicated that the instruction “stcb” corresponds to the API “writeCntBus” and the API number “1” corresponding to the API.

  FIG. 11 is a flowchart showing an example of the flow of mix display processing in the cross debugger 24. FIG. 12 is a diagram for explaining a flow of processing between the screen display as the user interface when the mix display is performed, the cross debugger 24, and the target simulator 25.

  The user can debug the user program using the cross debugger 24 while displaying the user program on the display screen 12a as shown in FIG. During the debugging, a certain instruction in the user program may be an instruction for operating the H / W model program corresponding to a certain functional block. Then, when the user wants to display a mix in order to see and confirm the source program of the H / W model program 27 corresponding to the command, the user can execute the processing of FIG. 11 by performing a predetermined operation. it can. For example, the execution of the process of FIG. 11 can be instructed by selecting a line including the instruction and specifying a predetermined command. For example, it is assumed that a mix display command is instructed for the row shown in FIG.

When such a command is input, the host CPU 11a disassembles the code of the designated instruction (step S11).
Then, mnemonic and operand information is acquired from the result of disassembly (step (S12)).

  As shown in FIG. 12, the mnemonic and operand information “stcb $ r11, 0x4000”, for example, is obtained from the disassembly result. Here, “0x4000” indicates a control bus address.

  Therefore, the H / W model and the API can be specified from the model identification table 71 and the instruction API correspondence table 72 described above from the model number and the API number corresponding to the instruction (step S13). That is, the identification number of the H / W model is specified from the control bus address data “0x4000”, and the API number is specified from the mnemonic “stcb”.

  Then, by using the model identification number and API number of the obtained H / W model, a character string transmission request command of the H / W model program is generated and transmitted to the target simulator 25 (step (S14)). .

  The transmission request command is a command such as a command “getlinestr (0,1)” including two pieces of information, that is, a model identification number and an API number. In this case, in the command, the first argument “0” on the left corresponds to the model identification number, and the second argument “1” on the right corresponds to the API number. That is, the model identification number “0” is extracted from the control bus address “0x4000”, the API number “1” is extracted from the mnemonic “stcb”, and the transmission request command “getlinestr (0,1)” is generated. The

  When the target simulator 25 receives the transmission request command (step S21), the target simulator 25 executes the method content transmission method included in the H / W model program (step S22).

Specifically, the target simulator 25 transmits the method content of the method content transmission method unit 54 of FIG. 5 of the H / W model program specified from the H / W model identification number and API number included in the transmission request command. Execute the method.
FIG. 13 is a diagram illustrating an example of a program for executing a method content transmission method. For example, the target simulator 25 executes a program as shown in FIG. 13 to execute a corresponding method content transmission method. In FIG. 13, “int num” indicates a model identification number, and “int type” indicates an API number.

When the method content transmission method is executed, the character string information of the H / W model program is transmitted from the target simulator 25 to the cross debugger 24, and the cross debugger 24 transmits the character string information of the H / W model program. Receive (step S15).
Steps S14 and S15 constitute a character string information acquisition unit that acquires character string information of a function block definition code based on the instruction correspondence information.

As shown in FIG. 8, the cross debugger 24 performs a mixed display in which the character string information of the received H / W model program is displayed under the commanded command (step S16).
As a result, a mix display as shown in FIG. 8 is performed on the screen 12a. Step S16 constitutes a composite display unit for combining and displaying the character string information of the acquired definition code with the designated instruction.

  As described above, according to the present embodiment, the user can check and confirm the contents of the H / W model program corresponding to the instruction in the user program at the time of debugging the user program.

  The H / W model program not only inserts code in the middle as shown in FIG. 8, but also changes the color of the inserted H / W model program part to other code parts in order to make the inserted part easier to see. May be displayed in different colors.

  Further, the H / W model program may be displayed in another window frame as shown in FIG. FIG. 14 is a diagram illustrating an example of the mix display of the H / W model program. For example, as shown in FIG. 14, the H / W model program is displayed in the window frame 62a.

  As described above, the user can confirm the contents of the H / W model program corresponding to the instructions in the user program, but further, the H / W model program is executed step by step, that is, single step execution is performed. Sometimes you want to let them.

  Therefore, an addition process of a predetermined code for enabling single-step execution may be further performed in the addition process described above.

  FIG. 15 is a diagram illustrating an example of the H / W model program 27c. FIG. 16 is a diagram illustrating an example of the H / W model program 27d to which a predetermined code for supporting single-step processing is added.

  FIG. 15 shows two code portions 41a and 42a of the H / W model program 27c. FIG. 16 shows two code parts 41b and 42b of the H / W model program 27d in which a predetermined code is added to the two code parts 41a and 42a.

  As shown in FIG. 16, a predetermined code is added to the end of each line of each H / W model program. The added code is “if (ssmode == 1) gmon-> singleStep ();”. The added code is a code for returning the execution control of the program to the cross debugger 24. In other words, this code is for executing a single-step method in the class of gmon when the single-step mode is set. Then, the method performs processing for notifying the cross debugger 24 that execution of the H / W model program has been stopped.

  Then, in the cross debugger 24, when the user is set to the single step mode, the target simulator 25 is notified that the single step mode has been set.

  As a result, the value of “ssmode” is set to “1” in the target simulator 25. Therefore, the target simulator 25 can determine whether or not the single step mode is set.

  When the target simulator 25 executes the H / W model programs 41b and 42b, it can determine whether or not it is in the single step mode by referring to “ssmode”. Then, the cross debugger 24 is notified that the execution of the H / W model program has been stopped, and program execution control is returned to the cross debugger 24.

  When the cross debugger 24 is notified from the target simulator 25 that the execution of the H / W model program has been stopped, the user can recognize the stop on the screen. Commands such as processing can be instructed.

  As described above, according to the debugging device described above, the contents of the H / W model program corresponding to the instruction in the user program can be checked together when debugging the user program. It is also possible to operate in a single step.

  According to the configuration described above, when a user debugs a user program, a breakpoint is set in a portion to be particularly verified in the program, and a line immediately before the line where the breakpoint is set is executed. Often, stop running the simulator.

  In the stopped state, as described above, it is possible to confirm the contents of the corresponding H / W model program or to set the single step mode to execute the H / W model program in a single step.

  The program for executing the operations described above is recorded or stored as a computer program product in its entirety or in part on a portable medium such as a flexible disk or CD-ROM or a storage medium such as a hard disk. Yes. The program is read by a computer, and all or part of the operation is executed. Alternatively, all or part of the program can be distributed or provided via a communication network. The user can easily realize the debugging device of the present invention by downloading the program via a communication network and installing the program on a computer, or installing the program from a recording medium on the computer.

  The present invention is not limited to the above-described embodiments, and various changes and modifications can be made without departing from the scope of the present invention.

It is a block diagram which shows the structure of the debugging apparatus concerning embodiment of this invention. It is a figure for demonstrating the structure of the software contained in the debugging apparatus concerning embodiment of this invention. It is a flowchart for demonstrating the flow of the production | generation process of the target simulator execution file concerning embodiment of this invention. It is a figure which shows the example of the H / W model program concerning embodiment of this invention. It is a figure which shows the example of the H / W model program for cross debuggers produced | generated by the additional process concerning embodiment of this invention. It is a flowchart which shows the example of the processing content of the additional processing program concerning embodiment of this invention. It is a figure which shows the example of the screen currently displayed on the display device in order to debug a user program using the cross debugger concerning embodiment of this invention. It is a figure which shows the example of the screen as which the H / W model program corresponding to the instruction | command designated by the user in the user program concerning the embodiment of this invention is displayed. It is a figure which shows the example of the model identification table concerning embodiment of this invention. It is a figure which shows the example of the command API corresponding | compatible table concerning embodiment of this invention. It is a flowchart which shows the example of the flow of the mix display process in a cross debugger concerning embodiment of this invention. It is a figure for demonstrating the flow of the process between the screen display as a user interface when a mix display is performed, a cross debugger, and a target simulator concerning embodiment of this invention. It is a figure which shows the example of the program for performing the method content transmission method concerning embodiment of this invention. It is a figure which shows the example of the mix display of the H / W model program concerning embodiment of this invention. It is a figure which shows the example of the H / W model program concerning embodiment of this invention. It is a figure which shows the example of the H / W model program to which the predetermined code | cord | chord for responding to a single step process concerning the embodiment of this invention was added.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Debugging device, 11 Computer main body, 11a CPU, 12 Display device, 12a Display screen, 13 Storage device, 27, H / W model program, 27a H / W model program for cross debugger

Claims (5)

A debugging device for debugging an operation program for operating a functional block provided on a chip,
A definition code included in the simulator, generating character string information of the definition code for executing predetermined processing of the functional block, and generating a character string information transmission program for transmitting the character string information; An additional processing unit for adding the generated character string information and the generated character string information transmission program to the definition code;
An instruction correspondence information storage unit for storing instruction correspondence information between the instruction in the operation program and the predetermined process;
A character string information acquisition unit that acquires character string information of the definition code based on the instruction correspondence information;
A combined display unit for displaying the obtained character string information of the definition code combined with a specified instruction;
A debugging device comprising:   The debugging apparatus according to claim 1, wherein the addition processing unit adds a stop code for stopping execution of the predetermined process to each line of the definition code. A functional block identification information storage unit for storing functional block identification information for identifying each functional block when a plurality of the functional blocks are provided on the chip;
The character string information acquisition unit generates and executes an acquisition command for acquiring character string information of the definition code based on the instruction correspondence information and the functional block identification information, thereby executing the definition code. The debugging apparatus according to claim 1, wherein the character string information is acquired.   The debugging according to claim 2, wherein when a mode for executing the predetermined process in a single step is set, the simulator executes the stop code added to the definition code. apparatus. A debugging method for debugging an operation program for operating a functional block provided on a chip,
A character string information of the definition code for executing a predetermined process of the functional block, which is a definition code included in the simulator,
Generating a character string information transmission program for transmitting the character string information;
The generated character string information and the generated character string information transmission program are added to the definition code,
Based on the instruction correspondence information between the specified instruction in the operation program and the predetermined process, obtain character string information of the definition code,
The obtained character string information of the definition code is combined with the specified instruction and displayed.
A debugging method characterized by that.

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