JP2009273252A - Boosting power circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce ripples of output voltage, which occur due to input voltage fluctuation and load fluctuation. <P>SOLUTION: When output voltage Vo exceeds necessary minimum voltage Vm and drops due to drop of input voltage Vin while an enable signal SEN is in an H level, boosting signal voltage Va of a node NA gently drops from 5V. Thus, a duty ratio of an output signal Sd of a comparator 16 gradually increases from zero and a boosting operation soft-starts. The boosting operation is performed at the duty ratio of necessary minimum for boosting output voltage Vo to necessary minimum voltage Vm. When output voltage Vo exceeds restriction voltage VLMT upon boosting input voltage Vin, an overvoltage detecting circuit 30 outputs an overvoltage detection signal Sov in an L level and the boosting operation stops. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a chopper type booster power supply circuit.

  An in-vehicle control device such as an ECU (Electronic Control Unit) operates by receiving a supply of a constant control voltage (for example, 5 V) generated by a power supply circuit. The power supply circuit is configured to include a power supply IC, and the input voltage Vin is reduced to a necessary minimum voltage Vm (for example, 8 V) so that the control voltage can be output even when the input voltage Vin from the battery is lowered. After boosting, a control voltage is generated from the boosted voltage.

There exists what was described in patent document 1 as this step-up power supply. As shown in FIG. 6, the boost power supply circuit 1 boosts the voltage Vin input from the power input terminal 2 to the necessary minimum voltage Vm and outputs the boosted voltage from the power output terminal 3. The reactor 4, the diode 5, and the MOSFET 6 , A main circuit section composed of a capacitor 7, a voltage detection circuit 8 (resistors 9 and 10), an operational amplifier 11, a phase compensation capacitor 12 and a resistor 13, a diode 14, a transistor 15, and a control section composed of a comparator 16. ing. A reference voltage Vref (2.5 V) is applied to the inverting input terminal of the operational amplifier 11, and a carrier signal voltage Vc is applied to the non-inverting input terminal of the comparator 16. Since the transistor 15 is turned on when the power supply is activated and the rise of the boosted signal voltage Va at the node NA is suppressed, the rise time of the output voltage Vo is shortened.
JP-A-7-227082

  The input voltage Vin from the battery is about 14V as a standard, but fluctuates within a range of 3V to 30V, for example, depending on the charging state of the battery, the operating state of the in-vehicle device, and the like. FIG. 7 shows a voltage waveform when the input voltage Vin changes from a higher state to a lower state than the necessary minimum voltage Vm (8 V). (A) shows the input voltage Vin and output voltage Vo, (b) shows the boost signal voltage Va and carrier signal voltage Vc, and (c) shows the output signal of the comparator 16.

  When the input voltage Vin starts to drop sharply at time t1, a reverse voltage is applied to the diode 5 in accordance with the capacitance of the capacitor 7 and the size of the load connected to the power supply output terminal 3, etc. Thus, the output voltage Vo gradually decreases according to the load. In FIG. 7, for the convenience of drawing, the voltage change (slope) from time t1 to time t2 when the output voltage Vo reaches the necessary minimum voltage Vm is exaggerated.

  Since the phase compensation capacitor 12 is connected between the power supply output terminal 3 and the node NA, when the output voltage Vo starts to decrease, the time before the time t2 when the output voltage Vo reaches the necessary minimum voltage Vm is reached. The boosted signal voltage Va at the node NA is greatly reduced. As a result, the MOSFET 6 is driven with an excessively large duty ratio, and a ripple accompanying the boosting operation is generated in the output voltage Vo. This ripple increases as the rate of change (slope) of the output voltage Vo due to input voltage fluctuation or load fluctuation increases.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a boosting power supply circuit capable of reducing output voltage ripple caused by input voltage fluctuation or load fluctuation.

  According to the means described in claim 1, the boosting operation is performed during a period when the output voltage is lower than the specified voltage (voltage corresponding to the reference voltage), and the boosting operation is stopped during a high period. In the chopper boosting operation, when the transistor is turned on, the current flowing through the reactor increases, and when the transistor is turned off, the current flowing through the reactor flows to the output side via the diode and the output voltage rises. The operational amplifier inputs the output voltage detected by the voltage detection circuit and a predetermined reference voltage to perform differential amplification, and the comparator compares the carrier signal voltage with the output voltage of the operational amplifier (hereinafter referred to as boosted signal voltage). To output an energization signal for turning on and off the transistor.

  Since a phase compensation capacitor is connected between the output terminal of the operational amplifier and the ground, oscillation is prevented and stabilization of feedback control is achieved. Unlike the conventional configuration, the power supply output terminal and the input terminal of the operational amplifier are not coupled by a capacitor, and the phase compensation capacitor has a filtering effect, resulting in input voltage fluctuations and load fluctuations. When the output voltage drops below the specified voltage, the boost signal voltage input to the comparator changes gently. As a result, the duty ratio of the energization signal gradually increases and the boosting operation is soft-started, and the boosting operation is performed with the minimum duty ratio necessary for boosting the output voltage to the specified voltage. Therefore, the ripple superimposed on the output voltage at the start of the boosting operation is smaller than in the conventional configuration.

  However, since the phase compensation capacitor is provided between the output terminal of the operational amplifier and the ground, a control delay occurs even when the input voltage rises or the load is reduced, and an overshoot is likely to occur in the output voltage. Therefore, when an overvoltage state in which the voltage exceeds a predetermined limit voltage is detected, the transistor is driven off to prevent overvoltage output.

  According to the means described in claim 2, since the output terminal of the operational amplifier is connected to the capacitor and the comparator via the resistor, when the output voltage drops below a specified voltage due to the filter action by the resistor and the capacitor, Further soft start is possible.

  According to the means described in claim 3, since the voltage detection circuit and the overvoltage detection circuit share the resistance voltage dividing circuit connected between the power supply output terminal and the ground, the circuit configuration can be simplified. The layout area when configured as a semiconductor integrated circuit device can be reduced.

  According to the means described in claim 4, the input terminal connected to the output terminal of the operational amplifier among the input terminals of the comparator is set to a predetermined potential (maximum value / minimum value of the carrier signal voltage) during the period when the stop of the boost power supply operation is commanded. Therefore, the transistor can be reliably kept off.

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS.
FIG. 2 shows a schematic configuration of the power supply IC. When the voltage VB input from the battery 22 is lower than the necessary minimum voltage Vm (for example, 8V), the power supply IC 21 boosts the voltage to the necessary minimum voltage Vm by the boosting power supply circuit 23, and the power supply circuit 24 based on the boosted voltage. Thus, a control voltage (for example, 5V) is generated and supplied to an in-vehicle control device (not shown) such as an ECU. Furthermore, a drive circuit 25 including a switching element such as a MOSFET is provided on the high side, and a relay coil (not shown) or the like can be driven using the output voltage of the boost power supply circuit 23.

  FIG. 1 shows the configuration of the boost power supply circuit 23, and the same components as those in FIG. A reactor 4 and a diode 5 are connected in series between the power input terminal 2 and the power output terminal 3, and an N-channel MOSFET 6 (a common connection point between the reactor 4 and the diode 5 and the ground) is connected. Equivalent to a transistor). Between the power output terminal 3 and the ground, a smoothing capacitor 7 and a voltage detection circuit 8 (corresponding to a resistance voltage dividing circuit) composed of resistors 9 and 10 for voltage division are connected.

  The operational amplifier 11 differentially amplifies the detection voltage Vdet output from the voltage detection circuit 8 and the reference voltage Vref (= Vm × R10 / (R9 + R10)) corresponding to the necessary minimum voltage Vm (specified voltage). A diode 14 is connected between the output terminal and the inverting input terminal of the operational amplifier 11, and the output terminal is connected to the inverting input terminal (node NA) of the comparator 16 via the resistor 13. A phase compensation capacitor 26 is connected between the node NA and the ground, and a P-channel MOSFET 28 (corresponding to a potential fixing circuit) and a resistor 29 are connected in series between the 5V power supply line 27 and the node NA. It is connected to the. The MOSFET 28 is turned on / off by an enable signal SEN. The non-inverting input terminal of the comparator 16 is supplied with a carrier signal voltage Vc made of, for example, a triangular wave signal.

  The power output terminal 3 is provided with an overvoltage detection circuit 30 that detects an overvoltage state in which the output voltage Vo exceeds a predetermined limit voltage VLMT. FIG. 3 shows the configuration of the overvoltage detection circuit 30. A Zener diode 31 and a resistor 32 are connected in series between the power supply output terminal 3 and the ground, and a resistor 33 and an NPN transistor 34 are connected in series between the power supply line 27 and the ground. The anode of the Zener diode 31 is connected to the base of the transistor 34, and the overvoltage detection signal Sov is output from its collector. The Zener voltage Vz of the Zener diode 31 is set to VLMT−Vf (Vf is the forward voltage of the pn junction).

  An output signal Sd of the comparator 16 and an overvoltage detection signal Sov are input to the AND gate 35 (corresponding to a drive control circuit). The output signal of the AND gate 35 is connected to the gate of the MOSFET 6 through the level conversion circuit 36. The power supply line 27 is an output line of the power supply circuit 24 (see FIG. 2), and the circuit from the operational amplifier 11 to the AND gate 35 operates under 5V power supplied from the power supply line 27.

Next, the operation of this embodiment will be described with reference to FIG.
FIG. 4 shows a voltage waveform when the input voltage Vin (battery voltage VB) to the boosting power supply circuit 23 is temporarily lower than a necessary minimum voltage Vm (8 V). (A) is the input voltage Vin and the output voltage Vo, (b) is the enable signal SEN, (c) the boost signal voltage Va and the carrier signal voltage Vc, (d) the output signal Sd of the comparator 16, (e) the AND gate 35 It represents the output signal. In addition, the voltage of (a) is a battery voltage system, and the voltage of (b)-(e) is a 5V system.

  Prior to time t10, the boost power supply circuit 23 is instructed to stop the boost power supply operation, and the enable signal SEN is at the L level. During this period, the MOSFET 28 is turned on and the node NA is fixed at 5V. Therefore, the output signal Sd of the comparator 16 is always at L level, and the boosting power supply operation is stopped. After the enable signal SEN becomes H level, when the input voltage Vin (battery voltage VB) decreases rapidly from time t11, the output voltage Vo decreases according to the load (here, input power to the power supply circuit 24). In FIG. 4, the change (slope) of the output voltage Vo from time t11 to time t12 when the output voltage Vo reaches the necessary minimum voltage Vm is exaggerated.

  Unlike the conventional configuration, the power output terminal 3 and the output terminal of the operational amplifier 11 are not coupled by a capacitor, and the phase compensation capacitor 26 has a filtering action. For this reason, when the output voltage Vo falls below the necessary minimum voltage Vm, the boosted signal voltage Va at the node NA gradually falls from 5V accordingly. Along with this, the duty ratio of the output signal Sd of the comparator 16 gradually increases from zero and the boost operation soft-starts, and the boost operation is performed with the minimum duty ratio necessary to boost the output voltage Vo to the minimum required voltage Vm. Do. Therefore, the ripple superimposed on the output voltage Vo at the start of the boosting operation is smaller than in the conventional configuration.

  Thereafter, when the input voltage Vin (battery voltage VB) rapidly increases from time t13, the output voltage Vo increases. In FIG. 4, the change (slope) of the output voltage Vo from time t13 to time t14 when the output voltage Vo rises and reaches the limit voltage VLMT is exaggerated. Since the phase compensation capacitor 26 is provided between the output terminal of the operational amplifier 11 and the ground, a control delay occurs when the input voltage Vin increases, and the boosted signal voltage Va at the node NA does not increase even if the output voltage Vo increases rapidly. It rises moderately. For this reason, the comparator 16 continues to output the output signal Sd having a PWM waveform for a while (until time t16) even after the output voltage Vo exceeds the necessary minimum voltage Vm.

  If the MOSFET 6 is driven using the output signal Sd of the comparator 16 as it is, the output voltage Vo may overshoot and an excessive voltage may be generated. Therefore, the overvoltage detection circuit 30 and the AND gate 35 are provided, and the MOSFET 6 is driven using a signal obtained by masking the output signal Sd with the overvoltage detection signal Sov. In the overvoltage detection circuit 30 shown in FIG. 3, when the output voltage Vo becomes equal to or higher than Vz + Vf (= VLMT), the transistor 34 is turned on, and the overvoltage detection signal Sov changes from H level to L level. In this overvoltage detection state, the MOSFET 6 is turned off regardless of the state of the output signal Sd, and the boosting operation is stopped.

  As described above, the boosting power supply circuit 23 employed in the power supply IC 21 of the present embodiment includes the phase compensation capacitor 26, so that oscillation can be prevented and the boosting operation can be stabilized. Since the phase compensation capacitor 26 is provided between the output terminal of the operational amplifier 11 and the ground, the boosting operation is soft-started when the output voltage Vo is lowered, and is superimposed on the output voltage Vo at the start of the boosting operation. Ripple can be reduced. Further, since the resistor 13 is provided between the output terminal of the operational amplifier 11 and the phase compensation capacitor 26, further soft start can be achieved by the action as a CR filter.

  As can be seen from FIG. 7, the ripple generated with the boosting operation has a high frequency component. Therefore, the ripple component passes through the power supply circuit 24 or the drive circuit 25 to the vehicle-mounted control device or vehicle-mounted device (relay coil or the like). Propagation is likely to cause radio noise. According to the present embodiment, since the ripple generated from the boost power supply circuit 23 due to the fluctuation of the battery voltage VB and the load fluctuation is small, it is possible to reduce the influence of noise and radio noise on the in-vehicle control device.

  Since the overvoltage detection circuit 30 and the AND gate 35 are provided and the output signal Sd is masked with the overvoltage detection signal Sov, the overshoot of the output voltage Vo is prevented even when there is a control delay due to the provision of the phase compensation capacitor 26. Can be limited. The step-up power supply circuit 23 is not intended to output a constant voltage, but is intended to supply a voltage higher than the necessary minimum voltage Vm to the power supply circuit 24 located at the subsequent stage. The fluctuation itself is permissible.

  When the enable signal SEN becomes L level, such as when the power supply IC 21 shifts to the low power consumption mode, the potential of the node NA is fixed to 5V via the MOSFET 28 and the resistor 29. As a result, the MOSFET 6 can be reliably maintained in the off state, and the boosting operation can be soft-started when the enable signal SEN is returned to the H level.

(Second Embodiment)
FIG. 5 is a circuit configuration diagram of a voltage detection circuit and an overvoltage detection circuit according to the second embodiment of the present invention. The voltage detection circuit 37 is constituted by voltage dividing resistors 38, 39, and 40 (corresponding to a resistance voltage dividing circuit), and a detection voltage Vdet is output from a common connection point of the resistors 39 and 40. The overvoltage detection circuit 41 also shares this voltage detection circuit 37, and the common connection point of the resistors 38 and 39 is connected to the non-inverting input terminal of the comparator 42.

  A voltage Ve (= VLMT × (R39 + R40) / (R38 + R39 + R40)) corresponding to the limit voltage VLMT is applied to the inverting input terminal of the comparator 42. When the output voltage Vo becomes equal to or higher than the limit voltage VLMT, the output of the comparator 42 becomes H level, the transistor 34 is turned on, and the overvoltage detection signal Sov changes from H level to L level. According to the present embodiment, the resistors 38, 39, and 40 can be shared by the voltage detection circuit 37 and the overvoltage detection circuit 41.

(Other embodiments)
The present invention is not limited to the embodiments described above and shown in the drawings, and can be modified or expanded as follows, for example.
The resistor 13 may be provided as necessary.
The potential fixing circuit by the MOSFET 28 and the resistor 29 may be omitted.
An IGBT or a bipolar transistor may be employed instead of the MOSFET 6.

1 is a configuration diagram of a boost power supply circuit showing a first embodiment of the present invention. Schematic configuration diagram of power IC Configuration diagram of overvoltage detection circuit Voltage waveform diagram when the input voltage Vin to the booster power supply circuit is temporarily lower than the required minimum voltage Vm Circuit configuration diagram of a voltage detection circuit and an overvoltage detection circuit showing a second embodiment of the present invention 1 equivalent diagram showing the conventional configuration 4 equivalent diagram

Explanation of symbols

  2 is a power input terminal, 3 is a power output terminal, 4 is a reactor, 5 is a diode, 6 is a MOSFET (transistor), 8 and 37 are voltage detection circuits (resistance voltage dividing circuits), 11 is an operational amplifier, 13 is a resistor, 16 Is a booster power supply circuit, 26 is a phase compensation capacitor (capacitor), 28 is a MOSFET (potential fixing circuit), 30 and 41 are overvoltage detection circuits, and 35 is an AND gate (drive control circuit).

Claims (4)

A reactor and a diode connected in series between the power input / output terminals;
A transistor connected between a common connection point of the reactor and the diode and a ground;
A voltage detection circuit for detecting a voltage of the power output terminal;
An operational amplifier for inputting the detection voltage and a predetermined reference voltage;
A capacitor connected between the output terminal of the operational amplifier and the ground;
A comparator that compares the carrier signal voltage with the output voltage of the operational amplifier;
An overvoltage detection circuit for detecting an overvoltage state in which the voltage of the power supply output terminal exceeds a predetermined limit voltage;
A boosting power supply circuit comprising: a drive control circuit that drives the transistor off when the overvoltage state is detected, and drives the transistor according to an output signal of the comparator when the overvoltage state is not detected.   2. The boosting power supply circuit according to claim 1, wherein an output terminal of the operational amplifier is connected to the capacitor and the comparator via a resistor.   3. The boost power supply circuit according to claim 1, wherein the voltage detection circuit and the overvoltage detection circuit share a resistance voltage dividing circuit connected between the power output terminal and ground.   A potential fixing circuit for fixing an input terminal connected to the output terminal of the operational amplifier among the input terminals of the comparator to a predetermined potential so that the transistor is driven off during a period in which a boost power supply operation is commanded to stop; 4. The step-up power supply circuit according to claim 1, wherein:

Images