JP2008124354A - Method of manufacturing semiconductor device - Google Patents

Method of manufacturing semiconductor device Download PDF

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JP2008124354A
JP2008124354A JP2006308689A JP2006308689A JP2008124354A JP 2008124354 A JP2008124354 A JP 2008124354A JP 2006308689 A JP2006308689 A JP 2006308689A JP 2006308689 A JP2006308689 A JP 2006308689A JP 2008124354 A JP2008124354 A JP 2008124354A
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silicon wafer
curable resin
resin film
ultraviolet curable
film
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Masashi Kanamori
正志 金森
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Fuji Electric Co Ltd
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Fuji Electric Device Technology Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device capable of preventing contact scratches or hitting marks from being formed on a silicon wafer and reducing the warp of the silicon wafer as well in the case of sucking and fixing the silicon wafer to a suction stage. <P>SOLUTION: By coating an ultraviolet-curable resin film 31 on the device forming surface (surface structure 4) of the silicon wafer 1, the contact scratches or the hitting marks are prevented from being formed on the surface structure 4 sucked to the suction stage 32 in the case of grinding the back surface 1a of the silicon wafer 1. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

この発明は、薄型ウェハを用いた半導体装置の製造方法に関する。   The present invention relates to a method for manufacturing a semiconductor device using a thin wafer.

パワー半導体装置(例えば、縦型のIGBT(絶縁効果型バイポーラトランジスタ)など)では、近年、高性能化を図るためにシリコンウェハの薄板化が行われている。この薄型バワー半導体装置は、図3に示すように、シリコンウェハ1の表面にデバイスの表面構造4を形成した後、図4に示すように、このデバイス形成面(表面構造4)と反対側のシリコンウェハ1の裏面1aを研削加工して薄膜化した後、図示しない裏面電極を形成して製造される。
図3において、同図(a)は研削前のシリコンウェハの要部断面図、同図(b)は同図(a)のB部詳細図であり、IGBTの1セルの表面構造4である。表面構造4は拡散部2と上部構造3で構成される。この拡散部2はシリコンウェハ1の表面層に形成されたウェル領域11とウェル領域11の表面層に形成されたエミッタ領域で構成される。また上部構造3はゲート絶縁膜13とゲート電極14と層間絶縁膜15とエミッタ電極16および表面保護膜のポリイミド膜17で構成される。
In power semiconductor devices (for example, vertical IGBTs (insulation effect bipolar transistors)), silicon wafers have been thinned in recent years in order to improve performance. As shown in FIG. 3, after forming the surface structure 4 of the device on the surface of the silicon wafer 1 as shown in FIG. 3, this thin power semiconductor device is opposite to the device formation surface (surface structure 4) as shown in FIG. After the back surface 1a of the silicon wafer 1 is ground and thinned, a back electrode (not shown) is formed and manufactured.
3A is a cross-sectional view of the main part of the silicon wafer before grinding, and FIG. 3B is a detailed view of part B of FIG. 3A, showing the surface structure 4 of one cell of the IGBT. . The surface structure 4 is composed of a diffusion portion 2 and an upper structure 3. The diffusion portion 2 includes a well region 11 formed in the surface layer of the silicon wafer 1 and an emitter region formed in the surface layer of the well region 11. The upper structure 3 includes a gate insulating film 13, a gate electrode 14, an interlayer insulating film 15, an emitter electrode 16, and a polyimide film 17 serving as a surface protective film.

図4は、シリコンウェハを薄膜化する従来の方法で、レジスト膜を薄くした場合であり、同図(a)〜同図(c)は工程順に示した要部工程断面図である。
まず、図4で示したシリコンウェハ1の裏面1aを研削加工するために、予め表面構造4上に研削保護用のレジスト膜35をスピン塗布して、熱硬化させておく。レジスト膜35は一般的に半導体プロセスで使用する熱硬化性樹脂膜である(同図(a))。
つぎに、このレジスト膜35面に研削加工装置の吸着ステージ32をセットし真空吸着することでシリコンウェハ1を吸着ステージ32に吸着固定し、シリコンウェハ1の裏面1aを研削加工してシリコンウェハ1を薄膜化する(同図(b))。
つぎに、シリコンウェハ1を吸着ステージ32から離す。その後の工程はここでは省略する。
FIG. 4 shows a case where a resist film is thinned by a conventional method of thinning a silicon wafer, and FIGS. 4A to 4C are cross-sectional views of essential parts shown in the order of processes.
First, in order to grind the back surface 1a of the silicon wafer 1 shown in FIG. 4, a resist film 35 for grinding protection is applied in advance on the surface structure 4 and thermally cured. The resist film 35 is a thermosetting resin film generally used in a semiconductor process ((a) in the figure).
Next, the silicon wafer 1 is sucked and fixed to the suction stage 32 by setting the suction stage 32 of the grinding apparatus on the surface of the resist film 35 and vacuum sucking, and the back surface 1a of the silicon wafer 1 is ground and processed. Is thinned ((b) in the figure).
Next, the silicon wafer 1 is separated from the suction stage 32. Subsequent steps are omitted here.

特許文献1には、半導体ウェハ等の製品を加工する際に使用される粘着シートについて、加工後、粘着シートを剥離する際に半導体ウェハを損傷することがない粘着シートとその製造方法が開示されている。この粘着シートには紫外線硬化性樹脂も含まれている。
特開2004−106515号公報
Patent Document 1 discloses a pressure-sensitive adhesive sheet used for processing a product such as a semiconductor wafer, and a method for manufacturing the pressure-sensitive adhesive sheet that does not damage the semiconductor wafer when the pressure-sensitive adhesive sheet is peeled after processing. ing. This pressure-sensitive adhesive sheet also contains an ultraviolet curable resin.
JP 2004-106515 A

図4(a)で塗布するレジスト膜35の膜厚は3μm程度の薄い膜であり、吸着ステージ32にレジスト膜32が接触したときに、図5に示すように、レジスト膜35を貫通して表面構造4に接触キズ41や打痕42等が付くことがある。接触キズ41や打痕42は、シリコンウェハ1に形成された多数の半導体素子(ここではIGBT)を破壊させ、良品率を低下させる原因となっている。
この接触キズ41や打痕42を防止するためにレジスト膜を厚くする方法がある。
図6は、レジスト膜の膜厚を厚くした場合の工程図であり、同図(a)〜同図(c)は工程順に示した要部工程断面図である。
図4と同様の工程であるが、異なるのは接触キズ41や打痕42を防止するためにレジスト膜35の厚さを10μm以上の厚いレジスト膜36にした点である。こうすることで接触キズ41や打痕42等を低減できるが、シリコンウェハ1を吸着ステージ32から離すと、図7のようにシリコンウェハ1が大きく反ってしまう。この反り量が増大する理由について以下に説明する。
The resist film 35 applied in FIG. 4A is a thin film having a thickness of about 3 μm. When the resist film 32 comes into contact with the adsorption stage 32, the resist film 35 penetrates the resist film 35 as shown in FIG. The surface structure 4 may have a contact scratch 41, a dent 42, or the like. Contact scratches 41 and dents 42 cause a large number of semiconductor elements (IGBT in this case) formed on the silicon wafer 1 to be destroyed and cause a reduction in the yield rate.
There is a method of increasing the thickness of the resist film in order to prevent the contact scratch 41 and the dent 42.
FIG. 6 is a process diagram in the case where the thickness of the resist film is increased, and FIGS. 6A to 6C are main process cross-sectional views shown in the order of processes.
The process is the same as that shown in FIG. 4 except that the resist film 35 is thicker than 10 μm in order to prevent contact scratches 41 and dents 42. By doing so, contact scratches 41, dents 42, and the like can be reduced. However, when the silicon wafer 1 is separated from the suction stage 32, the silicon wafer 1 is greatly warped as shown in FIG. The reason why the amount of warpage increases will be described below.

従来から研削保護用に使用していたレジスト膜35、36は、熱硬化性樹脂のため加熱硬化処理をすると、有機溶剤が揮発し応力が発生する。この応力によって発生したシリコンウェハ1の反りは、特にレジスト膜36の厚さが10μm以上になると数mm以上に増大する。
このようにシリコンウェハ1の反り量が増大すると、各種半導体プロセス装置の搬送機構でシリコンウェハ1を搬送できないなどの不具合が発生する。
この発明の目的は、前記の課題を解決して、シリコンウェハを吸着ステージに吸着固定する場合に、シリコンウェハに接触キズや打痕が付かず、シリコンウェハの反りも小さくできる半導体装置の製造方法を提供することである。
Since the resist films 35 and 36 conventionally used for grinding protection are thermosetting resins, the organic solvent is volatilized and stress is generated when heat curing is performed. The warp of the silicon wafer 1 caused by this stress increases to several mm or more, particularly when the thickness of the resist film 36 is 10 μm or more.
When the amount of warpage of the silicon wafer 1 increases in this way, there arises a problem that the silicon wafer 1 cannot be transferred by the transfer mechanism of various semiconductor process apparatuses.
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-described problems and to provide a method for manufacturing a semiconductor device in which when a silicon wafer is sucked and fixed to a suction stage, the silicon wafer is free from contact scratches and dents and warpage of the silicon wafer can be reduced. Is to provide.

前記の目的を達成するために、シリコンウェハのデバイス形成面を接触させて脱着支持治具に固定する工程において、前記デバイス形成面に保護膜として紫外線硬化性樹脂膜を被覆し、該紫外線硬化性樹脂膜に紫外線を照射して硬化させた後、前記紫外線硬化性樹脂膜を接触させて脱着支持治具に固定する製造方法とする。
また、シリコンウェハを研削して薄膜化する工程において、研削面と反対側のデバイス形成面に保護膜として紫外線硬化性樹脂膜を被覆し、該紫外線硬化性樹脂膜に紫外線を照射して硬化させた後、該紫外線硬化性樹脂膜を脱着支持治具に接触させて固定した後前記研削面を研削し前記シリコンウェハの厚さを100μm以下とする。
また、シリコンウェハを搬送する工程において、前記シリコンウェハのデバイス形成面に保護膜として紫外線硬化性樹脂膜を被覆し、該紫外線硬化性樹脂膜に紫外線を照射して硬化させた後、シリコンウェハを脱着支持治具に接触させて固定し搬送する製造方法とする。
In order to achieve the above object, in the step of bringing the device forming surface of the silicon wafer into contact and fixing to the desorption support jig, the device forming surface is coated with an ultraviolet curable resin film as a protective film, and the ultraviolet curable resin is coated. After the resin film is irradiated with ultraviolet rays and cured, the ultraviolet curable resin film is brought into contact with the resin film and fixed to a desorption support jig.
Also, in the process of thinning the silicon wafer, a device forming surface opposite to the ground surface is coated with an ultraviolet curable resin film as a protective film, and the ultraviolet curable resin film is irradiated with ultraviolet rays and cured. Thereafter, the ultraviolet curable resin film is fixed in contact with a desorption support jig, and then the ground surface is ground to make the thickness of the silicon wafer 100 μm or less.
Further, in the step of transporting the silicon wafer, the device forming surface of the silicon wafer is coated with an ultraviolet curable resin film as a protective film, and the ultraviolet curable resin film is irradiated with ultraviolet rays and cured, It is set as the manufacturing method which fixes and conveys by making it contact with a removal | desorption support jig | tool.

また、前記脱着支持治具が前記シリコンウェハを脱着できる吸着ステージであるとよい。
また、前記紫外線の波長が200〜400nmであるとよい。
The desorption support jig may be a suction stage that can desorb the silicon wafer.
The wavelength of the ultraviolet light is preferably 200 to 400 nm.

この発明によれば、シリコンウェハのデバイス形成面に紫外線硬化性樹脂膜を被覆することで、シリコンウェハのデバイス形成面と反対の裏面を研削した場合に、吸着ステージに吸着されるデバイス形成面に接触キズや打痕が付くことを防止することができる。
これによってウェハ表面に形成された多数の半導体素子を破壊させてしまう問題を改善できる。
また、シリコンウェハに紫外線硬化性樹脂膜を被覆することで、シリコンウェハの反り量を小さく抑制できて、シリコンウェハの搬送工程や研削工程以外の他の工程を良好に行うことができる。
According to the present invention, when the back surface opposite to the device formation surface of the silicon wafer is ground by coating the device formation surface of the silicon wafer with the ultraviolet curable resin film, the device formation surface is attracted to the suction stage. Contact scratches and dents can be prevented.
This can improve the problem of destroying a large number of semiconductor elements formed on the wafer surface.
Further, by coating the silicon wafer with the ultraviolet curable resin film, the warpage amount of the silicon wafer can be suppressed to be small, and other processes other than the silicon wafer conveyance process and the grinding process can be favorably performed.

シリコンウェハの薄膜化を図るときに、従来技術では研削加工装置の吸着ステージによる接触キズや打痕などが発生したり、シリコンウェハ上に被覆する保護膜によってシリコンウェハに反りが発生する。それを防止するために、保護膜として従来使用していたレジスト膜の代わりに、応力の小さな材料で、且つ、シリコンウェハ表面の保護能力に優れた紫外線(UV)硬化性樹脂膜を使用することで前記の問題点を解決した。以下の実施例にて具体的に説明する。   When a silicon wafer is thinned, in the prior art, contact scratches or dents are generated by the suction stage of a grinding apparatus, or the silicon wafer is warped by a protective film coated on the silicon wafer. To prevent this, use an ultraviolet (UV) curable resin film that is made of a low-stress material and has an excellent ability to protect the silicon wafer surface, instead of the resist film that has been used as a protective film. The above problem was solved. This will be specifically described in the following examples.

図1は、この発明の第1実施例の半導体装置の製造方法を示す工程図であり、同図(a)〜同図(e)は工程順に示した要部製造工程断面図である。この工程図ではシリコンウェハ1の研削工程を例に挙げた。尚、図4と同一部位には同一符号を付した。また半導体装置としてIGBTを例に挙げたがこれに限るものではない。
まず、硬化前の状態が液体である紫外線硬化性樹脂を、スピンコーターを使用してシリコンウェハ1のデバイス形成面(表面構造4)に回転塗布(スピンコート)する。スピンコーターの回転数と回転時間を制御して30μmの厚さになるよう形成し、スピンコートした直後に紫外線(365nm)を照射させ硬化させ紫外線硬化性樹脂膜31を形成する(同図(a))。尚、紫外線の波長としては200nm〜400nmの範囲がよい。この範囲から外れると紫外線による硬化性が低下する。
FIGS. 1A to 1E are process diagrams showing a method of manufacturing a semiconductor device according to a first embodiment of the present invention. FIGS. 1A to 1E are cross-sectional views showing a main part manufacturing process shown in the order of steps. In this process diagram, the grinding process of the silicon wafer 1 is taken as an example. In addition, the same code | symbol was attached | subjected to the same site | part as FIG. Moreover, although IGBT was mentioned as an example as a semiconductor device, it is not restricted to this.
First, an ultraviolet curable resin whose state before curing is liquid is spin-coated (spin coated) on the device forming surface (surface structure 4) of the silicon wafer 1 using a spin coater. The spin coater is formed so as to have a thickness of 30 μm by controlling the rotation speed and the rotation time. Immediately after spin coating, ultraviolet rays (365 nm) are irradiated and cured to form an ultraviolet curable resin film 31 (FIG. )). The wavelength of ultraviolet light is preferably in the range of 200 nm to 400 nm. If it is out of this range, the curability by ultraviolet rays decreases.

つぎに、この紫外線硬化性樹脂膜31に研削加工装置の吸着ステージ32(真空で吸着するステージ)をセットし真空吸着することでシリコンウェハ1を吸着ステージ32に真空吸着固定し、シリコンウェハ1の裏面1aを研削加工してシリコンウェハの厚さが90μmになるように裏面を研削する(同図(b))。
具体的には、研削加工装置の吸着ステージ32にデバイス形成面(表面構造4)上に形成されている紫外線硬化性樹脂膜31を密着させて固定し、反対側の研削面(裏面1a)を回転する図示しない研削台に押し付けて100μm以下の厚さに研削加工する。この研削工程後のシリコンウェハ1の厚さの面内分布は87〜93μmの範囲内となり、良好な結果となった。
つぎに、シリコンウェハ1を吸着ステージ32から外す(同図(c))。
Next, a suction stage 32 (a stage that sucks in vacuum) of a grinding apparatus is set on the ultraviolet curable resin film 31 and vacuum suction is performed to fix the silicon wafer 1 to the suction stage 32 by vacuum suction. The back surface 1a is ground to grind the back surface so that the thickness of the silicon wafer becomes 90 μm ((b) in the figure).
Specifically, the ultraviolet curable resin film 31 formed on the device formation surface (surface structure 4) is adhered and fixed to the suction stage 32 of the grinding apparatus, and the opposite grinding surface (back surface 1a) is fixed. It is pressed against a rotating grinding table (not shown) and ground to a thickness of 100 μm or less. The in-plane distribution of the thickness of the silicon wafer 1 after this grinding step was in the range of 87 to 93 μm, and good results were obtained.
Next, the silicon wafer 1 is removed from the suction stage 32 ((c) in the figure).

つぎに、紫外線硬化樹脂膜31に図示しない粘着テープを貼り、粘着テープを上に引っ張ることで、粘着テープに固着した紫外線硬化樹脂膜32をシリコンウェハ1から剥がした後、裏面1b側に裏面構造18を形成し、その後でダイシングライン(切断線33)に沿ってシリコンウェハ1をカットする(同図(d))。
カットした後、シリコンウェハ1は半導体チップ(ここではIGBTチップ)となる(同図(e))。
図2は、図1(e)のA部詳細図であり、IGBTの1セルの要部断面図である。表面構造4は図3で説明したのでここでは説明を省略する。裏面構造18はシリコンウェハ1の裏面1bに形成したコレクタ領域19とコレクタ領域19上に形成したコレクタ電極20で構成される。
Next, an adhesive tape (not shown) is attached to the ultraviolet curable resin film 31, and the adhesive tape is pulled upward to peel off the ultraviolet curable resin film 32 fixed to the adhesive tape from the silicon wafer 1, and then the back surface structure on the back surface 1b side. 18 is formed, and then the silicon wafer 1 is cut along a dicing line (cut line 33) (FIG. 4D).
After cutting, the silicon wafer 1 becomes a semiconductor chip (in this case, an IGBT chip) ((e) in the figure).
FIG. 2 is a detailed view of part A of FIG. 1 (e), and is a cross-sectional view of the main part of one cell of the IGBT. Since the surface structure 4 has been described with reference to FIG. 3, the description thereof is omitted here. The back surface structure 18 includes a collector region 19 formed on the back surface 1 b of the silicon wafer 1 and a collector electrode 20 formed on the collector region 19.

前記の図1(b)の研削工程の後で、紫外線硬化性樹脂膜31をシリコンウェハから除去してデバイス形成面(表面構造4)の外観検査したところ、図5で示した接触キズ41や打痕42などは発生していなかった。これは紫外線硬化性樹脂膜31の厚みが従来のレジスト膜36の膜厚の3倍程度で30μm程度にできるためである。この紫外線硬化性樹脂膜31の厚みは10μm程度以上あれば接触キズや打痕防止に効果を発揮する。
このように紫外線硬化性樹脂膜31を厚くできるのは、紫外線(波長200〜400nm)を照射して室温で硬化させるため、熱硬化性のレジスト膜に比べ揮発成分が少なく、応力の発生が少ないためである。
このように紫外線硬化性樹脂膜31は揮発成分が少なく、応力の発生が少ないため、シリコンウェハ1の反り量も極めて小さく、30μmの膜厚にしてもシリコンウェハ1の反り量は1μm以下である。つまり殆ど反らないということである。
After the grinding step of FIG. 1B, the UV curable resin film 31 is removed from the silicon wafer and the appearance of the device formation surface (surface structure 4) is inspected. No dent 42 or the like was generated. This is because the thickness of the ultraviolet curable resin film 31 is about 30 μm, which is about three times the film thickness of the conventional resist film 36. If the thickness of the ultraviolet curable resin film 31 is about 10 μm or more, it will be effective in preventing contact scratches and dents.
The ultraviolet curable resin film 31 can be thickened in this way because it is cured at room temperature by irradiating with ultraviolet rays (wavelength 200 to 400 nm), and therefore has less volatile components and less stress generation than a thermosetting resist film. Because.
As described above, since the ultraviolet curable resin film 31 has few volatile components and generates less stress, the warpage amount of the silicon wafer 1 is extremely small. Even when the film thickness is 30 μm, the warpage amount of the silicon wafer 1 is 1 μm or less. . In other words, there is almost no warping.

また、紫外線硬化性樹脂膜31を被覆したシリコンウェハ1は半導体プロセス工程を順次処理していく途中において、プロセス中の加熱や冷却を受けても熱硬化性のレジスト膜に比べて反りを発生させることが少ない。熱履歴後、シリコンウェハ1の反り量を実測したところ前記したように1mm程度であった。尚、シリコンウェハの直径は6インチ〜8インチ程度で厚さは90μm程度である。
また、レジスト膜35、36で必須の加熱硬化処理が紫外線硬化性樹脂膜31では必要ないため、プロセス時間の短縮が可能となり製造コストの低減を図ることができる。
今回、紫外線硬化性樹脂膜31をスピンコート法でシリコンウェハ1の表面に形成したが、これ以外の方法として印刷する方法もある。また、紫外線硬化樹脂膜31の主成分は、アクリル樹脂やエポキシ樹脂を用いている。
In addition, the silicon wafer 1 coated with the ultraviolet curable resin film 31 is warped as compared with the thermosetting resist film even when subjected to heating or cooling during the process in the course of sequentially processing the semiconductor process steps. There are few things. After the thermal history, when the amount of warpage of the silicon wafer 1 was measured, it was about 1 mm as described above. The silicon wafer has a diameter of about 6 inches to 8 inches and a thickness of about 90 μm.
In addition, since the heat curing treatment essential for the resist films 35 and 36 is not necessary for the ultraviolet curable resin film 31, the process time can be shortened and the manufacturing cost can be reduced.
In this case, the ultraviolet curable resin film 31 is formed on the surface of the silicon wafer 1 by the spin coat method, but there is a printing method as another method. The main component of the ultraviolet curable resin film 31 is an acrylic resin or an epoxy resin.

更に、紫外線硬化性樹脂膜31をシリコンウェハ1に被覆すると、シリコンウェハ1の反りが極めて小さいこととから、研削加工工程に限らず、例えば搬送工程などの他の工程でも本発明は適用できる。尚、搬送工程などの場合には吸着ステージ32の代わりに、爪が付いたステージにシリコンウェハ1を固定する場合も本発明を適用することで同様の効果を得ることができる。   Further, when the ultraviolet curable resin film 31 is coated on the silicon wafer 1, the warpage of the silicon wafer 1 is extremely small, so that the present invention can be applied not only to the grinding process but also to other processes such as a transport process. In the case of a transfer process, the same effect can be obtained by applying the present invention to the case where the silicon wafer 1 is fixed to a stage with claws instead of the suction stage 32.

この発明の第1実施例の半導体装置の製造方法を示す工程図であり、(a)〜(e)は工程順し示した要部製造工程断面図BRIEF DESCRIPTION OF THE DRAWINGS It is process drawing which shows the manufacturing method of the semiconductor device of 1st Example of this invention, (a)-(e) is principal part manufacturing process sectional drawing shown in order of the process 図1(e)のA部詳細図であり、IGBTの1セルの要部断面図It is the A section detail drawing of Drawing 1 (e), and the principal part sectional view of 1 cell of IGBT 研削前のシリコンウェハであり、(a)は要部断面図、(b)は(a)のB部詳細図であり、IGBTの1セルの表面構造部の図It is a silicon wafer before grinding, (a) is a cross-sectional view of the main part, (b) is a detailed view of B part of (a), a diagram of the surface structure part of one cell of IGBT シリコンウェハを薄膜化する従来の方法で、レジスト膜を薄くした場合の工程図であり、(a)〜(c)は工程順に示した要部工程断面図It is process drawing at the time of making a resist film thin with the conventional method of thinning a silicon wafer, (a)-(c) is a principal part process sectional view shown in process order 吸着ステージとの接触キズや打痕が付いた状態の要部断面図Cross-sectional view of the main part with scratches and dents on the suction stage レジスト膜を厚くした場合の工程図であり、(a)〜(c)は工程順に示した要部工程断面図It is process drawing at the time of making a resist film thick, (a)-(c) is a principal part process sectional view shown in process order シリコンウェハの反り量が増大した図Diagram showing the amount of warpage of silicon wafer increased

符号の説明Explanation of symbols

1 シリコンウェハ
1a、1b 裏面
2 拡散部
3 上部構造
4 表面構造
10 シリコン基板
11 ウェル領域
12 エミッタ領域
13 ゲート絶縁膜
14 ゲート電極
15 層間絶縁膜
16 エミッタ電極
17 ポリイミド膜
18 裏面構造
19 コレクタ領域
20 コレクタ電極
31 紫外線硬化性樹脂膜
32 吸着ステージ
33 切断線
35 レジスト膜(薄い)
36 レジスト膜(厚い)
41 接触キズ
42 打痕
DESCRIPTION OF SYMBOLS 1 Silicon wafer 1a, 1b Back surface 2 Diffusion part 3 Upper structure 4 Surface structure 10 Silicon substrate 11 Well region 12 Emitter region 13 Gate insulating film 14 Gate electrode 15 Interlayer insulating film 16 Emitter electrode 17 Polyimide film 18 Back surface structure 19 Collector region 20 Collector Electrode 31 UV curable resin film 32 Adsorption stage 33 Cutting line 35 Resist film (thin)
36 Resist film (thick)
41 Contact scratch 42 Scar

Claims (4)

シリコンウェハのデバイス形成面を接触させて脱着支持治具に固定する工程において、前記デバイス形成面に保護膜として紫外線硬化性樹脂膜を被覆し、該紫外線硬化性樹脂膜に紫外線を照射して硬化させた後、前記紫外線硬化性樹脂膜を接触させて脱着支持治具に固定することを特徴とする半導体装置の製造方法。 In the process of contacting the device forming surface of the silicon wafer and fixing it to the desorption support jig, the device forming surface is coated with an ultraviolet curable resin film as a protective film, and the ultraviolet curable resin film is cured by irradiating with ultraviolet rays. Then, the ultraviolet curable resin film is brought into contact with and fixed to a desorption support jig. シリコンウェハを研削して薄膜化する工程において、研削面と反対側のデバイス形成面に保護膜として紫外線硬化性樹脂膜を被覆し、該紫外線硬化性樹脂膜に紫外線を照射して硬化させた後、該紫外線硬化性樹脂膜を脱着支持治具に接触させて固定した後前記研削面を研削し前記シリコンウェハの厚さを100μm以下とすることを特徴とする半導体装置の製造方法。 In the process of thinning a silicon wafer, after coating the device forming surface opposite to the ground surface with an ultraviolet curable resin film as a protective film, the ultraviolet curable resin film is irradiated with ultraviolet rays and cured. The method of manufacturing a semiconductor device, wherein the ultraviolet curable resin film is fixed in contact with a desorption support jig and then the ground surface is ground to make the thickness of the silicon wafer 100 μm or less. シリコンウェハを搬送する工程において、前記シリコンウェハのデバイス形成面に保護膜として紫外線硬化性樹脂膜を被覆し、該紫外線硬化性樹脂膜に紫外線を照射して硬化させた後、シリコンウェハを脱着支持治具に接触させて固定し搬送することを特徴とする半導体装置の製造方法。 In the process of transporting the silicon wafer, the device forming surface of the silicon wafer is coated with an ultraviolet curable resin film as a protective film, and the ultraviolet curable resin film is irradiated with ultraviolet rays and cured, and then the silicon wafer is attached and detached. A method of manufacturing a semiconductor device, wherein the semiconductor device is fixed and transported in contact with a jig. 前記脱着支持治具が前記シリコンウェハを脱着できる吸着ステージであることを特徴とする請求項1〜3のいずれか一項に記載の半導体装置の製造方法。 The method for manufacturing a semiconductor device according to claim 1, wherein the desorption support jig is a suction stage that can desorb the silicon wafer.
JP2006308689A 2006-11-15 2006-11-15 Method of manufacturing semiconductor device Withdrawn JP2008124354A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103035520A (en) * 2012-08-13 2013-04-10 上海华虹Nec电子有限公司 Manufacture method for insulated gate bipolar transistor (IGBT) device
WO2013129705A1 (en) * 2012-03-02 2013-09-06 Fujifilm Corporation Manufacturing method of semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013129705A1 (en) * 2012-03-02 2013-09-06 Fujifilm Corporation Manufacturing method of semiconductor device
JP2014017462A (en) * 2012-03-02 2014-01-30 Fujifilm Corp Semiconductor device manufacturing method
CN103035520A (en) * 2012-08-13 2013-04-10 上海华虹Nec电子有限公司 Manufacture method for insulated gate bipolar transistor (IGBT) device

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