JP2007111832A - Method for manufacturing mems element, and mems element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a MEMS element, and a MEMS element, in which wiring disposed at peripheral parts of a structure of the MEMS element is not damaged in a release process of the structure, and the degree of integration is improved. <P>SOLUTION: This method for manufacturing a MEMS element is provided with processes of: forming an insulation film 11 on a semiconductor substrate 10; eliminating part of the insulation film 11, and forming a structure forming film 14 on the insulation film 11; etching the structure forming film 14 to form the shape of the structure 18; forming a wiring layer provided with interlayer insulation films 20 and 24 and wiring 23 above the structure forming film 14; implanting B-ions to the interlayer insulation films 20 and 24 at a part positioned above the structure 18; forming an opening part by etching a range inside the B-ion implanted range to the interlayer insulation films 20 and 24 above the structure at least up to the surface of the structure 18; and etching the interlayer insulation film 22 and the insulation film 11 in contact with the structure 18 where B-ions are implanted to release the structure 18. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

The present invention relates to a method for manufacturing a MEMS element and a MEMS element, which include a structure on a semiconductor substrate.

2. Description of the Related Art In recent years, sensors, resonators, communication devices, and the like that have MEMS devices on a semiconductor substrate using MEMS (Micro Electro Mechanical System) technology have attracted attention. MEMS
The element is a functional element composed of a minute structure manufactured on a semiconductor substrate using a semiconductor manufacturing process. This structure includes a movable portion (movable electrode) of a cantilever beam or a double-supported beam structure that is deformed by an external force such as an electric force or acceleration, and a fixed portion (fixed electrode). For example, a MEMS device including a comb-like movable electrode and a comb-like fixed electrode as shown in Patent Document 1 is known.

JP 2004-276200 A

In such a MEMS element, when a wiring for taking out an electrical signal of a structure or a circuit element is formed on the same semiconductor substrate, a wiring layer is laminated around the periphery of the structure.
This will be specifically described with reference to FIG. FIG. 5 is a cross-sectional view showing a part of the manufacturing process of the MEMS device having the above configuration.

In the MEMS element 100, the lower electrode 102 is formed on the semiconductor substrate 101, and a part of the insulating film 103 formed thereon is removed to form the structure 110. Then, an interlayer insulating film 104, a wiring 105 connected to the lower electrode 102, an interlayer insulating film 106, and a passivation film 107 are sequentially stacked on the structure 110. Thereafter, as shown in FIG. 5A, the passivation film 107 and the interlayer insulating films 106 and 104 on the structure 110 are dry-etched (anisotropic etching) to the surface of the structure 110 to form an opening 111. . Finally, as shown in FIG. 5B, part of the interlayer insulating film 104 and the insulating film 103 are wet etched (isotropic etching) to release the structure 110.

However, in the manufacturing process of the MEMS element, the interlayer insulating films 104 and 106 exposed to the opening 111 are simultaneously etched by isotropic etching for releasing the structure 110, and further to the wiring 105. The wiring 105 may be damaged. In this case, it is conceivable that the arrangement of the wiring 105 is moved away from the position where etching does not proceed, but the degree of integration of the MEMS element 100 is lowered.

The present invention has been made to solve the above-described problems, and its purpose is to release the structure without increasing the degree of integration without damaging the wiring arranged in the periphery of the structure. It is providing the manufacturing method of a MEMS element and a MEMS element which make possible.

In order to solve the above-described problem, the present invention provides a semiconductor substrate in which a wiring layer including wiring and an interlayer insulating film is laminated, and a part of the wiring layer is opened to the semiconductor substrate, and the semiconductor substrate in the opening is provided. A method of manufacturing a MEMS device having a structure thereon, the step of forming an insulating film on a semiconductor substrate, and removing a part of the insulating film to form a structure forming film on the insulating film A step of etching the structure forming film to form a shape of the structure, a step of forming a wiring layer provided with an interlayer insulating film and a wiring above the structure forming film, A step of implanting B ions into the interlayer insulating film in a portion located above, and etching a region inside the region above which the B ions are implanted into the interlayer insulating film to at least the surface of the structure. Forming an opening; and Characterized in that it comprises the the steps of releasing the structure by etching the interlayer insulating film and the insulating film in contact with the structure.

According to this method for manufacturing a MEMS element, B (boron) ions are implanted into an interlayer insulating film in which a part of the wiring layer is exposed on the side wall of the opening that opens to the semiconductor substrate. B
It is known that an interlayer insulating film such as SiO ₂ into which ions are implanted has a lower etching rate with respect to a hydrofluoric acid-based etching solution than an interlayer insulating film such as SiO ₂ .
For this reason, in the structure release process, the interlayer insulating film exposed on the side wall of the opening is slow in the etching with the etchant, so that the etching does not proceed to the wiring provided in the wiring layer, and the wiring There is no damage. For this reason, it is possible to provide a method for manufacturing a MEMS element in which the wiring can be arranged near the opening and the degree of integration can be improved.

In the MEMS element manufacturing method of the present invention, it is preferable to implant B ions separately for each of the plurality of interlayer insulating films with respect to the plurality of interlayer insulating films.

According to this method for manufacturing a MEMS element, when B ions are implanted into a number of interlayer insulating films formed by laminating a number of wiring layers above a structure, B ions are divided into a plurality of interlayer insulating films. Therefore, it is not necessary to implant B ions for each layer in the interlayer insulating film, and B ions can be efficiently implanted into the interlayer insulating film.

In the MEMS element manufacturing method of the present invention, it is preferable to implant B ions into the interlayer insulating film at once with respect to a large number of the interlayer insulating films.

According to this method of manufacturing a MEMS element, when B ions are implanted into a number of portions of the interlayer insulating film formed by laminating a number of wiring layers above the structure, B ions are collectively introduced into the interlayer insulating film. By implanting, it is not necessary to implant B ions for each layer in the interlayer insulating film, and B ions can be efficiently implanted into the interlayer insulating film.

In the present invention, a wiring layer including a wiring and an interlayer insulating film is laminated on a semiconductor substrate, a part of the wiring layer is opened to the semiconductor substrate, and a structure is provided on the semiconductor substrate in the opening. The MEMS element is characterized in that a B element is contained in an interlayer insulating film exposed on a side wall of the opening.

According to this configuration, the B (boron) element is included in the interlayer insulating film exposed on the side wall of the opening. In the manufacture of MEMS elements, an interlayer insulating film such as SiO ₂ containing B element has a lower etching rate with respect to a hydrofluoric acid-based etching solution than an interlayer insulating film such as SiO _2, and therefore, it takes a long time. It can be prevented that the side wall of the opening due to the etching becomes an overhang shape.
In addition, since the side wall of the opening does not have an overhang shape, the etching progresses in the structure release process, and the wiring disposed in the periphery of the structure is not damaged, and the degree of integration is improved. It is possible to provide a MEMS element that enables the above.

DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, embodiments of the invention will be described with reference to the drawings.
(Embodiment)

FIG. 1 is a schematic configuration diagram showing an embodiment of a MEMS resonator as a MEMS element according to the present invention. FIG. 1A is a plan view of the MEMS element, and FIG. 1B is a cross-sectional view taken along the line AA in FIG.

In FIG. 1, the MEMS element 1 has a structure 18 composed of a comb-like movable electrode 15 made of polysilicon and comb-like fixed electrodes 16 a and 16 b formed on a semiconductor substrate 10 made of silicon. Yes. Each of the structures 18 is provided in a double-supported beam structure.
Further, an n-type lower electrode 13 is formed on the semiconductor substrate 10 and is electrically connected to the structure 18. Further, in the peripheral part of the structure 18, Si formed on the semiconductor substrate 10.
An insulating film 11 which is a thermal oxide film made of O ₂ is formed, and an interlayer insulating film 20 and a wiring 23 are formed thereon.
The interlayer insulating film 24 and the passivation film 27 are laminated.
The interlayer insulating films 20 and 24 are made of SiO ₂ film, and the passivation film 27 is made of Si ₃ N ₄ film. The wiring 23 is made of Al, Cu, or the like and is connected to a circuit element formed on the lower electrode 13 or the semiconductor substrate 10 (not shown).
Note that the wiring layer and the interlayer insulating film may be used as a wiring layer, and a number of wiring layers may be stacked.

As described above, in the MEMS element 1, the wiring layer including the wiring 23 and the interlayer insulating films 20 and 24 is laminated on the semiconductor substrate 10, and a part of the wiring layer is opened from the uppermost surface of the wiring layer to the semiconductor substrate 10. The structure 18 is provided on the semiconductor substrate 10 in the opening.
An interlayer insulating film is exposed on the entire side wall 31 of the opening, and the exposed portion is composed of interlayer insulating films 22 and 26 into which B ions are implanted (including B element).

In the MEMS element 1 having the above-described configuration, an AC voltage is applied between one fixed electrode 16a and a ground electrode (not shown), so that the static electricity is generated between the comb-shaped fixed electrode 16a and the movable electrode 15. Electric power is generated to cause the movable electrode 15 to vibrate in a plane, and the resonance frequency of this vibration is taken out from the other fixed electrode 16b.

Next, a method for manufacturing the MEMS element 1 will be described. In manufacturing the MEMS element, a semiconductor CMOS process is used.
2, 3, and 4 are schematic cross-sectional views illustrating the manufacturing process of the MEMS element 1.

First, in FIG. 2A, an insulating film 11 which is a thermal oxide film (SiO ₂ film) is formed on a semiconductor substrate 10 made of silicon, a photoresist is applied thereon, and a photoresist film 12 is formed.
Form. Then, the photoresist film 12 is patterned into a predetermined shape. afterwards,
As shown in FIG. 2B, P (phosphorus) ions are implanted from above the patterned semiconductor substrate 10 to form an n-type lower electrode 13 on the semiconductor substrate 10. Next, a photoresist film 12
Then, a photoresist is applied again, and patterning is performed to remove a part of the insulating film 11 above the lower electrode 13. Then, as shown in FIG. 2C, a part of the insulating film 11 is etched to the lower electrode 13 by etching, and the photoresist is removed. Next, as shown in FIG. 2D, a structure forming film 14 made of polysilicon is formed from above. At this time, the polysilicon wraps around the portion from which a part of the insulating film 11 is removed. Next, as shown in FIG. 2E, the structure forming film 14 is patterned to form the structure 18 (the movable electrode 1).
5. Separate the shapes of the fixed electrodes 16a, 16b).

And as shown to Fig.3 (a), it is Si on the movable electrode 15 and fixed electrode 16a, 16b.
An interlayer insulating film 20 made of O ₂ is formed.
Thereafter, as shown in FIG. 3B, a photoresist is applied on the SiO ₂ film 20 as an interlayer insulating film, and the photoresist film 21 is removed so as to remove the upper portions of the movable electrode 15 and the fixed electrodes 16a and 16b. Is patterned. Subsequently, B (boron) ions are implanted from above.
Then, as shown in FIG. 3C, the photoresist film 21 is removed, and the interlayer insulating film is made of B.
The SiO ₂ film 22 and the SiO ₂ film 20 into which ions are implanted are separated.

Next, as shown in FIG. 3D, a wiring 23 is formed on the SiO ₂ film 20 by patterning, and an SiO ₂ film 24 as an interlayer insulating film is formed thereon.
Then, as shown in FIG. 3E, a photoresist is applied on the SiO ₂ film 24 as an interlayer insulating film, and the photoresist film 25 is removed so as to remove the upper portions of the movable electrode 15 and the fixed electrodes 16a and 16b. Is patterned. Here, the patterning position of the photoresist film 25 is substantially the same as the patterning position of the photoresist film 21 described with reference to FIG. Subsequently, B ions are implanted from above.

Next, as shown in FIG. 4A, the photoresist film 25 is removed, and the interlayer insulating film is separated into the SiO ₂ film 26 and the SiO ₂ film 24 into which B ions are implanted.
Subsequently, as shown in FIG. 4B, the SiO ₂ film 26 and the SiO ₂ film 22 into which B ions are implanted.
A passivation film 27 made of a Si ₃ N ₄ film is formed thereon.

Next, as shown in FIG. 4C, a photoresist is applied on the passivation film 27, and the photoresist film 28 is patterned so as to remove the upper portions of the movable electrode 15 and the fixed electrodes 16a and 16b. 3B and 3E, patterning is performed at a position 1 μm or more inside the patterning positions of the photoresist films 21 and 25 when B ions are implanted into the interlayer insulating film. . Then, the photoresist film 28
Using the mask as a mask, the passivation film 27 and the SiO ₂ films 26 and 22 implanted with B ions are dry-etched (anisotropic etching) until at least the surfaces of the movable electrode 15 and the fixed electrodes 16a and 16b are exposed.

In this way, the side wall 30 of the opening formed by dry etching has a B
The SiO ₂ films 26 and 22 into which ions have been implanted are exposed on the entire periphery of the opening.
An etching gas such as CF ₄ is used for dry etching of the passivation film 27 made of Si ₃ N ₄ film, and a fluorine-based or chlorine-based etching gas is used for dry etching of the SiO ₂ films 26 and 22 implanted with B ions. Is used.

Next, as shown in FIG. 4D, the insulating film 11 composed of the SiO ₂ film 22 and the SiO ₂ film implanted with B ions below the surfaces of the movable electrode 15 and the fixed electrodes 16a and 16b is made of hydrofluoric acid. Wet etching (isotropic etching) is performed using an etching solution to release a part of the structure 18 composed of the movable electrode 15 and the fixed electrodes 16a and 16b. At this time, the SiO ₂ films 26 and 22 implanted with B ions exposed on the side wall 31 of the opening are also etched. However, since the etching rate is slower than that of the SiO ₂ film of the insulating film 11, a part of the structure 18 is obtained. The SiO ₂ films 26 and 22 into which the exposed B ions are implanted remain on the side wall 31 even after the release. Finally, the photoresist film 28 is removed to complete the MEMS element 1.

According to the manufacturing method of the MEMS element 1 described above, the SiO ₂ films 26 and 22 into which B ions are implanted as an interlayer insulating film are exposed on the side wall 31 of the opening. Since the SiO ₂ film implanted with B ions has a lower etching rate with respect to a hydrofluoric acid-based etchant than the SiO ₂ film, the etching of the interlayer insulating film proceeds to the wiring in the release process of the structure 18. Thus, it is possible to provide a method of manufacturing a MEMS element that can improve the degree of integration without damaging the wiring.
Moreover, the MEMS element 1 manufactured by this manufacturing method can prevent the side wall 31 of the opening from being overhanged by etching for a long time in the release process of the structure 18 as in the prior art.

Further, in the above embodiment, every time the SiO ₂ films 20 and 24 as the interlayer insulating films are formed, B ions are implanted into a portion located above the structure 18, but the B described with reference to FIG.
Without going through the step of implanting ions, the SiO ₂ film 20, collectively in the step described with reference to FIG.
It is also possible to implant B ions into 24.
Furthermore, in the configuration in which wiring and interlayer insulating films are used as wiring layers around the structure and wiring layers are stacked in multiple layers, it is necessary to implant B ions into a number of SiO ₂ films as interlayer insulating films. It is also possible to implant B ions separately for each interlayer insulating film.
When such B ions are implanted into a plurality of SiO ₂ films, the acceleration of ionized B (boron) can be increased to increase the depth of the SiO ₂ film, and the acceleration is stepwise. By controlling this, it is possible to implant B ions from a deep part to a shallow part of the SiO ₂ film.
As described above, by implanting B ions into a plurality of interlayer insulating films, one layer of B is added to the interlayer insulating film.
There is no need to implant ions, and B ions can be efficiently implanted into the interlayer insulating film.

In this embodiment, the amount of B ions implanted into the interlayer insulating film is 1 × 10 ¹⁹ ions / cm.
It is preferably about ² .
In the above embodiment, silicon is used as the material for the semiconductor substrate.
SiGe, SiC, SiSn, PbS, GaAs, InP, GaP, GaN, ZnSe, or the like can be used.
Further, although the movable portion is formed of polysilicon in this embodiment, it can be implemented using another gate electrode material silicided in a CMOS transistor.
Furthermore, the MEMS element can be used for an actuator, a gyro sensor, an acceleration sensor, and the like using MEMS technology including a MEMS resonator.

It is a schematic block diagram of the MEMS element by embodiment of this invention, (a) is a top view of a MEMS element, (b) is sectional drawing which follows the AA disconnection of the figure (a). The schematic sectional drawing which shows the manufacturing process of the MEMS element of this embodiment. The schematic sectional drawing which shows the manufacturing process of the MEMS element of this embodiment. The schematic sectional drawing which shows the manufacturing process of the MEMS element of this embodiment. (A), (b) is a schematic sectional drawing of the manufacturing process of the MEMS element explaining the subject which invention intends to solve.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... MEMS element, 10 ... Semiconductor substrate, 11 ... Insulating film, 13 ... Lower electrode, 14 ... Structure formation film, 15 ... Movable electrode which forms a structure, 16a, 16b ... Fixed electrode which comprises a structure, 18 ... Structure, 20 ... SiO ₂ film as an interlayer insulating film, 22 ... Si implanted with B ions
O ₂ film, 23 ... wiring, 24 ... SiO ₂ film as an interlayer insulating film, 26 ... S implanted with B ions
iO ₂ film, 27... passivation film, 31.

Claims (4)

Manufacturing a MEMS element in which a wiring layer including wiring and an interlayer insulating film is laminated on a semiconductor substrate, a part of the wiring layer is opened to the semiconductor substrate, and a structure is provided on the semiconductor substrate in the opening. A method,
Forming an insulating film on the semiconductor substrate;
Removing a part of the insulating film and forming a structure forming film on the insulating film;
Etching the structure forming film to form the shape of the structure; and
Forming a wiring layer provided with an interlayer insulating film and wiring over the structure forming film;
Implanting B ions into the interlayer insulating film in a portion located above the structure;
Etching an area inside the area above the structure in which B ions are implanted into the interlayer insulating film to at least the surface of the structure to form an opening;
And a step of etching the interlayer insulating film in contact with the structure and the insulating film to release the structure. In the manufacturing method of the MEMS element according to claim 1,
A method for manufacturing a MEMS element, wherein B ions are implanted separately for each of the plurality of interlayer insulating films with respect to a large number of the interlayer insulating films. In the manufacturing method of the MEMS element according to claim 1,
A method for manufacturing a MEMS device, wherein B ions are implanted into an interlayer insulating film in a lump for a large number of the interlayer insulating films. A MEMS element in which a wiring layer including wiring and an interlayer insulating film is stacked on a semiconductor substrate, a part of the wiring layer is opened to the semiconductor substrate, and a structure is provided on the semiconductor substrate in the opening. And
B element is contained in the interlayer insulating film exposed on the side wall of the opening.
EMS element.

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