JP2006121042A - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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JP2006121042A
JP2006121042A JP2005233182A JP2005233182A JP2006121042A JP 2006121042 A JP2006121042 A JP 2006121042A JP 2005233182 A JP2005233182 A JP 2005233182A JP 2005233182 A JP2005233182 A JP 2005233182A JP 2006121042 A JP2006121042 A JP 2006121042A
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external connection
electronic component
insulating resin
metal foil
semiconductor device
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JP4873901B2 (en
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Keiichiro Hayashi
恵一郎 林
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Seiko Instruments Inc
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Seiko Instruments Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device and a manufacturing method of the semiconductor device, permitting simple processes and thinning thereof. <P>SOLUTION: On a substrate with a metal wiring pattern coated with an electrically insulating resin formed on the substrate, an integrated circuit that is an electronic component is made to face a metal wiring pattern electrode coated, with the predetermined electrically insulating resin that has been positioned. The electronic component removes the electrically insulating resin located on the electrode for jointing to bond with the electrode of the substrate. The integrated circuit is sucked to the head of a flip-chip bonding apparatus, and heat, load and ultrasonic vibrations are impressed thereon, thereby, the electrically insulating resin located on the predetermined electrode is removed, and conductive bumps bond or contact with the metal wiring pattern and conduction is obtained. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、半導体装置の製造方法に関する。   The present invention relates to a method for manufacturing a semiconductor device.

近年の電子機器の高性能化、小型化の流れの中、半導体装置の高密度、高機能化が一層求められている。半導体装置を搭載したモジュールにおいても、高密度、高機能化への対応が要求されている。半導体装置を高密度に実装するために、両面回路基板や多層回路基板の適用が進展されつつある。   In recent years, with the trend toward higher performance and smaller size of electronic devices, there is a further demand for higher density and higher functionality of semiconductor devices. Modules equipped with semiconductor devices are also required to support high density and high functionality. In order to mount semiconductor devices with high density, application of double-sided circuit boards and multilayer circuit boards is being developed.

例えば、半導体チップに導電バンプを形成し、フリップチップ接続時の加熱により溶融可能な熱硬化樹脂で前記バンプ形成部分が塗布する。上記半導体装置の実装方法は前記バンプとプリント配線板の電極が対向するように位置合わせする。この時、プリント配線板上の金属配線パターン電極部はエッチング等により電気絶縁樹脂が剥離され、金属が露出している。次に、上記プリント配線板上に上記半導体装置を搭載し加圧しながら加熱することによって、バンプによるフリップチップ接続と熱硬化性樹脂層のゲル化を同時に行う(例えば、特許文献1参照。)。
特開平11−307586号公報
For example, conductive bumps are formed on a semiconductor chip, and the bump forming portion is applied with a thermosetting resin that can be melted by heating at the time of flip chip connection. In the mounting method of the semiconductor device, the bumps and the printed wiring board are positioned so as to face each other. At this time, the metal wiring pattern electrode portion on the printed wiring board is peeled off by the etching or the like, and the metal is exposed. Next, the semiconductor device is mounted on the printed wiring board and heated while being pressed, so that flip chip connection by bumps and gelation of the thermosetting resin layer are performed simultaneously (for example, see Patent Document 1).
JP-A-11-307586

しかしながら、従来の方法では予め半導体装置のバンプ形成部分が加熱により溶融可能な熱硬化樹脂で被覆する必要があるので、製造工程が複雑になるという問題を有していた。また、前記バンプに前記熱硬化性樹脂を介して前記プリント配線板電極部へ加圧しているため、熱硬化性樹脂がバンプとプリント配線板電極部間に局所的に介在してしまい接続の信頼性を低下させていた。したがって、本発明は、大幅に簡易な工程が可能で、かつ薄型化が可能な半導体装置および半導体装置の製造方法を提供することを目的とするものである。   However, the conventional method has a problem that the manufacturing process is complicated because the bump forming portion of the semiconductor device needs to be coated with a thermosetting resin that can be melted by heating. Further, since the printed wiring board electrode part is pressed through the thermosetting resin on the bumps, the thermosetting resin is locally interposed between the bumps and the printed wiring board electrode part, so that the connection reliability is ensured. Had reduced sex. Accordingly, an object of the present invention is to provide a semiconductor device and a method for manufacturing the semiconductor device which can be significantly simplified and can be thinned.

本発明は、少なくとも1つの半導体装置であって、前記少なくとも1つの半導体装置の接合部が、樹脂によって電気絶縁されている金属パターンを形成してある基板の接合電極部に、対向し接触させることにより、前記少なくとも1つの半導体装置の接合部が前記樹脂によって電気絶縁されている金属パターンが形成された基板の接合電極部を露出させ、前記露出した接合電極部と前記半導体装置の接合部が電気的接合を得る。   The present invention is at least one semiconductor device, wherein a junction portion of the at least one semiconductor device is opposed to and brought into contact with a junction electrode portion of a substrate on which a metal pattern electrically insulated by a resin is formed. To expose the bonding electrode portion of the substrate on which the metal pattern in which the bonding portion of the at least one semiconductor device is electrically insulated by the resin is formed, and the bonding portion of the exposed bonding electrode portion and the semiconductor device is electrically To obtain a joint.

詳しくは、外部接続電極を有する電子部品と、電子部品の外部接続電極が埋設可能な厚みを有し、その所定位置にその厚み方向と垂直に沿って電気絶縁樹脂で被覆された金属箔が形成された基板を、電子部品の外部接続電極形成面を下側にしかつ外部接続電極形成面が基板の所定位置に電気絶縁樹脂で被覆された金属箔と対向配置する工程と、金属箔に加熱及び加圧及び超音波を印加する工程と、電気絶縁樹脂を排除し、接続用の金属箔面を露出させる工程と、外部接続電極と金属箔が接触し電気導通させる工程と、からなる。   Specifically, an electronic component having an external connection electrode and a metal foil that has a thickness that allows the external connection electrode of the electronic component to be embedded and is coated with an electrically insulating resin along a direction perpendicular to the thickness direction are formed at a predetermined position. A step of disposing an external connection electrode formation surface of the electronic component on the lower side and disposing the external connection electrode formation surface opposite to a metal foil covered with an electrically insulating resin at a predetermined position of the substrate; heating the metal foil; It comprises a step of applying pressure and ultrasonic waves, a step of removing the electrically insulating resin and exposing the metal foil surface for connection, and a step of bringing the external connection electrode and the metal foil into contact and conducting electrical connection.

また、外部接続電極を有する電子部品と、電子部品の外部接続電極が埋設可能な厚みを有し、その所定位置にその厚み方向と垂直に沿って電気絶縁樹脂で被覆された金属箔が形成された基板を、電子部品の外部接続電極形成面を下側にしかつ外部接続電極形成面が基板の所定位置に電気絶縁樹脂で被覆された金属箔と対向配置する工程と、金属箔に加熱及び加圧及び超音波を印加する工程と、電気絶縁樹脂を排除し、接続用の金属箔面を露出させる工程と、外部接続電極と金属箔が金属間接合し電気導通させる工程と、からなる。   In addition, an electronic component having an external connection electrode and a metal foil having a thickness that allows the external connection electrode of the electronic component to be embedded and coated with an electrically insulating resin along the thickness direction are formed at predetermined positions. Placing the substrate with the external connection electrode formation surface of the electronic component facing downward and the external connection electrode formation surface facing the metal foil coated with the electrically insulating resin at a predetermined position of the substrate, and heating and heating the metal foil. The method includes a step of applying pressure and ultrasonic waves, a step of removing the electrically insulating resin and exposing the metal foil surface for connection, and a step of electrically connecting the external connection electrode and the metal foil to form an electrical connection.

また、外部接続電極を有する電子部品と、電子部品の外部接続電極が埋設可能な厚みを有し、その所定位置にその厚み方向と垂直に沿って加熱により溶融可能な熱硬化電気絶縁樹脂で被覆された金属箔が形成された基板を、電子部品の外部接続電極形成面を下側にしかつ外部接続電極形成面が基板の所定位置に加熱により溶融可能な熱硬化電気絶縁樹脂で被覆された金属箔と対向配置する工程と、加熱により金属箔に加熱及び加圧を印加する工程と、加熱により熱硬化電気絶縁樹脂を硬化温度以下で加熱して溶融させ、接続用の金属箔面を露出させる工程と、外部接続電極と金属箔が接触し電気導通させる工程と、外部接続電極と金属箔が接触し電気導通した状態で、加熱により熱硬化電気絶縁樹脂を硬化温度で加熱して硬化させる工程と、からなる。   Also, an electronic component having external connection electrodes, and a thickness that allows the external connection electrodes of the electronic components to be embedded, are covered with a thermosetting electrical insulating resin that can be melted by heating along a direction perpendicular to the thickness direction. The substrate on which the formed metal foil is formed is a metal coated with a thermosetting electrical insulating resin that can be melted by heating at a predetermined position of the substrate with the external connection electrode forming surface of the electronic component facing down The step of placing the foil opposite to the foil, the step of applying heat and pressure to the metal foil by heating, and heating to melt the thermosetting electrical insulating resin at a temperature below the curing temperature to expose the metal foil surface for connection A process, a process in which the external connection electrode and the metal foil are in contact with each other for electrical conduction, and a process in which the external connection electrode and the metal foil are in a contact with and in electrical conduction to heat and cure the thermosetting electrical insulating resin by heating at a curing temperature. When, Ranaru.

溶融可能な熱硬化電気絶縁樹脂として、無機絶縁フィラーと熱硬化樹脂との混合物からなる樹脂で被覆し、熱硬化電気絶縁樹脂を硬化温度以下で加熱して溶融させた状態で、電子部品を押し込む。   As a meltable thermosetting electrical insulating resin, it is coated with a resin composed of a mixture of an inorganic insulating filler and a thermosetting resin, and the electronic components are pushed in while the thermosetting electrical insulating resin is heated and melted below the curing temperature. .

電子部品として、その外部接続電極に導電性突起物を有するものを用意する。   An electronic component having a conductive protrusion on its external connection electrode is prepared.

電子部品を電気絶縁樹脂に埋め込む際に、この電子部品の外部接続電極の間に導電粒子を介装することで基板厚み方向と垂直にある金属箔を電気的に接続する。   When embedding the electronic component in the electrical insulating resin, the metal foil perpendicular to the substrate thickness direction is electrically connected by interposing conductive particles between the external connection electrodes of the electronic component.

また、電子部品を電気絶縁樹脂に埋め込む際に、この電子部品の外部接続電極の間に異方性導電膜を介在することで基板厚み方向と垂直にある金属箔を電気的に接続する。   Further, when embedding the electronic component in the electrically insulating resin, the metal foil perpendicular to the substrate thickness direction is electrically connected by interposing an anisotropic conductive film between the external connection electrodes of the electronic component.

また、電子部品を電気絶縁樹脂に埋め込む際に、この電子部品の外部接続電極の間に異方性導電ペーストを介装することで基板厚み方向と垂直にある金属箔を電気的に接続する。   Further, when embedding the electronic component in the electrical insulating resin, an anisotropic conductive paste is interposed between the external connection electrodes of the electronic component to electrically connect the metal foil perpendicular to the substrate thickness direction.

複数の電子部品を電気絶縁樹脂に埋め込む際に、これら電子部品の外部接続電極の間に導電粒子を介装することで基板厚み方向に隣接する電子部品を電気的に接続する。   When embedding a plurality of electronic components in an electrically insulating resin, conductive components are interposed between the external connection electrodes of these electronic components to electrically connect the electronic components adjacent in the substrate thickness direction.

また、複数の電子部品を電気絶縁樹脂に埋め込む際に、これら電子部品の外部接続電極の間に異方性導電膜を介在することで基板厚み方向に隣接する電子部品を電気的に接続する。   In addition, when embedding a plurality of electronic components in an electrically insulating resin, an electronic component adjacent in the substrate thickness direction is electrically connected by interposing an anisotropic conductive film between external connection electrodes of these electronic components.

また、複数の電子部品を電気絶縁樹脂に埋め込む際に、これら電子部品の外部接続電極の間に異方性導電ペーストを介装することで基板厚み方向に隣接する電子部品を電気的に接続する。   In addition, when embedding a plurality of electronic components in an electrically insulating resin, an anisotropic conductive paste is interposed between the external connection electrodes of these electronic components to electrically connect adjacent electronic components in the substrate thickness direction. .

また、外部接続電極を有する電子部品と、電子部品の外部接続電極の所定位置に電子部品の外部接続電極の厚み方向と垂直に沿って金属箔が形成された電気絶縁レジストを用意する工程と、電子部品を、外部接続電極形成面を下側にしかつ外部接続電極形成面が電気絶縁レジストの所定位置の金属泊裏面と対向配置する工程と、電気絶縁レジストの金属箔に接触するまで電気絶縁レジストに加熱加圧超音波を印加して排除する工程と、外部接続電極と金属箔が電気導通する工程と、を含む。   Also, an electronic component having an external connection electrode, and a step of preparing an electrical insulation resist in which a metal foil is formed along a thickness direction of the external connection electrode of the electronic component at a predetermined position of the external connection electrode of the electronic component; The step of disposing the electronic component with the external connection electrode formation surface facing downward and the external connection electrode formation surface facing the metal back surface at a predetermined position of the electrical insulation resist, and the electrical insulation resist until it contacts the metal foil of the electrical insulation resist And a step of applying heat and pressure ultrasonic waves to the surface and eliminating the electrical connection between the external connection electrode and the metal foil.

また、金属配線パターンを有する基板の一方の面に形成された電気絶縁レジストまたは電気絶縁樹脂の上面に、電子部品のバンプ電極を載置する工程と、バンプ電極と、電気絶縁レジストまたは電気絶縁樹脂との接触部分を加熱し、かつ電子部品と基板の厚み方向に加圧及び超音波印加をする工程と、超音波印加により、電気絶縁レジストまたは電気絶縁樹脂のバンプ電極が接する部分を排除する工程と、バンプ電極と金属配線を接触させる工程と、を有する。   Also, a step of placing a bump electrode of an electronic component on the upper surface of an electrical insulation resist or electrical insulation resin formed on one surface of a substrate having a metal wiring pattern, the bump electrode, and the electrical insulation resist or electrical insulation resin A step of heating the contact portion and applying pressure and applying an ultrasonic wave in the thickness direction of the electronic component and the substrate, and a step of eliminating a portion where the bump electrode of the electrically insulating resist or the electrically insulating resin is in contact by applying the ultrasonic wave And a step of bringing the bump electrode and the metal wiring into contact with each other.

本発明の半導体装置は、熱及び超音波及び荷重を印加しながら半導体装置のバンプと、樹脂によって電気絶縁されている金属パターンが形成された基板の接合電極部裏面と、対向し接触させることにより、半導体装置の接合部が樹脂によって電気絶縁されている金属パターンが形成された基板の接合電極部を露出させ、露出した接合電極部と半導体装置の接合部が電気的接合を得ることにより、予め樹脂によって電気絶縁されている金属パターンの電極部分をエッチング等により接合電極部を露出させる工程が無くなり、大幅に簡易な工程で半導体装置を製造することが可能である。   The semiconductor device of the present invention faces and contacts the bumps of the semiconductor device while applying heat, ultrasonic waves and a load, and the back surface of the bonding electrode portion of the substrate on which the metal pattern electrically insulated by the resin is formed. By exposing the bonding electrode portion of the substrate on which the metal pattern in which the bonding portion of the semiconductor device is electrically insulated by the resin is formed and the exposed bonding electrode portion and the bonding portion of the semiconductor device are electrically bonded, The step of exposing the electrode portion of the metal pattern electrically insulated by the resin by etching or the like is eliminated, and the semiconductor device can be manufactured by a significantly simpler process.

また、接合時に周波数40KHz〜60KHzで振幅3μm〜5μmの超音波を0.1sec〜0.5sec印加することにより露出した半導体装置の接合部および基板の接合電極部表面にある1μm〜2μmの凹凸が無くなり電極接続部金属の真面が現れ、金属の原子同士が直接接合するため、従来の熱と荷重を印加しただけでは得られない接続の信頼性を得ることができる。   In addition, at the time of bonding, an ultrasonic wave having a frequency of 40 KHz to 60 KHz and an amplitude of 3 μm to 5 μm is applied for 0.1 sec to 0.5 sec. Since the metal surface of the connecting portion appears and the metal atoms are directly bonded to each other, connection reliability that cannot be obtained only by applying conventional heat and load can be obtained.

本発明の半導体装置において、半導体チップをそのバンプ電極面とチップ支持基板のチップ支持面とを対向させてフェイスダウンによって実装するフリップチップ接続するものである。図1は本発明の実施の形態の一例を係る半導体装置製造方法を示す製造工程図であり、図3は、本発明の好ましい実施態様にかかる半導体装置の実装構造模式図である。     In the semiconductor device of the present invention, the semiconductor chip is flip-chip connected by mounting face-down with the bump electrode surface facing the chip support surface of the chip support substrate. FIG. 1 is a manufacturing process diagram showing a semiconductor device manufacturing method according to an example of an embodiment of the present invention, and FIG. 3 is a schematic diagram of a semiconductor device mounting structure according to a preferred embodiment of the present invention.

フリップチップ接続では、まず、半導体チップのパッド(表面電極)側に導電バンプを形成し、半導体チップと樹脂によって電気絶縁されている金属パターンが形成されているチップ支持基板とを対向させた後、半導体チップの導電バンプと配線電極とを位置合わせし、半導体チップを搭載する。その後、チップ裏面から熱及び荷重及び超音波を印加することにより、樹脂によって電気絶縁されている接合電極部を露出させ、導電バンプと基板の配線電極とを接続するものである。     In flip chip connection, first, conductive bumps are formed on the pad (surface electrode) side of the semiconductor chip, and the semiconductor chip and the chip support substrate on which the metal pattern electrically insulated by the resin is formed are opposed to each other. The conductive bumps of the semiconductor chip and the wiring electrodes are aligned, and the semiconductor chip is mounted. Thereafter, by applying heat, load, and ultrasonic waves from the back surface of the chip, the bonding electrode portion electrically insulated by the resin is exposed, and the conductive bump and the wiring electrode of the substrate are connected.

本発明の好ましい実施態様においては、電子部品が、集積回路およびチップ部品を含んでいる。本発明のさらに好ましい実施態様においては、金属が、銅、アルミニウム、銀、金、白金およびパラジウムからなる群より選ばれる金属によって構成されている。本発明のさらに好ましい実施態様においては、金属が、銅またはアルミニウムによって構成されている。   In a preferred embodiment of the present invention, the electronic component includes an integrated circuit and a chip component. In a further preferred embodiment of the present invention, the metal is constituted by a metal selected from the group consisting of copper, aluminum, silver, gold, platinum and palladium. In a further preferred embodiment of the present invention, the metal is constituted by copper or aluminum.

本発明のさらに好ましい実施態様においては、樹脂が、ポリエチレン(PE)、ポリプロピレン(PP)、ポリスチレン(PS)、アクリロニトリル/スチレン樹脂(AS
)、アクリロニトリル/ブタジエン/スチレン樹脂(ABS)、メタクリル樹脂(PMMA)、塩化ビニル(PVC)、ポリアミド(PA)、ポリアセタール(POM)、超高分子量ポリエチレン(UHPE)、ポリブチレンテレフタレート(PBT)、GF強化ポリエチレンテレフタレート(GF―PET)、ポリメチルペンテン(TPX)、ポリカーボネイト(PC)、変性ポリフェニレンエーテル(PPE)、ポリフェニレンサルファイド(PPS)、ポリエーテルエーテルケトン(PEEK)、液晶ポリマー(LCP)、ポリテトラフロロエチレン(PTFE)、ポリエーテルイミド(PEI)、ポリアリレート(PAR)、ポリサルフォン(PSF)、ポリエーテルサルフォン(PES)、ポリアミドイミド(PAI)からなる群より選ばれる熱可塑性樹脂によって構成されている。本発明のさらに好ましい実施態様においては、樹脂がフィラーを含んでいる。本発明のさらに好ましい実施態様によれば、樹脂に、フィラーを添加することにより、機械的性質、熱伝導性、熱膨張率、コストなどを考慮して、樹脂の材料を選択することができる。
In a further preferred embodiment of the present invention, the resin is polyethylene (PE), polypropylene (PP), polystyrene (PS), acrylonitrile / styrene resin (AS).
), Acrylonitrile / butadiene / styrene resin (ABS), methacrylic resin (PMMA), vinyl chloride (PVC), polyamide (PA), polyacetal (POM), ultra high molecular weight polyethylene (UHPE), polybutylene terephthalate (PBT), GF Reinforced polyethylene terephthalate (GF-PET), polymethylpentene (TPX), polycarbonate (PC), modified polyphenylene ether (PPE), polyphenylene sulfide (PPS), polyether ether ketone (PEEK), liquid crystal polymer (LCP), polytetra A group consisting of fluoroethylene (PTFE), polyetherimide (PEI), polyarylate (PAR), polysulfone (PSF), polyethersulfone (PES), and polyamideimide (PAI) It is constituted by a thermoplastic resin selected. In a further preferred embodiment of the present invention, the resin contains a filler. According to a further preferred embodiment of the present invention, a resin material can be selected in consideration of mechanical properties, thermal conductivity, thermal expansion coefficient, cost, etc. by adding a filler to the resin.

本発明のさらに好ましい実施態様においては、樹脂がソルダーレジスト材(エポキシ系、アクリル系、ウレンタン系樹脂)によって構成されている。   In a further preferred embodiment of the present invention, the resin is composed of a solder resist material (epoxy-based, acrylic-based, urethane-based resin).

本発明のさらに好ましい実施態様においては、樹脂がフリップチップ接続時の加熱により溶融可能な熱硬化樹脂によって構成されている。   In a further preferred embodiment of the present invention, the resin is composed of a thermosetting resin that can be melted by heating at the time of flip chip connection.

以下、添付図面に基づいて、本発明の好ましい実施態様につき、詳細に説明を加える。図3は、本発明の好ましい実施態様にかかる半導体装置の実装構造模式図である。   Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. FIG. 3 is a schematic diagram of a mounting structure of a semiconductor device according to a preferred embodiment of the present invention.

図3に示されるように、まず、電気絶縁樹脂3上に金属配線パターン4を形成し、金属配線パターン4上を電気絶縁樹脂で全面被覆した基板に、電子部品である集積回路1を位置決めされた所定の基板電極部と対向させる。ここに、電子部品は、基板の電気絶縁樹脂で被覆された電極と接合するわけで、接合部電極上にある電気絶縁樹脂を一部排除する必要がある。   As shown in FIG. 3, first, the metal circuit pattern 4 is formed on the electrical insulating resin 3, and the integrated circuit 1 which is an electronic component is positioned on the substrate whose entire surface is covered with the electrical insulating resin. It is made to face a predetermined substrate electrode part. Here, the electronic component is bonded to the electrode covered with the electric insulating resin of the substrate, and it is necessary to partially remove the electric insulating resin on the bonding portion electrode.

図4に示されるように、集積回路1がフリップチップボンデイング装置のヘッド5に吸着され熱及び荷重及び超音波振動により所定の電極上にある電気絶縁樹脂3を排除し、導電バンプ2が金属配線パターン4と接合または接触する。本実施態様によれば、電気絶縁樹脂3に熱及び荷重及び、周波数40KHz〜60KHzで振幅3μm〜5μmの超音波を0.1sec〜0.5sec印加することにより、集積回路1のバンプが電気絶縁樹脂を一部排除し、金属電極部を露出させ、さらに露出した半導体装置の接合部および基板の接合電極部表面にある1μm〜2μmの凹凸が無くなり電極接続部金属の真面が現れ、金属の原子同士が直接接合することにより、金属配線パターン電極と電気的に接合及び接触させることによって、半導体装置を製造することができるから、簡易な工程で半導体装置を製造することが可能になる。   As shown in FIG. 4, the integrated circuit 1 is adsorbed by the head 5 of the flip chip bonding apparatus, and the electrical insulating resin 3 on the predetermined electrode is eliminated by heat, load and ultrasonic vibration, and the conductive bumps 2 are formed by metal wiring. Join or contact with pattern 4. According to this embodiment, the bumps of the integrated circuit 1 are made to be electrically insulated by applying heat and load to the electrically insulating resin 3 and ultrasonic waves having a frequency of 40 kHz to 60 kHz and an amplitude of 3 μm to 5 μm for 0.1 seconds to 0.5 seconds. The metal electrode part is partly removed, and the exposed surface of the bonding part of the semiconductor device and the surface of the bonding electrode part of the substrate disappeared, and the surface of the electrode connection part metal appears, and the metal atoms appear. By directly bonding, the semiconductor device can be manufactured by electrically bonding and contacting the metal wiring pattern electrode. Therefore, the semiconductor device can be manufactured by a simple process.

これによって、半導体装置の製造工程が簡略化できる。本実施態様によれば、半導体装置を構成している基板上に回路パターンが形成された後、回路パターン上に腐食防止及び保護用にソルダーレジストを一括塗布できるため、電極部を除く配線部分に選択的に塗布する工程と比して、大幅に製造工程が簡略化でき低コストで製造可能になる。   Thereby, the manufacturing process of the semiconductor device can be simplified. According to the present embodiment, after the circuit pattern is formed on the substrate constituting the semiconductor device, the solder resist can be collectively applied on the circuit pattern for corrosion prevention and protection. Compared with the process of selectively applying, the manufacturing process can be greatly simplified and the manufacturing can be performed at low cost.

さらに、本実施態様によれば、回路パターンの金属が、銅、アルミニウム、銀、金、白金およびパラジウムからなる群より選ばれる金属によって構成されている場合においても回路パターン形成後、直ちにソルダーレジストを全面塗布するため金属表面の清浄度が非常に高い値で保たれるため、電極部を露出する選択塗布に比して後工程での電子部品実装の接合強度が高く、しかも長期耐久試験における信頼性テスト評価結果も良好である。   Furthermore, according to this embodiment, even when the metal of the circuit pattern is composed of a metal selected from the group consisting of copper, aluminum, silver, gold, platinum and palladium, the solder resist is immediately formed after the circuit pattern is formed. Since the entire surface is applied, the metal surface is kept at a very high cleanliness, so that the bonding strength of the electronic component mounting in the subsequent process is higher than the selective application that exposes the electrodes, and it is also reliable in the long-term durability test. The results of sex test evaluation are also good.

さらに、本実施態様によれば、回路パターン形成後、直ちにソルダーレジストを全面塗布するため、電極部を露出する選択塗布の場合に比して、電子部品を実装する前に基板電極の清浄度を高めるためにドライ洗浄工程が必要で無くなり、電子部品実装設備にドライ洗浄装置を導入しなくてすむばかりでなく、工程も短縮化できる。   Furthermore, according to this embodiment, since the solder resist is applied to the entire surface immediately after the circuit pattern is formed, the cleanliness of the substrate electrode is reduced before mounting the electronic component as compared with the case of selective application exposing the electrode part. In order to improve this, a dry cleaning process is not necessary, and it is not only necessary to introduce a dry cleaning apparatus into the electronic component mounting equipment, but also the process can be shortened.

さらに、本実施態様によれば、電気絶縁樹脂にポリエチレン(PE)、ポリプロピレン(PP)、ポリスチレン(PS)系の樹脂を用い、電気絶縁樹脂厚みを導電性バンプ2高さと同じにしておけば、導電性バンプが電気絶縁樹脂に埋没し、回路パターン電極と電気的に接合及び接触させることによって、半導体装置を製造することができるから、アンダーフィル封止工程が不要で、接続信頼性の高い半導体装置を製造することが可能になる。   Furthermore, according to this embodiment, if the electrical insulating resin is made of polyethylene (PE), polypropylene (PP), polystyrene (PS) resin, and the thickness of the electrically insulating resin is the same as the height of the conductive bump 2, A semiconductor device can be manufactured by embedding conductive bumps in an electrically insulating resin and electrically connecting and contacting circuit pattern electrodes. Therefore, an underfill sealing process is not required, and a semiconductor with high connection reliability. The device can be manufactured.

さらに、本実施態様によれば、電気絶縁樹脂に電子部品が電気絶縁樹脂に埋没し、回路パターン電極と電気的に接合及び接触させることによって、半導体装置を製造することができるから、電気絶縁樹脂にフリップチップ接続時の加熱により溶融可能な熱硬化樹脂を用いれば、電気的接続が得られた後に樹脂が硬化し始めるため、硬化時の収縮により接触接合の効果も得ることができる。   Furthermore, according to this embodiment, the semiconductor device can be manufactured by embedding the electronic component in the electrical insulating resin in the electrical insulating resin and electrically connecting and contacting the circuit pattern electrode. In addition, if a thermosetting resin that can be melted by heating at the time of flip chip connection is used, the resin starts to harden after electrical connection is obtained.

本実施態様においては電気絶縁樹脂3として、熱可塑性樹脂が用いられる。これによって、半導体装置の薄型化が実現される。   In this embodiment, a thermoplastic resin is used as the electrical insulating resin 3. As a result, the semiconductor device can be thinned.

本実施態様によれば、半導体装置は、実施例1の半導体装置に、集積回路1Aを内蔵した電気絶縁樹脂3とによって構成されており、電気絶縁樹脂3に電子部品が埋没しているから、基板上に、回路パターンが形成され、回路パターン上に、電子部品が搭載されて、封止樹脂によって被覆された従来の電子部品内蔵基板に比して、大幅に薄型化することが可能になる。   According to this embodiment, the semiconductor device is configured by the semiconductor device of the first embodiment and the electrical insulating resin 3 incorporating the integrated circuit 1A, and the electronic component is buried in the electrical insulating resin 3. A circuit pattern is formed on the substrate, and an electronic component is mounted on the circuit pattern, which makes it possible to significantly reduce the thickness as compared with a conventional electronic component built-in substrate covered with a sealing resin. .

以下、本発明の実施例を図面に基づいて詳細に説明する。
図5は、本発明のさらに好ましい実施態様にかかる半導体装置の実装構造模式図である。
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 5 is a schematic diagram of a mounting structure of a semiconductor device according to a further preferred embodiment of the present invention.

本実施の形態2の半導体装置は、図5に示されるように、実施例1の方法で製造された半導体装置において集積回路1がフリップチップボンデイングされている電極面と反対側面の配線パターンに接する電気絶縁樹脂3は、電気絶縁樹脂3厚みを導電バンプ2A高さにし、かつ、電気絶縁樹脂3材を加熱により溶融可能な樹脂で構成しておく。まず、実施例1の方法で製造された半導体装置において集積回路1がフリップチップボンデイングされている電極面と反対側面の配線パターンに電子部品である集積回路1Aを位置決めされた所定の電極と対向させる。ここに、電子部品の端子は、電極との間にある電気絶縁樹脂3材を介して接合するわけで、接合部電極上にある電気絶縁樹脂3材を一部排除する必要がある。実施例1と同様に集積回路1がフリップチップボンデイングされる時に熱により所定の電極上にある加熱により溶融可能な樹脂で構成されている電気絶縁樹脂3材を軟化させ、次に荷重を印加しながら電気絶縁樹脂3材を一部排除できる。さらに、超音波を印加しながら荷重をかけるため、バンプとプリント配線板電極部間に局所的に介在している溶融可能な樹脂を完全に排除し、かつ、露出した半導体装置の接合部および基板の接合電極部表面にある1μm〜2μmの凹凸が無くなり電極接続部金属の真面が現れ、金属の原子同士が直接接合することにより、導電性バンプ2Aと接触または、接合する。   As shown in FIG. 5, the semiconductor device of the second embodiment is in contact with the wiring pattern on the side surface opposite to the electrode surface on which the integrated circuit 1 is flip-chip bonded in the semiconductor device manufactured by the method of the first embodiment. The electrical insulating resin 3 is made of a resin that can be melted by heating, with the thickness of the electrical insulating resin 3 set to the height of the conductive bump 2A. First, in the semiconductor device manufactured by the method of the first embodiment, the integrated circuit 1A, which is an electronic component, is opposed to a predetermined predetermined electrode on the wiring pattern opposite to the electrode surface on which the integrated circuit 1 is flip-chip bonded. . Here, the terminal of the electronic component is joined via the electrically insulating resin 3 material between the electrodes, and it is necessary to partially exclude the electrically insulating resin 3 material on the joint electrode. As in the first embodiment, when the integrated circuit 1 is flip-chip bonded, the electrically insulating resin 3 composed of a resin that can be melted by heating on a predetermined electrode is softened by heat, and then a load is applied. However, a part of the three electrically insulating resins can be eliminated. Further, since the load is applied while applying ultrasonic waves, the meltable resin locally interposed between the bump and the printed wiring board electrode portion is completely eliminated, and the exposed joint portion and substrate of the semiconductor device are removed. The unevenness of 1 μm to 2 μm on the surface of the bonding electrode portion disappears and the true surface of the electrode connecting portion metal appears, and metal atoms directly contact with each other, thereby contacting or bonding to the conductive bump 2A.

本実施態様においては電気絶縁樹脂3材として、熱可塑性樹脂が用いられる。これによって、半導体装置の薄型化が実現される。本実施態様によれば、半導体装置は、集積回路1Aを内蔵した電気絶縁樹脂3と、金属配線パターン4とによって構成されており、電気絶縁樹脂3に電子部品が埋没しているから、基板上に、回路パターンが形成され、回路パターン上に、電子部品が搭載されて、封止樹脂によって被覆された従来の電子部品内蔵基板に比して、大幅に薄型化することが可能になる。   In this embodiment, a thermoplastic resin is used as the electrically insulating resin 3 material. As a result, the semiconductor device can be thinned. According to this embodiment, the semiconductor device is configured by the electrically insulating resin 3 incorporating the integrated circuit 1A and the metal wiring pattern 4, and the electronic component is buried in the electrically insulating resin 3, so that In addition, a circuit pattern is formed, and an electronic component is mounted on the circuit pattern, so that the thickness can be significantly reduced as compared with a conventional electronic component built-in substrate covered with a sealing resin.

さらに、本実施態様によれば、電気絶縁樹脂3に熱及び荷重及び超音波振動により、電子部品が埋没させ、回路パターン電極と電気的に接合及び接触させることによって、半導体装置を製造することができるから、簡易な工程で、実装密度の高い半導体装置を製造することが可能になる。また、両面実装基板や多層実装基板に必ず必要となるスルホールを予め製造する必要が無くなり、非常に安価な両面及び多層実装基板を製造できる。
さらに、本実施態様によれば、電子部品が電気絶縁樹脂に埋没し、回路パターン電極と電気的に接合及び接触させることによって、半導体装置を製造することができるから、アンダーフィル封止工程が不要で、接続信頼性の高い半導体装置を製造することが可能になる。
Furthermore, according to this embodiment, the semiconductor device can be manufactured by causing the electronic component to be buried in the electrically insulating resin 3 by heat, load, and ultrasonic vibration, and to be electrically connected and contacted with the circuit pattern electrode. Therefore, it is possible to manufacture a semiconductor device with a high mounting density by a simple process. Further, it is not necessary to manufacture through holes that are necessary for a double-sided mounting board or a multilayer mounting board in advance, and a very inexpensive double-sided and multilayer mounting board can be manufactured.
Furthermore, according to the present embodiment, an electronic component is buried in an electrically insulating resin, and a semiconductor device can be manufactured by electrically joining and contacting a circuit pattern electrode, so that an underfill sealing step is not required. Thus, a semiconductor device with high connection reliability can be manufactured.

さらに、本実施態様によれば、電子部品が電気絶縁樹脂に埋没し、回路パターン電極裏面と電気的に接合及び接触させることによって、半導体装置を製造することができるから、電気絶縁樹脂に加熱により溶融可能な熱硬化樹脂を用いれば、電気的接続が得られた後に樹脂が硬化し始めるため、硬化時の収縮により接触接合の効果も得ることができる。   Furthermore, according to this embodiment, since the electronic component is buried in the electrical insulating resin and electrically joined and brought into contact with the back surface of the circuit pattern electrode, the semiconductor device can be manufactured. If a thermosetting resin that can be melted is used, the resin begins to harden after electrical connection is obtained, so that the effect of contact bonding can also be obtained by shrinkage during curing.

以下、本発明の実施例を図面に基づいて詳細に説明する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

図6に示されるように、まず、金属配線パターン4上に電気絶縁レジスト6を形成した基板に、電子部品である集積回路1を位置決めされた所定の基板電極部と対向させる。ここに、電子部品は、基板の電気絶縁レジストで被覆された電極と接合するわけで、接合部電極上にある電気絶縁レジストを一部排除する必要がある。   As shown in FIG. 6, first, an integrated circuit 1 that is an electronic component is opposed to a predetermined substrate electrode portion that is positioned on a substrate on which an electrically insulating resist 6 is formed on a metal wiring pattern 4. Here, the electronic component is bonded to the electrode covered with the electric insulating resist on the substrate, and it is necessary to partially remove the electric insulating resist on the bonding portion electrode.

本実施態様によれば、電気絶縁レジスト3に熱及び荷重及び、周波数40KHz〜60KHzで振幅3μm〜5μmの超音波を0.1sec〜0.5sec印加することにより、集積回路1のバンプが電気絶縁樹脂を一部排除し、金属電極部を露出させ、さらに露出した半導体装置の接合部および基板の接合電極部表面にある1μm〜2μmの凹凸が無くなり電極接続部金属の真面が現れ、金属の原子同士が直接接合することにより、金属配線パターン電極と電気的に接合及び接触させることによって、半導体装置を製造することができるから、簡易な工程で半導体装置を製造することが可能になる。   According to this embodiment, the bumps of the integrated circuit 1 are made of electrically insulating resin by applying heat and load to the electrically insulating resist 3 and ultrasonic waves having a frequency of 40 kHz to 60 kHz and an amplitude of 3 μm to 5 μm for 0.1 seconds to 0.5 seconds. The metal electrode part is partly removed, and the exposed surface of the bonding part of the semiconductor device and the surface of the bonding electrode part of the substrate is eliminated. By directly bonding, the semiconductor device can be manufactured by electrically bonding and contacting the metal wiring pattern electrode. Therefore, the semiconductor device can be manufactured by a simple process.

これによって、半導体装置の製造工程が簡略化できる。本実施態様によれば、半導体装置を構成している基板上に回路パターンが形成された後、回路パターン上に腐食防止及び保護用にソルダーレジストを一括塗布できるため、電極部を除く配線部分に選択的に塗布する工程と比して、大幅に製造工程が簡略化でき低コストで製造可能になる。   Thereby, the manufacturing process of the semiconductor device can be simplified. According to the present embodiment, after the circuit pattern is formed on the substrate constituting the semiconductor device, the solder resist can be collectively applied on the circuit pattern for corrosion prevention and protection. Compared with the process of selectively applying, the manufacturing process can be greatly simplified and the manufacturing can be performed at low cost.

さらに、本実施態様によれば、回路パターンの金属が、銅、アルミニウム、銀、金、白金およびパラジウムからなる群より選ばれる金属によって構成されている場合においても回路パターン形成後、直ちにソルダーレジストを全面塗布するため金属表面の清浄度が非常に高い値で保たれるため、電極部を露出する選択塗布に比して後工程での電子部品実装の接合強度が高く、しかも長期耐久試験における信頼性テスト評価結果も良好である。   Furthermore, according to this embodiment, even when the metal of the circuit pattern is composed of a metal selected from the group consisting of copper, aluminum, silver, gold, platinum, and palladium, the solder resist is immediately formed after the circuit pattern is formed. Since the entire surface is applied, the cleanliness of the metal surface is kept at a very high value, so that the bonding strength of the electronic component mounting in the subsequent process is higher than the selective application that exposes the electrode part, and the reliability in the long-term durability test The result of the sex test is also good.

以上、本発明の実施形態及び実施例を図面に沿って説明した。本発明が対象とする半導体装置は、電気絶縁樹脂でコーティングしてある電極に対し、熱及び荷重及び超音波振動を印加して、電極上にある電気絶縁樹脂を一部排除し電子部品の端子と基板を接合または接触させ、かつ、接合部をアンダーフィル封止または電子部品封止ができる半導体装置製造方法である。   The embodiments and examples of the present invention have been described with reference to the drawings. A semiconductor device to which the present invention is applied is a terminal of an electronic component in which heat, load and ultrasonic vibration are applied to an electrode coated with an electrically insulating resin to partially remove the electrically insulating resin on the electrode. And a substrate are bonded or brought into contact with each other, and a bonding portion can be underfill sealed or electronic component sealed.

また、接合または接触方式が、Au-Al、Au-Sn、In-Auによる合金接続の場合、Au-Au、Al-Al、Cu-Cuによる圧着接続の場合、ACF、ACP、NCP、NCFによる圧接接続の場合及びはんだによる溶融接続の場合、全ての接続方法において本発明を限定する要素にはならない。   In addition, when the bonding or contact method is alloy connection by Au-Al, Au-Sn, In-Au, by crimp connection by Au-Au, Al-Al, Cu-Cu, by ACF, ACP, NCP, NCF In the case of the pressure connection and the fusion connection by solder, the present invention is not limited to all connection methods.

また、接合または接触方式において、電子部品と基板の接続時に介在する樹脂が半熱硬化性、熱硬化性又はUV硬化性のものであるか、非導電性ものであるか、導電性のものであるか、その導電粒子の寸法および材質、その粒子組成が金属、金属メッキされた樹脂又は金属粒子、絶縁被覆された金属メッキ樹脂又は金属粒子であるかなどは、本発明を限定する要素にはならない。   In addition, in the bonding or contact method, the resin interposed when the electronic component is connected to the substrate is semi-thermosetting, thermosetting or UV curable, non-conductive, or conductive. Whether the size and material of the conductive particles, the particle composition is a metal, a metal-plated resin or metal particle, an insulating-coated metal-plated resin or metal particle, and the like are factors that limit the present invention. Don't be.

本発明は、電気電子装置に用いられる基板にフリップチップボンデイング実装するに好適なる半導体装置に利用可能である。   The present invention can be used in a semiconductor device suitable for flip chip bonding mounting on a substrate used in an electric / electronic device.

本発明の一実施形態に係る半導体装置の製造方法を示す製造工程図である。It is a manufacturing process figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. 従来例に係る半導体装置の製造方法を示す製造工程図である。It is a manufacturing process figure which shows the manufacturing method of the semiconductor device which concerns on a prior art example. 本発明の実施形態に係る、集積回路を電気絶縁樹脂で被覆された金属配線パターンが形成された基板へ対向配置し、電気絶縁樹脂を排除し、金属配線パターン電極と接合した後の断面図である。FIG. 6 is a cross-sectional view after the integrated circuit according to the embodiment of the present invention is disposed opposite to a substrate on which a metal wiring pattern coated with an electrical insulating resin is formed, the electrical insulating resin is excluded, and the metal wiring pattern electrode is joined. is there. 本発明の実施形態に係る集積回路と金属配線パターンが形成された基板とを対向させた後、集積回路をフリップチップボンデイング装置ヘッドで吸着し、導電バンプと配線とを位置合わせした時の半導体装置製造方法を示す断面図である。The semiconductor device when the integrated circuit according to the embodiment of the present invention and the substrate on which the metal wiring pattern is formed are opposed to each other, and the integrated circuit is sucked by a flip chip bonding apparatus head, and the conductive bump and the wiring are aligned. It is sectional drawing which shows a manufacturing method. 本発明の実施形態に係る集積回路を図1で示した製造方法で接合した半導体装置の基板へ図1で集積回路が実装されている電極の裏面に集積回路を実装した両面実装を示す断面図である。Sectional drawing which shows the double-sided mounting which mounted the integrated circuit on the back surface of the electrode in which the integrated circuit was mounted in FIG. 1 to the board | substrate of the semiconductor device which joined the integrated circuit which concerns on embodiment of this invention with the manufacturing method shown in FIG. It is. 本発明の実施形態に係る、集積回路を金属配線パターンが形成された基板へ金属配線パターン電極のある面と反対方向から接合した後の断面図である。It is sectional drawing after joining the integrated circuit based on embodiment of this invention to the board | substrate with which the metal wiring pattern was formed from the direction opposite to the surface with a metal wiring pattern electrode.

符号の説明Explanation of symbols

1,1A 集積回路
2,2A 導電性バンプ
3 電気絶縁樹脂
4 金属配線パターン
5 フリップチップボンデイング装置ヘッド
6 電気絶縁レジスト
DESCRIPTION OF SYMBOLS 1,1A Integrated circuit 2,2A Conductive bump 3 Electrical insulation resin 4 Metal wiring pattern 5 Flip chip bonding apparatus head 6 Electrical insulation resist

Claims (13)

外部接続電極を有する電子部品と、前記電子部品の外部接続電極が埋設可能な厚みを有し、その所定位置にその厚み方向と垂直に沿って電気絶縁樹脂で被覆された金属箔が形成された基板を、前記電子部品の外部接続電極形成面を下側にしかつ前記外部接続電極形成面が前記基板の所定位置に前記電気絶縁樹脂で被覆された金属箔と対向配置する工程と、
前記金属箔に加熱及び加圧及び超音波を印加する工程と、
前記電気絶縁樹脂を排除し、接続用の金属箔面を露出させる工程と、
前記外部接続電極と前記金属箔が接触し電気導通させる工程と、からなる半導体装置の製造方法。
An electronic component having an external connection electrode, and a metal foil having a thickness capable of embedding the external connection electrode of the electronic component and coated with an electrically insulating resin along a direction perpendicular to the thickness direction are formed at a predetermined position. Placing the substrate with the external connection electrode formation surface of the electronic component facing down and the external connection electrode formation surface facing the metal foil coated with the electrically insulating resin at a predetermined position of the substrate;
Applying heat, pressure and ultrasonic waves to the metal foil;
Removing the electrical insulating resin and exposing a metal foil surface for connection;
And a step of bringing the external connection electrode and the metal foil into contact with each other for electrical conduction.
外部接続電極を有する電子部品と、前記電子部品の外部接続電極が埋設可能な厚みを有し、その所定位置にその厚み方向と垂直に沿って電気絶縁樹脂で被覆された金属箔が形成された基板を、前記電子部品の外部接続電極形成面を下側にしかつ前記外部接続電極形成面が前記基板の所定位置に前記電気絶縁樹脂で被覆された金属箔と対向配置する工程と、
前記金属箔に加熱及び加圧及び超音波を印加する工程と、
前記電気絶縁樹脂を排除し、接続用の金属箔面を露出させる工程と、
前記外部接続電極と前記金属箔が金属間接合し電気導通させる工程と、からなる半導体装置の製造方法。
An electronic component having an external connection electrode, and a metal foil having a thickness capable of embedding the external connection electrode of the electronic component and coated with an electrically insulating resin along a direction perpendicular to the thickness direction are formed at a predetermined position. Placing the substrate with the external connection electrode formation surface of the electronic component facing down and the external connection electrode formation surface facing the metal foil coated with the electrically insulating resin at a predetermined position of the substrate;
Applying heat, pressure and ultrasonic waves to the metal foil;
Removing the electrical insulating resin and exposing a metal foil surface for connection;
A method of manufacturing a semiconductor device comprising: a step of electrically connecting the external connection electrode and the metal foil to each other by metal bonding.
外部接続電極を有する電子部品と、前記電子部品の外部接続電極が埋設可能な厚みを有し、その所定位置にその厚み方向と垂直に沿って加熱により溶融可能な熱硬化電気絶縁樹脂で被覆された金属箔が形成された基板を、前記電子部品の外部接続電極形成面を下側にしかつ前記外部接続電極形成面が前記基板の所定位置に前記加熱により溶融可能な熱硬化電気絶縁樹脂で被覆された金属箔と対向配置する工程と、
前記加熱により前記金属箔に加熱及び加圧を印加する工程と、
前記加熱により前記熱硬化電気絶縁樹脂を硬化温度以下で加熱して溶融させ、接続用の金属箔面を露出させる工程と、
前記外部接続電極と前記金属箔が接触し電気導通させる工程と、
前記外部接続電極と前記金属箔が接触し電気導通した状態で、前記加熱により前記熱硬化電気絶縁樹脂を硬化温度で加熱して硬化させる工程と、からなる半導体装置の製造方法。
An electronic component having an external connection electrode and a thickness capable of embedding the external connection electrode of the electronic component are covered with a thermosetting electrical insulating resin that can be melted by heating along a direction perpendicular to the thickness direction at a predetermined position. The substrate on which the metal foil is formed is coated with a thermosetting electrical insulating resin which can be melted by heating at a predetermined position of the substrate with the external connection electrode forming surface of the electronic component facing down. A step of disposing the metal foil opposite to the metal foil,
Applying heat and pressure to the metal foil by the heating;
Heating and melting the thermosetting electrical insulating resin at a temperature equal to or lower than the curing temperature to expose the metal foil surface for connection;
A step of bringing the external connection electrode and the metal foil into contact with each other for electrical conduction;
A method of manufacturing a semiconductor device comprising: a step of heating and curing the thermosetting electrical insulating resin at a curing temperature by the heating in a state where the external connection electrode and the metal foil are in electrical contact with each other.
前記溶融可能な熱硬化電気絶縁樹脂として、無機絶縁フィラーと熱硬化樹脂との混合物からなる樹脂で被覆し、前記熱硬化電気絶縁樹脂を硬化温度以下で加熱して溶融させた状態で、前記電子部品を押し込むことを特徴とする請求項3に記載の半導体装置の製造方法。   The meltable thermosetting electrical insulating resin is coated with a resin composed of a mixture of an inorganic insulating filler and a thermosetting resin, and the thermosetting electrical insulating resin is melted by heating at a curing temperature or lower. 4. The method of manufacturing a semiconductor device according to claim 3, wherein a part is pushed in. 前記電子部品として、その外部接続電極に導電性突起物を有するものを用意する、
ことを特徴とする請求項1から3のいずれか一項に記載の半導体装置の製造方法。
As the electronic component, prepare an external connection electrode having a conductive protrusion,
The method for manufacturing a semiconductor device according to claim 1, wherein:
前記電子部品を前記電気絶縁樹脂に埋め込む際に、この電子部品の外部接続電極の間に導電粒子を介装することで前記基板厚み方向と垂直にある金属箔を電気的に接続することを特徴とする請求項1から3のいずれか一項に記載の半導体装置の製造方法。   When embedding the electronic component in the electrical insulating resin, a metal foil perpendicular to the substrate thickness direction is electrically connected by interposing conductive particles between external connection electrodes of the electronic component. A method for manufacturing a semiconductor device according to any one of claims 1 to 3. 前記電子部品を前記電気絶縁樹脂に埋め込む際に、この電子部品の外部接続電極の間に異方性導電膜を介在することで前記基板厚み方向と垂直にある金属箔を電気的に接続することを特徴とする請求項1から3のいずれか一項に記載の半導体装置の製造方法。   When embedding the electronic component in the electrical insulating resin, an anisotropic conductive film is interposed between the external connection electrodes of the electronic component to electrically connect the metal foil perpendicular to the substrate thickness direction. The method for manufacturing a semiconductor device according to claim 1, wherein: 前記電子部品を前記電気絶縁樹脂に埋め込む際に、この電子部品の外部接続電極の間に異方性導電ペーストを介装することで前記基板厚み方向と垂直にある金属箔を電気的に接続することを特徴とする請求項1から3のいずれか一項に記載の半導体装置の製造方法。   When embedding the electronic component in the electrical insulating resin, an anisotropic conductive paste is interposed between the external connection electrodes of the electronic component to electrically connect the metal foil perpendicular to the substrate thickness direction. The method for manufacturing a semiconductor device according to claim 1, wherein: 前記複数の電子部品を前記電気絶縁樹脂に埋め込む際に、これら電子部品の外部接続電極の間に導電粒子を介装することで前記基板厚み方向に隣接する前記電子部品を電気的に接続することを特徴とする請求項1から3のいずれか一項に記載の半導体装置の製造方法。   When embedding the plurality of electronic components in the electrically insulating resin, electrically connecting the electronic components adjacent in the substrate thickness direction by interposing conductive particles between external connection electrodes of the electronic components. The method for manufacturing a semiconductor device according to claim 1, wherein: 前記複数の電子部品を前記電気絶縁樹脂に埋め込む際に、これら電子部品の外部接続電極の間に異方性導電膜を介在することで前記基板厚み方向に隣接する前記電子部品を電気的に接続することを特徴とする請求項1から3のいずれか一項に記載の半導体装置の製造方法。   When embedding the plurality of electronic components in the electrical insulating resin, an anisotropic conductive film is interposed between external connection electrodes of the electronic components to electrically connect the electronic components adjacent in the substrate thickness direction. The method for manufacturing a semiconductor device according to claim 1, wherein: 前記複数の電子部品を前記電気絶縁樹脂に埋め込む際に、これら電子部品の外部接続電極の間に異方性導電ペーストを介装することで前記基板厚み方向に隣接する前記電子部品を電気的に接続することを特徴とする請求項1から3のいずれか一項に記載の半導体装置の製造方法。   When embedding the plurality of electronic components in the electrical insulating resin, an anisotropic conductive paste is interposed between the external connection electrodes of the electronic components to electrically connect the electronic components adjacent to the substrate thickness direction. The method for manufacturing a semiconductor device according to claim 1, wherein the connection is performed. 外部接続電極を有する電子部品と、前記電子部品の外部接続電極の所定位置に前記電子部品の外部接続電極の厚み方向と垂直に沿って金属箔が形成された電気絶縁レジストを用意する工程と、前記電子部品を、外部接続電極形成面を下側にしかつ外部接続電極形成面が前記電気絶縁レジストの所定位置の前記金属泊裏面と対向配置する工程と、
前記電気絶縁レジストの前記金属箔に接触するまで前記電気絶縁レジストに加熱加圧超音波を印加して排除する工程と、
前記外部接続電極と前記金属箔が電気導通する工程と、
を含むことを特徴とする半導体装置の製造方法。
Preparing an electronic component having an external connection electrode, and an electrical insulation resist in which a metal foil is formed in a predetermined position of the external connection electrode of the electronic component along the thickness direction of the external connection electrode of the electronic component; Placing the electronic component with the external connection electrode forming surface facing down and the external connection electrode forming surface facing the metal night surface at a predetermined position of the electrical insulating resist;
Applying and eliminating heat and pressure ultrasonic waves to the electrical insulation resist until it contacts the metal foil of the electrical insulation resist; and
The electrical connection between the external connection electrode and the metal foil;
A method for manufacturing a semiconductor device, comprising:
金属配線パターンを有する基板の一方の面に形成された電気絶縁レジストまたは電気絶縁樹脂の上面に、電子部品のバンプ電極を載置する工程と、
前記バンプ電極と、前記電気絶縁レジストまたは前記電気絶縁樹脂との接触部分を加熱し、かつ前記電子部品と前記基板の厚み方向に加圧及び超音波印加をする工程と、
前記超音波印加により、前記電気絶縁レジストまたは前記電気絶縁樹脂の前記バンプ電極が接する部分を排除する工程と、
前記バンプ電極と前記金属配線を接触させる工程と、
を有する半導体装置の製造方法。
Placing a bump electrode of an electronic component on an upper surface of an electrically insulating resist or an electrically insulating resin formed on one surface of a substrate having a metal wiring pattern;
Heating the contact portion between the bump electrode and the electrically insulating resist or the electrically insulating resin, and applying pressure and ultrasonic waves in the thickness direction of the electronic component and the substrate;
Removing the portion of the electrically insulating resist or the electrically insulating resin that is in contact with the bump electrode by applying the ultrasonic wave;
Contacting the bump electrode with the metal wiring;
A method for manufacturing a semiconductor device comprising:
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