JP2005050997A - Semiconductor element isolation method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of effectively isolating semiconductor element formed on a wafer. <P>SOLUTION: The predetermined groove is etched with the dry etching method at the scribe after formation of a circuit. Thereafter, a supporting substrate is adhered to the wafer surface, and the rear surface of wafer is ground up to the depth to which the crack generated by the grinding does not reach the groove. Thereafter, the groove of the scribe is allowed to reach the rear surface by etching the rear surface of wafer with the dry etching method. Accordingly, individual semiconductor elements may be isolated and then transferred to a dicing tape. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor element separation method for separating a wafer on which a plurality of semiconductor circuits are formed into individual semiconductor elements.

  As electronic devices become smaller and thinner, there is an increasing demand for further thinning of semiconductor elements used in electronic devices. In addition, development of a stacked semiconductor device in which a plurality of semiconductor elements are stacked and accommodated in a single package has been promoted, and uses of thinned semiconductor elements are widespread. A conventional semiconductor element has a thickness of about 200 to 400 μm, but recently, a semiconductor element having a thickness of 50 μm or less has been produced.

  Generally, a semiconductor device forms a plurality of circuits on a wafer. A wafer having a semiconductor element formed on the circuit forming surface is first subjected to a back grinding process. In back grinding, the thickness of the wafer is reduced by grinding the back surface opposite to the circuit forming surface of the wafer. After the wafer has a predetermined thickness, the wafer is subjected to a dicing process and separated into individual semiconductor elements having a predetermined size.

  In the dicing process, the wafer is cut and separated into individual semiconductor elements by moving a diamond blade containing diamond abrasive grains rotating at high speed along the scribe line of the wafer, which is a cutting groove.

Further, in Patent Document 1, a so-called tip dicing method is used to preliminarily perform a bottomed grooving step on the surface of the wafer in advance, and then attach the wafer to a tape and grind the back surface of the wafer to obtain the groove and It discloses that elements are separated by communicating with the back surface.
JP-A-5-335411

  In general, back grinding is used to grind a semiconductor substrate into a thin film. Back grinding grinds a semiconductor substrate precisely and at high speed by pressing a grinding wheel that rotates at high speed perpendicularly to the semiconductor substrate.

  Fine cracks are formed on the back surface of the wafer ground by back grinding. If the crack is left as it is, there is a problem that the semiconductor element may be cracked starting from the crack. This problem becomes more prominent as the semiconductor element becomes thinner. For this reason, it is necessary to remove cracks generated on the back surface of the wafer after back grinding.

  Back grinding is an effective technique when a single brittle material such as a semiconductor substrate is ground, but when grinding a metal material, the grindstone is likely to be clogged. For this reason, when grinding a semiconductor substrate having a metal electrode hole penetrating into the semiconductor element, there is a case of using lapping instead of back grinding. Lapping is a technique for polishing while applying polishing powder to a semiconductor substrate. However, since dust is generated by the polishing powder, there is a risk of contamination of the clean room, and it is difficult to remove the polishing powder that has entered the metal hole. There's a problem.

  When a wafer is cut by a dicing method, a portion of the wafer corresponding to the thickness of the dicing blade is scraped off by the dicing blade, so-called kerf loss occurs. Therefore, this portion of the wafer cannot be used as a region for forming a semiconductor element.

  In addition, in the dicing method, there is a possibility that minute cracks or chipping may occur around the portion scraped by the dicing blade, or excessive stress may be generated. A semiconductor circuit cannot be formed in this region.

  When the width of the kerf loss and the width of the forbidden area are combined, an invalid area of about 200 to 300 μm at maximum is generated in one dicing line. Since the invalid area is constant regardless of the area of the semiconductor element, the area ratio of the invalid area on the wafer increases as the area of the semiconductor element decreases.

  The present invention has been made to solve the above-described problems, and has as its main object to provide a semiconductor element isolation method capable of efficiently thinning and isolating semiconductor elements formed on a wafer. .

  In the element isolation method of the present invention, grooved etching is performed on a predetermined scribe portion on the surface side of the substrate in advance by dry etching on the scribe portion before the back surface grinding step. After that, a support substrate is attached to the front surface of the wafer, and after grinding the back surface of the wafer to a depth at which cracks caused by grinding do not reach the grooved portion, the grooved surface of the scribe portion is made backside by etching the back surface of the wafer by dry etching. Communicate. As a result, the semiconductor elements are separated into individual elements, and cracks generated during grinding are removed. Thereafter, the individual semiconductor elements on the support substrate are transferred (replaced) to the dicing tape, thereby fixing the thinned semiconductor elements having low processing strength onto the dicing tape without directly holding them.

  According to the present invention, in most processes for separating the semiconductor elements formed on the wafer into individual semiconductor elements to be thinned, damage due to handling can be prevented by utilizing the support substrate, and the back surface can be prevented. The film can be made thin without being affected by fine cracks generated in the grind. Further, the usable area of the wafer can be increased by greatly reducing the area of the ineffective area without generating chipping or excessive stress caused by dicing.

  Next, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
1 and 2 are diagrams showing a process of isolating a semiconductor element by the semiconductor element isolation method according to the first embodiment of the present invention.

  First, as shown in FIG. 1A, a resist mask 4 is formed on a scribe portion on the surface of a wafer 2 on which a plurality of semiconductor elements are formed. Next, only the scribe portion is etched to a predetermined depth by dry etching. The predetermined depth is the thickness of the semiconductor element (for example, about 50 μm) (FIG. 1B).

  The etched wafer 2 is removed from the wafer surface by an ashing process for removing the resist, and a scribe groove 6 is formed in the scribe portion (FIG. 1C).

  The wafer 2 after the scribe groove 6 is formed is affixed to the support substrate 8 using a tape coated with wax or a heat release adhesive. For the support substrate 8, it is necessary to select a substrate whose surface is polished smoothly in order to protect the wafer from cracking in the subsequent steps (FIG. 1 (d)).

  The wafer 2 is subjected to a back grinding process, and is ground to a predetermined thickness as shown in FIG. The predetermined thickness referred to here is a thickness that does not reach the scribe groove portion in which minute cracks generated by back grinding are already formed. For example, when the thickness of the semiconductor element is 50 μm, in the back grinding process, the thickness of the wafer 2 is set to about 70 μm and the remaining 20 μm is removed by the next dry etching. This etching is called backside etching. In the back side etching, the back surface of the wafer 2 is collectively etched without a mask. As a result, when the wafer 2 has a predetermined thickness, the scribe groove is also automatically exposed from the back surface, and the semiconductor elements are separated into individual elements (FIG. 2 (f)).

  The wafer 2 separated into individual elements by backside etching is attached to the dicing tape 10 (FIG. 2 (g)).

  After pasting, the support substrate and the wafer 2 are heated. By heating, the WAX between the support substrate and the wafer is melted, or if it is a thermal release tape, the support substrate 8 can be separated without damaging the semiconductor element 12 by self-peeling (see FIG. 2 (h)).

  When the adhesive used when affixing to the dicing tape 10 is an ultraviolet curable adhesive, the adhesive is cured by irradiating with ultraviolet rays (UV) before the semiconductor element 12 is peeled off, and the semiconductor element is peeled off. (Fig. 2 (i)).

(Embodiment 2)
3 and 4 are diagrams showing a process of isolating a semiconductor element by the semiconductor element isolation method according to the second embodiment of the present invention.

(Configuration of Embodiment 2)
In the semiconductor element isolation method according to the second embodiment of the present invention, in the semiconductor element isolation method according to the first embodiment described above, when the semiconductor substrate on which the semiconductor element having the penetrating metal hole is formed is isolated, In the attaching process, a dry etching having selectivity between an ultraviolet self-peeling adhesive, a transparent support substrate and a metal is employed.

  As shown in FIG. 3A, a resist mask 4 is formed on a scribe portion on the surface of the wafer 2 on which a plurality of semiconductor elements in which the through-electrode holes 14 have been previously formed are formed. Next, only the scribe portion is etched to a predetermined depth by dry etching. The predetermined depth is the same thickness as the through-electrode hole (for example, about 50 μm) (FIG. 3B).

  The etched wafer 2 is removed from the wafer surface by an ashing process for removing the resist, and a scribe groove 6 is formed in the scribe portion (FIG. 3C).

  After the scribe groove forming step shown in FIG. 3C is completed, the wafer 2 is attached using a tape in which an ultraviolet self-peeling adhesive material is applied to the support substrate 8. The supporting substrate used at this time is a material that transmits ultraviolet rays, such as sapphire, quartz glass, and hardened glass, and it is necessary to select a substrate whose surface is polished smoothly in order to protect the cracking of the wafer in the subsequent steps. (FIG. 3 (d)).

  The wafer 2 is subjected to a back grinding process, and is ground to a predetermined thickness as shown in FIG. The predetermined thickness referred to here is a thickness that does not reach the scribe groove portion and the through metal electrode hole in which minute cracks generated by back grinding have already been formed. For example, when the thickness of the semiconductor element and the thickness of the metal electrode hole are 50 μm, in the back grinding process, the thickness of the wafer 2 is set to about 70 μm, and the remaining 20 μm is removed by the next dry etching. This etching is called backside etching (FIG. 3E).

  The wafer after the back grinding is then subjected to back side etching, in which the back surface is collectively etched by dry etching in order to remove the microcracks generated by the back grinding and simultaneously expose the through metal electrode holes. In this dry etching, the wafer and the electrode material constituting the through electrode hole can be selectively etched to maintain the shape of the through electrode hole 14 while maintaining the shape of the through electrode hole 14. As a result, the scribe groove is also automatically exposed from the back surface, and the semiconductor element is separated into individual elements (FIG. 4F).

  In order to improve the electrical conductivity of the exposed metal electrode hole of each semiconductor element, the metal layer 16 is formed by sputtering or vapor deposition (FIG. 4G).

  After the process of attaching to the dicing tape 10 shown in FIG. 4 (h) is completed, the adhesive strength of the tape that has fixed the support substrate and the wafer is reduced by irradiating the wafer 2 with ultraviolet rays from the support substrate side. Then, the semiconductor element 12 can be separated from the supporting substrate without being damaged by self-peeling (FIG. 4I).

  Note that the same effect can be expected even when the tape using the heat-peeling adhesive material shown in the first embodiment is used as a material for fixing the wafer 2 and the support substrate.

  When the adhesive used when affixing to the dicing tape 10 is an ultraviolet curable adhesive, the adhesive is cured by irradiating with ultraviolet rays (UV) before the semiconductor element 12 is peeled off, and the semiconductor element is peeled off. Make it easy to do.

  The semiconductor element separation method according to the present invention is useful for efficiently thinning and separating semiconductor elements formed on a semiconductor wafer.

Process drawing of the semiconductor element isolation | separation method by Embodiment 1 of this invention Process drawing of the semiconductor element isolation | separation method by Embodiment 1 of this invention Process drawing of the semiconductor element isolation | separation method by Embodiment 2 of this invention Process drawing of the semiconductor element isolation | separation method by Embodiment 2 of this invention

Explanation of symbols

2 Wafer 4 Resist Mask 6 Scribe Groove 8 Support Substrate 10 Dicing Tape 12 Semiconductor Element 14 Through Electrode Hole

Claims (6)

A semiconductor element separation method for separating a wafer on which a semiconductor circuit is formed into individual semiconductor elements, the scribe portion of the wafer on which the semiconductor circuit is formed is etched to a predetermined depth by a dry etching method, and then the wafer surface A method for separating a semiconductor element, comprising: grinding a back surface of the wafer to a thickness at which the scribe portion is not exposed after the substrate is attached to a support substrate, and etching until the scribe portion is exposed by a dry etching method. 2. The semiconductor element isolation method according to claim 1, wherein the separated semiconductor element is attached to a tape material from the support substrate. 2. The semiconductor element isolation method according to claim 1, wherein plasma etching is used in the step of etching the back surface of the wafer to a predetermined depth. 4. The semiconductor element isolation method according to claim 3, wherein the plasma etching is dry etching which is selective to a wafer and a metal material on a circuit. 2. The semiconductor element separation method according to claim 1, wherein any one of a heat-peeling wax material, a heat-peeling adhesive material, and an ultraviolet-peeling adhesive material is used in the step of attaching the wafer to a support substrate. Element isolation method. 6. The semiconductor element isolation method according to claim 5, wherein a transparent substrate made of quartz glass, sapphire glass, or hardened glass is used as the support substrate material.

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