JP2004281667A - Method of manufacturing multilayer wiring board - Google Patents

Method of manufacturing multilayer wiring board Download PDF

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Publication number
JP2004281667A
JP2004281667A JP2003070218A JP2003070218A JP2004281667A JP 2004281667 A JP2004281667 A JP 2004281667A JP 2003070218 A JP2003070218 A JP 2003070218A JP 2003070218 A JP2003070218 A JP 2003070218A JP 2004281667 A JP2004281667 A JP 2004281667A
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Prior art keywords
conductive
metal foil
bumps
wiring board
conductive metal
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JP2003070218A
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JP3830911B2 (en
Inventor
Satoshi Nakao
敏 中尾
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Yamaichi Electronics Co Ltd
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Yamaichi Electronics Co Ltd
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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a reliable multilayer wiring board that can be made compact, and can be obtained at a low cost with a high yield. <P>SOLUTION: The method of manufacturing the multilayer wiring board comprises processes of forming projecting conductive bumps 12 for via connection on one principal plane of a conductive metal foil 10; forming a multilayer body 18 consisting of a conductive metal foil 11 and an insulation resin layer 17, both of which are formed with through-holes by laser processing at positions corresponding to the conductive bumps 12 of the conductive metal foil 10; and positioning and stacking the multilayer body 18 on the bump-formed plane of the conductive metal foil 10 via a thermoplastic insulator layer 13, with the metal foil 11 side of the multilayer body 18 facing the bump-formed plane. The method of manufacturing the multilayer wiring board also comprises processes of applying heat and pressure to the laminate in the stacking direction to make top ends of the bumps 12 pass through the thermoplastic insulator layer 13 and the multilayer body 18 to make them integral parts of these layers, and forming into a laminate by removing the insulation resin layer 17 of the multilayer body 18 to expose the conductive metal foil 11 whereon the top ends of the conductive bumps 12 are exposed and forming into a multilayer wiring board with connection terminal bumps by photo-etching the conductive metal foil 11 exposed on the laminate. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、信頼性の高い高密度配線型の多層配線板が低コストで得られる製造方法に関する。
【0002】
【従来の技術】
たとえば携帯型電話機、パーソナルコンピューター等の電子機器類の短小軽薄化などに伴って、電気回路を形成する配線板についても、高密度配線化や短小軽薄化だけでなく、回路の信頼性向上及び低コスト化などが要求されている。このような要求に対応して、配線パターンが絶縁体層を介して多層的に配置され、かつ配線パターンが層間絶縁体層を貫挿する突起状の導電体バンプで接続されたビア接続構造の多層配線板が知られている(特許文献1,2参照)。
【0003】
そして、この種の多層配線板は、図3に製造実施態様を模式的に示す。すなわち、先ず、図3(a)に示すように、たとえば厚さ18μm程度の銅箔1aを用意し、この銅箔1aの一主面に導電性組成物(たとえば銀ペースト)をスクリーン印刷して、底面径100〜300μm程度、高さ20〜50μm程度の略円錐状(突起状)の導電性バンプ2を形成する。次いで、前記バンプ2を乾燥状態化した時点で、このバンプ2に位置合わせし、再び銀ペーストをスクリーン印刷して、所要の高さに肉盛りする。ここで、導電性バンプ2の印刷形成は、導電性組成物の組成、突起状バンプ2の径及び高さ等の寸法・形状にもよるが、通常、複数回繰り返して行われる。
【0004】
上記突起状の導電性バンプ2形成後、図3(b)に示すように、バンプ2形成面に、熱可塑性絶縁体層(たとえば液晶ポリマーシート)3、厚さ18μm程度の銅箔1b及び加圧用の成形板(たとえばステンレス板)4を順次配置積層し、その積層方向に加熱加圧する。この加熱加圧によって、前記バンプ2の先端部は、液晶ポリマーシート3を貫挿して、図3(c)に示すように、銅箔1bに当接・変形して電気的な接続がなされた両面銅箔貼り板乃至シートが得られる。
【0005】
次ぎに、両面銅箔貼り板の銅箔1a,1b面に、エッチング用のドライフィルムを張りあわせ、このドライフィルムに附いて露光・現像処理を施し、マスキングを行ってエッチング処理し、図3(d)に示すように、配線パターン(1a),(1b)化する。その後、前記配線パターン(1a),(1b)化した面に、ソルダーレジスト5をスクリーン印刷法等で設ける一方、少なくとも一方の配線パターン(1a),(1b)の所要面に、図3(e)に示すように、たとえばICソケットなど実装部品の接続端子バンプ6を設ける。
【0006】
ここで、接続端子バンプ6の形設は、次のような手順で行われる。すなわち、先ず、前記ソルダーレジスト5面に、エッチング用のドライフィルムを張りあわせ、このドライフィルムについて露光、現像処理を施してマスキングを行う。次いで、ソルダーレジスト5をエッチング処理によって選択的に除去して配線パターン(1a),(1b)面を露出、開口させ、この露出、開口面に接続端子バンプ6をメッキ法によって形成する。その後、ドライフィルムを剥離除去してから、要すれば接続端子バンプ6面に、安定化、保護等のために金メッキなどを施し、外形加工を施して製品化している。または図3(f)のように(d)と(e)の基板を絶縁層3aを介して一括積層した図3(g)の多層基板を形成する。
【0007】
なお、この種の多層配線板の製造方法において、接続端子バンプ6の形成に当たり、対応する位置に貫通孔を予め穿設しておいた絶縁体層を積層一体化し、絶縁体層面から突出するように貫通孔内をメッキなどによって充填する手段も知られている(特許文献3参照)。
【0008】
【特許文献1】
特開平10−79579号公報(第4頁、図1)
【0009】
【特許文献2】
特開平11−112149号公報(第2頁、図1)
【0010】
【特許文献3】
特開平2001−237511号公報(第4頁、図1)
【0011】
【発明が解決しようとする課題】
上記ビア接続型の多層配線板は、配線パターン1a,1b間等の層間接続が導電性バンプ2の加圧、貫挿で行われるため、高密度配線化や製造工程の簡略化など図れると言う利点がある。すなわち、配線パターン層間の接続に当たり、各層間絶縁体層ごとのドリル加工などによる穿孔を省略できるし、また、穿孔内メッキ処理や導電性組成物の充填操作など不要となるばかりでなく、微細で信頼性の高いビア接続などを達成できる。特に、高密度配線化で望まれる微細径のビア接続においては、微小径の穿孔内に緻密で一様なメッキ層を確実に形成するが困難なこと、あるいは微小径の穿孔内に緻密に導電性組成物を充填することが困難である等の問題を容易に改善できる。
【0012】
しかしながら、量産性や信頼性の上では、なお、次のような問題が懸念される。すなわち、外表面側配線パターンに対する接続端子バンプ6をメッキ形成する場合は、上記のように緻密なメッキ肉盛りが困難であるだけでなく、一様に制御された高さの接続端子バンプ6の形成が極めて困難であるという問題がある。
【0013】
さらに、接続端子バンプ6間隔が小さく設定される場合は、隣接する接続端子バンプ6同士の電気的絶縁性を充分に確保することが難しいという問題もある。
【0014】
ここで、常時、緻密で一様な接続用バンプの形成が困難なことは、形成する回路の信頼性を損なう恐れがあるし、また、接続端子バンプ6の高さのバラツキや隣接する同士の短絡発生の恐れは、たとえばIC装置などを実装する場合、不完全な実装接続部を形成することが懸念される。そして、これら不都合な問題や懸念は、配線板自体あるいは回路部品の信頼性に係るものであるため、適用する電子機器類の高品質化の上で無視できない。
【0015】
また、配線パターン面にエッチングレジストを形成し、このエッチングレジストをマスクとして外部接続用バンプをメッキ処理で肉盛り形成することは、製造工程の複雑化、換言すると加工工程が増大して、コストアップを招来する。加えて、製造工程の複雑化や加工工程の追加は、製造歩留まりの低下を起こす恐れもあって、結果的に、量産性が損なわれることになる。
【0016】
本発明は、上記事情に対処してなされたもので、信頼性が高くて、コンパクト化等図られる信頼性の高い多層配線板を低コストで、歩留まりよく得ることができる製造方法の提供を目的とする。
【0017】
【課題を解決するための手段】
本発明は、導電性金属箔の一主面にビア接続用の突起状導電性バンプを配設する工程、前記導電性金属箔の導電性バンプに対応する位置へ貫通孔をレーザー加工で穿設した導電性金属箔及び絶縁樹脂層の複層体を形成する工程、前記導電性バンプを配設した導電性金属箔のバンプ配設面に、前記複層体の金属箔側を対向させ熱可塑性絶縁体層を介して位置決め積層する工程、前記積層体を積層方向に加熱加圧してバンプ先端部を、前記熱可塑性移絶縁体層及び複層体を貫挿一体化する工程、前記一体化させた複層体の絶縁樹脂層を除去し、導電性バンプの先端側を突出させた導電性金属箔を露出する積層板化する工程と、前記積層板の露出させた導電性金属箔をフォトエッチングして外部接続用バンプ付の多層配線板化する工程とを有することを特徴とする多層配線板の製造方法である。
【0018】
すなわち、ビア接続部を形成する導電性バンプを長め(高め)に設けておき、予めビア接続用孔を穿設しておいた配線パターン用導電性金属箔及び絶縁樹脂層の複層体とを熱可塑性絶縁体を介して積層一体化し、前記導電性バンプの先端部を配線パターン用導電性金属箔面よりも突設させて、この突出部を接続端子バンプに利用することを骨子とする多層配線板の製造方法である。
【0019】
そして、このような製造手段の採用に伴って、たとえば底面径100μm以下、高さ10μm以上の突起状バンプによって信頼性の高いビア接続が形成される。すなわち、信頼性の高い搭載接続が可能で、整形された接続端子バンプを有する多層配線板を低コストで得ることができる。さらに言及すると、ビア接続を形成する導電性バンプの径に拘わりなく、バンプの高さを任意に設定・選択して、配線パターンの高密度化、及び信頼性の高い回路化が図られる上、煩雑な工程を要せずに、高機能化及び高信頼性の実装回路装置の構成に適する形状・平坦性を呈した接続端子バンプ付きの多層配線板を歩留まりよく提供できる。
【0020】
【発明の実施の形態】
以下、図1(a)〜(e)及び図2を参照して発明の実施形態を説明する。
【0021】
この発明に係る多層配線板は、図1(e)に拡大して断面的に示すように、熱可塑性絶縁体(たとえば液晶ポリマー)を層間絶縁体13とし、配線パターン10a,11aを備える一方、層間絶縁体13を貫挿する導電性バンプ12によって、配線パターン10a,11a層間がビア接続された構成を採っている。さらに、前記ビア接続を形成する導電性バンプ12の先端部は、配線パターン11aを貫挿して突出して接続端子バンプとして機能する構成と成っている。 この構成においては、前記ビア接続を形成する導電性バンプ12の先端部が、層間絶縁体13を貫挿して配線パターン11aとの間の電気的な接続に関与するだけでなく、さらに、配線パターン11aを貫挿突出して、ICソケットなどの接続端子として利用する点で特徴付けられる。
【0022】
ここで、配線パターン10a,11aは、対応する絶縁体層13裏面の配線パターン10a面に配設した突起状の導電性バンプ12が層間絶縁体13を貫挿して配線パターン11と所要の電気的な接続が行われている。すなわち、要すれば同軸的に重ね印刷して突起状に形成された略円錐状もしくは角錐状の導電性バンプ12の先端部が、層間絶縁体3を貫挿して対向する配線パターン11aと電気的に接続した構成と成っている。また、前記配線パターン11aのうち、電子部品を搭載実装するための接続端子となる領域では、前記導電性バンプ12の先端部が配線パターン11a面から突出されている。つまり、多層配線板の加圧積層一体化の過程で、接続端子バンプを同時に形成することにより、製造工程の簡略化、低コスト化を図る一方、隣接する接続端子バンプ同士を互いに絶縁隔絶して配置し、高密度実装・配線型の回路構成を可能にしている。
【0023】
なお、導電性バンプ12は、導電性ペーストのスクリーン印刷、あるいはメッキレジストを印刷、パターニングしての選択的なメッキなどの手段で形成することも可能である。また、層間絶縁体3を形成する熱可塑性絶縁体は、たとえば厚さ25〜100μm程度の液晶ポリマー(たとえば融点335℃のBIACフィルム)、ポリエーテル系樹脂フィルム等の熱可塑性樹脂類である。より具体的には、たとえばキシダール(商品名.Dartco社製)、ベクトラ(商品名.Clanese社製)で代表される多軸配向の液晶ポリマー、ポリエーテル系ポリマーなどである。なお、液晶ポリマーとしては、ベクトランAタイプ(融点285℃)、ベクトランCタイプ(融点325℃)、BIACフィルム(融点325℃)などが市販されている。ここで、液晶ポリマーは、一般的に、吸湿性がほとんどなく、誘電率が約3.0(1MHz)で高周波特性が優れているため、高速信号伝送安定性を奏する。
【0024】
さらに、ビア接続等を構成する導電性バンプ12は、たとえば金、銀、銅、ニッケル、半田などの導電性金属粉とバインダー樹脂との混合系で構成されている。ここで、バインダー樹脂としては、たとえばポリカーボネート樹脂、ポリスルホン樹脂、ポリエステル樹脂、フェノキシ樹脂、フェノール樹脂、ポリイミド樹脂などが挙げられる。
【0025】
また、導電性バンプを形成した導電性金属箔は、たとえば銅箔、アルミニウム箔、ニッケル箔などであり、この導電性金属箔に対して後述する製造方法で組み合わせる孔あき複層体、すなわち導電性金属箔と絶縁性樹脂層との積層体は、たとえば厚さ18μm程度の銅箔などと、厚さ10μm程度の熱硬化性の樹脂層とで形成されている。ここで、複層化する熱硬化性樹脂は、貫挿突出する導電性バンプ12の先端部を機械的に保護し、変形し損傷するなど防止する役割を果たすための機械的な強度が高いこと、また、最終的に剥離もしくは溶解除去など容易に行えることが望まれる。このような熱硬化性樹脂としては、たとえばエポキシ樹脂、ポリイミド樹脂、フェノール樹脂、有機系布織布などを支持体としたフィルム類などが挙げられる。そして、この複層体に対する穿設加工は、貫挿させる導電性バンプの径もしくは接続端子バンプの大きさなどによって孔径が選択され、ドリル加工などでも行えるが、一般的には、レーザービーム加工が好ましい。
【0026】
次に、実施態様を模式的に示す図1(a)〜(e)及び図に示すフローチャートを参照して、実施例に係る多層配線板の製造方法を説明する。
【0027】
先ず、図1(a)に示すように、厚さ18μm程度の銅箔10を用意し、その一主面側に、たとえばステンレス薄鋼板の所定箇所に150μm径の孔を明けたメタルマスクを位置決め配置して導電性ペーストをスクリーン印刷し、断面略円錐状の導電性バンプ12を形成する。この導電性バンプ12が乾燥後、要すればその導電性バンプ12形成面に、繰り返し導電性ペーストをスクリーン印刷して導電性バンプ12の肉盛りを行う。ここで、導電性バンプ12の高さは、一般的に、ビア接続の形成に要する高さの1.5倍〜2倍程度でよい。
【0028】
一方、厚さ18μm程度の銅箔11を用意し、その一主面側に、厚さ25μm程度のポリイミド樹脂フィルム17を張り合わせた複層体18を用意し、この複層体18の所要の位置、つまり、ビア接続12及び接続端子16形設位置にレーザー加工によって、図1(b)に示すように、厚さ方向に貫通する所要径の貫通孔を穿設する。
【0029】
次ぎに、図1(c)に示すように、前記導電性バンプ2を形設した銅箔10aに対し、たとえば厚さ50μm程度の液晶ポリマーシート13を介して、前記複層体18の銅箔11面を対向させて積層配置し、さらに、加圧用の成形板(たとえばステンレス板)14を順次積層配置し、要すれば銅箔位置10側にも加圧用の成形板20を配置して加熱しながら積層方向に加圧する。この加熱加圧によって、導電性バンプ12の先端部は、液晶ポリマーシート13を貫挿し、さらに、複層体18の穿設孔を貫挿して、成形板14面に当接して平坦面に変形する。つまり、図1(d)に示すように、液晶ポリマーシート13及び複層体18の厚さに較べて高い導電性バンプ12の先端部が、成形板16面に加圧当接して圧潰的に平坦面し、ポリイミド樹脂フィルム17と同一面化した銅張り積層板が得られる。
【0030】
次いで、前記銅張り積層板のポリイミド樹脂フィルム17を剥離もしくは溶解除去し、露出した銅箔10a,11a面に、所謂ドライフィルムをそれぞれラミネートする。そして、このドライフィルムに対して、露光、現像処理を施してエッチングマスクを形成し、銅箔10,11を選択的にエッチング除去することによって、図1(e)に示すように、銅箔10,11は、配線パターン10a,11a化する一方、配線パターン11a面に導電性バンプ12の先端部が貫挿突出した構造の配線板が得られる。
【0031】
その後、前記配線パターン10a,11a化面、換言すると複層体17を除去した領域全体を、前記突出した導電性バンプ先端部を露出させてソルダーレジスト層を印刷形成してから、前記露出する導電性バンプ先端面に、接続端子バンプにおける常套的なメッキ処理、たとえば金メッキなど行う。こうして、配線板面の絶縁保護及び接続端子バンプの安定性付与などを行った後、常套的な手段である外形加工を施して製品化する。
【0032】
本発明は、上記実施例に限定されるものでなく、発明の主旨を逸脱しない範囲でいろいろの変形を採ることができる。たとえば配線パターン数は、3層形や4層以上の多層形でもよく、また、層間絶縁体としては、液晶ポリマー及び熱可塑性樹脂の組み合わせ、複層体の各層の厚さや材質なども用途などに応じて適宜選択できる。
【0033】
【発明の効果】
本発明によれば、突起状バンプによって信頼性の高いビア接続が形成され、かつ信頼性の高い搭載接続が可能な接続端子バンプを有する多層配線板を低コストで得ることができる。つまり、ビア接続を形成する導電性バンプの径に拘わりなく、バンプの高さを任意に設定・選択して、配線パターンの高密度化、及び信頼性の高い回路化を図れる。しかも、煩雑な工程を要せずに(工程の簡略化を図りながら)、微細で相互の絶縁離隔が容易に確保できる接続端子バンプ付けによって、高機能化及び高信頼性の実装回路装置の構成に適する多層配線板を歩留まりよく提供できる。換言すると、短小軽薄化を達成しながら、高密度配線ないし高機能化及び高信頼性の実装用多層配線板を量産的に歩留まりよく提供できる。
【図面の簡単な説明】
【図1】(a)〜(e)は実施例に係る多層配線板の製造方法の実施態様を模式的に示す断面図。
【図2】実施例に係る多層配線板の製造手順の概略を示すフローチャート図。
【図3】(a)〜(g)は従来の多層配線板の製造方法の実施態様を模式的に示す断面図。
【符号の説明】
10,11:導電性金属箔(銅箔)
10a,11a:配線パターン
12:導電性バンプ
13:熱可塑性絶縁体
14:加圧用の成形板
15:ソルダーレジスト層
16: 加圧用の成形板
17: 絶縁性樹脂層
18:複層体
19:貫通孔
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a highly reliable high-density wiring type multilayer wiring board at low cost.
[0002]
[Prior art]
For example, as electronic devices such as portable telephones and personal computers become shorter and lighter, wiring boards for forming electric circuits are not only required to have higher density wiring and shorter, lighter and thinner, but also to have higher circuit reliability and lower weight. Cost reduction is required. In response to such a demand, a via connection structure in which wiring patterns are arranged in a multilayered manner via an insulating layer, and the wiring patterns are connected by projecting conductive bumps penetrating the interlayer insulating layer. Multilayer wiring boards are known (see Patent Documents 1 and 2).
[0003]
FIG. 3 schematically shows a manufacturing embodiment of this type of multilayer wiring board. That is, first, as shown in FIG. 3A, a copper foil 1a having a thickness of, for example, about 18 μm is prepared, and a conductive composition (for example, a silver paste) is screen-printed on one main surface of the copper foil 1a. Then, a substantially conical (projection-shaped) conductive bump 2 having a bottom diameter of about 100 to 300 μm and a height of about 20 to 50 μm is formed. Next, when the bumps 2 are dried, the bumps 2 are aligned with the bumps 2 and screen-printed with a silver paste again to build up to a required height. Here, the print formation of the conductive bumps 2 is usually repeated a plurality of times, although it depends on the composition of the conductive composition and the size and shape such as the diameter and height of the bumps 2.
[0004]
After the formation of the protruding conductive bumps 2, as shown in FIG. 3B, a thermoplastic insulating layer (for example, a liquid crystal polymer sheet) 3, a copper foil 1b having a thickness of about 18 μm, Pressure forming plates (for example, stainless steel plates) 4 are sequentially arranged and laminated, and heated and pressed in the laminating direction. By this heating and pressing, the tip of the bump 2 penetrated the liquid crystal polymer sheet 3 and abutted and deformed on the copper foil 1b as shown in FIG. A double-sided copper foil-laminated plate or sheet is obtained.
[0005]
Next, a dry film for etching is adhered to the copper foils 1a and 1b surfaces of the double-sided copper foil bonded plate, and the dry film is exposed and developed, masked and etched, and FIG. As shown in d), wiring patterns (1a) and (1b) are formed. Thereafter, a solder resist 5 is provided on the surface formed with the wiring patterns (1a) and (1b) by a screen printing method or the like, and at least one of the required surfaces of the wiring patterns (1a) and (1b) is formed as shown in FIG. As shown in (1), connection terminal bumps 6 for mounting components such as IC sockets are provided.
[0006]
Here, the connection terminal bumps 6 are formed in the following procedure. That is, first, a dry film for etching is stuck on the surface of the solder resist 5, and the dry film is exposed and developed to perform masking. Next, the solder resist 5 is selectively removed by etching to expose and open the wiring pattern (1a) and (1b) surfaces, and the connection terminal bumps 6 are formed on the exposed and opened surfaces by plating. Thereafter, the dry film is peeled and removed, and if necessary, the surfaces of the connection terminal bumps 6 are subjected to gold plating or the like for stabilization, protection, and the like, and are subjected to outer shape processing to produce a product. Alternatively, as shown in FIG. 3F, a multilayer substrate shown in FIG. 3G is formed by laminating the substrates shown in FIGS. 3D and 3E via an insulating layer 3a.
[0007]
In this type of manufacturing method of a multilayer wiring board, when forming the connection terminal bumps 6, an insulating layer in which a through-hole is previously formed in a corresponding position is laminated and integrated so that it protrudes from the insulating layer surface. There is also known means for filling the inside of the through hole with plating or the like (see Patent Document 3).
[0008]
[Patent Document 1]
JP-A-10-79579 (page 4, FIG. 1)
[0009]
[Patent Document 2]
JP-A-11-112149 (page 2, FIG. 1)
[0010]
[Patent Document 3]
JP-A-2001-237511 (page 4, FIG. 1)
[0011]
[Problems to be solved by the invention]
In the via connection type multilayer wiring board, since interlayer connection between the wiring patterns 1a and 1b and the like is performed by pressing and penetrating the conductive bumps 2, high density wiring and simplification of a manufacturing process can be achieved. There are advantages. In other words, in connection between wiring pattern layers, drilling by drilling or the like for each interlayer insulator layer can be omitted, and plating processing in the drilling or filling operation of the conductive composition is not only unnecessary, but also fine. A highly reliable via connection can be achieved. In particular, in the via connection of a fine diameter required for high-density wiring, it is difficult to reliably form a dense and uniform plating layer in a small diameter hole, or a dense conductive layer is formed in a small diameter hole. Problems, such as difficulty in filling the conductive composition, can be easily improved.
[0012]
However, there are concerns about the following problems in terms of mass productivity and reliability. In other words, when the connection terminal bumps 6 are formed by plating on the outer surface side wiring pattern, it is difficult not only to form a dense plating as described above, but also to form the connection terminal bumps 6 having a uniformly controlled height. There is a problem that formation is extremely difficult.
[0013]
Further, when the interval between the connection terminal bumps 6 is set to be small, there is a problem that it is difficult to sufficiently secure electrical insulation between the adjacent connection terminal bumps 6.
[0014]
Here, the difficulty in always forming dense and uniform connection bumps may impair the reliability of the circuit to be formed, and may also cause variations in the height of the connection terminal bumps 6 and the distance between adjacent connection bumps. For example, when an IC device or the like is mounted, there is a concern that an incomplete mounting connection may be formed. Since these inconveniences and concerns relate to the reliability of the wiring board itself or circuit components, it cannot be ignored in improving the quality of applied electronic devices.
[0015]
Also, forming an etching resist on the wiring pattern surface and forming the external connection bumps by plating using the etching resist as a mask complicates the manufacturing process, in other words, increases the number of processing steps and increases costs. Invite. In addition, the complexity of the manufacturing process and the addition of the processing step may cause a reduction in the manufacturing yield, and as a result, the mass productivity is impaired.
[0016]
The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a manufacturing method capable of obtaining a highly reliable multilayer wiring board with high reliability and compactness at low cost and with high yield. And
[0017]
[Means for Solving the Problems]
The present invention provides a step of arranging a protruding conductive bump for via connection on one main surface of a conductive metal foil, and drilling a through hole by laser processing at a position corresponding to the conductive bump of the conductive metal foil. Forming a multilayer body of the conductive metal foil and the insulating resin layer, wherein the metal foil side of the multilayer body is opposed to a bump mounting surface of the conductive metal foil on which the conductive bumps are provided, and the thermoplastic resin is formed. Positioning and laminating via an insulator layer, heating and pressurizing the laminate in the laminating direction, and a step of penetrating and integrating the bump tip with the thermoplastic transfer insulator layer and the multilayer body; Removing the insulating resin layer of the laminated body, exposing the conductive metal foil protruding from the tip end side of the conductive bumps, and photo-etching the exposed conductive metal foil of the laminate. To form a multilayer wiring board with external connection bumps. A method for manufacturing a multilayer wiring board according to claim.
[0018]
That is, a conductive bump for forming a via connection portion is provided to be longer (higher), and a multilayer body of a conductive metal foil for a wiring pattern and an insulating resin layer in which a via connection hole has been formed in advance is used. Multi-layered by laminating and integrating via a thermoplastic insulator, projecting the tip of the conductive bump from the conductive metal foil surface for a wiring pattern, and using the projected portion as a connection terminal bump. This is a method for manufacturing a wiring board.
[0019]
With the adoption of such a manufacturing means, a highly reliable via connection is formed by, for example, projecting bumps having a bottom diameter of 100 μm or less and a height of 10 μm or more. That is, highly reliable mounting connection is possible, and a multilayer wiring board having shaped connection terminal bumps can be obtained at low cost. Furthermore, regardless of the diameter of the conductive bump forming the via connection, the height of the bump can be arbitrarily set / selected to increase the density of the wiring pattern and achieve a highly reliable circuit. A multilayer wiring board with connection terminal bumps having a shape and flatness suitable for the configuration of a highly functional and highly reliable mounting circuit device can be provided with a high yield without requiring complicated steps.
[0020]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an embodiment of the present invention will be described with reference to FIGS. 1 (a) to 1 (e) and FIG.
[0021]
The multilayer wiring board according to the present invention includes a thermoplastic insulator (for example, a liquid crystal polymer) as an interlayer insulator 13 and wiring patterns 10a and 11a, as shown in an enlarged sectional view in FIG. A configuration is employed in which the conductive bumps 12 penetrating through the interlayer insulator 13 connect the vias between the wiring patterns 10a and 11a. Further, the tip of the conductive bump 12 forming the via connection is configured to penetrate through the wiring pattern 11a and protrude to function as a connection terminal bump. In this configuration, the tip of the conductive bump 12 forming the via connection penetrates through the interlayer insulator 13 and participates in the electrical connection with the wiring pattern 11a. 11a is characterized in that it penetrates and protrudes and is used as a connection terminal such as an IC socket.
[0022]
Here, the wiring patterns 10a and 11a are formed by projecting conductive bumps 12 disposed on the surface of the wiring pattern 10a on the back surface of the corresponding insulating layer 13 so as to penetrate the interlayer insulator 13 and establish a required electrical connection with the wiring pattern 11. Connection is made. That is, if necessary, the tip of the substantially conical or pyramid-shaped conductive bump 12 formed in the shape of a protrusion by coaxially overlapping and printing is electrically connected to the wiring pattern 11a which penetrates the interlayer insulator 3 and faces the same. It is configured to be connected to In the wiring pattern 11a, in a region serving as a connection terminal for mounting and mounting an electronic component, the tip of the conductive bump 12 protrudes from the surface of the wiring pattern 11a. In other words, in the process of pressure lamination and integration of the multilayer wiring board, by simultaneously forming the connection terminal bumps, the manufacturing process is simplified and the cost is reduced, while the adjacent connection terminal bumps are insulated from each other. This arrangement enables a high-density mounting / wiring-type circuit configuration.
[0023]
The conductive bumps 12 can be formed by means of screen printing of a conductive paste or selective plating by printing and patterning a plating resist. The thermoplastic insulator forming the interlayer insulator 3 is, for example, a thermoplastic resin such as a liquid crystal polymer having a thickness of about 25 to 100 μm (for example, a BIAC film having a melting point of 335 ° C.) and a polyether-based resin film. More specifically, examples thereof include multiaxially-aligned liquid crystal polymers and polyether-based polymers represented by, for example, Xidal (trade name, manufactured by Dartco) and Vectra (trade name, manufactured by Clanese). As the liquid crystal polymer, Vectran A type (melting point: 285 ° C.), Vectran C type (melting point: 325 ° C.), BIAC film (melting point: 325 ° C.), and the like are commercially available. Here, the liquid crystal polymer generally has little hygroscopicity, a dielectric constant of about 3.0 (1 MHz), and excellent high-frequency characteristics, and thus exhibits high-speed signal transmission stability.
[0024]
Further, the conductive bumps 12 constituting the via connection and the like are formed of a mixed system of a conductive metal powder such as gold, silver, copper, nickel, and solder and a binder resin. Here, examples of the binder resin include a polycarbonate resin, a polysulfone resin, a polyester resin, a phenoxy resin, a phenol resin, and a polyimide resin.
[0025]
The conductive metal foil on which the conductive bumps are formed is, for example, a copper foil, an aluminum foil, a nickel foil, or the like. The laminate of the metal foil and the insulating resin layer is formed of, for example, a copper foil having a thickness of about 18 μm and a thermosetting resin layer having a thickness of about 10 μm. Here, the thermosetting resin to be multi-layered has high mechanical strength to mechanically protect the tip of the conductive bump 12 that penetrates and protrudes, and to prevent deformation and damage. Further, it is desired that peeling or dissolution removal can be easily performed finally. Examples of such a thermosetting resin include, for example, films using an epoxy resin, a polyimide resin, a phenol resin, an organic woven fabric or the like as a support. In the drilling of the multilayer body, the hole diameter is selected according to the diameter of the conductive bump to be inserted or the size of the connection terminal bump, and the hole can be drilled. However, laser beam processing is generally used. preferable.
[0026]
Next, a method for manufacturing a multilayer wiring board according to an example will be described with reference to FIGS. 1A to 1E schematically showing an embodiment and a flowchart shown in the figure.
[0027]
First, as shown in FIG. 1 (a), a copper foil 10 having a thickness of about 18 μm is prepared, and a metal mask having a hole of 150 μm in diameter at a predetermined position of, for example, a stainless steel sheet is positioned on one principal surface thereof. Then, the conductive paste is screen-printed to form a conductive bump 12 having a substantially conical cross section. After the conductive bumps 12 are dried, if necessary, a conductive paste is screen-printed repeatedly on the surface on which the conductive bumps 12 are to be formed, thereby building up the conductive bumps 12. Here, the height of the conductive bump 12 may generally be about 1.5 to 2 times the height required for forming a via connection.
[0028]
On the other hand, a copper foil 11 having a thickness of about 18 μm is prepared, and a multi-layer body 18 is prepared by laminating a polyimide resin film 17 having a thickness of about 25 μm on one principal surface thereof. That is, as shown in FIG. 1B, a through hole having a required diameter penetrating in the thickness direction is formed by laser processing at the position where the via connection 12 and the connection terminal 16 are formed.
[0029]
Next, as shown in FIG. 1 (c), the copper foil 10a on which the conductive bumps 2 are formed is placed on the copper foil 10a of the multilayer body 18 via a liquid crystal polymer sheet 13 having a thickness of, for example, about 50 μm. Eleven surfaces are stacked so as to face each other, and a press forming plate (for example, a stainless steel plate) 14 is sequentially stacked, and if necessary, a press forming plate 20 is also arranged at the copper foil position 10 side to heat. Pressing in the laminating direction while pressing. Due to this heating and pressing, the tip of the conductive bump 12 penetrates the liquid crystal polymer sheet 13 and further penetrates the perforated hole of the multilayer body 18, and comes into contact with the surface of the forming plate 14 to be deformed into a flat surface. I do. In other words, as shown in FIG. 1D, the tip of the conductive bump 12, which is higher than the thickness of the liquid crystal polymer sheet 13 and the multilayer body 18, is pressed against the surface of the molding plate 16 and crushed. A copper-clad laminate having a flat surface and the same surface as the polyimide resin film 17 is obtained.
[0030]
Next, the polyimide resin film 17 of the copper-clad laminate is peeled or dissolved and removed, and a so-called dry film is laminated on the exposed surfaces of the copper foils 10a and 11a. Then, the dry film is exposed and developed to form an etching mask, and the copper foils 10 and 11 are selectively removed by etching, as shown in FIG. , 11 are formed into wiring patterns 10a, 11a, and a wiring board having a structure in which the distal end of the conductive bump 12 penetrates and protrudes from the wiring pattern 11a surface is obtained.
[0031]
Thereafter, a solder resist layer is printed and formed on the surfaces of the wiring patterns 10a and 11a, in other words, on the entire area from which the multilayer body 17 has been removed, by exposing the protruding tips of the conductive bumps. A conventional plating process on the connection terminal bumps, for example, gold plating, is performed on the leading end surface of the conductive bumps. After the insulation protection of the wiring board surface and the provision of the stability of the connection terminal bumps are performed in this way, the product is manufactured by performing the external processing, which is a conventional means.
[0032]
The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the invention. For example, the number of wiring patterns may be a three-layer type or a multi-layer type of four or more layers. Also, as an interlayer insulator, a combination of a liquid crystal polymer and a thermoplastic resin, and the thickness and material of each layer of the multi-layer body may also be used. It can be appropriately selected depending on the situation.
[0033]
【The invention's effect】
According to the present invention, a highly reliable via connection is formed by the projecting bumps, and a multilayer wiring board having connection terminal bumps capable of highly reliable mounting connection can be obtained at low cost. That is, irrespective of the diameter of the conductive bump forming the via connection, the height of the bump can be arbitrarily set and selected, so that a high-density wiring pattern and a highly reliable circuit can be achieved. In addition, the configuration of a highly functional and highly reliable mounting circuit device can be achieved without the need for complicated steps (while simplifying the steps) and by providing fine connection terminal bumps that can easily ensure insulation and mutual separation. A multi-layer wiring board suitable for a high yield can be provided. In other words, it is possible to provide a high-density wiring or a high-functionality and highly reliable mounting multilayer wiring board in mass production with high yield while achieving a reduction in length and size.
[Brief description of the drawings]
1A to 1E are cross-sectional views schematically showing an embodiment of a method for manufacturing a multilayer wiring board according to an example.
FIG. 2 is a flowchart showing an outline of a manufacturing procedure of the multilayer wiring board according to the embodiment.
3A to 3G are cross-sectional views schematically showing an embodiment of a conventional method for manufacturing a multilayer wiring board.
[Explanation of symbols]
10, 11: conductive metal foil (copper foil)
10a, 11a: Wiring pattern 12: Conductive bump 13: Thermoplastic insulator 14: Pressed forming plate 15: Solder resist layer 16: Pressed forming plate 17: Insulating resin layer 18: Multilayer 19: Penetration Hole

Claims (3)

導電性金属箔の一主面にビア接続用の突起状導電性バンプを配設する工程と、
前記導電性金属箔の導電性バンプに対応する位置へ貫通孔をレーザー加工で穿設した導電性金属箔及び絶縁樹脂層の複層体を形成する工程と、
前記導電性バンプを配設した導電性金属箔のバンプ配設面に、前記複層体の金属箔側を対向させ熱可塑性絶縁体層を介して位置決め積層する工程と、
前記積層体を積層方向に加熱加圧してバンプ先端部を、前記熱可塑性移絶縁体層及び複層体を貫挿一体化する工程と、
前記一体化させた複層体の絶縁樹脂層を除去し、導電性バンプの先端側を突出させた導電性金属箔が露出する積層板化する工程と、
前記露出させた積層板の導電性金属箔をフォトエッチングして外部接続用バンプ付き配線板化する工程と、
を有することを特徴とする多層配線板の製造方法。
Arranging a protruding conductive bump for via connection on one main surface of the conductive metal foil,
A step of forming a multilayer body of a conductive metal foil and an insulating resin layer in which a through hole is formed by laser processing at a position corresponding to the conductive bump of the conductive metal foil,
A step of positioning and laminating via a thermoplastic insulator layer the metal foil side of the multilayer body facing the bump mounting surface of the conductive metal foil provided with the conductive bumps,
A step of heating and pressurizing the laminate in the laminating direction to bump the tip portion, and inserting and integrating the thermoplastic transfer insulating layer and the multilayer body.
Removing the insulating resin layer of the integrated multilayer body, a step of forming a laminated plate in which the conductive metal foil protruding the tip side of the conductive bump is exposed,
A step of photoetching the conductive metal foil of the exposed laminate to form a wiring board with bumps for external connection,
A method for manufacturing a multilayer wiring board, comprising:
ビア接続用の突起状導電性バンプの配設が導電性組成物をスクリーン印刷で行われることを特徴とする請求項1記載の多層配線板の製造方法。2. The method for manufacturing a multilayer wiring board according to claim 1, wherein the conductive bumps for via connection are provided by screen printing of the conductive composition. 熱可塑性絶縁体が液晶ポリマー系フィルムであることを特徴とする請求項1もしくは請求項2記載の多層配線板の製造方法。3. The method according to claim 1, wherein the thermoplastic insulator is a liquid crystal polymer film.
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006108236A (en) * 2004-10-01 2006-04-20 Shinko Electric Ind Co Ltd Method for manufacturing substrate with through electrode
KR100648969B1 (en) 2005-09-15 2006-11-27 삼성전기주식회사 Manufacturing method of printed circuit board having multi layers
WO2013021477A1 (en) * 2011-08-10 2013-02-14 株式会社メイコー Circuit substrate manufacturing method
CN110769669A (en) * 2018-07-27 2020-02-07 广州方邦电子股份有限公司 Electromagnetic shielding film, circuit board and preparation method of electromagnetic shielding film
CN110769664A (en) * 2018-07-27 2020-02-07 广州方邦电子股份有限公司 Electromagnetic shielding film, circuit board and preparation method of electromagnetic shielding film

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006108236A (en) * 2004-10-01 2006-04-20 Shinko Electric Ind Co Ltd Method for manufacturing substrate with through electrode
KR100648969B1 (en) 2005-09-15 2006-11-27 삼성전기주식회사 Manufacturing method of printed circuit board having multi layers
WO2013021477A1 (en) * 2011-08-10 2013-02-14 株式会社メイコー Circuit substrate manufacturing method
CN110769669A (en) * 2018-07-27 2020-02-07 广州方邦电子股份有限公司 Electromagnetic shielding film, circuit board and preparation method of electromagnetic shielding film
CN110769664A (en) * 2018-07-27 2020-02-07 广州方邦电子股份有限公司 Electromagnetic shielding film, circuit board and preparation method of electromagnetic shielding film
CN110769669B (en) * 2018-07-27 2024-02-06 广州方邦电子股份有限公司 Electromagnetic shielding film, circuit board and preparation method of electromagnetic shielding film
CN110769664B (en) * 2018-07-27 2024-02-06 广州方邦电子股份有限公司 Electromagnetic shielding film, circuit board and preparation method of electromagnetic shielding film

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