JP2001272923A - Production method of display device - Google Patents

Production method of display device

Info

Publication number
JP2001272923A
JP2001272923A JP2001005860A JP2001005860A JP2001272923A JP 2001272923 A JP2001272923 A JP 2001272923A JP 2001005860 A JP2001005860 A JP 2001005860A JP 2001005860 A JP2001005860 A JP 2001005860A JP 2001272923 A JP2001272923 A JP 2001272923A
Authority
JP
Japan
Prior art keywords
insulating film
substrate
release layer
forming
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001005860A
Other languages
Japanese (ja)
Other versions
JP4748859B2 (en
JP2001272923A5 (en
Inventor
Shunpei Yamazaki
舜平 山崎
Setsuo Nakajima
節男 中嶋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2001005860A priority Critical patent/JP4748859B2/en
Publication of JP2001272923A publication Critical patent/JP2001272923A/en
Publication of JP2001272923A5 publication Critical patent/JP2001272923A5/ja
Application granted granted Critical
Publication of JP4748859B2 publication Critical patent/JP4748859B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68363Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate

Landscapes

  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Liquid Crystal (AREA)
  • Electroluminescent Light Sources (AREA)
  • Thin Film Transistor (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide technique for manufacturing a high-performance display device by using a plastic supporting body. SOLUTION: After forming a release layer on an element formation substrate and forming a semiconductor device and a light emitting element furthermore on it, a fixed substrate 130 is stuck together with a first adhesive 129 on the light emitting element. By exposing in the gas including a halogen fluoride in this state, the release layer is removed and the element formation substrate is peeled. Then, a substrate to be stuck 132 consisting of the plastic supporting body is laminated instead of the peeled element formation substrate.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電極間に発光性材
料を挟んだ素子(以下、発光素子という)を有する装置
(以下、発光装置という)もしくは電極間に液晶を挟ん
だ素子(以下、液晶素子という)を有する装置(以下、
液晶表示装置という)の作製方法に関する。なお、発光
装置及び液晶表示装置を総称して表示装置と呼ぶ。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device (hereinafter, referred to as a light-emitting device) having an element having a light-emitting material interposed between electrodes (hereinafter, referred to as a light-emitting device) or an element having a liquid crystal interposed between electrodes (hereinafter, referred to as a light-emitting device). (Hereinafter referred to as a liquid crystal element)
A liquid crystal display device). Note that the light emitting device and the liquid crystal display device are collectively called a display device.

【0002】また、上記発光性材料は、一重項励起もし
くは三重項励起または両者の励起を経由して発光(燐光
および/または蛍光)するすべての発光性材料を含むも
のとする。
[0002] The above-mentioned luminescent materials include all luminescent materials that emit light (phosphorescence and / or fluorescence) via singlet excitation or triplet excitation or both excitations.

【0003】[0003]

【従来の技術】近年、EL(Electro Luminescence)が
得られる発光性材料(以下、EL材料という)を利用し
た発光素子(以下、EL素子という)を用いた発光装置
(以下、EL表示装置という)の開発が進んでいる。E
L表示装置は、陽極と陰極との間にEL材料を挟んだ構
造のEL素子を有した構造からなる。この陽極と陰極と
の間に電圧を加えてEL材料中に電流を流すことにより
キャリアを再結合させて発光させる。即ち、EL表示装
置は発光素子自体に発光能力があるため、液晶表示装置
に用いるようなバックライトが不要である。さらに視野
角が広く、軽量であり、且つ、低消費電力という利点を
もつ。
2. Description of the Related Art In recent years, a light-emitting device (hereinafter, referred to as an EL display device) using a light-emitting element (hereinafter, referred to as an EL element) using a light-emitting material (hereinafter, referred to as an EL material) capable of obtaining EL (Electro Luminescence). Is being developed. E
The L display device has a structure having an EL element having a structure in which an EL material is interposed between an anode and a cathode. By applying a voltage between the anode and the cathode to flow a current through the EL material, the carriers are recombined to emit light. That is, the EL display device does not need a backlight as used in a liquid crystal display device because the light emitting element itself has a light emitting ability. Further, it has the advantages of a wide viewing angle, light weight, and low power consumption.

【0004】このようなEL表示装置を利用したアプリ
ケーションは様々なものが期待されているが、特にEL
表示装置の厚みが薄いこと、従って軽量化が可能である
ことにより携帯機器への利用が注目されている。そのた
め、フレキシブルなプラスチックフィルムの上に発光素
子を形成することが試みられている。
Various applications using such an EL display device are expected.
Since the thickness of the display device is small, and therefore, the weight of the display device can be reduced, attention has been paid to the use of the display device for portable devices. Therefore, it has been attempted to form a light emitting element on a flexible plastic film.

【0005】しかしながら、プラスチックフィルムの耐
熱性が低いためプロセスの最高温度を低くせざるを得
ず、結果的にガラス基板上に形成する時ほど良好な電気
特性のTFTを形成できないのが現状である。そのた
め、プラスチックフィルムを用いた高性能な表示装置は
実現されていない。
[0005] However, since the heat resistance of the plastic film is low, the maximum temperature of the process must be lowered, and as a result, it is impossible to form a TFT having better electric characteristics as when formed on a glass substrate. . Therefore, a high-performance display device using a plastic film has not been realized.

【0006】[0006]

【発明が解決しようとする課題】本発明はプラスチック
支持体(可撓性のプラスチックフィルムもしくはプラス
チック基板を含む。)を用いて高性能な表示装置を作製
するための技術を提供することを課題とする。
An object of the present invention is to provide a technique for manufacturing a high-performance display device using a plastic support (including a flexible plastic film or a plastic substrate). I do.

【0007】[0007]

【課題を解決するための手段】本発明は、プラスチック
に比べて耐熱性のある基板(ガラス基板、石英基板、シ
リコン基板、金属基板もしくはセラミックス基板)の上
に必要な素子を形成し、後にそれらの素子を室温の処理
によりプラスチック支持体に移すことを特徴とする。
According to the present invention, required elements are formed on a substrate (glass substrate, quartz substrate, silicon substrate, metal substrate, or ceramic substrate) having heat resistance as compared with plastic, and then these elements are formed. Is transferred to a plastic support by treatment at room temperature.

【0008】なお、前記必要な素子とは、アクティブマ
トリクス型の表示装置ならば画素のスイッチング素子と
して用いる半導体素子(典型的には薄膜トランジスタ)
もしくはMIM素子並びに発光素子もしくは液晶素子を
指す。また、パッシブ型の表示装置ならば発光素子もし
くは液晶素子を指す。また、プラスチック支持体として
はPES(ポリエチレンサルファイル)、PC(ポリカ
ーボネート)、PET(ポリエチレンテレフタレート)
もしくはPEN(ポリエチレンナフタレート)を用いる
ことができる。
The necessary element is a semiconductor element (typically a thin film transistor) used as a pixel switching element in an active matrix type display device.
Alternatively, it refers to an MIM element and a light emitting element or a liquid crystal element. In the case of a passive display device, it refers to a light-emitting element or a liquid crystal element. PES (polyethylene sulphyl), PC (polycarbonate), PET (polyethylene terephthalate)
Alternatively, PEN (polyethylene naphthalate) can be used.

【0009】本発明では上記素子をシリコン膜(シリコ
ンゲルマニウム膜も含む)からなる剥離層の上に形成し
ておき、最終工程にてフッ化ハロゲンを含むガスを用い
て剥離層を除去する。その結果、各素子と前記基板とが
分離されるので、その後、素子をプラスチック支持体に
接着することが可能となる。このフッ化ハロゲンによる
シリコン膜のエッチングは室温で容易に進行するため、
耐熱性の低い発光素子を形成した後であっても問題なく
行うことができる。
In the present invention, the above element is formed on a release layer made of a silicon film (including a silicon germanium film), and the release layer is removed in a final step using a gas containing halogen fluoride. As a result, each element is separated from the substrate, and thereafter, the element can be bonded to the plastic support. Since the etching of the silicon film by the halogen fluoride proceeds easily at room temperature,
Even after the formation of a light-emitting element having low heat resistance, the light-emitting element can be performed without any problem.

【0010】フッ化ハロゲンとは化学式XFn(Xはフ
ッ素以外のハロゲン、nは整数)で示される物質であ
り、一フッ化塩素(ClF)、三フッ化塩素(Cl
3)、一フッ化臭素(BrF)、三フッ化臭素(Br
3)、一フッ化ヨウ素(IF)もしくは三フッ化ヨウ
素(IF3)を用いることができる。また、シリコン膜
は結晶質シリコン膜であっても非晶質シリコン膜であっ
ても良い。このフッ化ハロゲンは、シリコン膜と酸化シ
リコン膜との選択比が大きく、シリコン膜の選択的なエ
ッチングが可能である。
[0010] Halogen fluoride is a substance represented by the chemical formula XFn (X is a halogen other than fluorine, n is an integer) and includes chlorine monofluoride (ClF), chlorine trifluoride (Cl
F 3 ), bromine monofluoride (BrF), bromine trifluoride (Br)
F 3 ), iodine monofluoride (IF) or iodine trifluoride (IF 3 ) can be used. Further, the silicon film may be a crystalline silicon film or an amorphous silicon film. This halogen fluoride has a large selectivity between the silicon film and the silicon oxide film, and enables selective etching of the silicon film.

【0011】なお、上述のフッ化ハロゲンにシリコン膜
を晒すだけでシリコン膜はエッチングされるが、他のフ
ッ化物(四フッ化炭素(CF4)もしくは三フッ化窒
素)であってもプラズマ状態とすることで本発明に用い
ることは可能である。
The silicon film is etched only by exposing the silicon film to the above-mentioned halogen fluoride. However, even if another fluoride (carbon tetrafluoride (CF 4) or nitrogen trifluoride) is used, the silicon film is brought into a plasma state. By doing so, it is possible to use the present invention.

【0012】[0012]

【発明の実施の形態】本発明の実施の形態について図
1、2を用いて説明する。なお、図1、2に示したのは
画素部における作製工程を示す断面図である。また、本
実施の形態によって作製される画素の上面図を図3に示
す。図3に用いた符号は図1、2で用いた符号に対応し
ている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS. Note that FIGS. 1 and 2 are cross-sectional views illustrating a manufacturing process in a pixel portion. FIG. 3 is a top view of a pixel manufactured according to this embodiment. The reference numerals used in FIG. 3 correspond to the reference numerals used in FIGS.

【0013】図1(A)において、101は素子が形成
される基板(以下、素子形成基板という)であり、その
上には非晶質シリコン膜からなる剥離層102が100
〜500nm(本実施の形態では300nm)の厚さに
形成される。本実施の形態では素子形成基板101とし
てガラス基板を用いるが、石英基板、シリコン基板、金
属基板もしくはセラミックス基板を用いても構わない。
なお、本明細書中では、半導体素子もしくは発光素子が
形成された基板全体を指して素子形成基板と呼ぶ場合も
ある。
In FIG. 1A, reference numeral 101 denotes a substrate on which an element is formed (hereinafter, referred to as an element forming substrate), on which a release layer 102 made of an amorphous silicon film is provided.
It is formed to a thickness of about 500 nm (300 nm in the present embodiment). In this embodiment mode, a glass substrate is used as the element formation substrate 101; however, a quartz substrate, a silicon substrate, a metal substrate, or a ceramic substrate may be used.
Note that in this specification, the entire substrate on which a semiconductor element or a light-emitting element is formed may be referred to as an element-formed substrate.

【0014】また、剥離層102の成膜は減圧熱CVD
法、プラズマCVD法、スパッタ法もしくは蒸着法を用
いれば良い。剥離層102の上には酸化シリコン膜から
なる絶縁膜103が200nmの厚さに形成される。絶
縁膜103の形成は減圧熱CVD法、プラズマCVD
法、スパッタ法もしくは蒸着法を用いれば良い。
The release layer 102 is formed under reduced pressure thermal CVD.
Method, a plasma CVD method, a sputtering method, or an evaporation method may be used. On the release layer 102, an insulating film 103 made of a silicon oxide film is formed to a thickness of 200 nm. The insulating film 103 is formed by a low pressure thermal CVD method or a plasma CVD method.
Method, a sputtering method, or an evaporation method may be used.

【0015】また、絶縁膜103の上には結晶質シリコ
ン膜104が50nmの厚さに形成される。結晶質シリ
コン膜104の形成方法としては公知の手段を用いるこ
とが可能である。固体レーザーもしくはエキシマレーザ
ーを用いて非晶質シリコン膜をレーザー結晶化させても
良いし、非晶質シリコン膜を加熱処理(ファーネスアニ
ール)により結晶化させても良い。
On the insulating film 103, a crystalline silicon film 104 is formed to a thickness of 50 nm. As a method for forming the crystalline silicon film 104, known means can be used. The amorphous silicon film may be laser-crystallized using a solid-state laser or excimer laser, or the amorphous silicon film may be crystallized by heat treatment (furnace annealing).

【0016】次に、図1(B)に示すように、結晶質シ
リコン膜104をパターニングして島状の結晶質シリコ
ン膜(以下、活性層という)105、106を形成す
る。そして活性層を覆って酸化シリコン膜からなるゲー
ト絶縁膜107を80nmの厚さに形成する。さらに、
ゲート絶縁膜107の上にゲート電極108、109を
形成する。本実施の形態ではゲート電極108、109
の材料として、350nm厚のタングステン膜もしくは
タングステン合金膜を用いる。勿論、ゲート電極の材料
としては他の公知の材料を用いることができる。
Next, as shown in FIG. 1B, the crystalline silicon film 104 is patterned to form island-like crystalline silicon films (hereinafter, referred to as active layers) 105 and 106. Then, a gate insulating film 107 made of a silicon oxide film is formed to a thickness of 80 nm so as to cover the active layer. further,
Gate electrodes 108 and 109 are formed on the gate insulating film 107. In this embodiment mode, the gate electrodes 108 and 109
As the material for the first electrode, a tungsten film or a tungsten alloy film having a thickness of 350 nm is used. Of course, other known materials can be used as the material of the gate electrode.

【0017】そして、ゲート電極108、109をマス
クとして周期表の13族に属する元素(代表的にはボロ
ン)を添加する。添加方法は公知の手段を用いれば良
い。こうしてp型の導電型を示す不純物領域(以下、p
型不純物領域という)110〜114が形成される。ま
た、ゲート電極の直下にはチャネル形成領域115〜1
17が画定する。なお、p型不純物領域110〜114
はTFTのソース領域もしくはドレイン領域となる。
Then, an element belonging to Group 13 of the periodic table (typically, boron) is added using the gate electrodes 108 and 109 as a mask. A known method may be used for the addition method. Thus, the impurity region (hereinafter referred to as p
110-114 are formed. In addition, immediately below the gate electrode, channel forming regions 115 to 1 are formed.
17 are defined. The p-type impurity regions 110 to 114
Is the source or drain region of the TFT.

【0018】次に、図1(C)に示すように、窒化シリ
コン膜を50nmの厚さに形成し、その後、加熱処理を
行って添加された周期表の13族に属する元素の活性化
を行う。この活性化はファーネスアニール、レーザーア
ニールもしくはランプアニールにより行うか、又はそれ
らを組み合わせて行えば良い。本実施の形態では500
℃4時間の加熱処理を窒素雰囲気で行う。
Next, as shown in FIG. 1C, a silicon nitride film is formed to a thickness of 50 nm, and then a heat treatment is performed to activate the added element belonging to Group 13 of the periodic table. Do. This activation may be performed by furnace annealing, laser annealing, lamp annealing, or a combination thereof. In this embodiment, 500
Heat treatment at 4 ° C. for 4 hours is performed in a nitrogen atmosphere.

【0019】活性化が終了したら、水素化処理を行うと
効果的である。水素化処理は公知の水素アニール技術も
しくはプラズマ水素化技術を用いれば良い。
After the activation is completed, it is effective to perform a hydrogenation treatment. The hydrogenation treatment may use a known hydrogen annealing technique or a plasma hydrogenation technique.

【0020】次に、図1(D)に示すように、酸化シリ
コン膜からなる第1層間絶縁膜119を800nmの厚
さに形成し、コンタクトホールを形成して配線120〜
123を形成する。第1層間絶縁膜119としては他の
無機絶縁膜を用いても良いし、樹脂(有機絶縁膜)を用
いても良い。本実施の形態では配線120〜123とし
てチタン/アルミニウム/チタンの三層構造からなる金
属配線を用いる。勿論、導電膜であれば如何なる材料を
用いても良い。配線120〜123はTFTのソース配
線もしくはドレイン配線となる。
Next, as shown in FIG. 1D, a first interlayer insulating film 119 made of a silicon oxide film is formed to a thickness of 800 nm, contact holes are formed, and the wirings 120 to 120 are formed.
123 is formed. As the first interlayer insulating film 119, another inorganic insulating film may be used, or a resin (organic insulating film) may be used. In this embodiment mode, metal wirings having a three-layer structure of titanium / aluminum / titanium are used as the wirings 120 to 123. Of course, any material may be used as long as it is a conductive film. The wirings 120 to 123 serve as a source wiring or a drain wiring of the TFT.

【0021】この状態でスイッチング用TFT201及
び電流制御用TFT(駆動用TFT)202が完成す
る。本実施の形態ではどちらのTFTもpチャネル型T
FTで形成される。但し、スイッチング用TFT201
はゲート電極が活性層を二カ所で横切るように形成され
ており、二つのチャネル形成領域が直列に接続された構
造となっている。このような構造とすることでオフ電流
値(TFTがオフされた時に流れる電流)を効果的に抑
制することができる。
In this state, the switching TFT 201 and the current controlling TFT (driving TFT) 202 are completed. In this embodiment, both TFTs are p-channel TFTs.
It is formed of FT. However, the switching TFT 201
Has a structure in which a gate electrode is formed so as to cross an active layer at two places, and two channel forming regions are connected in series. With such a structure, an off-current value (a current flowing when the TFT is turned off) can be effectively suppressed.

【0022】また、同時に図3(A)、(B)に示すよ
うに保持容量301が形成される。保持容量301は活
性層と同時に形成された半導体層302、ゲート絶縁膜
107及びゲート電極109で形成される下側保持容量
と、ゲート電極109、第1層間絶縁膜119及び配線
123で形成される上側保持容量とで形成される。ま
た、半導体層302は配線123と電気的に接続されて
いる。
At the same time, a storage capacitor 301 is formed as shown in FIGS. The storage capacitor 301 is formed by the semiconductor layer 302 formed simultaneously with the active layer, the lower storage capacitor formed by the gate insulating film 107 and the gate electrode 109, and the gate electrode 109, the first interlayer insulating film 119, and the wiring 123. The upper storage capacitor is formed. The semiconductor layer 302 is electrically connected to the wiring 123.

【0023】次に、図1(D)に示すように、透明導電
膜(代表的には酸化インジウムと酸化スズとの化合物
膜)を100nmの厚さに形成し、パターニングにより
画素電極124を形成する。このとき、配線122と画
素電極124とはオーミック接触をする。従って、画素
電極124と電流制御用TFT202とは電気的に接続
される。また、画素電極124はEL素子の陽極として
機能する。
Next, as shown in FIG. 1D, a transparent conductive film (typically, a compound film of indium oxide and tin oxide) is formed to a thickness of 100 nm, and a pixel electrode 124 is formed by patterning. I do. At this time, the wiring 122 and the pixel electrode 124 make ohmic contact. Therefore, the pixel electrode 124 and the current control TFT 202 are electrically connected. Further, the pixel electrode 124 functions as an anode of the EL element.

【0024】画素電極124を形成したら、酸化シリコ
ン膜からなる第2層間絶縁膜125を300nmの厚さ
に形成する。そして、開口部126を形成し、70nm
厚の有機EL層127及び300nm厚の陰極128を
蒸着法により形成する。本実施の形態では有機EL層1
27として20nm厚の正孔注入層及び50nm厚の発
光層を積層した構造を用いる。勿論、発光層に正孔注入
層、正孔輸送層、電子輸送層もしくは電子注入を組み合
わせた公知の他の構造を用いても良い。
After forming the pixel electrode 124, a second interlayer insulating film 125 made of a silicon oxide film is formed to a thickness of 300 nm. Then, an opening 126 is formed to have a thickness of 70 nm.
A thick organic EL layer 127 and a 300 nm thick cathode 128 are formed by a vapor deposition method. In the present embodiment, the organic EL layer 1
27 is a structure in which a hole injection layer having a thickness of 20 nm and a light emitting layer having a thickness of 50 nm are stacked. Needless to say, a hole injection layer, a hole transport layer, an electron transport layer, or another known structure in which electron injection is combined with the light emitting layer may be used.

【0025】本実施の形態では、正孔注入層としてCu
Pc(銅フタロシアニン)を用いる。この場合、まず全
ての画素電極を覆うように銅フタロシアニンを形成し、
その後、赤色、緑色及び青色に対応する画素ごとに各々
赤色の発光層、緑色の発光層及び青色の発光層を形成す
る。形成する領域の区別は蒸着時にシャドーマスクを用
いて行えば良い。このようにすることでカラー表示が可
能となる。
In this embodiment, Cu is used as the hole injection layer.
Pc (copper phthalocyanine) is used. In this case, first, copper phthalocyanine is formed so as to cover all the pixel electrodes,
Thereafter, a red light emitting layer, a green light emitting layer, and a blue light emitting layer are formed for each of the pixels corresponding to red, green, and blue. The regions to be formed may be distinguished by using a shadow mask at the time of vapor deposition. By doing so, color display becomes possible.

【0026】なお、緑色の発光層を形成する時は、発光
層の母体材料としてAlq3(トリス−8−キノリノラ
トアルミニウム錯体)を用い、キナクリドンもしくはク
マリン6をドーパントとして添加する。また、赤色の発
光層を形成する時は、発光層の母体材料としてAlq3
を用い、DCJT、DCM1もしくはDCM2をドーパ
ントとして添加する。また、青色の発光層を形成する時
は、発光層の母体材料としてBAlq3(2−メチル−
8−キノリノールとフェノール誘導体の混合配位子を持
つ5配位の錯体)を用い、ペリレンをドーパントとして
添加する。
When a green light emitting layer is formed, Alq 3 (tris-8-quinolinolato aluminum complex) is used as a base material of the light emitting layer, and quinacridone or coumarin 6 is added as a dopant. When a red light emitting layer is formed, Alq 3 is used as a base material of the light emitting layer.
, And DCJT, DCM1 or DCM2 is added as a dopant. When forming a blue light-emitting layer, BAlq 3 (2-methyl-
Perylene is added as a dopant using a 5-coordinate complex having a mixed ligand of 8-quinolinol and a phenol derivative.

【0027】勿論、本発明では上記有機材料に限定する
必要はなく、公知の低分子系有機EL材料、高分子系有
機EL材料もしくは無機EL材料を用いることが可能で
ある。高分子系有機EL材料を用いる場合は塗布法を用
いることもできる。
It is needless to say that the present invention is not limited to the above-mentioned organic materials, and it is possible to use known low-molecular-weight organic EL materials, high-molecular-weight organic EL materials, or inorganic EL materials. When a polymer organic EL material is used, a coating method can be used.

【0028】また、一重項励起を経由する発光性材料だ
けでなく三重項励起を経由する発光性材料を用いること
も可能である。即ち、蛍光を発光する発光性材料だけで
なく燐光を発光する発光性材料を用いることも可能であ
る。
It is also possible to use not only a luminescent material via singlet excitation but also a luminescent material via triplet excitation. That is, not only a light-emitting material that emits fluorescence but also a light-emitting material that emits phosphorescence can be used.

【0029】以上のようにして、画素電極(陽極)12
4、有機EL層127及び陰極128からなるEL素子
(図3(B)において305で示される)が形成され
る。本実施の形態ではこのEL素子が発光素子として機
能する。
As described above, the pixel electrode (anode) 12
4. An EL element including the organic EL layer 127 and the cathode 128 (indicated by 305 in FIG. 3B) is formed. In this embodiment mode, this EL element functions as a light emitting element.

【0030】次に、図2(A)に示すように、第1接着
剤129により素子を固定するための基板(以下、固定
基板という)130を貼り合わせる。本実施の形態では
固定基板130として可撓性のプラスチックフィルムを
用いるが、ガラス基板、石英基板、プラスチック基板、
シリコン基板もしくはセラミックス基板を用いても良
い。また、第1接着剤129としては、後に剥離層10
2を除去する際に選択比のとれる材料を用いる必要があ
る。
Next, as shown in FIG. 2A, a substrate (hereinafter, referred to as a fixed substrate) 130 for fixing the element is bonded with a first adhesive 129. Although a flexible plastic film is used as the fixed substrate 130 in this embodiment, a glass substrate, a quartz substrate, a plastic substrate,
A silicon substrate or a ceramic substrate may be used. Further, as the first adhesive 129, the release layer 10
When removing 2, it is necessary to use a material having a high selectivity.

【0031】代表的には樹脂からなる絶縁膜を用いるこ
とができ、本実施の形態ではポリイミドを用いるが、ア
クリル、ポリアミドもしくはエポキシ樹脂を用いても良
い。なお、EL素子から見て観測者側(表示装置の使用
者側)に位置する場合は、光を透過する材料であること
が必要である。
Typically, an insulating film made of resin can be used. In this embodiment, polyimide is used, but acrylic, polyamide, or epoxy resin may be used. In addition, when it is located on the observer side (the user side of the display device) when viewed from the EL element, it is necessary that the material is a material that transmits light.

【0032】図2(A)のプロセスを行うことによりE
L素子を完全に大気から遮断することができる。これに
より酸化による有機EL材料の劣化をほぼ完全に抑制す
ることができ、EL素子の信頼性を大幅に向上させるこ
とができる。
By performing the process shown in FIG.
The L element can be completely shielded from the atmosphere. Thereby, the deterioration of the organic EL material due to oxidation can be almost completely suppressed, and the reliability of the EL element can be greatly improved.

【0033】次に、図2(B)に示すように、EL素子
の形成された基板全体を、フッ化ハロゲンを含むガス中
に晒し、剥離層102の除去を行う。本実施の形態では
フッ化ハロゲンとして三フッ化塩素(ClF3)を用
い、希釈ガスとして窒素を用いる。希釈ガスとしては、
アルゴン、ヘリウムもしくはネオンを用いても良い。流
量は共に500sccm(8.35×10-63/s)
とし、反応圧力は1〜10Torr(1.3×102
1.3×103Pa)とすれば良い。また、処理温度は
室温(典型的には20〜27℃)で良い。
Next, as shown in FIG. 2B, the entire substrate on which the EL element is formed is exposed to a gas containing halogen fluoride to remove the peeling layer 102. In this embodiment mode, chlorine trifluoride (ClF 3 ) is used as halogen fluoride, and nitrogen is used as a diluent gas. As the dilution gas,
Argon, helium, or neon may be used. Both flow rates are 500 sccm (8.35 × 10 −6 m 3 / s).
And the reaction pressure is 1 to 10 Torr (1.3 × 10 2 to
(1.3 × 10 3 Pa). The processing temperature may be room temperature (typically 20 to 27 ° C.).

【0034】この場合、シリコン膜はエッチングされる
が、プラスチックフィルム、ガラス基板、ポリイミド
膜、酸化シリコン膜はエッチングされない。即ち、三フ
ッ化塩素ガスに晒すことで剥離層102が選択的にエッ
チングされ、最終的には完全に除去される。なお、同じ
くシリコン膜で形成されている活性層105、106は
ゲート絶縁膜107に覆われているため三フッ化塩素ガ
スに晒されることがなく、エッチングされることはな
い。
In this case, the silicon film is etched, but the plastic film, glass substrate, polyimide film, and silicon oxide film are not etched. That is, the release layer 102 is selectively etched by being exposed to chlorine trifluoride gas, and is finally completely removed. Since the active layers 105 and 106 also formed of a silicon film are covered with the gate insulating film 107, they are not exposed to chlorine trifluoride gas and are not etched.

【0035】本実施の形態の場合、剥離層102は露呈
した端部から徐々にエッチングされていき、完全に除去
された時点で素子形成基板101と絶縁膜103が分離
される。このとき、TFT及びEL素子は薄膜を積層し
て形成されているが、固定基板130に移された形で残
る。
In the case of this embodiment, the peeling layer 102 is gradually etched from the exposed end, and the element forming substrate 101 and the insulating film 103 are separated when completely removed. At this time, the TFT and the EL element are formed by laminating thin films, but remain in a form transferred to the fixed substrate 130.

【0036】なお、ここでは剥離層102が端部からエ
ッチングされていくことになるが、素子形成基板101
が大きくなると完全に除去されるまでの時間が長くなり
好ましいものではない。従って、本実施の形態は素子形
成基板101が対角3インチ以下(好ましくは対角1イ
ンチ以下)の場合に実施することが望ましい。
Here, the peeling layer 102 is etched from the end, but the element forming substrate 101
Is large, the time required for complete removal is undesirably long. Therefore, this embodiment is desirably implemented when the element forming substrate 101 has a diagonal of 3 inches or less (preferably 1 inch or less).

【0037】こうして固定基板130にTFT及びEL
素子を移したら、図2(C)に示すように、第2接着剤
131を形成し、プラスチックフィルム132を貼り合
わせる。第2接着剤131としては樹脂からなる絶縁膜
(代表的にはポリイミド、アクリル、ポリアミドもしく
はエポキシ樹脂)を用いても良いし、無機絶縁膜(代表
的には酸化シリコン膜)を用いても良い。なお、EL素
子から見て観測者側に位置する場合は、光を透過する材
料であることが必要である。
Thus, the TFT and the EL are fixed on the fixed substrate 130.
After the transfer of the element, a second adhesive 131 is formed and a plastic film 132 is attached as shown in FIG. As the second adhesive 131, an insulating film made of a resin (typically, polyimide, acrylic, polyamide, or epoxy resin) may be used, or an inorganic insulating film (typically, a silicon oxide film) may be used. . In addition, when it is located on the observer side when viewed from the EL element, it is necessary that the material is a material that transmits light.

【0038】こうしてガラス基板101からプラスチッ
クフィルム132へとTFT及びEL素子が移される。
その結果、二枚のプラスチックフィルム130、132
によって挟まれたフレキシブルなEL表示装置を得るこ
とができる。このように固定基板(ここではプラスチッ
クフィルム)130と貼り合わせ基板(ここではプラス
チックフィルム)132を同一材料とすると熱膨張係数
が等しくなるので、温度変化による応力歪みの影響を受
けにくくすることができる。
Thus, the TFT and the EL element are transferred from the glass substrate 101 to the plastic film 132.
As a result, the two plastic films 130, 132
Thus, a flexible EL display device sandwiched therebetween can be obtained. As described above, when the fixed substrate (here, plastic film) 130 and the bonded substrate (here, plastic film) 132 are made of the same material, the thermal expansion coefficients become equal, so that it is possible to reduce the influence of stress distortion due to temperature change. .

【0039】本実施の形態により作製されたEL表示装
置は、フォトリソグラフィに必要なマスク枚数がトータ
ルで6枚と非常に少なく、高い歩留まりと低い製造コス
トを達成することができる。また、こうして形成された
EL表示装置は、プラスチック支持体の耐熱性に制限さ
れることなく形成されたTFTを半導体素子として用い
ることができるので非常に高性能なものとすることがで
きる。
In the EL display device manufactured according to the present embodiment, the number of masks required for photolithography is extremely small as a total of six, and a high yield and a low manufacturing cost can be achieved. In addition, the EL display device thus formed can have extremely high performance because the TFT formed without being limited by the heat resistance of the plastic support can be used as a semiconductor element.

【0040】[0040]

【実施例】〔実施例1〕本実施例では実施の形態とは異
なる作製方法でEL表示装置を作製した場合の例につい
て説明する。まず、実施の形態の説明に従って、図1
(C)の状態を得る。窒化シリコン膜118を形成した
後、その上にレジスト401を形成する。そして、レジ
スト401をマスクとして窒化シリコン膜118、ゲー
ト絶縁膜107、絶縁膜103、剥離層102を順次エ
ッチングし、素子形成基板101に達する開口部40
2、403を形成する。(図4(A))
[Embodiment 1] In this embodiment, an example in which an EL display device is manufactured by a manufacturing method different from that of the embodiment mode will be described. First, according to the description of the embodiment, FIG.
The state of (C) is obtained. After forming the silicon nitride film 118, a resist 401 is formed thereon. Then, using the resist 401 as a mask, the silicon nitride film 118, the gate insulating film 107, the insulating film 103, and the peeling layer 102 are sequentially etched to form the opening 40 reaching the element forming substrate 101.
2, 403 are formed. (FIG. 4 (A))

【0041】次に、図4(B)に示すように、レジスト
401を除去した後に樹脂からなる第1層間絶縁膜40
4を形成する。本実施例では第1層間絶縁膜404とし
て2μmの厚さのポリイミド膜を用いる。このとき、開
口部402、403の底部にて素子形成基板101と第
1層間絶縁膜404とが接着される。
Next, as shown in FIG. 4B, after removing the resist 401, the first interlayer insulating film 40 made of resin is formed.
4 is formed. In this embodiment, a polyimide film having a thickness of 2 μm is used as the first interlayer insulating film 404. At this time, the element forming substrate 101 and the first interlayer insulating film 404 are bonded at the bottoms of the openings 402 and 403.

【0042】次に、図4(C)に示すように、第1層間
絶縁膜404にコンタクトホールを形成し、配線120
〜123を形成する。さらに、透明導電膜からなる画素
電極124を形成する。これらの配線及び電極の形成は
実施の形態と同様である。
Next, as shown in FIG. 4C, a contact hole is formed in the first interlayer insulating film 404 and the wiring 120 is formed.
To 123 are formed. Further, a pixel electrode 124 made of a transparent conductive film is formed. The formation of these wirings and electrodes is the same as in the embodiment.

【0043】画素電極124を形成したら、次は図4
(D)に示すように、第1層間絶縁膜404、窒化シリ
コン膜118、ゲート絶縁膜107、絶縁膜103を順
次エッチングし、剥離層102に達する開口部405、
406を形成する。
After the pixel electrode 124 is formed, the next step is shown in FIG.
As shown in (D), the first interlayer insulating film 404, the silicon nitride film 118, the gate insulating film 107, and the insulating film 103 are sequentially etched to form an opening 405 reaching the peeling layer 102.
406 is formed.

【0044】次に、図4(E)に示すように、TFTの
形成された基板全体を、フッ化ハロゲンを含むガス中に
晒し、剥離層102の除去を行う。本実施例ではフッ化
ハロゲンとして三フッ化塩素(ClF3)を用い、希釈
ガスとして窒素を用いる。流量は共に500sccm
(8.35×10-63/s)とし、反応圧力は10T
orr(1.3×103Pa)とする。また、処理温度
は25℃とする。
Next, as shown in FIG. 4E, the entire substrate on which the TFT is formed is exposed to a gas containing halogen fluoride to remove the peeling layer 102. In this embodiment, chlorine trifluoride (ClF 3 ) is used as halogen fluoride, and nitrogen is used as diluent gas. Both flow rates are 500sccm
(8.35 × 10 −6 m 3 / s) and the reaction pressure is 10 T
orr (1.3 × 10 3 Pa). The processing temperature is set to 25 ° C.

【0045】本実施例の場合、開口部405、406か
らも三フッ化塩素ガスが侵入するため端部だけでなく基
板面の内部からも剥離層102のエッチングが進行す
る。従って、実施の形態で説明した場合に比べて剥離層
102の除去工程のスループットを向上させることがで
きる。勿論、剥離層102以外の薄膜は三フッ化塩素ガ
スにエッチングされることはなく、シリコン膜からなる
活性層も酸化シリコン膜に保護されてエッチングされな
い。
In the case of this embodiment, since the chlorine trifluoride gas enters from the openings 405 and 406, the etching of the release layer 102 proceeds not only from the end but also from the inside of the substrate surface. Therefore, the throughput of the step of removing the separation layer 102 can be improved as compared with the case described in the embodiment. Of course, the thin films other than the release layer 102 are not etched by the chlorine trifluoride gas, and the active layer made of a silicon film is protected by the silicon oxide film and is not etched.

【0046】このようにして剥離層102の除去工程を
行うと、図4(E)に示すように開口部402、403
の底部にて第1層間絶縁膜404により素子形成基板1
01が接着された状態となる。実際には、図6に示すよ
うに画素の各所に開口部402、403が形成されるた
め十分な強度で接着しておくことが可能である。また、
本実施例に従えば素子形成基板101が対角3インチ以
上であっても十分に本発明を実施することが可能であ
る。
When the step of removing the release layer 102 is performed in this manner, the openings 402 and 403 are formed as shown in FIG.
Element forming substrate 1 at the bottom of the first interlayer insulating film 404.
01 is in a bonded state. Actually, as shown in FIG. 6, the openings 402 and 403 are formed at various positions of the pixel, so that it is possible to adhere with sufficient strength. Also,
According to the present embodiment, the present invention can be sufficiently implemented even if the element forming substrate 101 has a diagonal of 3 inches or more.

【0047】次に、図5(A)に示すように、開口部1
26を設けた第2層間絶縁膜407を形成する。第2層
間絶縁膜407は開口部405、406を塞ぐ効果も果
たしている。さらに、有機EL層127及び陰極128
を形成してEL素子が完成する。有機EL層127及び
陰極128の材料、構造もしくは形成方法に関しては実
施の形態の説明を参照すれば良い。
Next, as shown in FIG.
A second interlayer insulating film 407 provided with 26 is formed. The second interlayer insulating film 407 also has an effect of closing the openings 405 and 406. Further, the organic EL layer 127 and the cathode 128
Is formed to complete the EL element. For the material, structure, or formation method of the organic EL layer 127 and the cathode 128, the description of the embodiment mode can be referred to.

【0048】次に、図5(B)に示すように、第1接着
剤(本実施例ではエポキシ樹脂)129により固定基板
130を貼り合わせる。また、本実施例では固定基板1
30としてプラスチック基板を用いる。これよりEL素
子を完全に大気から遮断することができる。
Next, as shown in FIG. 5B, the fixed substrate 130 is bonded with a first adhesive (epoxy resin in this embodiment) 129. In the present embodiment, the fixed substrate 1
A plastic substrate is used as 30. Thus, the EL element can be completely shielded from the atmosphere.

【0049】次に、開口部402、403の底部にて接
着された素子形成基板101と第1層間絶縁膜404と
を分離する。この工程は機械的に行っても良いし、加熱
処理を行って分離することも可能である。
Next, the element forming substrate 101 and the first interlayer insulating film 404 bonded at the bottoms of the openings 402 and 403 are separated. This step may be performed mechanically, or may be performed by heat treatment for separation.

【0050】素子形成基板101と第1層間絶縁膜40
4とを分離したら、第2接着剤131を用いて貼り合わ
せ基板132を貼り合わせる。本実施例では第2接着剤
131としてポリイミド膜を用い、貼り合わせ基板13
2としてプラスチック基板を用いる。このように固定基
板130と貼り合わせ基板132を同一材料とすると熱
膨張係数が等しくなるので、温度変化による応力歪みの
影響を受けにくくすることができる。
Element forming substrate 101 and first interlayer insulating film 40
After separation from the bonding substrate 4, the bonding substrate 132 is bonded using the second adhesive 131. In this embodiment, a polyimide film is used as the second adhesive 131, and the bonding substrate 13 is used.
A plastic substrate is used as 2. As described above, when the fixed substrate 130 and the bonded substrate 132 are made of the same material, the thermal expansion coefficients are equal to each other.

【0051】本実施の形態により作製されたEL表示装
置は、フォトリソグラフィに必要なマスク枚数がトータ
ルで6枚と非常に少なく、高い歩留まりと低い製造コス
トを達成することができる。また、こうして形成された
EL表示装置は、プラスチック支持体の耐熱性に制限さ
れることなく形成されたTFTを半導体素子として用い
ることができるので非常に高性能なものとすることがで
きる。
In the EL display device manufactured according to this embodiment, the number of masks required for photolithography is extremely small as a total of six, and a high yield and a low manufacturing cost can be achieved. In addition, the EL display device thus formed can have extremely high performance because the TFT formed without being limited by the heat resistance of the plastic support can be used as a semiconductor element.

【0052】〔実施例2〕発明の実施の形態もしくは実
施例1において、ゲート電極を形成するところまでの作
製工程として本出願人による特開平9−312260号
公報、特開平10−247735号公報、特開平10−
270363号公報もしくは特開平11−191628
号公報のいずれかに記載の発明を用いることは有効であ
る。
Embodiment 2 In the embodiment or the embodiment 1 of the present invention, as a manufacturing process up to the point where a gate electrode is formed, Japanese Patent Application Laid-Open Nos. 9-313260 and 10-247735 by the present applicant, JP-A-10-
270363 or JP-A-11-191628
It is effective to use the invention described in any of the publications.

【0053】上記公報に記載された技術はいずれも非常
に高い結晶性を有する結晶質シリコン膜を形成するため
の技術であり、これらの技術を用いることで高性能なT
FTを形成することが可能である。これらの技術はいず
れも550℃以上の加熱処理を含むが、本発明の技術を
用いることで、素子形成基板として耐熱性の低いプラス
チック支持体を用いることが可能となる。
The techniques described in the above publications are all techniques for forming a crystalline silicon film having extremely high crystallinity. By using these techniques, a high-performance T
It is possible to form an FT. Each of these techniques includes a heat treatment at 550 ° C. or higher, but by using the technique of the present invention, a plastic support with low heat resistance can be used as an element formation substrate.

【0054】なお、本実施例の構成は、発明の実施の形
態もしくは実施例1の構成と自由に組み合わせて実施す
ることが可能である。
The configuration of the present embodiment can be implemented by freely combining with the configuration of the embodiment of the present invention or Embodiment 1.

【0055】〔実施例3〕本実施例では本発明を液晶表
示装置に用いた場合の例について説明する。説明には図
7を用いる。
[Embodiment 3] In this embodiment, an example in which the present invention is applied to a liquid crystal display device will be described. FIG. 7 is used for the description.

【0056】図7(A)において、701はガラスから
なる素子形成基板、702は非晶質シリコンからなる剥
離層、703は窒化酸化シリコンからなる絶縁膜、70
4は画素TFTである。画素TFT704は発明の実施
の形態に説明した工程に従って作製されたpチャネル型
TFTであり、本実施例では液晶に加えられる電圧を制
御するためのスイッチング素子として用いる。また、7
05は画素TFT704に電気的に接続された透明導電
膜からなる画素電極である。
In FIG. 7A, reference numeral 701 denotes an element forming substrate made of glass; 702, a release layer made of amorphous silicon; 703, an insulating film made of silicon nitride oxide;
Reference numeral 4 denotes a pixel TFT. The pixel TFT 704 is a p-channel TFT manufactured according to the steps described in the embodiments of the invention, and is used as a switching element for controlling a voltage applied to liquid crystal in this embodiment. Also, 7
Reference numeral 05 denotes a pixel electrode made of a transparent conductive film electrically connected to the pixel TFT 704.

【0057】以上に説明した構造までは発明の実施の形
態で説明した作製工程に従えば良い。勿論、TFTの構
造はボトムゲート型であっても良いし、TFTの作製工
程は発明の実施の形態で説明した工程に限定する必要は
ない。
Up to the structure described above, the manufacturing steps described in the embodiments of the present invention may be followed. Needless to say, the structure of the TFT may be a bottom gate type, and the manufacturing process of the TFT does not need to be limited to the process described in the embodiment of the invention.

【0058】画素TFT704及び画素電極705を形
成したら、樹脂からなる配向膜706を形成する。配向
膜706は印刷法により形成すれば良い。また、膜厚は
60nmとする。
After forming the pixel TFT 704 and the pixel electrode 705, an alignment film 706 made of resin is formed. The alignment film 706 may be formed by a printing method. The thickness is set to 60 nm.

【0059】次に、プラスチックフィルムからなる対向
基板707を用意し、その上にチタンからなる遮光膜7
08を120nmの厚さに、透明導電膜からなる対向電
極709を110nmの厚さに形成する。その上には配
向膜710を60nmの厚さに形成する。
Next, a counter substrate 707 made of a plastic film is prepared, and a light shielding film 7 made of titanium is formed thereon.
08 is formed to a thickness of 120 nm, and a counter electrode 709 made of a transparent conductive film is formed to a thickness of 110 nm. An alignment film 710 is formed thereon with a thickness of 60 nm.

【0060】次に、素子形成基板側の配向膜706の上
にシール剤(図示せず)をディスペンサー等の手段によ
り形成し、素子形成基板側の配向膜706と対向基板側
の配向膜710とを向かい合わせて貼り合わせ、加圧プ
レスして接着する。さらに、シール材に囲まれた領域に
真空注入法を用いて液晶711を注入し、シール材の注
入口を樹脂で塞いで液晶セルを完成させる。これらの工
程は公知の液晶セルの作製工程を実施すれば良い。
Next, a sealant (not shown) is formed on the alignment film 706 on the element formation substrate side by means of a dispenser or the like, and the alignment film 706 on the element formation substrate side and the alignment film 710 on the counter substrate side are formed. Are bonded face to face, and then pressed and bonded. Further, a liquid crystal 711 is injected into a region surrounded by the sealing material by using a vacuum injection method, and an injection port of the sealing material is closed with a resin to complete a liquid crystal cell. These steps may be performed by a known liquid crystal cell manufacturing step.

【0061】このとき、図示しないシール材としてはポ
リイミド、アクリルもしくはエポキシ樹脂を用いるが、
後に剥離層702をエッチングする際に選択比を確保し
うる材料を用いることが必要である。このシール剤は図
2(A)の第1接着剤129と同様の役割を果たす。
At this time, polyimide, acrylic or epoxy resin is used as a sealing material (not shown).
It is necessary to use a material that can secure a selectivity when etching the separation layer 702 later. This sealing agent plays a role similar to that of the first adhesive 129 in FIG.

【0062】次に、図7(B)に示すように、フッ化ハ
ロゲンを含むガス中に液晶セル全体を晒し、剥離層70
2をエッチングする。本実施例ではフッ化ハロゲンとし
て三フッ化塩素を用い、希釈ガスとしてアルゴンを用い
る。なお、本実施例では剥離層が素子形成基板701で
覆われた状態で処理を行うため剥離層702の露呈面か
ら徐々にエッチングされる。
Next, as shown in FIG. 7B, the entire liquid crystal cell is exposed to a gas containing halogen fluoride to form a release layer 70.
2 is etched. In this embodiment, chlorine trifluoride is used as halogen fluoride and argon is used as diluent gas. In this embodiment, since the treatment is performed in a state where the separation layer is covered with the element formation substrate 701, the etching is gradually performed from the exposed surface of the separation layer 702.

【0063】こうして最終的には剥離層702が完全に
除去され、窒化酸化シリコンからなる絶縁膜703が露
呈する。このとき、対向基板707が素子の形状を固定
する固定基板として機能する。
Thus, finally, peeling layer 702 is completely removed, and insulating film 703 made of silicon nitride oxide is exposed. At this time, the counter substrate 707 functions as a fixed substrate for fixing the shape of the element.

【0064】最後に、アクリル膜から第2接着剤712
を用いて貼り合わせ基板713を接着する。本実施例で
は、貼り合わせ基板713としてプラスチックフィルム
を用いる。勿論、プラスチック基板を用いても構わな
い。
Finally, the second adhesive 712 is removed from the acrylic film.
The bonding substrate 713 is bonded by using. In this embodiment, a plastic film is used as the bonding substrate 713. Of course, a plastic substrate may be used.

【0065】以上のように、本発明を液晶表示装置に用
いる場合は液晶の注入工程までを完了させて一旦液晶表
示装置を完成させ、その後に対向基板を固定基板として
利用しつつ剥離層の除去工程を行うことができる。その
ため、特に煩雑な工程を増やすことなく、高性能なTF
Tをプラスチック支持体の上に形成できる。
As described above, when the present invention is applied to a liquid crystal display device, the liquid crystal display device is once completed by completing the liquid crystal injection step, and then the release layer is removed while using the counter substrate as a fixed substrate. Steps can be performed. Therefore, a high-performance TF can be used without increasing the number of complicated steps.
T can be formed on a plastic support.

【0066】なお、実施例1で説明した方法により液晶
を注入する前に素子形成基板と貼り合わせ基板とを張り
替えることも可能である。その場合、実施例1の構成と
本実施例の構成とを組み合わせれば容易に実施すること
ができる。また、実施例2の構成を組み合わせても構わ
ない。
It is also possible to replace the element forming substrate and the bonded substrate before injecting the liquid crystal by the method described in the first embodiment. In that case, it can be easily implemented by combining the configuration of the first embodiment with the configuration of the present embodiment. Further, the configurations of the second embodiment may be combined.

【0067】〔実施例4〕本実施例では本発明を単純マ
トリクス型EL表示装置に用いた場合の例について説明
する。説明には図8を用いる。
[Embodiment 4] In this embodiment, an example in which the present invention is applied to a simple matrix type EL display device will be described. FIG. 8 is used for the description.

【0068】図8(A)において、801はガラスから
なる素子形成基板、802は非晶質シリコンからなる剥
離層、803は窒化酸化シリコンからなる絶縁膜、80
4は第1ストライプ電極であり、本実施例では透明導電
膜からなる陽極である。この陽極804は紙面と平行な
方向にストライプ状に複数本形成されている。
In FIG. 8A, reference numeral 801 denotes an element forming substrate made of glass; 802, a release layer made of amorphous silicon; 803, an insulating film made of silicon nitride oxide;
Reference numeral 4 denotes a first stripe electrode, which in this embodiment is an anode made of a transparent conductive film. A plurality of the anodes 804 are formed in a stripe shape in a direction parallel to the paper surface.

【0069】第1ストライプ電極804上には素子分離
用絶縁膜805及び樹脂膜からなるバンク806がスト
ライプ状に複数本形成される。これらは前述の第1スト
ライプ電極804と直交するように形成される。こうし
て素子分離用絶縁膜805及び樹脂膜からなるバンク8
06を形成したら、有機EL層807、第2ストライプ
電極(本実施例では金属膜からなる陰極)808を蒸着
法により形成する。第2ストライプ電極808はバンク
806によってストライプ状に分離されて形成されるた
め、第1ストライプ電極804と直交するように形成さ
れる。
On the first stripe electrode 804, a plurality of banks 806 made of a device isolation insulating film 805 and a resin film are formed in a stripe shape. These are formed so as to be orthogonal to the above-mentioned first stripe electrode 804. Thus, the bank 8 composed of the element isolation insulating film 805 and the resin film is formed.
After the formation of 06, an organic EL layer 807 and a second stripe electrode (a cathode made of a metal film in this embodiment) 808 are formed by a vapor deposition method. Since the second stripe electrode 808 is formed in a stripe shape by the bank 806, it is formed to be orthogonal to the first stripe electrode 804.

【0070】この時、第1ストライプ電極(ここでは陽
極)804、有機EL層807及び第2ストライプ電極
(ここでは陰極)808で形成されるコンデンサがEL
素子となる。勿論、第1ストライプ電極804、有機E
L層807及び第2ストライプ電極808の形成方法も
しくは形成材料は公知のものを用いることができる。
At this time, the capacitor formed of the first stripe electrode (here, anode) 804, the organic EL layer 807, and the second stripe electrode (here, cathode) 808 is an EL capacitor.
Element. Of course, the first stripe electrode 804, organic E
A known method or method for forming the L layer 807 and the second stripe electrode 808 can be used.

【0071】EL素子が形成されたら、第1接着剤(本
実施例ではアクリル)809を用いてプラスチックフィ
ルム810を接着する。こうしてEL素子が完全に大気
から遮断された状態とすることができる。
After the EL element is formed, the plastic film 810 is bonded using the first adhesive (acryl in this embodiment) 809. Thus, the EL element can be completely shielded from the atmosphere.

【0072】次に、EL素子の形成された基板を、三フ
ッ化塩素ガスを含む窒素雰囲気に晒し、剥離層802を
エッチングして除去する。そして、EL素子と素子形成
基板801とを分離させる。
Next, the substrate on which the EL element is formed is exposed to a nitrogen atmosphere containing chlorine trifluoride gas, and the peeling layer 802 is removed by etching. Then, the EL element and the element formation substrate 801 are separated.

【0073】次に、第2接着剤811を用いて貼り合わ
せ基板812を接着する。本実施例では第2接着剤81
1としてポリイミド膜を用い、貼り合わせ基板812と
してプラスチックフィルムを用いる。
Next, the bonded substrate 812 is bonded using the second adhesive 811. In this embodiment, the second adhesive 81 is used.
1 is a polyimide film, and a bonded substrate 812 is a plastic film.

【0074】本実施の形態により作製されたEL表示装
置は、フォトリソグラフィに必要なマスク枚数がトータ
ルで2枚と非常に少なく、高い歩留まりと低い製造コス
トを達成することができる。なお、本実施例の構成は実
施例2と組み合わせて実施することも可能である。
In the EL display device manufactured according to the present embodiment, the number of masks required for photolithography is extremely small as a total of two, and a high yield and a low manufacturing cost can be achieved. Note that the configuration of this embodiment can be implemented in combination with the second embodiment.

【0075】〔実施例5〕本実施例では、貼り合わせ基
板に予めカラーフィルタを設けて貼り合わせる場合につ
いて図9を用いて説明する。
[Embodiment 5] In this embodiment, a case where a color filter is provided in advance on a bonding substrate and bonding is performed will be described with reference to FIG.

【0076】まず、実施例2に従って図5(A)の状態
を得る。但し、本実施例では有機EL層127の代わり
に白色発光の有機EL層901を形成する。具体的に
は、発光層として、特開平8−96959号公報または
特開平9−63770号公報に記載された材料を用いれ
ば良い。本実施例では発光層として1,2−ジクロロメ
タンに、PVK(ポリビニルカルバゾール)、Bu−P
BD(2−(4'−tert−ブチルフェニル)−5−
(4''−ビフェニル)−1,3,4−オキサジアゾー
ル)、クマリン6、DCM1(4−ジシアノメチレン−
2−メチル−6−p−ジメチルアミノスチリル−4H−
ピラン)、TPB(テトラフェニルブタジエン)、ナイ
ルレッドを溶解したものを用いる。また、有機EL層9
01の上にはアルミニウムとリチウムとの合金膜からな
る陰極902を形成する。
First, the state shown in FIG. 5A is obtained according to the second embodiment. However, in this embodiment, an organic EL layer 901 emitting white light is formed instead of the organic EL layer 127. Specifically, a material described in JP-A-8-96959 or JP-A-9-63770 may be used as the light emitting layer. In this embodiment, PVK (polyvinyl carbazole), Bu-P
BD (2- (4'-tert-butylphenyl) -5-
(4 ″ -biphenyl) -1,3,4-oxadiazole), coumarin 6, DCM1 (4-dicyanomethylene-
2-methyl-6-p-dimethylaminostyryl-4H-
Pyran), TPB (tetraphenylbutadiene) and Nile Red are used. In addition, the organic EL layer 9
A cathode 902 made of an alloy film of aluminum and lithium is formed on 01.

【0077】次に、図9(B)に示すように、第1接着
剤(本実施例ではポリイミド膜)903を用いて固定基
板(本実施例ではプラスチックフィルム)904を貼り
合わせる。そして、素子形成基板101を分離する。
Next, as shown in FIG. 9B, a fixed substrate (plastic film in this embodiment) 904 is bonded using a first adhesive (polyimide film in this embodiment) 903. Then, the element forming substrate 101 is separated.

【0078】次に、図9(C)に示すように、赤色に対
応するカラーフィルタ905、緑色に対応するカラーフ
ィルタ906及び青色に対応するカラーフィルタ907
を設けた貼り合わせ基板(本実施例ではプラスチックフ
ィルム)を、第2接着剤(本実施例ではエポキシ樹脂)
909を用いて貼り合わせる。
Next, as shown in FIG. 9C, a color filter 905 corresponding to red, a color filter 906 corresponding to green, and a color filter 907 corresponding to blue.
A bonded substrate (a plastic film in this embodiment) provided with a second adhesive (epoxy resin in this embodiment)
909 together.

【0079】このとき、各カラーフィルタはスピンコー
ト法とフォトリソグラフィ技術との組み合わせもしくは
印刷法を用いて形成することができるため、問題なくプ
ラスチックフィルム上に形成することができる。また、
素子形成基板上にカラーフィルタを形成する場合に比べ
て、歩留まりの向上が期待できる。
At this time, since each color filter can be formed using a combination of spin coating and photolithography or using a printing method, it can be formed on a plastic film without any problem. Also,
An improvement in yield can be expected as compared with the case where a color filter is formed on an element formation substrate.

【0080】なお、本実施例の構成は、発明の実施の形
態もしくは実施例1〜4の構成と自由に組み合わせて実
施することが可能である。
The configuration of the present embodiment can be implemented by freely combining with the configuration of the embodiment of the invention or the embodiments 1 to 4.

【0081】〔実施例6〕本発明において、固定基板及
び/又は貼り合わせ基板の片面もしくは両面にDLC
(ダイヤモンドライクカーボン)膜を形成しておくこと
は有効である。但し、膜厚が厚すぎると透過率が落ちる
ので、50nm以下(好ましくは10〜20nm)とす
ると良い。
[Embodiment 6] In the present invention, DLC is applied to one or both surfaces of a fixed substrate and / or a bonded substrate.
It is effective to form a (diamond-like carbon) film in advance. However, if the film thickness is too large, the transmittance is reduced. Therefore, the thickness is preferably 50 nm or less (preferably 10 to 20 nm).

【0082】DLC膜の特徴としては、1550cm-1
くらいに非対称のピークを有し、1300cm-1くらい
に肩をもつラマンスペクトル分布を有する。また、微小
硬度計で測定した時に15〜25Paの硬度を示すとい
う特徴をもつ。
The characteristic of the DLC film is 1550 cm -1
And a Raman spectrum distribution with a shoulder at about 1300 cm -1 . Further, it has a feature of exhibiting a hardness of 15 to 25 Pa when measured by a micro hardness tester.

【0083】DLC膜はプラスチック支持体に比べて硬
度が大きく、熱伝導率も大きいため、表面保護のための
保護膜として設けておくことが有効である。
Since the DLC film has a higher hardness and a higher thermal conductivity than the plastic support, it is effective to provide it as a protective film for protecting the surface.

【0084】従って、プラスチック支持体を貼り付ける
前に予めDLC膜を成膜しておいて貼り付けるか、プラ
スチック支持体を貼り付けた後にDLC膜を成膜するこ
とも可能である。いずれにしてもDLC膜の成膜はスパ
ッタ法もしくはECRプラズマCVD法を用いれば良
い。
Therefore, it is also possible to form a DLC film before attaching the plastic support and to attach the DLC film, or to attach the plastic support and then form the DLC film. In any case, the DLC film may be formed by a sputtering method or an ECR plasma CVD method.

【0085】なお、本実施例の構成は実施例1〜5のい
ずれの構成とも自由に組み合わせて実施することが可能
である。
The structure of this embodiment can be implemented by freely combining with any structure of the first to fifth embodiments.

【0086】〔実施例7〕実施例1、2、4〜6ではE
L素子を用いた表示装置を例にして説明してきたが、本
発明はEC(エレクトロクロミクス)表示装置、フィー
ルドエミッションディスプレイ(FED)または半導体
を用いた発光ダイオードを有する表示装置に用いること
も可能である。
[Embodiment 7] In Embodiments 1, 2, 4 to 6, E
Although the display device using the L element has been described as an example, the present invention can also be used for an EC (electrochromic) display device, a field emission display (FED), or a display device having a light emitting diode using a semiconductor. It is.

【0087】[0087]

【発明の効果】本発明では、半導体素子の作製過程にお
いてプラスチックよりも耐熱性の高い基板(素子形成基
板)を用いるため、電気特性の高い半導体素子を作製す
ることができる。さらに、半導体素子及び発光素子を形
成した後で前記素子形成基板を剥離し、プラスチック支
持体を貼り合わせる。
According to the present invention, a substrate (device forming substrate) having higher heat resistance than plastic is used in the process of manufacturing a semiconductor device, so that a semiconductor device having high electric characteristics can be manufactured. Further, after forming the semiconductor element and the light emitting element, the element forming substrate is peeled off, and a plastic support is attached.

【0088】そのため、プラスチック支持体を支持基板
とし、且つ、高性能な表示装置を作製することが可能と
なる。また、支持基板がプラスチックであるため、フレ
キシブルな表示装置にすることもでき、且つ、軽量な表
示装置とすることが可能である。
Therefore, it is possible to manufacture a high-performance display device using a plastic support as a support substrate. Further, since the supporting substrate is made of plastic, a flexible display device can be provided, and a lightweight display device can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 EL表示装置の作製工程を示す図。FIG. 1 illustrates a manufacturing process of an EL display device.

【図2】 EL表示装置の作製工程を示す図。FIG. 2 illustrates a manufacturing process of an EL display device.

【図3】 EL表示装置の上面構造及び回路構成を示す
図。
FIG. 3 illustrates a top structure and a circuit configuration of an EL display device.

【図4】 EL表示装置の作製工程を示す図。FIG. 4 illustrates a manufacturing process of an EL display device.

【図5】 EL表示装置の作製工程を示す図。FIG. 5 illustrates a manufacturing process of an EL display device.

【図6】 EL表示装置の上面構造を示す図。FIG. 6 is a diagram illustrating a top structure of an EL display device.

【図7】 液晶表示装置の作製工程を示す図。FIG. 7 illustrates a manufacturing process of a liquid crystal display device.

【図8】 EL表示装置の作製工程を示す図。FIG. 8 illustrates a manufacturing process of an EL display device.

【図9】 EL表示装置の作製工程を示す図。FIG. 9 illustrates a manufacturing process of an EL display device.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H01L 21/336 H01L 29/78 626C H05B 33/14 627D ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI theme coat ゛ (Reference) H01L 21/336 H01L 29/78 626C H05B 33/14 627D

Claims (9)

【特許請求の範囲】[Claims] 【請求項1】素子形成基板の上に剥離層を形成し、該剥
離層の上に絶縁膜を形成し、該絶縁膜の上に発光素子を
形成し、該発光素子の上に第1接着剤を用いて固定基板
を貼り合わせ、該固定基板を貼り合わせた後にフッ化ハ
ロゲンを含むガスに晒すことにより前記剥離層を除去
し、前記絶縁膜と貼り合わせ基板とを第2接着剤を用い
て貼り合わせることを特徴とする表示装置の作製方法。
An insulating film is formed on the release layer; a light emitting element is formed on the insulating film; and a first adhesive is formed on the light emitting element. The fixed substrate is attached using an agent, and after the fixed substrate is attached, the release layer is removed by exposing to a gas containing halogen fluoride, and the insulating film and the attached substrate are bonded using a second adhesive. A method for manufacturing a display device, comprising:
【請求項2】素子形成基板の上に剥離層を形成し、該剥
離層の上に絶縁膜を形成し、該絶縁膜の上に半導体素子
を形成し、該半導体素子に電気的に接続される発光素子
を形成し、該発光素子の上に第1接着剤を用いて固定基
板を貼り合わせ、該固定基板を貼り合わせた後にフッ化
ハロゲンを含むガスに晒すことにより前記剥離層を除去
し、前記絶縁膜と貼り合わせ基板とを第2接着剤を用い
て貼り合わせることを特徴とする表示装置の作製方法。
2. A release layer is formed on an element forming substrate, an insulating film is formed on the release layer, a semiconductor element is formed on the insulating film, and the semiconductor element is electrically connected to the semiconductor element. Forming a light emitting element, bonding a fixed substrate on the light emitting element using a first adhesive, removing the peeling layer by exposing to a gas containing halogen fluoride after bonding the fixed substrate. And bonding the insulating film and the bonded substrate using a second adhesive.
【請求項3】素子形成基板の上に剥離層を形成し、該剥
離層の上に絶縁膜を形成し、該絶縁膜の上に活性層、ゲ
ート絶縁膜及びゲート電極を形成し、前記ゲート絶縁
膜、前記絶縁膜及び前記剥離層に開口部を形成し、前記
ゲート電極を覆って第1層間絶縁膜を形成し、前記第1
層間絶縁膜の上に配線及び画素電極を形成し、前記第1
層間絶縁膜、前記ゲート絶縁膜及び前記絶縁膜に開口部
を形成して前記剥離層を露出させ、フッ化ハロゲンを含
むガスに晒すことにより前記剥離層を除去し、前記配線
及び前記画素電極を覆って第2層間絶縁膜を形成し、該
第2層間絶縁膜をエッチングして前記画素電極を露出さ
せ、前記画素電極の上に発光性材料及び陰極を形成し、
該陰極の上に第1接着剤を用いて固定基板を貼り合わ
せ、該固定基板を貼り合わせた後、前記素子形成基板を
前記第1層間絶縁膜と分離して、前記絶縁膜と貼り合わ
せ基板とを第2接着剤を用いて貼り合わせることを特徴
とする表示装置の作製方法。
Forming a release layer on the element formation substrate, forming an insulating film on the release layer, forming an active layer, a gate insulating film and a gate electrode on the insulating film; Forming an opening in the insulating film, the insulating film and the release layer, forming a first interlayer insulating film covering the gate electrode,
Forming a wiring and a pixel electrode on the interlayer insulating film;
An opening is formed in the interlayer insulating film, the gate insulating film and the insulating film to expose the release layer, and the release layer is removed by exposing to a gas containing halogen fluoride, and the wiring and the pixel electrode are removed. Forming a second interlayer insulating film covering the second interlayer insulating film, exposing the pixel electrode by etching the second interlayer insulating film, forming a luminescent material and a cathode on the pixel electrode;
A fixed substrate is bonded on the cathode using a first adhesive, and after bonding the fixed substrate, the element forming substrate is separated from the first interlayer insulating film, and the insulating film and the bonded substrate are separated. Are bonded together using a second adhesive.
【請求項4】請求項1乃至請求項3のいずれか一におい
て、前記第1接着剤としてポリイミド、アクリルもしく
はエポキシ樹脂を用いることを特徴とする表示装置の作
製方法。
4. The method for manufacturing a display device according to claim 1, wherein polyimide, acrylic, or epoxy resin is used as the first adhesive.
【請求項5】請求項1乃至請求項4のいずれか一におい
て、前記貼り合わせ基板として前記固定基板と同一の材
料を用いることを特徴とする表示装置の作製方法。
5. The method for manufacturing a display device according to claim 1, wherein the same material as that of the fixed substrate is used for the bonded substrate.
【請求項6】素子形成基板の上に剥離層を形成し、該剥
離層の上に絶縁膜を形成し、該絶縁膜の上に第1ストラ
イプ電極を形成し、第2ストライプ電極の形成された固
定基板をシール剤により前記素子形成基板の上に貼り合
わせ、前記第1ストライプ電極と前記第2ストライプ電
極との間に液晶を注入し、該液晶を注入した後にフッ化
ハロゲンを含むガスに晒すことにより前記剥離層を除去
し、前記絶縁膜と貼り合わせ基板とを第2接着剤を用い
て貼り合わせることを特徴とする表示装置の作製方法。
6. A release layer is formed on an element forming substrate, an insulating film is formed on the release layer, a first stripe electrode is formed on the insulating film, and a second stripe electrode is formed. The fixed substrate is bonded onto the element forming substrate with a sealant, a liquid crystal is injected between the first stripe electrode and the second stripe electrode, and after injecting the liquid crystal, a gas containing halogen fluoride is injected. A method for manufacturing a display device, comprising: removing the release layer by exposing; and bonding the insulating film and a bonded substrate together using a second adhesive.
【請求項7】素子形成基板の上に剥離層を形成し、該剥
離層の上に絶縁膜を形成し、該絶縁膜の上に活性層、ゲ
ート絶縁膜及びゲート電極を形成し、前記ゲート電極を
覆って第1層間絶縁膜を形成し、前記第1層間絶縁膜の
上に配線及び画素電極を形成し、対向電極を設けた固定
基板をシール剤により前記素子形成基板の上に貼り合わ
せ、前記画素電極と前記対向電極との間に液晶を注入
し、該液晶を注入した後にフッ化ハロゲンを含むガスに
晒すことにより前記剥離層を除去し、前記絶縁膜と貼り
合わせ基板とを第2接着剤を用いて貼り合わせることを
特徴とする表示装置の作製方法。
7. A release layer is formed on an element forming substrate, an insulating film is formed on the release layer, an active layer, a gate insulating film, and a gate electrode are formed on the insulating film. Forming a first interlayer insulating film covering the electrodes, forming wirings and pixel electrodes on the first interlayer insulating film, and bonding a fixed substrate provided with a counter electrode on the element forming substrate with a sealant; Injecting liquid crystal between the pixel electrode and the counter electrode, removing the release layer by injecting the liquid crystal, and then exposing the insulating film and the bonded substrate to a gas containing halogen fluoride. 2. A method for manufacturing a display device, wherein the display device is attached using an adhesive.
【請求項8】請求項6または請求項7において、前記第
1接着剤としてポリイミド、アクリルもしくはエポキシ
樹脂を用いることを特徴とする表示装置の作製方法。
8. The method for manufacturing a display device according to claim 6, wherein a polyimide, acrylic, or epoxy resin is used as the first adhesive.
【請求項9】請求項6または請求項7において、前記貼
り合わせ基板として前記固定基板と同一の材料を用いる
ことを特徴とする表示装置の作製方法。
9. The method for manufacturing a display device according to claim 6, wherein the same material as the fixed substrate is used for the bonded substrate.
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