JP2001210752A - High frequency semiconductor device - Google Patents

High frequency semiconductor device

Info

Publication number
JP2001210752A
JP2001210752A JP2000024762A JP2000024762A JP2001210752A JP 2001210752 A JP2001210752 A JP 2001210752A JP 2000024762 A JP2000024762 A JP 2000024762A JP 2000024762 A JP2000024762 A JP 2000024762A JP 2001210752 A JP2001210752 A JP 2001210752A
Authority
JP
Japan
Prior art keywords
frequency semiconductor
frequency
semiconductor circuit
dielectric
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000024762A
Other languages
Japanese (ja)
Other versions
JP4206185B2 (en
Inventor
Maroaki Maetani
麿明 前谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2000024762A priority Critical patent/JP4206185B2/en
Publication of JP2001210752A publication Critical patent/JP2001210752A/en
Application granted granted Critical
Publication of JP4206185B2 publication Critical patent/JP4206185B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PROBLEM TO BE SOLVED: To provide a high frequency semiconductor device which realizes the multi-chip mounting intended to reduce the number of parts and miniaturize the device and has good high frequency characteristics at a low manufacturing cost. SOLUTION: The high frequency semiconductor device is such that a plurality of mounting parts with electrode wirings 111-113, 121-123 to which electrodes of a plurality of high frequency circuit elements are electrically connected is provided on the upside of a dielectric board 1, high frequency semiconductor circuit elements 41, 42 are mounted on each mounting part to electrically connect their electrodes to the electrode wirings 111-113, 121-123, a dielectric cover 2 having a plurality of recesses 31, 32 corresponding to the mounting parts on the downside and connection wirings 201-203 formed between the recesses 31, 32 is mounted on the dielectric board 1 to house the high frequency semiconductor elements 41, 42 in the recesses 31, 32 every mounting part, and the electrode wirings 111-113, 121-123 between the mounting parts are mutually electrically connected through the connection wirings 201-203.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は高周波帯域において
動作する高周波半導体回路素子を複数個搭載実装して構
成された高周波半導体装置に関し、特に高周波特性が良
好で個々の高周波半導体回路素子を容易に交換可能とし
た、装置全体の良品率の改善が容易な高周波半導体装置
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency semiconductor device comprising a plurality of high-frequency semiconductor circuit elements operating in a high-frequency band, and more particularly to a high-frequency semiconductor device having good high-frequency characteristics and easily replacing individual high-frequency semiconductor circuit elements. The present invention relates to a high-frequency semiconductor device capable of easily improving the non-defective rate of the entire device.

【0002】[0002]

【従来の技術】一般に、通信機器やセンサ等における無
線部を構成する高周波半導体装置においては、増幅器や
周波数変換器・発振器といった各種の高周波半導体回路
素子が用いられている。マイクロ波帯以上の高周波、特
にミリ波帯以上の周波数帯域においては、これらの半導
体回路として、例えばガリウムひ素(GaAs)等のII
I−V族化合物半導体によるモノリシック集積回路(M
MIC)の形態を有する回路素子が主として使用され
る。このような高周波半導体回路素子は、その回路自体
を保護し、また高周波装置の製造工程における取り扱い
を容易化する目的から、半導体パッケージに封止して使
用されるか、または無線部もしくは装置全体が封止され
ている状態としてキャリア基板(外部電気回路基板)に
実装して使用されている。
2. Description of the Related Art In general, various high-frequency semiconductor circuit elements such as amplifiers, frequency converters, and oscillators are used in high-frequency semiconductor devices constituting a radio section in communication equipment, sensors, and the like. At high frequencies above the microwave band, especially at frequencies above the millimeter wave band, these semiconductor circuits include, for example, II such as gallium arsenide (GaAs).
Monolithic integrated circuit (M
Circuit elements having the form (MIC) are mainly used. Such a high-frequency semiconductor circuit element is used by being sealed in a semiconductor package for the purpose of protecting the circuit itself and facilitating the handling in the manufacturing process of the high-frequency device, or the radio section or the entire device is used. It is used by being mounted on a carrier substrate (external electric circuit substrate) in a sealed state.

【0003】これまでは、高周波半導体回路素子単体の
良品率が高周波半導体装置全体の良品率に与える影響を
小さくするために、複数の半導体回路素子を各々半導体
パッケージもしくはキャリア基板に実装し、各半導体回
路素子単体の特性を検査した後に、高周波半導体装置全
体として組み立てる必要があった。この場合、各半導体
回路素子の検査において不良品が見つかれば、検査工程
において取り除くことにより、高周波半導体装置全体の
組立てには良品である高周波半導体回路素子のみを使用
できるという利点が得られることになる。
Heretofore, in order to reduce the influence of the non-defective rate of a single high-frequency semiconductor circuit element on the non-defective rate of the entire high-frequency semiconductor device, a plurality of semiconductor circuit elements are mounted on a semiconductor package or a carrier substrate, respectively. After inspecting the characteristics of a single circuit element, it is necessary to assemble the entire high-frequency semiconductor device. In this case, if an inferior product is found in the inspection of each semiconductor circuit element, it is removed in the inspection process, so that there is obtained an advantage that only a good high-frequency semiconductor circuit element can be used for assembling the entire high-frequency semiconductor device. .

【0004】しかしながら、このように高周波半導体回
路素子単体レベルの検査のために半導体回路素子の各々
を半導体パッケージもしくはキャリア基板に実装するこ
とは、それにより部品点数が増加し、また高周波半導体
装置全体として大型化してしまうという問題点がある。
また、半導体回路素子間の接続において、半導体回路素
子と半導体パッケージもしくはキャリア基板間の相互接
続、または半導体パッケージもしくはキャリア基板間の
相互接続、さらには半導体パッケージもしくはキャリア
基板と装置におけるマザーボードもしくは接続用基板間
の相互接続といった接続上の冗長性が生じてしまうため
に、高周波半導体装置としての高周波特性が劣化してし
まうという問題点も生じることとなる。
However, mounting each of the semiconductor circuit elements on a semiconductor package or a carrier substrate for the inspection of a single high-frequency semiconductor circuit element as described above increases the number of components and increases the overall number of high-frequency semiconductor devices. There is a problem that the size is increased.
In connection between semiconductor circuit elements, interconnection between a semiconductor circuit element and a semiconductor package or a carrier substrate, or interconnection between a semiconductor package or a carrier substrate, and a semiconductor package or a carrier substrate and a motherboard or a connection substrate in a device. Since the connection redundancy such as the interconnection between them occurs, there is also a problem that the high-frequency characteristics of the high-frequency semiconductor device are deteriorated.

【0005】このため、複数の高周波半導体回路素子を
単一の半導体パッケージもしくはキャリア基板に実装す
ることにより、部品点数の削減・装置の小型化・高周波
特性の改善を図ろうとするマルチチップ実装が近年提案
されている。かかる実装形態は、従来は計算機のような
情報機器内部の半導体装置を構成する際に用いられてい
た実装形態であるが、近年は通信機器内部の高周波半導
体装置に対しても応用されつつある。
[0005] For this reason, multi-chip mounting has recently been attempted in which a plurality of high-frequency semiconductor circuit elements are mounted on a single semiconductor package or carrier substrate to reduce the number of components, downsize the device, and improve high-frequency characteristics. Proposed. Such a mounting form is a mounting form which has been conventionally used when configuring a semiconductor device inside an information device such as a computer, but has recently been applied to a high-frequency semiconductor device inside a communication device.

【0006】一方、通信機器の無線部等を構成する高周
波半導体装置は、装置構成の要件として前述したように
発振器や増幅器等の半導体回路を有しているが、中でも
搬送波を発生する目的で用いられる発振器とその周辺回
路部位は、不要高周波信号の干渉を避ける目的から、低
雑音増幅器や周波数変換器およびその周辺回路から成る
受信系回路部位、ならびに送信用電力増幅器や周波数変
換器およびその周辺回路からなる送信系回路部位と電気
的に隔離された構成をとる場合が多い。したがって、高
周波半導体装置全体の構造としては、受信系回路部位と
送信系回路部位と発振回路部位とを独立した筐体構造に
各々収納するような形態を有することが望ましい。
On the other hand, a high-frequency semiconductor device constituting a radio section or the like of a communication device has a semiconductor circuit such as an oscillator and an amplifier as described above as a requirement of the device configuration. Among them, a high-frequency semiconductor device is used for generating a carrier wave. In order to avoid unnecessary high-frequency signal interference, the oscillator and its peripheral circuits are provided with a receiving circuit including a low-noise amplifier, a frequency converter and its peripheral circuits, and a transmission power amplifier, a frequency converter and its peripheral circuits. In many cases, it is configured to be electrically isolated from the transmission system circuit part composed of Therefore, it is desirable that the entire high-frequency semiconductor device has a structure in which the receiving circuit portion, the transmitting circuit portion, and the oscillation circuit portion are housed in independent housing structures.

【0007】また、前述のような高周波半導体装置にお
いて、部品点数の削減・装置の小型化・高周波特性の向
上を目的としてマルチチップ実装を行なう場合は、複数
の高周波半導体回路素子が実装可能な構造を有する半導
体パッケージもしくはキャリア基板を、さらに前述のよ
うな受信系回路部位と送信系回路部位と発振回路部位と
を電気的に隔離できるような複数の筐体構造を有する構
造として実現する必要が生じる。
In the above-described high-frequency semiconductor device, when a multi-chip mounting is performed for the purpose of reducing the number of components, miniaturizing the device, and improving high-frequency characteristics, a structure in which a plurality of high-frequency semiconductor circuit elements can be mounted. It is necessary to realize a semiconductor package or a carrier substrate having a plurality of housing structures capable of electrically isolating the receiving circuit portion, the transmitting circuit portion, and the oscillation circuit portion as described above. .

【0008】このような構造の従来例として、鉄−ニッ
ケル−コバルト合金等の金属ベース上に、鉄−ニッケル
−コバルト合金等からなる枠体を銀ロウ等により複数個
接合し、無線回路の構成に応じた接続を実現するために
該当する枠体の一部に切り欠き部を設け、この切り欠き
部にマイクロストリップ線路/ストリップ線路/マイク
ロストリップ線路変換構造を有する入出力接続用部品を
嵌合・接着しているような構造を有する、いわゆるメタ
ルウォールパッケージがある。
As a conventional example of such a structure, a plurality of frames made of an iron-nickel-cobalt alloy or the like are joined on a metal base such as an iron-nickel-cobalt alloy by a silver brazing or the like to form a radio circuit. A notch is provided in a part of the frame in order to realize the connection according to the above, and an input / output connection component having a microstrip line / strip line / microstrip line conversion structure is fitted into the notch. -There is a so-called metal wall package having a structure in which it is bonded.

【0009】かかるメタルウォールパッケージによるマ
ルチチップパッケージにおいては、各半導体回路素子は
単体で個別に評価しておき、良品であることが確認され
た半導体回路素子のみを用いてこれを金スズ等を用いて
金属ベース上に実装し、半導体回路素子の電極を入出力
接続用部品に直接もしくは線路基板を介して金リボンも
しくは金ワイヤ等により相互接続することにより、枠体
外部との電気的接続を実現する構造となっている。
In such a multi-chip package using a metal wall package, each semiconductor circuit element is individually evaluated individually, and only a semiconductor circuit element that has been confirmed to be a good product is used, and the semiconductor circuit element is made of gold tin or the like. By connecting the electrodes of the semiconductor circuit element to the input / output connection components directly or via the line board with the gold ribbon or gold wire, etc., the electrical connection with the outside of the frame is realized. It has a structure to do.

【0010】[0010]

【発明が解決しようとする課題】しかしながら前述のよ
うなメタルウォールパッケージは、枠体に設けた切り欠
き部に入出力接続用部品を嵌合・接着しているような構
造であるために、気密性を保証し、かつ良好な高周波特
性を実現するためには、高い工作精度を必要とし、製作
が困難なものとなってしまうという問題点があった。ま
た、特にミリ波のような高周波帯において使用できる部
品は製造における良品率が低く、そのため一般に製造コ
ストが高くなってしまうという問題点もあった。
However, the metal wall package as described above has a structure in which an input / output connection component is fitted and adhered to a notch provided in a frame, so that it is airtight. In order to guarantee the performance and to realize good high-frequency characteristics, there is a problem that high working accuracy is required and manufacturing becomes difficult. In addition, there is also a problem that parts which can be used particularly in a high frequency band such as a millimeter wave have a low non-defective product rate in manufacturing, and thus generally increase manufacturing costs.

【0011】本発明は上記従来技術における問題点に鑑
みてなされたものであり、その目的は、部品点数の削減
および装置の小型化を目的としたマルチチップ実装を実
現しつつ、所望の高周波半導体回路素子間を電気的に隔
離して良好な高周波特性を実現し、しかも製造コストを
低く抑えることができる高周波半導体装置を提供するこ
とにある。
The present invention has been made in view of the above-mentioned problems in the prior art, and has as its object to realize a desired high-frequency semiconductor while realizing a multi-chip mounting for the purpose of reducing the number of components and miniaturizing the device. It is an object of the present invention to provide a high-frequency semiconductor device that achieves good high-frequency characteristics by electrically isolating circuit elements from each other and that can keep manufacturing costs low.

【0012】[0012]

【課題を解決するための手段】本発明の高周波半導体装
置は、誘電体基板の上面に複数の高周波半導体回路素子
の電極が電気的に接続される電極配線が形成された複数
の搭載部を設け、この各搭載部に高周波半導体回路素子
を搭載してその電極を前記電極配線に電気的に接続し、
前記誘電体基板上に、下面に前記搭載部に対応する複数
の凹部を設けるとともにこの凹部間に接続配線が形成さ
れた誘電体蓋体を取着して、前記搭載部毎に前記凹部内
に前記高周波半導体回路素子を収容するとともに前記搭
載部間の前記電極配線同士を前記接続配線で電気的に接
続したことを特徴とするものである。
According to the high frequency semiconductor device of the present invention, a plurality of mounting portions are provided on an upper surface of a dielectric substrate, on which electrode wirings for electrically connecting a plurality of high frequency semiconductor circuit elements are formed. Mounting a high-frequency semiconductor circuit element on each mounting portion and electrically connecting its electrode to the electrode wiring,
On the dielectric substrate, a plurality of concave portions corresponding to the mounting portions are provided on the lower surface, and a dielectric lid body in which connection wiring is formed between the concave portions is attached, and each mounting portion is provided in the concave portion. The high-frequency semiconductor circuit element is accommodated, and the electrode wires between the mounting portions are electrically connected to each other by the connection wires.

【0013】[0013]

【発明の実施の形態】本発明の高周波半導体装置によれ
ば、上記構成により、個々の高周波半導体回路素子の特
性評価による検査は、この誘電体基板上にこの高周波半
導体回路素子が実装された状態の、誘電体蓋体を取り付
ける前の段階で行ない、実装された各高周波半導体回路
素子が良品であることを確認した後に誘電体蓋体を誘電
体基板上に取着することにより、高周波半導体装置とし
て完成させることができる。このとき、誘電体蓋体に形
成された凹部に収納される各高周波半導体回路素子の電
極と電気的に接続されている電極配線の端部に設けられ
た接続配線との接続用領域と、誘電体蓋体の下面に形成
された凹部間を電気的に接続するための接続配線の端部
に設けられた電極配線との接続用領域とを導電性接着剤
等により接着して電気的に接続することにより、凹部内
に収容された各高周波半導体回路素子間の電気的接続を
実現して高周波回路を構成し、かつ、例えば発振回路・
受信系回路・送信系回路等をそれぞれ搭載部毎に凹部内
へ収納することにより電気的に隔離することが可能とな
る。そのため、従来のような特にミリ波のような高周波
帯において使用できる部品の良品率が低く、また製造コ
ストが高いメタルウォールパッケージを用いた場合と比
較して、部品点数の削減、装置の小型化を目的としたマ
ルチチップ実装を実現しつつ、所望の高周波半導体回路
素子間を電気的に隔離して良好な高周波特性を実現し、
しかも製造コストを低く抑えることができる高周波半導
体装置を提供することができる。
According to the high-frequency semiconductor device of the present invention, the inspection by evaluating the characteristics of each of the high-frequency semiconductor circuit elements according to the above configuration is performed in a state where the high-frequency semiconductor circuit elements are mounted on the dielectric substrate. Of the high-frequency semiconductor device by mounting the dielectric cover on the dielectric substrate after confirming that each mounted high-frequency semiconductor circuit element is non-defective. Can be completed as At this time, an area for connection with a connection wiring provided at an end of an electrode wiring electrically connected to an electrode of each high-frequency semiconductor circuit element housed in a recess formed in the dielectric cover, A connection area for connection with an electrode wiring provided at an end of a connection wiring for electrically connecting between recesses formed on the lower surface of the body lid is electrically connected to the connection wiring with a conductive adhesive or the like. By doing so, an electrical connection between each high-frequency semiconductor circuit element housed in the recess is realized to constitute a high-frequency circuit, and, for example, an oscillation circuit
By housing the receiving system circuit, the transmitting system circuit, and the like in the concave portion for each mounting portion, it becomes possible to electrically isolate them. As a result, the number of parts can be reduced and the size of the device can be reduced compared to the case where a metal wall package that uses a high-frequency band such as a millimeter wave can be used, and the manufacturing cost is high. While realizing multi-chip mounting for the purpose, electrically isolate desired high-frequency semiconductor circuit elements to achieve good high-frequency characteristics,
In addition, a high-frequency semiconductor device that can reduce the manufacturing cost can be provided.

【0014】以下、図面に基づいて本発明の高周波半導
体装置を詳細に説明する。
Hereinafter, a high-frequency semiconductor device of the present invention will be described in detail with reference to the drawings.

【0015】図1は本発明の高周波半導体装置の実施の
形態の一例の概略構成を示す分解斜視図である。図1に
おいて、1は誘電体基板であり、41・42は、誘電体基板
1の上面に設けられた搭載部に実装搭載された高周波半
導体回路素子である。これら複数の高周波半導体回路素
子41・42のそれぞれの入出力用電極(図示せず)は、ウェ
ハプローブによる評価を実施できるように、素子の下面
において信号導体および信号導体の両側に接地導体が同
一平面上に形成されているコプレーナ線路の形態を有し
ている。
FIG. 1 is an exploded perspective view showing a schematic configuration of an embodiment of the high-frequency semiconductor device according to the present invention. In FIG. 1, reference numeral 1 denotes a dielectric substrate, and reference numerals 41 and 42 denote high frequency semiconductor circuit elements mounted and mounted on a mounting portion provided on the upper surface of the dielectric substrate 1. The input / output electrodes (not shown) of each of the plurality of high-frequency semiconductor circuit elements 41 and 42 have the same signal conductor on the lower surface of the element and ground conductors on both sides of the signal conductor on the lower surface of the element so that evaluation by a wafer probe can be performed. It has the form of a coplanar line formed on a plane.

【0016】101〜103・111〜113・121〜123・131〜133
は、それぞれ誘電体基板1の上面の搭載部に形成され
た、高周波半導体回路素子41・42の電極が電気的に接続
される電極配線である。ここでは、コプレーナ線路の形
態となっている高周波半導体回路素子41・42の電極に対
応して、高周波用線路導体として形成された信号用電極
101・111・121・131とその両側の接地用電極102・103・
112・113・122・123・132・133とが形成されている。誘
電体基板1上に形成されたこれら信号用電極101・111・
121・131および接地用電極102・103・112・113・122・1
23・132・133によって構成されるコプレーナ線路の特性
インピーダンスは、誘電体基板1の厚みと比誘電率、な
らびに信号用電極の幅、および信号用電極と接地用電極
の間隔により決定される。通常は、高周波半導体回路素
子41・42の入出力用電極の特性インピーダンスと整合す
るようにその値が決定される。
[0016] 101-103.111-113.121-123.131-133
Are electrode wirings formed on the mounting portion on the upper surface of the dielectric substrate 1 and electrically connected to the electrodes of the high-frequency semiconductor circuit elements 41 and 42, respectively. Here, signal electrodes formed as high-frequency line conductors correspond to the electrodes of high-frequency semiconductor circuit elements 41 and 42 in the form of coplanar lines.
101 ・ 111 ・ 121 ・ 131 and grounding electrodes 102 ・ 103 ・ on both sides
112, 113, 122, 123, 132 and 133 are formed. These signal electrodes 101, 111 and 111 formed on the dielectric substrate 1.
121 ・ 131 and ground electrode 102 ・ 103 ・ 112 ・ 113 ・ 122 ・ 1
The characteristic impedance of the coplanar line constituted by 23, 132 and 133 is determined by the thickness and relative permittivity of the dielectric substrate 1, the width of the signal electrode, and the distance between the signal electrode and the ground electrode. Normally, the value is determined so as to match the characteristic impedance of the input / output electrodes of the high-frequency semiconductor circuit elements 41 and 42.

【0017】なお、誘電体基板1上面の搭載部におい
て、高周波半導体回路素子41・42は基板表面と同一面上
に搭載されていてもよく、基板上面に形成した凹部内に
搭載されていてもよい。また、高周波半導体回路素子41
・42と各電極配線101〜103・111〜113・121〜123・131
〜133との電気的な接続は、ワイヤボンディングによっ
てもよく、いわゆるフリップチップ実装法によって行な
ってもよい。
In the mounting portion on the upper surface of the dielectric substrate 1, the high-frequency semiconductor circuit elements 41 and 42 may be mounted on the same surface as the substrate surface, or may be mounted in a recess formed on the upper surface of the substrate. Good. In addition, the high-frequency semiconductor circuit element 41
・ 42 and each electrode wiring 101 ~ 103 ・ 111 ~ 113 ・ 121 ~ 123 ・ 131
The electrical connection with -133 may be made by wire bonding, or by a so-called flip-chip mounting method.

【0018】2は誘電体蓋体であり、31・32は、誘電体
蓋体2の下面に設けられた、下面に開口を有する凹部31
・32である。これら複数の凹部31・32は、誘電体基板1
の上面の搭載部毎にそれぞれ高周波半導体回路素子41・
42を実装した後に、誘電体蓋体2を誘電体基板1に取り
付けた状態において、搭載部毎にその内部にそれぞれ高
周波半導体回路素子41・42が収容される位置および大き
さに形成されている。
Reference numeral 2 denotes a dielectric cover, and 31 and 32 denote recesses 31 provided on the lower surface of the dielectric cover 2 and having openings on the lower surface.
・ It is 32. The plurality of recesses 31 and 32 are
Each high-frequency semiconductor circuit element 41
In a state where the dielectric lid 2 is mounted on the dielectric substrate 1 after mounting the high frequency semiconductor circuit elements 41 and 42 therein, each mounting portion is formed in a position and a size for accommodating therein. .

【0019】201〜203は誘電体蓋体2の下面の凹部31・
32間に形成された接続配線である。これら接続配線201
〜203は、その両端部がそれぞれ両端側の搭載部31・32
の各電極配線111〜113・121〜123と電気的に接続されて
搭載部間でそれら電極配線111〜113・121〜123同士を電
気的に接続する位置に、高周波用線路導体として形成さ
れている。ここでは、コプレーナ線路の形態の電極配線
111〜113・121〜123に対応させて、高周波用線路導体と
しての信号用電極201および接地用電極202・203が形成
されている。これにより、誘電体蓋体2を誘電体基板1
に取り付けた状態において、図2に要部斜視図で示すよ
うに、誘電体基板1上に形成されている電極配線の信号
用電極111と121、および接地用電極112と122・113と123
が、接続配線の信号用電極201および接地用電極202・20
3が当接されることによりそれぞれ電気的に接続され
る。これら各当接部には、電気的接続をより確実なもの
とするために半田や導電性接着剤等を併用してもよい。
Reference numerals 201 to 203 denote recesses 31 on the lower surface of the dielectric cover 2.
This is a connection wiring formed between 32. These connection wiring 201
-203 are mounting parts 31 and 32 whose both ends are respectively at both ends.
Are formed as high-frequency line conductors at positions electrically connected to the respective electrode wirings 111 to 113 and 121 to 123 and electrically connecting the electrode wirings 111 to 113 and 121 to 123 between the mounting portions. I have. Here, the electrode wiring in the form of a coplanar line
A signal electrode 201 as a high-frequency line conductor and ground electrodes 202 and 203 are formed corresponding to 111 to 113 and 121 to 123. As a result, the dielectric cover 2 is
2, the signal electrodes 111 and 121 of the electrode wiring formed on the dielectric substrate 1 and the ground electrodes 112, 122, 113, and 123, as shown in the perspective view of the main part in FIG.
Are the signal electrodes 201 and the ground electrodes 202 and 20 of the connection wiring.
3 are electrically connected by being brought into contact with each other. Each of these contact portions may be used in combination with solder, a conductive adhesive or the like in order to further secure the electrical connection.

【0020】なお、この例では、電極配線101〜103およ
び131〜133が電気的に接続される他の接続配線または外
部電気回路基板との接続については図示を省略してい
る。
In this example, illustration of other connection wirings to which the electrode wirings 101 to 103 and 131 to 133 are electrically connected or connection to an external electric circuit board is omitted.

【0021】以上のような構成によれば、誘電体蓋体2
を取り付ける前においては、誘電体基板1上の各搭載部
に形成されている電極配線、すなわち信号用電極111と1
21、接地用電極112と122・113と123はそれぞれ切り離さ
れた状態にあり、これら電極の組をウェハプローブによ
り接続することにより、各電極配線に電極が接続された
各高周波半導体回路素子41・42をそれぞれ搭載部毎に独
立に評価することが可能となる。また、各高周波半導体
回路素子41・42を評価して良品であることを確認した後
に、誘電体蓋体2を誘電体基板1に取り付けた際には、
誘電体蓋体2に形成されている接続配線すなわち信号用
電極201および接地用電極202・203により、誘電体基板
1上の搭載部間の電極配線同士すなわち信号用電極111
と121、接地用電極112と122・113と123がそれぞれ電気
的に接続されることとなる。このとき、誘電体蓋体2の
比誘電率や凹部31・32以外の部分の厚み、および信号用
電極201の幅、信号用電極201と接地用電極202・203の間
隔は、誘電体蓋体2を誘電体基板1に取り付けた後の状
態において、誘電体基板1上に形成されている信号用電
極111と121、接地用電極112と122・113と123によって構
成されるコプレーナ線路の特性インピーダンスに整合す
るようにそれぞれの値を決定することにより、搭載部間
で各高周波半導体回路素子41・42同士を電気的に隔離し
つつ、それらの間の相互接続において良好な高周波伝送
特性を実現することが可能となる。
According to the above configuration, the dielectric cover 2
Before mounting, the electrode wiring formed on each mounting portion on the dielectric substrate 1, that is, the signal electrodes 111 and 1
21, the grounding electrodes 112 and 122, and 113 and 123 are separated from each other, and by connecting a set of these electrodes by a wafer probe, each high-frequency semiconductor circuit element 41. 42 can be evaluated independently for each mounting unit. When the dielectric lid 2 is attached to the dielectric substrate 1 after the high-frequency semiconductor circuit elements 41 and 42 have been evaluated and confirmed to be non-defective,
The connection wires formed on the dielectric cover 2, that is, the signal electrodes 201 and the grounding electrodes 202 and 203 allow the electrode wires between the mounting portions on the dielectric substrate 1, that is, the signal electrodes 111.
, 121, and the grounding electrodes 112, 122, 113, and 123 are electrically connected. At this time, the relative permittivity of the dielectric cover 2, the thickness of portions other than the concave portions 31 and 32, the width of the signal electrode 201, and the distance between the signal electrode 201 and the ground electrodes 202 and 203 are determined by the dielectric cover. 2 is attached to the dielectric substrate 1, the characteristic impedance of the coplanar line constituted by the signal electrodes 111 and 121 and the ground electrodes 112, 122, 113 and 123 formed on the dielectric substrate 1. By determining the respective values so as to match, the high-frequency semiconductor circuit elements 41 and 42 are electrically isolated between the mounting portions, and a good high-frequency transmission characteristic is realized in the interconnection between them. It becomes possible.

【0022】本発明の高周波半導体装置において、誘電
体基板1には、従来から半導体パッケージやキャリア基
板等に用いられている各種の誘電体材料を用いることが
可能である。具体的な誘電体としては、例えば酸化アル
ミニウム質焼結体や窒化アルミニウム質焼結体を始めと
する各種セラミックスやガラスセラミックス、あるいは
PTFEやガラスエポキシ、ポリイミド等の有機樹脂系誘電
体等を用いることができる。中でも、酸化アルミニウム
質焼結体や窒化アルミニウム質焼結体等のセラミックス
等の気密封止が可能な材料を用いた場合には、蓋体にも
同様の材料を用いることにより、高周波半導体回路素子
を収容して良好に気密封止することが可能となる。
In the high-frequency semiconductor device of the present invention, the dielectric substrate 1 can use various dielectric materials conventionally used for semiconductor packages, carrier substrates, and the like. Specific dielectrics include, for example, various ceramics and glass ceramics including aluminum oxide sintered bodies and aluminum nitride sintered bodies, or
Organic resin-based dielectrics such as PTFE, glass epoxy, and polyimide can be used. In particular, when a material that can be hermetically sealed, such as a ceramic such as an aluminum oxide sintered body or an aluminum nitride sintered body, is used, a similar material is used for the lid, so that the high-frequency semiconductor circuit element can be used. And can be airtightly sealed well.

【0023】また、その搭載部および電極配線101〜103
・111〜113・121〜123・131〜133は、搭載される高周波
半導体回路素子41・42の実装形態に応じた構成にすれば
よい。例えば、ワイヤボンディング技術を用いて、高周
波半導体回路素子と外部回路とを相互に接続する形態を
とる場合であれば、誘電体基板1の表面にダイアタッチ
用パターンを形成し、実装すべき高周波半導体回路素子
41・42の入出力用電極に対応する位置に信号用電極およ
び接地用電極を設ければよい。また、フリップチップ技
術を用いて、高周波半導体回路素子41・42と外部回路と
を相互に接続する形態をとる場合であれば、実装すべき
高周波半導体回路素子41・42の入出力用電極に対応する
位置に信号用電極および接地用電極を設ければよい。
The mounting portion and the electrode wirings 101 to 103
111-113, 121-123, 131-133 may be configured according to the mounting form of the mounted high-frequency semiconductor circuit elements 41, 42. For example, when a high-frequency semiconductor circuit element and an external circuit are connected to each other by using a wire bonding technique, a die-attach pattern is formed on the surface of the dielectric substrate 1 and the high-frequency semiconductor to be mounted is mounted. Circuit element
A signal electrode and a ground electrode may be provided at positions corresponding to the input / output electrodes 41 and 42. If flip-chip technology is used to connect the high-frequency semiconductor circuit elements 41 and 42 and external circuits to each other, the input / output electrodes of the high-frequency semiconductor circuit elements 41 and 42 to be mounted are supported. The signal electrode and the ground electrode may be provided at the positions where the signals are to be formed.

【0024】誘電体蓋体2には、凹部を設けるために積
層法で作製可能な誘電体材料等を用いればよく、具体的
な誘電体としては、誘電体基板1と同様に、例えば酸化
アルミニウム質焼結体や窒化アルミニウム質焼結体を始
めとする各種セラミックスやガラスセラミックス、ある
いは前述したような有機樹脂系誘電体材料等を用いるこ
とができる。中でも、酸化アルミニウム質焼結体や窒化
アルミニウム質焼結体等のセラミックス等の気密封止が
可能な材料を用いた場合には、前述したように高周波半
導体回路素子を収容して良好な気密封止を実現すること
が可能となる。また、誘電体基板1で用いた誘電体材料
の誘電率よりも低い誘電率を有する誘電体材料を用いれ
ば、誘電体蓋体2を誘電体基板1に取り付ける前と取り
付けた後との電極配線におけるインピーダンスの変化を
抑えられる効果もある。
The dielectric cover 2 may be made of a dielectric material or the like that can be manufactured by a lamination method in order to provide a concave portion. As a specific dielectric, similar to the dielectric substrate 1, for example, aluminum oxide is used. Various ceramics and glass ceramics, such as a porous sintered body and an aluminum nitride-based sintered body, or the above-described organic resin-based dielectric material can be used. Above all, when a material capable of hermetically sealing such as ceramics such as an aluminum oxide sintered body or an aluminum nitride sintered body is used, as described above, the high frequency semiconductor circuit element is accommodated and good air sealing is performed. Can be realized. Further, if a dielectric material having a dielectric constant lower than that of the dielectric material used for the dielectric substrate 1 is used, the electrode wiring before and after the dielectric cover 2 is attached to the dielectric substrate 1 is formed. This also has the effect of suppressing the change in impedance at

【0025】また、誘電体蓋体2の下面に形成する凹部
31・32は、誘電体基板1に誘電体蓋体2を取り付けた際
に、高周波半導体回路素子41・42を収容できる位置に設
け、寸法は収容すべき高周波半導体回路素子41・42の体
積よりも大きければよいが、誘電体蓋体2の取り付け後
に誘電体蓋体2の凹部31・32と誘電体基板1の表面とに
よって形成される空間において不要な共振等が発生しな
いように、なるべく小さく設定することが望ましい。ま
た、誘電体蓋体2内における凹部31・32の周囲に、ヴィ
アホール等の貫通導体を使用周波数に対応する管内波長
に対して十分小さな間隔で取り囲むように配設し、誘電
体蓋体2の表面に、そのヴィアホールと導通するととも
に半導体装置の接地とも導通している導体を形成するこ
とにより、高周波半導体回路素子41・42を収容する凹部
31・32の電磁的なシールド効果を持たせることが可能と
なる。
A concave portion formed on the lower surface of the dielectric cover 2
31 and 32 are provided at positions where the high-frequency semiconductor circuit elements 41 and 42 can be accommodated when the dielectric cover 2 is attached to the dielectric substrate 1, and the size is determined by the volume of the high-frequency semiconductor circuit elements 41 and 42 to be accommodated. It is sufficient if it is large, but it should be as small as possible so that unnecessary resonance or the like does not occur in the space formed by the concave portions 31 and 32 of the dielectric cover 2 and the surface of the dielectric substrate 1 after the dielectric cover 2 is attached. It is desirable to set. Further, a through conductor such as a via hole is disposed around the concave portions 31 and 32 in the dielectric cover 2 so as to surround the through conductor at a sufficiently small interval with respect to the guide wavelength corresponding to the operating frequency. A recess that accommodates the high-frequency semiconductor circuit elements 41 and 42 by forming a conductor that is electrically connected to the via hole and also to the ground of the semiconductor device on the surface of the
It is possible to provide 31 and 32 electromagnetic shielding effects.

【0026】凹部31・32の形成は、例えばセラミックス
の場合であれば、焼成前のいわゆるグリーンシートの段
階でパンチングやレーザ加工によりくりぬき部を設けた
層を積層すればよい。また、有機系樹脂材料の場合であ
れば、くりぬき部を設けた層を積層したり、あるいはエ
ッチング等の化学的プロセスを用いて凹部31・32を形成
することも可能である。
For forming the recesses 31 and 32, for example, in the case of ceramics, a layer provided with a hollow portion by punching or laser processing at the stage of a so-called green sheet before firing may be laminated. Further, in the case of an organic resin material, the concave portions 31 and 32 can be formed by laminating a layer provided with a hollow portion or by using a chemical process such as etching.

【0027】そして、接続配線201〜203は、前記の電極
配線と同一の線幅、線間距離とすればよく、配線長は短
ければ短いほどよいが、配線長は凹部31・32間の距離に
よるために、誘電体蓋体2の機械的強度に劣化が生じな
い範囲で短くすればよい。
The connection wirings 201 to 203 may have the same line width and the same distance between the electrode wirings as described above. The shorter the wiring length, the better, but the wiring length is the distance between the recesses 31 and 32. Therefore, the length may be reduced as long as the mechanical strength of the dielectric cover 2 does not deteriorate.

【0028】[0028]

【実施例】次に、本発明の高周波半導体装置について具
体例を説明する。
Next, a specific example of the high-frequency semiconductor device of the present invention will be described.

【0029】厚み0.2mm、比誘電率8.8のアルミナセラ
ミックスからなる誘電体基板1の上面に、2箇所の高周
波半導体回路素子の搭載部を設け、それぞれに幅0.13m
mの信号用電極111・121を形成するとともにその両側に
それぞれ0.065mmの間隔で幅0.2mmの接地用電極112
・113・122・123を形成することにより、コプレーナ線
路の形態の電極配線を作製した。このときコプレーナ線
路の特性インピーダンスは約50オームに設定した。
On the upper surface of a dielectric substrate 1 made of alumina ceramic having a thickness of 0.2 mm and a relative dielectric constant of 8.8, two mounting portions for high-frequency semiconductor circuit elements are provided, each having a width of 0.13 m.
m signal electrodes 111 and 121 are formed, and a ground electrode 112 having a width of 0.2 mm is provided on both sides thereof at an interval of 0.065 mm.
By forming 113, 122 and 123, an electrode wiring in the form of a coplanar line was produced. At this time, the characteristic impedance of the coplanar line was set to about 50 ohms.

【0030】また厚み1.0mm、比誘電率4.9のガラスセ
ラミック基板から成る誘電体蓋体2の下面に、誘電体基
板1の搭載部に対応した、高周波半導体回路素子を収容
するための凹部を形成し、この凹部間に、幅0.17mmの
信号用電極201を形成するとともにその両側にそれぞれ
0.05mmの間隔で幅0.2mmの接地用電極202・203を形
成した。
A concave portion for accommodating a high-frequency semiconductor circuit element corresponding to the mounting portion of the dielectric substrate 1 is formed on the lower surface of the dielectric cover 2 made of a glass ceramic substrate having a thickness of 1.0 mm and a relative dielectric constant of 4.9. Then, a signal electrode 201 having a width of 0.17 mm is formed between the recesses, and on both sides thereof,
Ground electrodes 202 and 203 having a width of 0.2 mm were formed at intervals of 0.05 mm.

【0031】そして、この誘電体蓋体2を誘電体基板1
上に凹部と搭載部とを対応させて取着し、誘電体蓋体2
の下面に形成した信号用電極201および接地用電極202・
203の各端部と、誘電体基板1の上面に形成した信号用
電極101・111および接地用電極112・113・122・123の各
端部とがそれぞれ重なる部位をハンダ付けにより接着
し、搭載部間の電極配線同士を接続配線で電気的に接続
した、本発明の高周波半導体装置における伝送線路構造
を形成した。
Then, the dielectric cover 2 is attached to the dielectric substrate 1
The concave portion and the mounting portion are attached so as to correspond to each other, and the dielectric cover 2 is mounted.
Signal electrode 201 and ground electrode 202
A portion where each end of 203 and each end of signal electrodes 101/111 and ground electrodes 112/113/122/123 formed on the upper surface of the dielectric substrate 1 are bonded by soldering and mounted. A transmission line structure in the high-frequency semiconductor device of the present invention was formed in which the electrode wirings between the sections were electrically connected by connection wirings.

【0032】この伝送線路構造における高周波信号の伝
送特性をネットワークアナライザを用いて測定した。そ
の結果を図3に線図で示す。図3において、横軸は周波
数(単位:GHz)を、縦軸はSパラメータS11および
S21の絶対値を対数表示した値(単位:dB)を表し、
特性曲線のうち破線はS11の周波数特性を、実線はS21
の周波数特性を示している。この結果より分かるよう
に、反射係数であるS11は広帯域にわたって低く抑えら
れており、一方、通過特性を示すS21の特性曲線が示す
ように極めて良好な伝送特性を有している。
The transmission characteristics of the high-frequency signal in this transmission line structure were measured using a network analyzer. The results are shown diagrammatically in FIG. In FIG. 3, the horizontal axis represents frequency (unit: GHz), and the vertical axis represents logarithmic values (unit: dB) of the absolute values of the S parameters S11 and S21.
In the characteristic curve, the broken line indicates the frequency characteristic of S11, and the solid line indicates S21.
2 shows the frequency characteristics of FIG. As can be seen from this result, the reflection coefficient S11 is kept low over a wide band, while it has an extremely good transmission characteristic as shown by the characteristic curve of S21 showing the pass characteristic.

【0033】さらに、それぞれ対応する凹部31・32で封
止された構造の搭載部間における電気的な隔離の状態に
ついて、送信系回路部位と発振回路部位とをそれぞれ近
接させて配置した凹部31・32に収容し、それらが近接し
た状態において各高周波半導体回路素子を動作させたと
ころ、各高周波半導体回路素子は正常に動作し、送信機
としても正常に動作していることから、各搭載部間は各
凹部31・32により電気的に良好に隔離されていることが
確認できた。これにより、誘電体基板1上において各搭
載部を近接させて配置することが可能となり、高周波半
導体装置のより一層の小型化を図ることができるもので
あることが確認できた。
Further, regarding the state of electrical isolation between the mounting portions of the structure sealed by the corresponding recesses 31 and 32, the recesses 31 and 32 in which the transmission circuit portion and the oscillation circuit portion are arranged close to each other. Each high-frequency semiconductor circuit element was operated in a state where they were housed in a close proximity to each other.Since each high-frequency semiconductor circuit element operated normally and also functioned normally as a transmitter, the Has been confirmed to be electrically well separated by the concave portions 31 and 32. As a result, it was possible to arrange the mounting portions close to each other on the dielectric substrate 1, and it was confirmed that the high-frequency semiconductor device could be further reduced in size.

【0034】なお、以上はあくまで本発明の実施の形態
の例示であって、本発明はこれらに限定されるものでは
なく、本発明の要旨を逸脱しない範囲で種々の変更や改
良を加えることは何ら差し支えない。例えば、上記の例
では各搭載部および各凹部内にそれぞれ1個ずつの高周
波半導体回路素子を搭載実装し収容した例を示したが、
高周波回路の仕様に応じてそれぞれ複数個の高周波半導
体回路素子を搭載実装し収容してもよいことは言うまで
もない。
It should be noted that the above is only an example of the embodiment of the present invention, and the present invention is not limited to the embodiment. Various changes and improvements may be made without departing from the gist of the present invention. No problem. For example, in the above example, an example is shown in which one high-frequency semiconductor circuit element is mounted and mounted in each mounting portion and each recess,
It goes without saying that a plurality of high-frequency semiconductor circuit elements may be mounted, mounted, and accommodated according to the specifications of the high-frequency circuit.

【0035】[0035]

【発明の効果】以上のように、本発明の高周波半導体装
置によれば、誘電体基板の上面に複数の高周波半導体回
路素子の電極が電気的に接続される電極配線が形成され
た複数の搭載部を設け、この各搭載部に高周波半導体回
路素子を搭載してその電極を電極配線に電気的に接続
し、この誘電体基板上に、下面に搭載部に対応する複数
の凹部を設けるとともにこの凹部間に接続配線が形成さ
れた誘電体蓋体を取着して、搭載部毎に凹部内に高周波
半導体回路素子を収容するとともに搭載部間の電極配線
同士を接続配線で電気的に接続したことから、以下のよ
うな有利な効果を有するものである。
As described above, according to the high-frequency semiconductor device of the present invention, a plurality of mounts are formed on the upper surface of the dielectric substrate, in which electrode wirings for electrically connecting the electrodes of the plurality of high-frequency semiconductor circuit elements are formed. The high frequency semiconductor circuit element is mounted on each of the mounting portions, and its electrodes are electrically connected to the electrode wiring. On the dielectric substrate, a plurality of concave portions corresponding to the mounting portion are provided on the lower surface, and A dielectric lid having connection wiring formed between the recesses was attached, the high-frequency semiconductor circuit element was accommodated in the recess for each mounting portion, and the electrode wires between the mounting portions were electrically connected by connection wiring. Therefore, it has the following advantageous effects.

【0036】まず、個々の高周波半導体回路素子の特性
評価による検査は、この誘電体基板上にこの高周波半導
体回路素子が実装された状態の、誘電体蓋体を取り付け
る前の段階で行ない、実装された各高周波半導体回路素
子が良品であることを確認した後に誘電体蓋体を誘電体
基板上に取着することにより、高周波半導体装置として
完成させることができる。
First, an inspection based on the characteristic evaluation of each high-frequency semiconductor circuit element is performed at a stage before the dielectric cover is mounted in a state where the high-frequency semiconductor circuit element is mounted on the dielectric substrate. After confirming that each of the high-frequency semiconductor circuit elements is non-defective, the dielectric cover is mounted on the dielectric substrate to complete the high-frequency semiconductor device.

【0037】また、誘電体蓋体に形成された凹部に収納
される各高周波半導体回路素子の電極と電気的に接続さ
れている電極配線同士を各搭載部間で誘電体蓋体の下面
に形成された凹部間を電気的に接続するための接続配線
により電気的に接続することにより、凹部内に収容され
た各高周波半導体回路素子間の電気的接続を実現して高
周波回路を構成し、かつ、各搭載部間同士すなわち凹部
間同士をそれぞれ良好に電気的に隔離することが可能と
なる。
Further, electrode wirings electrically connected to the electrodes of the respective high-frequency semiconductor circuit elements housed in the recesses formed in the dielectric cover are formed on the lower surface of the dielectric cover between the mounting portions. The electrical connection between the high-frequency semiconductor circuit elements accommodated in the concave portion is realized by electrically connecting the recessed portions to each other by a connection wiring for electrical connection, and a high-frequency circuit is configured, and Thus, it is possible to satisfactorily electrically isolate the mounting portions, that is, the concave portions.

【0038】したがって、従来のマルチチップパッケー
ジ等を用いた高周波半導体装置と比較して、部品点数の
削減および装置の小型化を目的としたマルチチップ実装
を実現しつつ、所望の高周波半導体回路素子間を電気的
に隔離して良好な高周波特性を実現し、しかも製造コス
トを低く抑えることができる高周波半導体装置を提供す
ることができる。
Therefore, as compared with a conventional high-frequency semiconductor device using a multi-chip package or the like, it is possible to realize a multi-chip mounting for the purpose of reducing the number of components and miniaturizing the device, and at the same time, to obtain a desired high-frequency semiconductor circuit element. And a high-frequency semiconductor device capable of realizing good high-frequency characteristics by electrically isolating the semiconductor device and keeping the manufacturing cost low.

【0039】また、搭載部毎の高周波半導体回路素子の
封止と各高周波半導体回路間の電気的な接続を誘電体蓋
体の取付けにより同時に行なえるため、組立工数の削減
といった製造上有利な効果をも有するものである。
In addition, since the sealing of the high-frequency semiconductor circuit elements for each mounting portion and the electrical connection between the high-frequency semiconductor circuits can be performed simultaneously by attaching the dielectric cover, there are advantageous production effects such as reduction in the number of assembly steps. Is also provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の高周波半導体装置の実施の形態の一例
の概略構成を示す分解斜視図である。
FIG. 1 is an exploded perspective view showing a schematic configuration of an example of an embodiment of a high-frequency semiconductor device of the present invention.

【図2】図1に示す高周波半導体装置について誘電体基
板に誘電体蓋体を取着した状態を示す要部斜視図であ
る。
FIG. 2 is a perspective view of an essential part showing a state where a dielectric cover is attached to a dielectric substrate in the high-frequency semiconductor device shown in FIG. 1;

【図3】本発明の高周波半導体装置における電極配線と
接続配線とによる伝送線路構造の反射特性および伝送特
性を示す線図である。
FIG. 3 is a diagram showing a reflection characteristic and a transmission characteristic of a transmission line structure by an electrode wiring and a connection wiring in the high-frequency semiconductor device of the present invention.

【符号の説明】[Explanation of symbols]

1・・・・・・・・・・・・・・・・・・・・・誘電体
基板 101、111、121、131・・・・・・・・・・・・・信号用
電極(電極配線) 102、103、112、113、122、123、132、133・・・接地用
電極(電極配線) 2・・・・・・・・・・・・・・・・・・・・・誘電体
蓋体 31、32・・・・・・・・・・・・・・・・・・・凹部 201・・・・・・・・・・・・・・・・・・・・・信号
用電極(接続配線) 202、203・・・・・・・・・・・・・・・・・・接地用
電極(接続配線) 41、42・・・・・・・・・・・・・・・・・・・高周波
半導体回路素子
1 ... dielectric substrate 101, 111, 121, 131 ... signal electrode (electrode Wiring) 102, 103, 112, 113, 122, 123, 132, 133: ground electrode (electrode wiring) 2 ... dielectric Body lid 31, 32 ... Recess 201 ... For signal Electrodes (connection wiring) 202, 203 ············ Grounding electrodes (connection wiring) 41, 42 ・ ・ ・..... High frequency semiconductor circuit elements

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 誘電体基板の上面に複数の高周波半導体
回路素子の電極が電気的に接続される電極配線が形成さ
れた複数の搭載部を設け、該各搭載部に高周波半導体回
路素子を搭載してその電極を前記電極配線に電気的に接
続し、前記誘電体基板上に、下面に前記搭載部に対応す
る複数の凹部を設けるとともに該凹部間に接続配線が形
成された誘電体蓋体を取着して、前記搭載部毎に前記凹
部内に前記高周波半導体回路素子を収容するとともに前
記搭載部間の前記電極配線同士を前記接続配線で電気的
に接続したことを特徴とする高周波半導体装置。
1. A plurality of mounting portions provided with electrode wirings to which electrodes of a plurality of high-frequency semiconductor circuit elements are electrically connected are provided on an upper surface of a dielectric substrate, and the high-frequency semiconductor circuit devices are mounted on the respective mounting portions. And electrically connecting the electrodes to the electrode wirings, forming a plurality of recesses on the dielectric substrate corresponding to the mounting portion on the lower surface, and forming connection wirings between the recesses. Wherein the high-frequency semiconductor circuit element is accommodated in the recess for each of the mounting portions, and the electrode wires between the mounting portions are electrically connected to each other by the connection wires. apparatus.
JP2000024762A 2000-01-28 2000-01-28 High frequency semiconductor device Expired - Fee Related JP4206185B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000024762A JP4206185B2 (en) 2000-01-28 2000-01-28 High frequency semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000024762A JP4206185B2 (en) 2000-01-28 2000-01-28 High frequency semiconductor device

Publications (2)

Publication Number Publication Date
JP2001210752A true JP2001210752A (en) 2001-08-03
JP4206185B2 JP4206185B2 (en) 2009-01-07

Family

ID=18550703

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000024762A Expired - Fee Related JP4206185B2 (en) 2000-01-28 2000-01-28 High frequency semiconductor device

Country Status (1)

Country Link
JP (1) JP4206185B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015177153A (en) * 2014-03-18 2015-10-05 セイコーエプソン株式会社 Electronic device, electronic module, electronic apparatus and movable body
WO2019181589A1 (en) * 2018-03-23 2019-09-26 株式会社村田製作所 High-frequency module and communication device
JP7276627B1 (en) * 2022-06-30 2023-05-18 三菱電機株式会社 Semiconductor device evaluation method, semiconductor device manufacturing method, and semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015177153A (en) * 2014-03-18 2015-10-05 セイコーエプソン株式会社 Electronic device, electronic module, electronic apparatus and movable body
WO2019181589A1 (en) * 2018-03-23 2019-09-26 株式会社村田製作所 High-frequency module and communication device
US11393796B2 (en) 2018-03-23 2022-07-19 Murata Manufacturing Co., Ltd. Radio-frequency module and communication apparatus
JP7276627B1 (en) * 2022-06-30 2023-05-18 三菱電機株式会社 Semiconductor device evaluation method, semiconductor device manufacturing method, and semiconductor device
WO2024004157A1 (en) * 2022-06-30 2024-01-04 三菱電機株式会社 Method for evaluating semiconductor device, method for producing semiconductor device, and semiconductor device

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