JP3670574B2

JP3670574B2 - I / O terminal and semiconductor element storage package

Info

Publication number: JP3670574B2
Application number: JP2000364694A
Authority: JP
Inventors: 稔弘浅野
Original assignee: Kyocera Corp
Current assignee: Kyocera Corp
Priority date: 2000-11-30
Filing date: 2000-11-30
Publication date: 2005-07-13
Anticipated expiration: 2020-11-30
Also published as: JP2002170897A

Description

【０００１】
【発明の属する技術分野】
本発明は、光通信、マイクロ波通信、ミリ波通信等の高周波信号で作動する各種半導体素子を収納する半導体素子収納用パッケージに用いられる入出力端子および半導体素子収納用パッケージに関する。
【０００２】
【従来の技術】
従来のマイクロ波帯やミリ波帯等の高周波信号を伝送する入出力端子、および半導体素子を気密に収容する半導体素子収納用パッケージ（以下、半導体パッケージという）について、それぞれ図４，図５に示す。これらの図において高周波信号の入出力端子の取付部１０２ａには、上面に一辺から対向する他辺にかけて形成された線路導体１０４ａ−Ａとこの線路導体１０４ａ−Ａの両側に等間隙をもって形成された同一面接地導体層１０４ａ−Ｂとを有する誘電体から成る平板部１０４ａと、平板部１０４ａの上面に線路導体１０４ａ−Ａを間に挟んで接合された誘電体から成る立壁部１０４ｂとを具備する入出力端子１０４が嵌着されており、線路導体１０４ａ−Ａ，同一面接地導体層１０４ａ−Ｂ上面に銀ロウ等のロウ材で接合されたリード端子１０５を介して、半導体パッケージの内部に収容された半導体素子１０９と、外部電気回路（図示せず）とを電気的に接続している。
【０００３】
このような入出力端子１０４は、平板部１０４ａ上面の線路導体１０４ａ−Ａが高周波信号の入出力線路として使用され、またこの線路導体１０４ａ−Ａの両側には、半導体素子１０９と外部電気回路との間の電気的接続におけるインピーダンスのミスマッチングを効果的に抑えて高周波信号の伝送特性の劣化を抑える機能を有する同一面接地導体層１０４ａ−Ｂが等間隙をもって形成されており、低反射損失の半導体パッケージとすることができるものである。
【０００４】
また、このような半導体パッケージの１種である光半導体パッケージは、図５に示すように、上面にＬＤ（半導体レーザ），ＰＤ（フォトダイオード）等の光半導体素子から成る半導体素子１０９が載置される載置部１０１ａを有する、鉄（Ｆｅ）−ニッケル（Ｎｉ）−コバルト（Ｃｏ）合金や銅（Ｃｕ）−タングステン（Ｗ）合金等の金属材料から成る基体１０１を有する。また、載置部１０１ａを囲繞するようにして基体１０１の上面に銀ロウ等のロウ材を介して接合されるとともに、長辺側の両側部に半導体素子１０９と外部電気回路（図示せず）とを電気的に接続する入出力端子１０４嵌着用の取付部１０２ａが形成され、また短辺側の一側部に半導体素子１０９と光結合するための光伝送路である貫通孔１０２ｂが形成された、Ｆｅ−Ｎｉ−Ｃｏ合金等の金属材料から成る枠体１０２を有する。
【０００５】
また、この枠体１０２の光伝送路である貫通孔１０２ｂの外側周辺部には、金属枠体１０２の熱膨張係数に近似するＦｅ−Ｎｉ−Ｃｏ合金，Ｆｅ−Ｎｉ合金等の金属材料から成る、光ファイバ１０８固定用の筒状の固定部材１０３が銀ロウ等のロウ材で接合される。
【０００６】
また、シールリング１０６は、枠体１０２上面および入出力端子１０４上面に銀ロウ等のロウ材を介して接合され、入出力端子１０４を挟持するとともに、上面に蓋体（図示せず）をシーム溶接等により接合するための媒体として機能する。
【０００７】
このような半導体パッケージに、半導体素子１０９を載置部１０１ａに錫（Ｓｎ）−鉛（Ｐｂ）半田等の低融点ロウ材で載置固定するとともに、線路導体１０４ａ−Ａと半導体素子１０９とをボンディングワイヤ（図示せず）で電気的に接続し、さらに光ファイバ１０８と半導体素子１０９との光軸を調整した後、固定部材１０３の外側端面に、光ファイバ１０８を樹脂等の接着剤で取着した金属ホルダ１０７をＡｕ−Ｓｎ等の低融点ロウ材で接合する。さらに、シールリング１０６上面に蓋体をシーム溶接等により接合することにより、製品としての光半導体装置となる。
【０００８】
このような光半導体装置は、外部電気回路から供給される駆動信号によって半導体素子１０９を光励起させ、励起したレーザ光等の光を光ファイバ１０８に授受させるとともに、光ファイバ１０８内を伝送させることにより、大容量の情報を高速に伝送できる光電変換装置として機能するとともに、光通信分野等に多く用いられる。
【０００９】
【発明が解決しようとする課題】
しかしながら、上記従来の入出力端子１０４を半導体パッケージに嵌着し半導体素子１０９を、例えば４０ＧＨｚ以上の非常に高い周波数で作動させた場合、平板部１０４ａの両端面１０４ｄ（図４）に形成されたメタライズ層間で容量成分が発生し、この容量成分は小さいとはいえそのインピーダンスは大きなものとなり、線路導体１０４ａ−Ａに大きなインピーダンスの容量成分が並列的に付加された状態となり、信号線路の特性インピーダンスが大きく変化してインピーダンス不整合が大きくなるという問題があった。
【００１０】
また、誘電体および導体から成る入出力端子１０４は、上記の容量成分を含んだ共振回路を構成しており、伝送される数１０ＧＨｚの高周波信号の周波数付近で共振が発生し易くなっている。その共振により高周波信号の反射損失が増大するという問題点があった。
【００１１】
従って、本発明は上記問題点に鑑み完成されたもので、その目的は、高周波信号の入出力時における反射損失を小さいものとすることにより、半導体素子の作動性を良好なものとすることにある。
【００１２】
【課題を解決するための手段】
本発明の入出力端子は、略四角形の誘電体板から成り、かつ上面に一辺から対向する他辺にかけて形成された線路導体および該線路導体の両側に略等間隙をもって形成された同一面接地導体層とを有する平板部と、該平板部の上面に前記線路導体および前記同一面接地導体層を間に挟んで接合された誘電体から成る立壁部とを具備した入出力端子において、前記平板部の前記線路導体端側の側面に前記同一面接地導体層が延出されて成る側面接地導体層が形成されていることを特徴とする。
【００１３】
本発明は、上記の構成により、側面接地導体層間に大きな容量成分が発生し、その容量成分によるインピーダンスは小さなものとなり、線路導体に小さなインピーダンスの容量成分が並列的に付加された状態となり、信号線路の特性インピーダンスの変化によるインピーダンス不整合を抑制することができる。また、入出力端子の上記容量成分を含んだ共振回路による、数１０ＧＨｚの高周波信号の周波数付近での共振を抑えることができ、例えば高周波信号の周波数付近より低周波数側に共振周波数をずらすことができる。従って、高周波信号の反射損失が低減し、伝送特性が向上する。さらに、接地電位が安定し強化されるという効果も有する。
【００１４】
本発明において、好ましくは、前記線路導体の幅Ｘに対して前記側面接地導体層同士の間隔をＸ＋０．０６ｍｍ〜Ｘ＋２ｍｍとしたことを特徴とする。
【００１５】
本発明は、上記の構成により、入出力端子の共振回路による高周波信号の共振を有効に抑制するという効果がさらに向上する。
【００１６】
また、本発明の半導体パッケージは、上面に半導体素子が載置される載置部を有する基体と、該基体上面に前記載置部を囲繞するように取着された枠体と、該枠体を貫通してまたは切り欠いて形成された入出力端子の取付部と、該取付部に嵌着された本発明の入出力端子とを具備したことを特徴とする。
【００１７】
本発明は、このような構成により、半導体素子を気密に収容することができるとともに、高周波信号の伝送特性が向上するため、長期にわたり半導体素子の作動性を良好とし得、信頼性の高い半導体パッケージとなる。
【００１８】
【発明の実施の形態】
本発明の入出力端子および半導体パッケージについて以下に詳細に説明する。入出力端子および半導体パッケージを、それぞれ図１，図２，図３に示す。図１，図２は本発明の入出力端子の斜視図、図３は図１の入出力端子を用いた半導体パッケージの斜視図である。これらの図において、１は基体、２は枠体、３は光ファイバ８が取着された金属ホルダ７を固定する筒状の固定部材、４は入出力端子、６はシールリングである。これら基体１と枠体２と固定部材３と入出力端子４とシールリング６とで、内部にＬＤ，ＰＤ等の光半導体素子などの半導体素子９を収納し、シールリング６上面に蓋体（図示せず）を取着することにより、半導体素子９を収納するための容器が構成される。
【００１９】
基体１は、その上面に半導体素子９を載置する載置部１ａを有しており、半導体素子９を支持する支持部材として機能するとともに、半導体素子９の作動時に発する熱を外部に効率良く放散する機能を有する。
【００２０】
この基体１は、その形状は略直方体または略長方形の板体であり、Ｆｅ−Ｎｉ−Ｃｏ合金やＣｕ−Ｗ合金等の金属材料から成る。また、その製作は合金のインゴットに圧延加工やプレス加工等の金属加工を施すことにより所定の形状に成形される。
【００２１】
なお、この基体１は、その表面に耐蝕性に優れかつロウ材との濡れ性に優れる金属、具体的には厚さ０．５〜９μｍのＮｉ層と、厚さ０．５〜５μｍのＡｕ層とを順次メッキ法により被着させておくと、基体１が酸化腐食するのを有効に防止できるとともに、基体１上面に半導体素子９を強固に接着固定できる。従って、基体１表面には０．５〜９μｍのＮｉ層や厚さ０．５〜５μｍのＡｕ層等の金属層をメッキ法により被着させておくことが好ましい。
【００２２】
また、この基体１の上面には、載置部１ａを囲繞するようにして銀ロウ等のロウ材を介して接合されるとともに、長辺側の両側部に半導体素子９と外部電気回路とを電気的に接続する入出力端子４嵌着用の貫通孔または切欠部から成る取付部２ａが形成され、さらに短辺側の一側部に半導体素子９と光結合するための光伝送路である貫通孔２ｂが形成された、Ｆｅ−Ｎｉ−Ｃｏ合金等の金属材料から成る枠体２を有する。
【００２３】
このような枠体２の製作は、基体１と同様、合金のインゴットに圧延加工やプレス加工等の金属加工を施すことにより所定の形状に成形される。
【００２４】
なお、枠体２の基体１への接合は、基体１上面と枠体２下面とを、基体１上面に敷設したプリフォーム状の銀ロウ等のロウ材を介して接合される。さらに、枠体２表面には、基体１と同様に０．５〜９μｍのＮｉ層や厚さ０．５〜５μｍのＡｕ層等の金属層をメッキ法により被着させておくと良い。
【００２５】
また、この枠体２の取付部２ａには、半導体素子９と外部電気回路との高周波信号の入出力を行う機能を有するとともに、半導体パッケージの内外部を遮断する機能を有する入出力端子４が銀ロウ等のロウ材で接合される。
【００２６】
この入出力端子４は、略長方形，正方形等の四角形で板状の平板部４ａの上面に、略直方体で横倒しにされた四角柱状の立壁部４ｂが積層されて成る。このとき、図１に示すように、立壁部４ｂの端面と平板部４ａの端面は略面一とされている。
【００２７】
本発明の入出力端子４は、その平板部４ａがアルミナ（Ａｌ₂Ｏ₃）セラミックス，窒化アルミニウム（ＡｌＮ）セラミックス，ムライト（３Ａｌ₂Ｏ₃・２ＳｉＯ₂）セラミックス等の誘電体から成る。平板部４ａの上面には、１辺から対向する他辺にかけて、Ｗ，Ｍｏ−Ｍｎ等のメタライズ層から成る線路導体４ａ−Ａと、この線路導体４ａ−Ａの両側に略等間隙をもって形成された同一面接地導体層４ａ−Ｂとが形成される。平板部４ａの線路導体４ａ−Ａ端側の側面には、同一面接地導体層４ａ−Ｂを延出させて成る側面接地導体層４ａ−Ｃが形成されている。
【００２８】
このように平板部４ａの側面に側面接地導体層４ａ−Ｃが形成されていることにより、例えば４０ＧＨｚ以上の高い周波数で作動させた場合、側面接地導体層４ａ−Ｃ間に発生した容量成分を含んだ入出力端子４の共振回路による、４０ＧＨｚの高周波信号の周波数付近での共振を抑えることができ、例えば高周波信号の周波数付近より低周波数側に共振周波数をずらすことができる。従って、半導体素子９をより高い周波数で作動させ得る。また、接地電位が安定化され強化されることとなる。
【００２９】
即ち、平板部４ａの側面に側面接地導体層４ａ−Ｃを形成することにより、平板部４ａの側面における高周波信号の反射損失を非常に小さいものとでき、より高い周波数においても半導体素子９は正常かつ安定に作動する。
【００３０】
また、側面接地導体層４ａ−Ｃ同士は、図２に示すように、平板部４ａの側面で線路導体４ａ−Ａと電気的に接続されないように連ながっていても構わず、この場合、さらに高周波信号の周波数付近での共振を抑えることができるとともに、接地電位もさらに安定化される。図２のような構成においては、半導体素子９と外部電気回路との高周波信号の入出力時におけるインピーダンスのマッチングをとるために、線路導体４ａ−Ａの幅Ｘを適宜狭くしても良い。
【００３１】
ただし、この幅Ｘは、線路導体４ａ−Ａ上面に接合されるリード端子５の線路導体４ａ−Ａに対する接合が損なわれないようにしておく必要があるため、平板部４ａ側面の誘電体が露出している部位、即ち線路導体４ａ−Ａから側面接地導体層４ａ−Ｃまでの間隔（距離）を適宜確保することが好ましい。
【００３２】
なお、線路導体４ａ−Ａと同一面接地導体層４ａ−Ｂとの間隙および、線路導体４ａ−Ａと側面接地導体層４ａ−Ｃとの間隙は、０．０３ｍｍ以上であることが好ましい。０．０３ｍｍ未満の場合、リード端子５を銀ロウ等のロウ材で接合した際、このロウ材が隣合う線路導体４ａ−Ａと同一面接地導体層４ａ−Ｂとを電気的に接続（ショート）させてしまう場合がある。この場合、半導体素子９と外部電気回路との高周波信号の伝送を損なわせることとなる。
【００３３】
また、図６に示すように、線路導体４ａ−Ａの幅をＸとした場合、側面接地導体層４ａ−Ｃ同士の間隔ＹがＸ＋０．０６ｍｍ〜Ｘ＋２ｍｍであることが好ましい。間隔ＹがＸ＋０．０６ｍｍ未満では、線路導体４ａ−Ａと側面接地導体層４ａ−Ｃとが短絡し易くなるとともに、線路導体４ａ−Ａの同軸構造に影響を与えることとなる。間隔ＹがＸ＋２ｍｍを超えると、数１０ＧＨｚの高周波信号の周波数付近で共振が発生し、高周波信号の伝送損失が増大し易くなる。またこの場合、側面接地導体層４ａ−Ｃ同士の間隔Ｙは同一面接地導体層４ａ−Ｂ同士の間隔よりも狭い方がよく、上記の効果が高くなる。
【００３４】
さらに、側面接地導体層４ａ−Ｃの配置および形状は、図１，図６に示すように、線路導体４ａ−Ａの中心軸に対して対称に設けるのが同軸構造上好ましい。
【００３５】
このような線路導体４ａ−Ａ，同一面接地導体層４ａ−Ｂ，側面接地導体層４ａ−Ｃは、例えばＷ等の粉末に有機溶剤、溶媒を添加混合して得た金属ペーストを、平板部４ａ用のセラミックグリーンシートに、予め従来周知のスクリーン印刷法により所定パターンに印刷塗布しておき、焼成することにより形成される。
【００３６】
また、平板部４ａの上面には立壁部４ｂが積層される。即ち、この立壁部４ｂは、平板部４ａの上面に線路導体４ａ−Ａ，同一面接地導体層４ａ−Ｂを間に挟んで接合された誘電体から成る。
【００３７】
この入出力端子４の線路導体４ａ−Ａ，同一面接地導体層４ａ−Ｂの枠体２外部に導出される部位には、外部電気回路と入出力端子４との高周波信号の入出力を行い、Ｆｅ−Ｎｉ−Ｃｏ合金等の金属材料から成るリード端子５が銀ロウ等のロウ材で接合される。
【００３８】
また、枠体２の短辺の一側部には、貫通孔２ｂが形成されており、一端面が貫通孔２ｂの開口を囲むように銀ロウ等のロウ材で接合され、他方の端面には光ファイバ８を樹脂等の接着剤で取着した金属ホルダ７がＡｕ−Ｓｎ等の低融点ロウ材で接合される固定部材３が設けられる。この固定部材３は、基体１や枠体２と同様の材料を同様の加工法で所望の形状に加工作製されるとともに、その表面に０．５〜９μｍのＮｉ層や０．５〜５μｍのＡｕ層等の金属層をメッキ法により被着させておくと良い。
【００３９】
このように入出力端子４および固定部材３が取着される枠体２上面にはシールリング６が銀ロウ等のロウ材で接合される。このシールリング６は、枠体２上面に銀ロウ等のロウ材で接合されて入出力端子４を挟持するとともに、その上面に、半導体素子９を封止するための蓋体をシーム溶接等により接合するための接合媒体として機能する。
【００４０】
本発明の入出力端子４は、上面に一辺から対向する他辺にかけて形成された線路導体４ａ−Ａと線路導体４ａ−Ａの両側に略等間隙をもって形成された同一面接地導体層４ａ−Ｂを、側面に同一面接地導体層４ａ−Ｂを延出させて成る側面接地導体層４ａ−Ｃを有する誘電体から成る平板部４ａと、この平板部４ａ上面に線路導体４ａ−Ａ，同一面接地導体層４ａ−Ｂを間に挟んで接合された誘電体から成る立壁部４ｂとから成る。
【００４１】
これにより、より高い周波数の高周波信号を伝送させても、高周波信号の反射をより小さいものとでき、また高周波信号の入出力時におけるインピーダンスのミスマッチングを有効に防止できる。
【００４２】
本発明の半導体パッケージは、金属材料から成る基体１と、その上面に半導体素子９の載置部１ａを囲繞するように接合され、取付部２ａ，貫通孔２ｂを有する枠体２と、この貫通孔２ｂに嵌着される入出力端子４とを具備している。
【００４３】
これにより、入出力端子４を取付部２ａに銀ロウ等のロウ材で嵌着させた際、枠体２とシールリング６とに銀ロウ等のロウ材により接合、挟持されている、これらと熱膨張係数がわずかに異なる入出力端子４の平板部４ａに熱応力が加わっても、この熱応力による歪みによって平板部４ａにクラック等が発生し破損することはない。
【００４４】
このような半導体パッケージに、半導体素子９を載置部１ａにＳｎ−Ｐｂ半田等の低融点ロウ材で載置固定するとともに、線路導体４ａ−Ａと半導体素子９とをボンディングワイヤで電気的に接続し、さらに固定部材３に、光ファイバ８を樹脂等の接着剤で取着した金属ホルダ７を、Ａｕ−Ｓｎ等の低融点ロウ材で接合した後、シールリング６上面に蓋体をシーム溶接等により接合することにより、製品としての光半導体装置となる。なお、光半導体装置が本発明の半導体パッケージを用いた半導体装置の一種であることはいうまでもない。
【００４５】
この光半導体装置は、外部電気回路から供給される駆動信号によってＬＤ等の半導体素子９を光励起させ、励起したレーザ光等の光を光ファイバ８に授受させるとともに、光ファイバ８内を伝送させることにより、大容量の情報を高速に伝送できる光電変換装置として機能するものであり、光通信分野等に多く用いられる。
【００４６】
かくして、本発明は、入出力端子における高周波信号の周波数付近での共振を有効に抑制することができ、高周波信号の伝送損失を小さくすることができる。また、伝送される高周波信号の周波数が高くなってもインピーダンスのミスマッチングを有効に防止でき、かつ半導体素子９を光半導体パッケージ内部に気密に収容できる。その結果、半導体素子９を長期にわたり正常かつ安定に作動させ得る。
【００４７】
例えば、図１の入出力端子４を用いて、４０〜５０ＧＨｚの高周波信号を入出力端子４に入出力させた場合、図４のものに比べて入出力端子４における反射損失が５〜７ｄＢ改善された。
【００４８】
なお、本発明は上記実施の形態に限定されず、本発明の要旨を逸脱しない範囲内において種々の変更を行うことは何等支障ない。例えば、半導体パッケージは光半導体パッケージに限られず、高周波信号により作動するＩＣ，ＬＳＩ等の高周波半導体素子を収納する高周波用半導体パッケージであっても良い。
【００４９】
また、平板部４ａの側面に形成される側面接地導体層４ａ−Ｃは、半導体パッケージ内部側および外部側の平板部４aの両側面に形成されていても良く、この場合高周波信号による反射損失をさらに小さくできる。
【００５０】
【発明の効果】
本発明は、入出力端子は、略四角形の誘電体板から成り、かつ上面に一辺から対向する他辺にかけて形成された線路導体および線路導体の両側に略等間隙をもって形成された同一面接地導体層とを有する平板部と、平板部の上面に線路導体および同一面接地導体層を間に挟んで接合された誘電体から成る立壁部とを具備し、平板部の線路導体端側の側面に同一面接地導体層が延出されて成る側面接地導体層が形成されていることにより、側面接地導体層間に大きな容量成分が発生し、その容量成分によるインピーダンスは小さなものとなり、線路導体に小さなインピーダンスの容量成分が並列的に付加された状態となり、信号線路の特性インピーダンスの変化によるインピーダンス不整合を抑制することができる。また、入出力端子の上記容量成分を含んだ共振回路による、数１０ＧＨｚの高周波信号の周波数付近での共振を抑えることができ、例えば高周波信号の周波数付近より低周波数側に共振周波数をずらすことができる。従って、高周波信号の反射損失が低減し、伝送特性が向上する。さらに、接地電位が安定し強化されるという効果も有する。
【００５１】
本発明は、好ましくは、線路導体の幅Ｘに対して側面接地導体層同士の間隔をＸ＋０．０６ｍｍ〜Ｘ＋２ｍｍとしたことにより、高周波信号の周波数付近での共振を有効に抑制するという効果、およびインピーダンス不整合の抑制効果がさらに向上する。
【００５２】
本発明の半導体パッケージは、上面に半導体素子が載置される載置部を有する基体と、基体上面に載置部を囲繞するように取着された枠体と、枠体を貫通してまたは切り欠いて形成された入出力端子の取付部と、取付部に嵌着された本発明の入出力端子とを具備したことにより、半導体素子を気密に収容することができるとともに、高周波信号の伝送特性が向上するため、長期にわたり半導体素子の作動性を良好とし得、信頼性の高い半導体パッケージとなる。
【図面の簡単な説明】
【図１】本発明の入出力端子の一実施形態を示す斜視図である。
【図２】本発明の入出力端子の他の実施形態を示す斜視図である。
【図３】図１の入出力端子が嵌着された半導体パッケージを示す斜視図である。
【図４】従来の入出力端子の斜視図である。
【図５】図４の入出力端子が嵌着された半導体パッケージを示す斜視図である。
【図６】本発明の入出力端子の他の実施形態を示す斜視図である。
【符号の説明】
１：基体
１ａ：載置部
２：枠体
２ａ：取付部
４：入出力端子
４ａ：平板部
４ａ−Ａ：線路導体
４ａ−Ｂ：同一面接地導体層
４ａ−Ｃ：側面接地導体層
４ｂ：立壁部
９：半導体素子[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an input / output terminal and a semiconductor element storage package used for a semiconductor element storage package that stores various semiconductor elements that operate with high-frequency signals such as optical communication, microwave communication, and millimeter wave communication.
[0002]
[Prior art]
A conventional input / output terminal for transmitting a high frequency signal such as a microwave band and a millimeter wave band, and a semiconductor element housing package (hereinafter referred to as a semiconductor package) for hermetically housing a semiconductor element are shown in FIGS. 4 and 5, respectively. . In these drawings, the high-frequency signal input / output terminal mounting portion 102a is formed with a line conductor 104a-A formed on the upper surface from one side to the opposite side and on both sides of the line conductor 104a-A with an equal gap. A flat plate portion 104a made of a dielectric having the same-surface ground conductor layer 104a-B, and a standing wall portion 104b made of a dielectric material joined to the upper surface of the flat plate portion 104a with the line conductor 104a-A interposed therebetween. An input / output terminal 104 is fitted and accommodated inside the semiconductor package via a lead terminal 105 joined to the upper surface of the line conductor 104a-A and the same-surface ground conductor layer 104a-B with a brazing material such as silver solder. The formed semiconductor element 109 and an external electric circuit (not shown) are electrically connected.
[0003]
In such an input / output terminal 104, the line conductor 104a-A on the upper surface of the flat plate portion 104a is used as an input / output line for high-frequency signals, and a semiconductor element 109 and an external electric circuit are connected to both sides of the line conductor 104a-A. The same-surface grounded conductor layers 104a-B having a function of effectively suppressing impedance mismatching in electrical connection between the two and suppressing deterioration of transmission characteristics of high-frequency signals are formed with equal gaps, and have low reflection loss. It can be a semiconductor package.
[0004]
Further, as shown in FIG. 5, an optical semiconductor package, which is one type of such a semiconductor package, has a semiconductor element 109 made of an optical semiconductor element such as an LD (semiconductor laser) or PD (photodiode) mounted on the upper surface. A base 101 made of a metal material such as an iron (Fe) -nickel (Ni) -cobalt (Co) alloy or a copper (Cu) -tungsten (W) alloy is provided. Further, it is joined to the upper surface of the base 101 through a brazing material such as silver brazing so as to surround the mounting portion 101a, and the semiconductor element 109 and an external electric circuit (not shown) are arranged on both sides of the long side. A mounting portion 102a for fitting the input / output terminal 104 is formed, and a through hole 102b, which is an optical transmission path for optically coupling with the semiconductor element 109, is formed on one side of the short side. The frame 102 is made of a metal material such as an Fe-Ni-Co alloy.
[0005]
Further, the outer peripheral portion of the through hole 102b, which is an optical transmission path of the frame body 102, is made of a metal material such as an Fe—Ni—Co alloy or an Fe—Ni alloy that approximates the thermal expansion coefficient of the metal frame body 102. A cylindrical fixing member 103 for fixing the optical fiber 108 is joined with a brazing material such as silver brazing.
[0006]
The seal ring 106 is joined to the upper surface of the frame body 102 and the upper surface of the input / output terminal 104 via a brazing material such as silver solder, sandwiches the input / output terminal 104, and a cover (not shown) is seamed to the upper surface. It functions as a medium for joining by welding or the like.
[0007]
In such a semiconductor package, the semiconductor element 109 is mounted and fixed to the mounting portion 101a with a low melting point solder such as tin (Sn) -lead (Pb) solder, and the line conductors 104a-A and the semiconductor element 109 are fixed. After electrically connecting with a bonding wire (not shown) and adjusting the optical axis between the optical fiber 108 and the semiconductor element 109, the optical fiber 108 is attached to the outer end surface of the fixing member 103 with an adhesive such as resin. The attached metal holder 107 is joined with a low melting point brazing material such as Au-Sn. Furthermore, by joining a lid to the upper surface of the seal ring 106 by seam welding or the like, an optical semiconductor device as a product is obtained.
[0008]
In such an optical semiconductor device, the semiconductor element 109 is optically excited by a drive signal supplied from an external electric circuit, and the excited light such as laser light is transmitted to the optical fiber 108 and transmitted through the optical fiber 108. In addition to functioning as a photoelectric conversion device capable of transmitting a large amount of information at high speed, it is often used in the field of optical communications.
[0009]
[Problems to be solved by the invention]
However, when the conventional input / output terminal 104 is fitted in a semiconductor package and the semiconductor element 109 is operated at a very high frequency of, for example, 40 GHz or more, it is formed on both end faces 104d (FIG. 4) of the flat plate portion 104a. Capacitance components are generated between the metallized layers, and although the capacitance components are small, the impedance becomes large, and a large impedance capacitance component is added in parallel to the line conductor 104a-A, and the characteristic impedance of the signal line There is a problem that the impedance mismatch greatly increases and the impedance mismatch becomes large.
[0010]
Further, the input / output terminal 104 made of a dielectric and a conductor constitutes a resonance circuit including the above-described capacitance component, and resonance is likely to occur in the vicinity of the frequency of the transmitted high frequency signal of several tens GHz. There is a problem that the reflection loss of the high frequency signal increases due to the resonance.
[0011]
Accordingly, the present invention has been completed in view of the above problems, and its object is to improve the operability of the semiconductor element by reducing the reflection loss at the time of input / output of a high-frequency signal. is there.
[0012]
[Means for Solving the Problems]
The input / output terminal of the present invention is a line conductor formed of a substantially rectangular dielectric plate and formed on the upper surface from one side to the opposite side, and a coplanar ground conductor formed on both sides of the line conductor with a substantially equal gap. In the input / output terminal comprising: a flat plate portion having a layer; and an upright wall portion made of a dielectric material joined to the upper surface of the flat plate portion with the line conductor and the same-surface ground conductor layer interposed therebetween, A side surface ground conductor layer is formed by extending the same surface ground conductor layer on the side surface of the line conductor end side.
[0013]
With the above configuration, the present invention generates a large capacitance component between the side ground conductor layers, the impedance due to the capacitance component becomes small, and a capacitance component with a small impedance is added in parallel to the line conductor. Impedance mismatch due to changes in the characteristic impedance of the line can be suppressed. Further, resonance in the vicinity of the frequency of the high frequency signal of several tens of GHz due to the resonance circuit including the capacitance component of the input / output terminal can be suppressed. For example, the resonance frequency can be shifted to a lower frequency side from near the frequency of the high frequency signal. it can. Therefore, the reflection loss of the high frequency signal is reduced and the transmission characteristics are improved. Further, the ground potential is stabilized and enhanced.
[0014]
In the present invention, preferably, the distance between the side ground conductor layers is set to X + 0.06 mm to X + 2 mm with respect to the width X of the line conductor.
[0015]
The present invention further improves the effect of effectively suppressing the resonance of the high-frequency signal by the resonance circuit of the input / output terminal.
[0016]
Further, the semiconductor package of the present invention includes a base having a mounting portion on which a semiconductor element is mounted on the upper surface, a frame attached to the upper surface of the base so as to surround the mounting portion, and the frame And an input / output terminal mounting portion formed through the notch and the input / output terminal of the present invention fitted to the mounting portion.
[0017]
According to the present invention, the semiconductor device can be hermetically accommodated by such a configuration, and the high-frequency signal transmission characteristics are improved. Therefore, the operability of the semiconductor device can be improved over a long period of time, and the semiconductor package has high reliability. It becomes.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
The input / output terminals and semiconductor package of the present invention will be described in detail below. The input / output terminals and the semiconductor package are shown in FIGS. 1, 2, and 3, respectively. 1 and 2 are perspective views of an input / output terminal of the present invention, and FIG. 3 is a perspective view of a semiconductor package using the input / output terminal of FIG. In these drawings, 1 is a base, 2 is a frame, 3 is a cylindrical fixing member for fixing a metal holder 7 to which an optical fiber 8 is attached, 4 is an input / output terminal, and 6 is a seal ring. The base body 1, the frame body 2, the fixing member 3, the input / output terminal 4, and the seal ring 6 accommodate therein a semiconductor element 9 such as an optical semiconductor element such as an LD or PD, and a lid ( By attaching (not shown), a container for housing the semiconductor element 9 is formed.
[0019]
The base body 1 has a mounting portion 1a for mounting the semiconductor element 9 on the upper surface thereof, functions as a support member for supporting the semiconductor element 9, and efficiently generates heat generated when the semiconductor element 9 operates to the outside. Has a function to dissipate.
[0020]
The substrate 1 is a plate having a substantially rectangular parallelepiped shape or a substantially rectangular shape, and is made of a metal material such as an Fe—Ni—Co alloy or a Cu—W alloy. Further, the production is formed into a predetermined shape by subjecting an alloy ingot to metal processing such as rolling or pressing.
[0021]
The substrate 1 has a metal having excellent corrosion resistance and excellent wettability with a brazing material on its surface, specifically, a Ni layer having a thickness of 0.5 to 9 μm and an Au layer having a thickness of 0.5 to 5 μm. If the layers are sequentially deposited by the plating method, it is possible to effectively prevent the base 1 from being oxidatively corroded and to firmly adhere and fix the semiconductor element 9 to the upper surface of the base 1. Therefore, it is preferable that a metal layer such as a Ni layer having a thickness of 0.5 to 9 μm or an Au layer having a thickness of 0.5 to 5 μm is deposited on the surface of the substrate 1 by a plating method.
[0022]
Further, the upper surface of the substrate 1 is joined via a brazing material such as silver solder so as to surround the mounting portion 1a, and the semiconductor element 9 and an external electric circuit are connected to both side portions on the long side. A mounting portion 2a composed of a through hole or notch for fitting the input / output terminal 4 to be electrically connected is formed, and further, a through which is an optical transmission path for optically coupling to the semiconductor element 9 on one side of the short side It has a frame 2 made of a metal material such as Fe-Ni-Co alloy in which holes 2b are formed.
[0023]
The frame body 2 is manufactured in the same shape as the base body 1 by subjecting an alloy ingot to metal processing such as rolling or pressing.
[0024]
The frame body 2 is bonded to the base body 1 by bonding the upper surface of the base body 1 and the lower surface of the frame body 2 via a brazing material such as a preform-like silver brazing laid on the upper surface of the base body 1. Furthermore, a metal layer such as a Ni layer having a thickness of 0.5 to 9 μm or an Au layer having a thickness of 0.5 to 5 μm may be deposited on the surface of the frame body 2 by a plating method in the same manner as the substrate 1.
[0025]
The mounting portion 2a of the frame 2 has an input / output terminal 4 having a function of inputting and outputting a high frequency signal between the semiconductor element 9 and an external electric circuit, and a function of blocking the inside and outside of the semiconductor package. Joined with brazing material such as silver brazing.
[0026]
This input / output terminal 4 is formed by laminating a rectangular column-like standing wall portion 4b lying on a substantially rectangular parallelepiped on the upper surface of a rectangular plate-like flat plate portion 4a. At this time, as shown in FIG. 1, the end surface of the standing wall portion 4b and the end surface of the flat plate portion 4a are substantially flush with each other.
[0027]
The input / output terminal 4 of the present invention has a flat plate portion 4a made of a dielectric material such as alumina (Al ₂ O ₃ ) ceramics, aluminum nitride (AlN) ceramics, mullite (3Al ₂ O ₃ .2SiO ₂ ) ceramics. On the upper surface of the flat plate portion 4a, a line conductor 4a-A made of a metallized layer such as W, Mo-Mn, etc. is formed from one side to the opposite side, and substantially equidistant on both sides of the line conductor 4a-A. The same grounded conductor layer 4a-B is formed. On the side surface of the flat plate portion 4a on the end side of the line conductor 4a-A, a side surface ground conductor layer 4a-C formed by extending the same surface ground conductor layer 4a-B is formed.
[0028]
Since the side surface ground conductor layer 4a-C is formed on the side surface of the flat plate portion 4a in this way, the capacitance component generated between the side surface ground conductor layers 4a-C can be reduced when operated at a high frequency of 40 GHz or more. The resonance in the vicinity of the frequency of the high frequency signal of 40 GHz due to the included resonance circuit of the input / output terminal 4 can be suppressed, and for example, the resonance frequency can be shifted to the lower frequency side from the vicinity of the frequency of the high frequency signal. Therefore, the semiconductor element 9 can be operated at a higher frequency. In addition, the ground potential is stabilized and strengthened.
[0029]
That is, by forming the side ground conductor layer 4a-C on the side surface of the flat plate portion 4a, the reflection loss of the high frequency signal on the side surface of the flat plate portion 4a can be made extremely small, and the semiconductor element 9 is normal even at higher frequencies. And operates stably.
[0030]
Further, as shown in FIG. 2, the side ground conductor layers 4a-C may be connected so as not to be electrically connected to the line conductor 4a-A on the side surface of the flat plate portion 4a. Furthermore, resonance near the frequency of the high-frequency signal can be suppressed, and the ground potential is further stabilized. In the configuration as shown in FIG. 2, the width X of the line conductor 4a-A may be appropriately reduced in order to match impedance when inputting and outputting high-frequency signals between the semiconductor element 9 and the external electric circuit.
[0031]
However, since the width X needs to be such that the bonding of the lead terminal 5 bonded to the upper surface of the line conductor 4a-A to the line conductor 4a-A is not impaired, the dielectric on the side surface of the flat plate portion 4a is exposed. It is preferable to appropriately secure an interval (distance) from the portion being connected, that is, the line conductor 4a-A to the side ground conductor layer 4a-C.
[0032]
The gap between the line conductor 4a-A and the same-surface ground conductor layer 4a-B and the gap between the line conductor 4a-A and the side surface ground conductor layer 4a-C are preferably 0.03 mm or more. In the case of less than 0.03 mm, when the lead terminal 5 is joined with a brazing material such as silver brazing, the adjacent line conductor 4a-A and the same surface ground conductor layer 4a-B are electrically connected (short-circuited). ). In this case, transmission of high-frequency signals between the semiconductor element 9 and the external electric circuit is impaired.
[0033]
As shown in FIG. 6, when the width of the line conductor 4a-A is X, the distance Y between the side ground conductor layers 4a-C is preferably X + 0.06 mm to X + 2 mm. If the interval Y is less than X + 0.06 mm, the line conductor 4a-A and the side surface ground conductor layer 4a-C are likely to be short-circuited, and the coaxial structure of the line conductor 4a-A is affected. When the interval Y exceeds X + 2 mm, resonance occurs near the frequency of the high frequency signal of several tens of GHz, and the transmission loss of the high frequency signal tends to increase. Further, in this case, the interval Y between the side ground conductor layers 4a-C is preferably narrower than the interval between the same plane ground conductor layers 4a-B, and the above effect is enhanced.
[0034]
Further, the arrangement and shape of the side ground conductor layers 4a-C are preferably provided symmetrically with respect to the central axis of the line conductor 4a-A as shown in FIGS.
[0035]
Such a line conductor 4a-A, the same-surface ground conductor layer 4a-B, and the side-surface ground conductor layer 4a-C are made of, for example, a metal paste obtained by adding and mixing an organic solvent and a solvent to a powder such as W. It is formed by applying a predetermined pattern to a ceramic green sheet for 4a in advance by a well-known screen printing method and baking it.
[0036]
Further, the standing wall portion 4b is laminated on the upper surface of the flat plate portion 4a. That is, the standing wall portion 4b is made of a dielectric material joined to the upper surface of the flat plate portion 4a with the line conductor 4a-A and the coplanar ground conductor layer 4a-B interposed therebetween.
[0037]
A high-frequency signal is input / output between the external electric circuit and the input / output terminal 4 in a portion of the input / output terminal 4 that is led out of the frame body 2 of the line conductor 4a-A and the common ground conductor layer 4a-B. The lead terminal 5 made of a metal material such as an Fe—Ni—Co alloy is joined with a brazing material such as silver brazing.
[0038]
Further, a through hole 2b is formed on one side of the short side of the frame body 2, and one end surface is joined with a brazing material such as silver brazing so as to surround the opening of the through hole 2b, and the other end surface is joined to the other end surface. Is provided with a fixing member 3 to which a metal holder 7 having an optical fiber 8 attached with an adhesive such as a resin is joined with a low melting point solder such as Au-Sn. The fixing member 3 is made by processing the same material as that of the base 1 and the frame 2 into a desired shape by the same processing method, and has a Ni layer of 0.5 to 9 μm or 0.5 to 5 μm on the surface thereof. A metal layer such as an Au layer may be deposited by a plating method.
[0039]
Thus, the seal ring 6 is joined to the upper surface of the frame 2 to which the input / output terminals 4 and the fixing member 3 are attached with a brazing material such as silver brazing. The seal ring 6 is joined to the upper surface of the frame body 2 with a brazing material such as silver brazing to sandwich the input / output terminal 4, and a lid body for sealing the semiconductor element 9 is formed on the upper surface by seam welding or the like. It functions as a bonding medium for bonding.
[0040]
The input / output terminal 4 of the present invention includes a line conductor 4a-A formed on the upper surface from one side to the opposite other side, and a coplanar ground conductor layer 4a-B formed on the both sides of the line conductor 4a-A with substantially equal gaps. A flat plate portion 4a made of a dielectric having a side ground conductor layer 4a-C formed by extending the same plane ground conductor layer 4a-B on the side surface, and the line conductor 4a-A on the upper surface of the flat plate portion 4a. And a standing wall portion 4b made of a dielectric material joined with the ground conductor layer 4a-B interposed therebetween.
[0041]
As a result, even when a high-frequency signal having a higher frequency is transmitted, reflection of the high-frequency signal can be reduced, and impedance mismatching at the time of input / output of the high-frequency signal can be effectively prevented.
[0042]
The semiconductor package of the present invention includes a base body 1 made of a metal material, a frame body 2 which is bonded to the upper surface of the base body 1 so as to surround the mounting portion 1a of the semiconductor element 9 and has a mounting portion 2a and a through hole 2b. And an input / output terminal 4 fitted in the hole 2b.
[0043]
Thus, when the input / output terminal 4 is fitted to the mounting portion 2a with a brazing material such as silver brazing, the frame 2 and the seal ring 6 are joined and sandwiched by the brazing material such as silver brazing, Even if a thermal stress is applied to the flat plate portion 4a of the input / output terminal 4 having a slightly different thermal expansion coefficient, the flat plate portion 4a is not damaged due to a crack caused by the strain due to the thermal stress.
[0044]
In such a semiconductor package, the semiconductor element 9 is mounted and fixed on the mounting portion 1a with a low melting point solder such as Sn-Pb solder, and the line conductor 4a-A and the semiconductor element 9 are electrically connected with bonding wires. Further, after the metal holder 7 having the optical fiber 8 attached to the fixing member 3 with an adhesive such as a resin is joined to the fixing member 3 with a low melting point soldering material such as Au—Sn, a lid is seamed on the upper surface of the seal ring 6. By joining by welding or the like, an optical semiconductor device as a product is obtained. Needless to say, the optical semiconductor device is a kind of semiconductor device using the semiconductor package of the present invention.
[0045]
In this optical semiconductor device, a semiconductor element 9 such as an LD is optically excited by a drive signal supplied from an external electric circuit, and the excited laser light or the like is transmitted / received to / from the optical fiber 8 and transmitted through the optical fiber 8. Therefore, it functions as a photoelectric conversion device capable of transmitting a large amount of information at high speed, and is often used in the field of optical communication.
[0046]
Thus, the present invention can effectively suppress the resonance in the vicinity of the frequency of the high frequency signal at the input / output terminal, and can reduce the transmission loss of the high frequency signal. Further, even when the frequency of the transmitted high-frequency signal is increased, impedance mismatching can be effectively prevented, and the semiconductor element 9 can be hermetically accommodated inside the optical semiconductor package. As a result, the semiconductor element 9 can be operated normally and stably over a long period of time.
[0047]
For example, when a high frequency signal of 40 to 50 GHz is input / output to / from the input / output terminal 4 using the input / output terminal 4 of FIG. 1, the reflection loss at the input / output terminal 4 is improved by 5 to 7 dB compared to that of FIG. It was done.
[0048]
It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. For example, the semiconductor package is not limited to an optical semiconductor package, and may be a high-frequency semiconductor package that houses a high-frequency semiconductor element such as an IC or LSI that operates by a high-frequency signal.
[0049]
Further, the side ground conductor layers 4a-C formed on the side surface of the flat plate portion 4a may be formed on both side surfaces of the flat plate portion 4a on the inner side and the outer side of the semiconductor package. It can be made even smaller.
[0050]
【The invention's effect】
In the present invention, the input / output terminal is formed of a substantially rectangular dielectric plate, and the line conductor is formed on the upper surface from one side to the opposite side, and the same surface ground conductor is formed on both sides of the line conductor with substantially equal gaps. A flat plate portion having a layer, and a standing wall portion made of a dielectric material joined to the upper surface of the flat plate portion with the line conductor and the same-surface ground conductor layer interposed therebetween, and on the side surface of the flat plate portion on the end side of the line conductor. By forming the side ground conductor layer formed by extending the same ground conductor layer, a large capacitance component is generated between the side ground conductor layers, the impedance due to the capacitance component is small, and the line conductor has a small impedance. Thus, impedance mismatch due to a change in the characteristic impedance of the signal line can be suppressed. Further, resonance in the vicinity of the frequency of the high frequency signal of several tens of GHz due to the resonance circuit including the capacitance component of the input / output terminal can be suppressed. For example, the resonance frequency can be shifted to a lower frequency side from near the frequency of the high frequency signal. it can. Therefore, the reflection loss of the high frequency signal is reduced and the transmission characteristics are improved. Further, the ground potential is stabilized and enhanced.
[0051]
The present invention preferably has an effect of effectively suppressing resonance in the vicinity of the frequency of the high-frequency signal by setting the distance between the side ground conductor layers to X + 0.06 mm to X + 2 mm with respect to the width X of the line conductor, and The effect of suppressing impedance mismatching is further improved.
[0052]
The semiconductor package of the present invention includes a base having a mounting portion on which a semiconductor element is mounted on the upper surface, a frame attached to surround the mounting portion on the upper surface of the base, and penetrating the frame or By providing the mounting portion of the input / output terminal formed by notching and the input / output terminal of the present invention fitted to the mounting portion, the semiconductor element can be stored in an airtight manner, and the transmission of the high-frequency signal Since the characteristics are improved, the operability of the semiconductor element can be improved over a long period of time, and a highly reliable semiconductor package can be obtained.
[Brief description of the drawings]
FIG. 1 is a perspective view showing an embodiment of an input / output terminal of the present invention.
FIG. 2 is a perspective view showing another embodiment of the input / output terminal of the present invention.
FIG. 3 is a perspective view showing a semiconductor package in which the input / output terminals of FIG. 1 are fitted.
FIG. 4 is a perspective view of a conventional input / output terminal.
5 is a perspective view showing a semiconductor package in which the input / output terminals of FIG. 4 are fitted. FIG.
FIG. 6 is a perspective view showing another embodiment of the input / output terminal of the present invention.
[Explanation of symbols]
1: Base 1a: Placement part 2: Frame 2a: Mounting part 4: Input / output terminal 4a: Flat plate part 4a-A: Line conductor 4a-B: Coplanar ground conductor layer 4a-C: Side ground conductor layer 4b: Standing wall 9: Semiconductor element

Claims

A flat plate portion having a substantially rectangular dielectric plate and having a line conductor formed from one side to the other side facing the upper surface and a coplanar ground conductor layer formed with substantially equal gaps on both sides of the line conductor; In the input / output terminal comprising the upper surface of the flat plate portion and the standing wall portion made of a dielectric material sandwiched between the line conductor and the same-surface ground conductor layer, the side surface of the flat plate portion on the line conductor end side The side surface ground conductor layer formed by extending the same-surface ground conductor layer is formed so as to connect the same- surface ground conductor layers on both sides of the line conductor, and the side surface with respect to the width X of the line conductor. An input / output terminal having an interval between ground conductor layers of X + 0.06 mm to X + 2 mm and an interval between the line conductor and the side surface ground conductor layer of 0.03 mm or more .

A base having a mounting portion on which a semiconductor element is mounted on the upper surface, a frame attached to the upper surface of the base so as to surround the mounting portion, and formed by penetrating or notching the frame A package for housing a semiconductor element, comprising: an input / output terminal mounting portion; and the input / output terminal according to claim 1 fitted to the mounting portion.

3. The semiconductor element housing according to claim 2, wherein the frame is rectangular, and the input / output terminal is attached to the long side, and a through-hole to which the optical fiber is attached is formed on the short side. package.