JP2001189405A - High-frequency input/output terminal and package housing high-frequency semiconductor device - Google Patents

High-frequency input/output terminal and package housing high-frequency semiconductor device

Info

Publication number
JP2001189405A
JP2001189405A JP37165099A JP37165099A JP2001189405A JP 2001189405 A JP2001189405 A JP 2001189405A JP 37165099 A JP37165099 A JP 37165099A JP 37165099 A JP37165099 A JP 37165099A JP 2001189405 A JP2001189405 A JP 2001189405A
Authority
JP
Japan
Prior art keywords
conductor
line
dielectric substrate
frequency
output terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP37165099A
Other languages
Japanese (ja)
Inventor
Shigeo Morioka
滋生 森岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP37165099A priority Critical patent/JP2001189405A/en
Publication of JP2001189405A publication Critical patent/JP2001189405A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a high-frequency input/output terminal having less loss over a wide frequency band of tens of GHz which is satisfactory in transmission characteristics. SOLUTION: There are provided a dielectric substrate 1, where there is a recess 3 on the lower surface and a ground conductor 4 is formed on the lower surface around the recess 3, dielectrics so bonded on the upper surface of the dielectric substrate 1 as to face the central part of the recess 3 or a wall member 2 comprising the dielectrics, a pair of line conductors 5 and 5 formed to be in a straight to each other on both sides of the wall member 2 on the upper surface of the dielectrics substrate 1, which each of tip parts face each other at both side parts of the recess 3, a ground conductor 6 in identical plane formed on both sides of the line conductors 5 and 5, and a lower surface side line conductor 8 which is so formed on the bottom surface of the recess 3 of the dielectric substrate 1 as straight with the pair of line conductors 5 and 5, while being in parallel and connected electrically to the each tip part of the pair of line conductors 5 and 5 by both ends with through-conductors 7 and 7.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は高周波用半導体素子
収納用パッケージの高周波入出力部に使用される高周波
用入出力端子ならびにその高周波用入出力端子を用いた
高周波用半導体素子収納用パッケージに関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency input / output terminal used for a high-frequency input / output section of a high-frequency semiconductor element storage package and a high-frequency semiconductor element storage package using the high-frequency input / output terminal. It is.

【0002】[0002]

【従来の技術】マイクロ波帯やミリ波帯等の高周波信号
を用いる高周波用半導体素子等を気密封止して収容する
高周波用半導体素子収納用パッケージの信号入出力部に
おいては、高周波伝送線路として誘電体基板上に形成さ
れたマイクロストリップ線路とハーメチックシール部の
ストリップ線路とを接合する構造が一般的に用いられ、
このような構造の高周波用入出力端子を介してパッケー
ジの内部に気密封止して収容された高周波用半導体素子
と外部電気回路との接続が行なわれる。
2. Description of the Related Art In a signal input / output portion of a high-frequency semiconductor element housing package for hermetically sealing and housing a high-frequency semiconductor element using a high-frequency signal in a microwave band or a millimeter wave band, a high-frequency transmission line is used. A structure that joins a microstrip line formed on a dielectric substrate and a strip line of a hermetic seal portion is generally used,
Through the high frequency input / output terminal having such a structure, the high frequency semiconductor element hermetically sealed and housed in the package is connected to an external electric circuit.

【0003】そのような高周波用入出力端子として、例
えば特開平5−183301号公報には、パッケージのハーメ
チックシール部を構成する線路部と、この線路部の両端
に接続されてパッケージの外部との接続を行う外部線路
部と、内部回路との接続を行う内部線路部とを有し、ハ
ーメチックシール部を構成する線路部の長さを信号波長
λの1/2n(nは自然数)に選定した極超短波帯用パ
ッケージ入出力部が提案されている。
As such a high frequency input / output terminal, for example, Japanese Patent Application Laid-Open No. 5-183301 discloses that a line portion forming a hermetic seal portion of a package is connected to both ends of the line portion and to the outside of the package. It has an external line portion for connection and an internal line portion for connection to an internal circuit, and the length of the line portion forming the hermetic seal portion is selected to be nn (n is a natural number) of the signal wavelength λ. A package input / output unit for a microwave band has been proposed.

【0004】これによれば、ハーメチックシール部を構
成するストリップ線路部等による線路部の長さを信号波
長λの1/2nに選定したことから、外部線路部と線路
部および内部線路部と線路部との形状の相違による伝播
モードの相違によって生じる反射や、製作精度が充分で
なく寸法が設計値よりずれて特性インピーダンスが相違
する場合の反射を防止することができ、従って、製作が
容易でコストダウンを図ることができ、かつ反射を防止
して極超短波帯に於ける特性を改善することができると
いうものである。
According to this, since the length of the line portion such as the strip line portion forming the hermetic seal portion is selected to be 1 / 2n of the signal wavelength λ, the external line portion and the line portion, and the internal line portion and the line portion are selected. It is possible to prevent reflection caused by the difference in the propagation mode due to the difference in shape from the part, and reflection in the case where the manufacturing accuracy is not sufficient and the dimensions are different from the design values and the characteristic impedances are different, so that the manufacturing is easy. The cost can be reduced, and reflection can be prevented to improve characteristics in the ultrahigh frequency band.

【0005】なお、このような構成の従来の高周波用入
出力端子は、アルミナセラミックス等から成る誘電体基
板上に各線路部がタングステンやモリブデン等から成る
メタライズ金属層により形成され、その上にハーメチッ
クシール部を構成する上部誘電体が接合され、あるいは
ハーメチックシール部の線路部上に誘電体のコーティン
グを施して誘電体で成形されたキャップが装着され作製
されていた。
In the conventional high frequency input / output terminal having such a configuration, each line portion is formed by a metallized metal layer made of tungsten, molybdenum, or the like on a dielectric substrate made of alumina ceramic or the like, and a hermetic metal layer is formed thereon. It has been manufactured by joining an upper dielectric material constituting a seal portion, or applying a dielectric coating on a line portion of the hermetic seal portion and mounting a cap formed of the dielectric material.

【0006】しかしながら、この特開平5−183301号公
報に提案されたような従来の高周波用入出力端子では、
ハーメチックシール部を構成するストリップ線路部の長
さを信号波長λの1/2nに選定する必要があることか
ら、例えば30GHzを超えるような周波数の高い領域
(ミリ波帯)のように周波数が高くなればなる程ハーメ
チックシール部の長さを短くしなければならず、そのよ
うにハーメチックシール部の長さを短くすると、この部
分の上下の誘電体間に線路部としての金属層があるため
誘電体間の接着強度が著しく低下してしまい、デラミネ
ーションが発生したり、半導体素子収納用パッケージに
使用した場合に半導体素子の実装やキャップシールある
いは2次実装の際に熱ストレスが加わると、ハーメチッ
クシール部のシールが損なわれてしまうという問題点が
あった。
However, in the conventional high frequency input / output terminal proposed in Japanese Patent Laid-Open No. 5-183301,
Since it is necessary to select the length of the strip line portion constituting the hermetic seal portion to be 1 / 2n of the signal wavelength λ, the frequency is high, for example, in a high frequency region exceeding 30 GHz (millimeter wave band). The shorter the length of the hermetic seal, the shorter the length of the hermetic seal. If the adhesive strength between the bodies is significantly reduced and delamination occurs, or if thermal stress is applied during semiconductor device mounting, cap sealing, or secondary mounting when used in a semiconductor device housing package, hermetic There is a problem that the seal of the seal portion is damaged.

【0007】また、ミリ波帯のような周波数の高い領域
に対しては、ストリップ線路部とマイクロストリップ線
路部とのインピーダンスを整合させて、さらに高周波信
号の伝搬モードの相違をなくして反射損失を抑えるため
には、ストリップ線路部の線路導体の幅が非常に小さく
なって不安定になることや、ハーメチックシール部の線
路導体の長さを信号波長λの1/2nに設計的に合わせ
たとしても入出力端子の形状が3次元的に見ると複雑な
ことから、製造上のばらつきによりストリップ線路部で
の伝搬モードとその前後のマイクロストリップ線路部で
の伝搬モードが実質的に異なってしまいやすく、反射損
失や挿入損失が増大して高周波信号の伝送特性を悪化さ
せてしまい易いという問題点もあった。
In a high-frequency region such as a millimeter-wave band, the impedance of the strip line portion and the impedance of the microstrip line portion are matched, and the difference in the propagation mode of the high-frequency signal is eliminated to reduce the reflection loss. In order to suppress this, it is assumed that the width of the line conductor in the strip line portion becomes extremely small and becomes unstable, and that the length of the line conductor in the hermetic seal portion is designed to be nn of the signal wavelength λ. Also, since the shape of the input / output terminals is complicated when viewed three-dimensionally, the propagation mode in the strip line section and the propagation mode in the microstrip line section before and after the strip line section are likely to be substantially different due to manufacturing variations. In addition, there has been a problem that the reflection loss and the insertion loss are increased and the transmission characteristics of the high-frequency signal are likely to be deteriorated.

【0008】このような従来技術の問題点を解決するた
めに、特開平11− 74396号公報には、図8に分解斜視図
で、図9に断面図で示すように、誘電体層41a・41bの
2層から成り下面に接地導体43を有する誘電体基板41
と、この誘電体基板41の上面に接合され、誘電体または
導電体から成る壁部材42と、誘電体基板41の上面の壁部
材42の両側に互いに一直線状に形成された一対の線路導
体44・44と、誘電体層41a・41bの間で壁部材42の下方
に一対の線路導体44・44と一直線状かつ平行に形成さ
れ、両端が一対の線路導体44・44の壁部材42の両側の各
端子とそれぞれ貫通導体47・47により電気的に接続され
た内層線路導体45とから成り、貫通導体47・47間の間隔
を使用高周波信号の波長λの4分の1に選定した高周波
用入出力端子ならびにこの高周波用入出力端子を用いた
高周波用半導体素子収納用パッケージが提案されてい
る。
In order to solve such a problem of the prior art, Japanese Unexamined Patent Application Publication No. 11-74396 discloses an exploded perspective view in FIG. 8 and a sectional view in FIG. A dielectric substrate 41 made of two layers 41b and having a ground conductor 43 on the lower surface.
And a wall member 42 joined to the upper surface of the dielectric substrate 41 and made of a dielectric or a conductor, and a pair of line conductors 44 formed on both sides of the wall member 42 on the upper surface of the dielectric substrate 41 in a straight line with each other. A pair of line conductors 44, 44 are formed below and in parallel with the pair of line conductors 44, 44 between the dielectric layer 41a, 41b and the dielectric layers 41a, 41b, and both ends of the wall member 42 of the pair of line conductors 44, 44 are formed. And the inner layer line conductor 45 electrically connected by the through conductors 47, 47, respectively. The interval between the through conductors 47, 47 is selected to be one quarter of the wavelength λ of the used high frequency signal. An input / output terminal and a high-frequency semiconductor element housing package using the high-frequency input / output terminal have been proposed.

【0009】この高周波用入出力端子によれば、誘電体
基板41と壁部材42との間には従来の高周波用入出力端子
のように線路導体が介在しないために誘電体基板41と壁
部材42との接着強度が高まってその接合を強固なものと
することができ、デラミネーションが発生したり、半導
体素子収納用パッケージに使用した場合に半導体素子の
実装やキャップシールあるいは2次実装の際に熱ストレ
スが加わってもハーメチックシール部のシールが損なわ
れることがない、ハーメチックシール部として高い信頼
性の気密封止構造を有する高周波用入出力端子が得られ
る。
According to the input / output terminal for high frequency, the line conductor is not interposed between the dielectric substrate 41 and the wall member 42 unlike the conventional input / output terminal for high frequency. The bonding strength with 42 can be increased and the bond can be strengthened, causing delamination or when mounting the semiconductor element, cap sealing, or secondary mounting when used in a semiconductor element storage package. A high frequency input / output terminal having a highly reliable hermetically sealed structure as a hermetic seal portion is obtained, without the seal of the hermetic seal portion being damaged even when thermal stress is applied to the hermetic seal portion.

【0010】また、ミリ波帯のような周波数の高い領域
に対しても、内層線路導体45と接地導体43との間に容量
成分を持ち、貫通導体47・47においてインダクタンス成
分をもつことから、誘電体基板41上の線路導体44・44と
内層線路導体45との特性インピーダンスを整合させ反射
損失を抑えるために誘電体基板41上の線路導体44・44の
幅W3 に対して内層線路導体45の幅W4 を従来のように
非常に小さくする必要がなく、しかも線路導体44・44や
内層線路導体45・貫通導体47の形状も複雑なものではな
いので、製造上のばらつきによる伝搬モードの相違や反
射損失の増大がなく、使用高周波信号に対する良好な伝
送特性を得ることができる。
In addition, even in a high frequency region such as a millimeter wave band, since a capacitance component exists between the inner layer line conductor 45 and the ground conductor 43 and an inductance component exists in the through conductors 47, 47, inner line conductor with respect to the width W 3 of the line conductors 44, 44 on the dielectric substrate 41 in order to match the characteristic impedance of the line conductors 44, 44 and the inner line conductor 45 on the dielectric substrate 41 suppress reflection loss 45 need not be very small as in the conventional width W 4 of, and since the shape of the line conductor 44, 44 and the inner line conductor 45, through conductor 47 also does not complex, propagation mode due to variations in manufacturing And the transmission loss for the used high-frequency signal can be obtained.

【0011】さらに、ミリ波帯等の高周波領域において
も、2つの貫通導体47・47の間隔を使用高周波信号の波
長λの4分の1にすることで、一方の見かけ上の開放端
が貫通導体47・内層線路導体45を介してもう一方の線路
導体44へ最大電力で伝搬できることから、使用高周波信
号の伝送特性を劣化させてしまうことがない。
Further, even in a high frequency region such as a millimeter wave band, by setting the interval between the two through conductors 47 to 4 of the wavelength λ of the high frequency signal to be used, one of the apparent open ends penetrates. Since it is possible to propagate the maximum power to the other line conductor 44 via the conductor 47 and the inner layer line conductor 45, the transmission characteristic of the used high-frequency signal is not deteriorated.

【0012】これらの結果、ハーメチックシール部であ
る壁部材42の接着強度を向上してデラミネーションの発
生や熱ストレスによるシールの損傷を防止することがで
きるとともに、所望の特定の周波数の使用高周波信号に
対して優れた伝送特性を有した高信頼性の高周波用入出
力端子を提供できるというものである。
As a result, the adhesive strength of the wall member 42, which is a hermetic seal portion, can be improved to prevent the occurrence of delamination and damage to the seal due to thermal stress. Thus, a highly reliable high frequency input / output terminal having excellent transmission characteristics can be provided.

【0013】[0013]

【発明が解決しようとする課題】しかしながら、上記の
特開平11− 74396号公報に記載された高周波用入出力端
子によれば、貫通導体47・47の間隔を使用高周波信号の
波長λの4分の1に設定し、線路導体44の長さ・幅、内
層線路導体45の幅、貫通導体47・47の径・長さ等を最適
値に設定することにより、所望の特定の周波数の使用高
周波信号に対しては優れた伝送特性を得られるものの、
ミリ波帯のような高い周波数領域においては、高周波信
号が線路導体を伝搬する際に、一般に「高次モード」と
呼ばれるモードが発生してある特定の周波数(遮断周波
数)の高周波信号の伝搬を妨害してしまうという現象を
生じるため、広い周波数範囲、例えば数十GHzの周波
数帯に渡って優れた伝送特性を得ることができないとい
う課題を有していた。
However, according to the high frequency input / output terminal described in Japanese Patent Application Laid-Open No. H11-74396, the distance between the penetrating conductors 47 is four minutes of the wavelength λ of the high frequency signal used. By setting the length and width of the line conductor 44, the width of the inner layer line conductor 45, and the diameters and lengths of the through conductors 47 and 47 to optimal values, a desired specific frequency can be used. Although excellent transmission characteristics can be obtained for signals,
In a high frequency region such as a millimeter wave band, when a high-frequency signal propagates through a line conductor, the propagation of a high-frequency signal at a specific frequency (cutoff frequency) in which a mode generally called a “higher mode” occurs. Since the phenomenon of interference occurs, there is a problem that it is not possible to obtain excellent transmission characteristics over a wide frequency range, for example, a frequency band of several tens of GHz.

【0014】このような遮断周波数は、従来の高周波用
入出力端子で使用されているストリップ線路やマイクロ
ストリップ線路では、主に線路導体と接地導体との距離
によって決まる特定の周波数から高い周波数に渡って不
定期に現れることが知られており、従来の高周波用入出
力端子のように線路導体44・内層線路導体45と接地導体
43との距離、すなわち誘電体基板41・誘電体層41aの厚
みが 0.5〜2mm程度の場合には、この「高次モード」
に起因する遮断周波数は数十GHzの周波数から高い周
波数帯にかけて発生していた。
In a strip line or a microstrip line used in a conventional high frequency input / output terminal, such a cutoff frequency ranges from a specific frequency determined mainly by a distance between a line conductor and a ground conductor to a high frequency. It is known that the line conductor 44, the inner layer line conductor 45, and the ground conductor
In the case where the distance to the dielectric substrate 41, that is, the thickness of the dielectric substrate 41 / dielectric layer 41a is about 0.5 to 2 mm,
The cutoff frequency caused by the frequency range from several tens of GHz to a high frequency band.

【0015】ところで、この遮断周波数を使用高周波信
号の周波数帯よりも高い周波数帯へ移動させるために
は、一般には、線路導体と接地導体との距離を近づける
という方法が行われるが、従来の高周波用入出力端子の
構造では、線路導体44・内層線路導体45と接地導体43と
の間に誘電体層を挟んだ構造となっているために、その
距離を近づけることが困難であるという問題点を有して
いた。
In order to move the cut-off frequency to a frequency band higher than the frequency band of the used high-frequency signal, a method of shortening the distance between the line conductor and the ground conductor is generally performed. In the structure of the input / output terminal, the dielectric layer is sandwiched between the line conductor 44 / inner layer line conductor 45 and the ground conductor 43, so that it is difficult to reduce the distance. Had.

【0016】また、従来の高周波用入出力端子によれ
ば、誘電体基板41上面の一対の線路導体44・44と内層線
路導体45とを接続する貫通導体47・47が一対の線路導体
44・44および内層線路導体45に対してそれぞれ直交する
ように形成されているために、伝搬される高周波信号は
それぞれの接続部でその進行方向を90°変更されて伝搬
されることになる。ところが、高周波信号が進行方向を
90°変更されて伝搬される際に、高周波信号の一部が図
9の矢印D・Eで示すようにその進行方向を90°変更さ
れずに伝送線路から漏れだしてしまい、特に、高周波信
号は比誘電率の低い物質に比べて比誘電率の高い物質を
伝搬し易いために、比誘電率が 1.0の空気層に露出して
いる線路導体44・44と貫通導体47・47との接続部より
も、比誘電率が空気層に較べて非常に高いアルミナセラ
ミックス等から成る誘電体基板41内部に形成された内層
線路導体45と貫通導体47・47との接続部から高周波信号
がより多く漏れ出してしまい、その結果、高周波信号の
伝送特性を劣化させてしまうという問題点を有してい
た。
According to the conventional high frequency input / output terminal, the through conductors 47 connecting the pair of line conductors 44 on the upper surface of the dielectric substrate 41 and the inner layer line conductor 45 are formed of a pair of line conductors.
Since they are formed so as to be orthogonal to 44 and 44 and the inner-layer line conductor 45, the propagated high-frequency signal is propagated with its traveling direction changed by 90 ° at each connection part. However, the direction of the high-frequency signal
When propagating after being changed by 90 °, a part of the high-frequency signal leaks from the transmission line without changing its traveling direction by 90 ° as shown by arrows D and E in FIG. The connection between the line conductors 44 and 44 and the through conductors 47 and 47 that are exposed to the air layer with a relative dielectric constant of 1.0 is easier to propagate a substance with a higher relative dielectric constant than a substance with a low relative dielectric constant. More high frequency signals from the connection between the inner layer line conductor 45 and the through conductors 47 and 47 formed inside the dielectric substrate 41 made of alumina ceramics and the like whose relative dielectric constant is much higher than that of the air layer. Leakage has occurred, and as a result, there has been a problem that the transmission characteristics of high-frequency signals are deteriorated.

【0017】本発明はかかる従来技術の問題点に鑑み案
出されたものであり、その目的は、ミリ波帯の高周波信
号において数十GHzの広い周波数帯にわたって低入射
損失・低反射損失で、伝送特性の良好な高周波用入出力
端子を提供することにある。
The present invention has been devised in view of the above-mentioned problems of the prior art, and has an object to achieve a low incidence loss and a low reflection loss over a wide frequency band of several tens GHz in a high frequency signal of a millimeter wave band. An object of the present invention is to provide a high-frequency input / output terminal having good transmission characteristics.

【0018】[0018]

【課題を解決するための手段】本発明の高周波用入出力
端子は、下面に凹部を有するとともにこの凹部の周囲の
下面に接地導体が形成された誘電体基板と、この誘電体
基板の上面に凹部の中央部分に対向するように接合され
た誘電体または導電体から成る壁部材と、誘電体基板の
上面の壁部材の両側に互いに一直線状に、各先端部がそ
れぞれ凹部の両側部分に対向するように形成された一対
の線路導体と、各線路導体の両側に形成された同一面接
地導体と、誘電体基板の凹部の底面に一対の線路導体と
一直線状かつ平行に形成され、両端が一対の線路導体の
各先端部とそれぞれ貫通導体により電気的に接続された
下面側線路導体とから成ることを特徴とするものであ
る。
According to the present invention, there is provided a high frequency input / output terminal comprising a dielectric substrate having a concave portion on a lower surface and a ground conductor formed on a lower surface around the concave portion, and an upper surface of the dielectric substrate. A wall member made of a dielectric or a conductor joined so as to face the central portion of the concave portion, and both ends of the wall member on the upper surface of the dielectric substrate are linearly aligned with each other. A pair of line conductors formed so as to form a ground conductor formed on both sides of each line conductor, and a pair of line conductors are formed on the bottom surface of the concave portion of the dielectric substrate in a straight line and in parallel with the pair of line conductors. It is characterized by comprising each end portion of a pair of line conductors and a lower surface side line conductor electrically connected by a through conductor.

【0019】本発明の高周波用半導体素子収納用パッケ
ージは、上面に高周波用半導体素子を搭載するための搭
載部を有する基板と、この基板上に搭載部を囲むように
接合された枠体と、この枠体を切り欠いて形成され、底
面を導電性とした入出力端子取付部と、この入出力端子
取付部に嵌着された上記構成の高周波用入出力端子とか
ら成ることを特徴とするものである。
A package for storing a high-frequency semiconductor element according to the present invention includes a substrate having a mounting portion for mounting the high-frequency semiconductor element on an upper surface, a frame joined to the substrate so as to surround the mounting portion, An input / output terminal mounting portion formed by cutting out the frame body and having a conductive bottom surface, and a high-frequency input / output terminal having the above configuration fitted to the input / output terminal mounting portion. Things.

【0020】また、本発明の高周波用半導体素子収納用
パッケージは、下面に凹部を有するとともにこの凹部の
周囲の下面に接地導体が形成され、上面に高周波用半導
体素子を搭載するための搭載部を有する誘電体基板と、
この誘電体基板の上面に搭載部を囲むとともに一部が凹
部の中央部分に対向するように接合された誘電体または
導電体から成る枠体と、誘電体基板の上面の枠体の両側
に互いに一直線状に、各先端部がそれぞれ凹部の両側部
分に対向するように形成された一対の線路導体と、各線
路導体の両側に形成された同一面接地導体と、誘電体基
板の凹部の底面に前記一対の線路導体と一直線状かつ平
行に形成され、両端が一対の線路導体の各先端部とそれ
ぞれ貫通導体により電気的に接続された下面側線路導体
とから成ることを特徴とするものである。
The high-frequency semiconductor element housing package of the present invention has a concave portion on the lower surface, a ground conductor formed on the lower surface around the concave portion, and a mounting portion for mounting the high-frequency semiconductor element on the upper surface. A dielectric substrate having
A frame made of a dielectric or a conductor joined to the upper surface of the dielectric substrate so as to surround the mounting portion and partially face the center of the concave portion, and a frame made of a dielectric or a conductor on both sides of the frame on the upper surface of the dielectric substrate. In a straight line, a pair of line conductors each formed so that each end portion is opposed to both side portions of the concave portion, the same plane ground conductor formed on both sides of each line conductor, and the bottom surface of the concave portion of the dielectric substrate. It is characterized by being formed in a straight line and parallel with the pair of line conductors, and having both ends at both ends and a lower surface side line conductor electrically connected by a through conductor, respectively, at both ends. .

【0021】本発明の高周波用入出力端子によれば、誘
電体基板の上面の一対の線路導体の両側に同一面接地導
体を形成して、線路導体と接地導体との距離の設計自由
度を大きくしたことから、線路導体と同一面接地導体と
の距離を短くすることにより「高次モード」に起因して
発生する遮断周波数を使用高周波信号の周波数よりも高
い周波数に移動させることが可能であり、数十GHzの
広い周波数帯に渡って損失が少なく、伝送特性の良好な
高周波用入出力端子となる。
According to the high frequency input / output terminal of the present invention, ground conductors on the same plane are formed on both sides of a pair of line conductors on the upper surface of the dielectric substrate, and the degree of freedom in designing the distance between the line conductor and the ground conductor is increased. By increasing the distance, it is possible to shift the cutoff frequency generated due to the “higher mode” to a frequency higher than the frequency of the high-frequency signal used by shortening the distance between the line conductor and the ground conductor on the same plane. There is little loss over a wide frequency band of several tens of GHz, and the high frequency input / output terminal has good transmission characteristics.

【0022】また、本発明の高周波用入出力端子によれ
ば、下面側線路導体を誘電体基板の下面に設けた凹部の
底面に形成して、高周波信号の進行方向が90°変更され
る下面側線路導体と貫通導体との接続部を、誘電体基板
に較べてその比誘電率がはるかに低く高周波信号を伝搬
しにくい空気層に露出するようにしたことから、伝送線
路からの高周波信号の漏れを大幅に減少させることが可
能となり、その結果、低入射損失・低反射損失で伝送特
性の劣化の少ない高周波用入出力端子とすることができ
る。
Further, according to the high frequency input / output terminal of the present invention, the lower surface side line conductor is formed on the bottom surface of the concave portion provided on the lower surface of the dielectric substrate, so that the traveling direction of the high frequency signal is changed by 90 °. The connection between the side line conductor and the through conductor is exposed to the air layer, whose relative dielectric constant is much lower than that of the dielectric substrate, making it difficult for high-frequency signals to propagate. Leakage can be greatly reduced, and as a result, a high frequency input / output terminal with low incidence loss and low reflection loss and little deterioration in transmission characteristics can be obtained.

【0023】本発明の高周波用半導体素子収納用パッケ
ージによれば、パッケージの入出力取付部にこの高周波
用入出力端子を嵌着して入出力端子としたことから、あ
るいはパッケージの誘電体基板にこの高周波用入出力端
子を一体的に形成して入出力端子としたことから、数十
GHzの広い周波数帯に渡って損失が少なく、伝送特性
の良好な高周波用半導体素子収納用パッケージとするこ
とができる。
According to the package for accommodating a high-frequency semiconductor element of the present invention, the high-frequency input / output terminal is fitted to the input / output mounting portion of the package to form an input / output terminal, or the package is mounted on the dielectric substrate of the package. Since this high frequency input / output terminal is integrally formed as an input / output terminal, a loss is small over a wide frequency band of several tens of GHz, and a high frequency semiconductor element housing package having good transmission characteristics is provided. Can be.

【0024】[0024]

【発明の実施の形態】次に、本発明を添付の図面に基づ
き詳細に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail with reference to the accompanying drawings.

【0025】図1は、本発明の高周波用入出力端子の実
施の形態の一例を示す断面図であり、同図において1は
誘電体基板、2は壁部材である。そして、これらで高周
波用半導体素子収納用パッケージの信号入出力部のハー
メチックシール部(気密封止部)が構成されている。ま
た、図2は、図1に示す高周波用入出力端子の分解斜視
図である。
FIG. 1 is a sectional view showing an example of an embodiment of a high frequency input / output terminal according to the present invention. In FIG. 1, reference numeral 1 denotes a dielectric substrate, and 2 denotes a wall member. These components constitute a hermetic seal portion (airtight seal portion) of a signal input / output portion of the high-frequency semiconductor element storage package. FIG. 2 is an exploded perspective view of the high frequency input / output terminal shown in FIG.

【0026】本例における誘電体基板1は、2枚の誘電
体層1a・1bを積層することにより形成されており、
その下面には凹部3を有している。
The dielectric substrate 1 in this embodiment is formed by laminating two dielectric layers 1a and 1b,
The lower surface has a concave portion 3.

【0027】この誘電体基板1は、酸化アルミニウム質
焼結体・ムライト質焼結体等のセラミックス材料、ある
いはテフロン(PTFE)・ガラスエポキシ・ポリイミ
ド等の樹脂系材料等から成る大きさが数mm角の略四角
板状であり、例えば酸化アルミニウム質焼結体から成る
場合であれば、酸化アルミニウム・酸化珪素・酸化マグ
ネシウム・酸化カルシウム等の原料粉末に適当な有機バ
インダ・溶剤を添加混合して泥漿状となすとともに、こ
れを従来周知のドクターブレード法を採用することによ
ってセラミックグリーンシートとなし、しかる後、この
セラミックグリーンシートに適当な打ち抜き加工を施す
とともに積層し、高温で焼成することによって製作され
る。
The dielectric substrate 1 is made of a ceramic material such as an aluminum oxide sintered body or a mullite sintered body, or a resin-based material such as Teflon (PTFE), glass epoxy, or polyimide, having a size of several mm. It is in the shape of a substantially square plate with corners. For example, if it is made of an aluminum oxide-based sintered body, a suitable organic binder and solvent are added to and mixed with raw material powders of aluminum oxide, silicon oxide, magnesium oxide, calcium oxide, and the like. It is formed into a ceramic green sheet by adopting a well-known doctor blade method, and then the ceramic green sheet is appropriately punched, laminated, and fired at a high temperature. Is done.

【0028】また、誘電体基板1の上面には、凹部3の
中央部分に対向するように誘電体または導電体から成る
壁部材2が接着固定されている。この壁部材2は、誘電
体から成る場合には誘電体基板1と同様の材料を用いて
同様の方法によりセラミックグリーンシートを得、この
セラミックグリーンシートに適当な打ち抜き加工を施す
とともに誘電体基板1となるセラミックグリーンシート
とともに積層し、焼成することにより誘電体基板1の上
面に接着固定される。また、壁部材2が導電体から成る
場合には、Fe−Ni−Co合金やFe−Ni42アロイ
等のFe−Ni合金・無酸素銅・アルミニウム・ステン
レス・Cu−W合金・Cu−Mo合金等のインゴット
(塊)に圧延加工や打抜き加工法等、従来周知の金属加
工法を施すことによって所定の形状に形成し、誘電体基
板1の上面にろう材・樹脂・ガラス等の接着剤を介して
接着固定される。
On the upper surface of the dielectric substrate 1, a wall member 2 made of a dielectric or a conductor is adhered and fixed so as to face the central portion of the concave portion 3. When the wall member 2 is made of a dielectric material, a ceramic green sheet is obtained by the same method using the same material as the dielectric substrate 1 and the ceramic green sheet is subjected to an appropriate punching process and the dielectric substrate 1 It is laminated and fired with the ceramic green sheet to be bonded to the upper surface of the dielectric substrate 1. When the wall member 2 is made of a conductor, an Fe-Ni-Co alloy, an Fe-Ni alloy such as an Fe-Ni42 alloy, oxygen-free copper, aluminum, stainless steel, a Cu-W alloy, a Cu-Mo alloy, etc. Is formed into a predetermined shape by applying a conventionally known metal working method such as a rolling process or a punching method to the ingot (a lump), and an adhesive such as brazing material, resin, glass or the like is formed on the upper surface of the dielectric substrate 1. To be fixed.

【0029】さらに、この誘電体基板1には、凹部3の
周囲の下面に接地導体4が形成され、上面に壁部材2の
両側に互いに一直線状に、一対の線路導体5・5と、こ
の一対の線路導体5・5の両側に同一面接地導体6・6
とが形成されており、また、凹部3の底面には一対の線
路導体5・5と一直線状かつ平行に形成され、両端が一
対の線路導体5・5の各先端部とそれぞれ貫通導体7・
7により電気的に接続された下面側線路導体8が形成さ
れている。
Further, on the dielectric substrate 1, a ground conductor 4 is formed on the lower surface around the recess 3, and on the upper surface, a pair of line conductors 5 Ground conductors 6.6 on the same side on both sides of a pair of line conductors 5.5
Are formed on the bottom surface of the concave portion 3 in a straight line and in parallel with the pair of line conductors 5.
7, a lower surface side line conductor 8 electrically connected to the lower surface side conductor 8 is formed.

【0030】そして、これらの線路導体5・貫通導体7
・下面側線路導体8・貫通導体7および線路導体5で高
周波用入出力端子の伝送線路が形成されており、一方の
線路導体5には図示しない高周波用半導体素子の電極が
例えばボンディングワイヤを介して電気的に接続され、
もう一方の線路導体5は図示しない外部電気回路基板の
配線導体に例えばボンディングワイヤを介して電気的に
接続される。
The line conductor 5 and the through conductor 7
A transmission line of a high-frequency input / output terminal is formed by the lower-side line conductor 8, the through conductor 7, and the line conductor 5, and an electrode of a high-frequency semiconductor element (not shown) is connected to one of the line conductors 5 via a bonding wire, for example. Connected electrically
The other line conductor 5 is electrically connected to a wiring conductor of an external electric circuit board (not shown) via, for example, a bonding wire.

【0031】なお、本例においては、同一面接地導体6
は一対の線路導体5・5を取り囲むように連続して一体
的に形成されており、より良好な接地状態を得ることが
できるものとしており、さらに、壁部材2は、この同一
面接地導体6を介して誘電体基板1の上面に接着固定さ
れている。
In this embodiment, the same plane ground conductor 6 is used.
Are formed continuously and integrally so as to surround the pair of line conductors 5, 5, so that a better grounding state can be obtained. And is adhesively fixed to the upper surface of the dielectric substrate 1 through the substrate.

【0032】接地導体4・線路導体5・同一面接地導体
6・貫通導体7および下面側線路導体8は、高周波線路
導体用の金属材料、例えばCuやMoMn+Ni+A
u、W+Ni+Au、Cr+Cu、Cr+Cu+Ni+
Au、Ta2 N+NiCr+Au、Ti+Pd+Au、
NiCr+Pd+Au等から成り、従来周知の厚膜印刷
法・メタライズ法あるいは各種の薄膜形成方法やめっき
処理法などにより形成され、例えばタングステンメタラ
イズから成る場合であれば、タングステン粉末に適当な
有機バインダ・溶剤を添加混合して得たタングステンぺ
ーストを誘電体基板1となるセラミックグリーンシート
に従来周知のスクリーン印刷法により所定パターンに印
刷塗布・穴埋めし、これを誘電体基板1となるセラミッ
クグリーンシートとともに焼成することによって、所定
のパターンに被着形成される。また、その露出表面には
メタライズ層の酸化腐蝕を防止するとともにボンディン
グワイヤとの接合性を良好なものとするために通常であ
れば、1〜20μm程度の厚みのニッケルめっきと 0.1〜
3μm程度の厚みの金めっきとが順次施されている。
The ground conductor 4, the line conductor 5, the same plane ground conductor 6, the through conductor 7, and the lower line conductor 8 are made of a metal material for a high-frequency line conductor, for example, Cu or MoMn + Ni + A.
u, W + Ni + Au, Cr + Cu, Cr + Cu + Ni +
Au, Ta 2 N + NiCr + Au, Ti + Pd + Au,
It is made of NiCr + Pd + Au or the like, and is formed by a conventionally known thick film printing / metallizing method or various thin film forming methods or plating methods. The tungsten paste obtained by the addition and mixing is printed and coated in a predetermined pattern on a ceramic green sheet serving as the dielectric substrate 1 by a conventionally known screen printing method, and then fired together with the ceramic green sheet serving as the dielectric substrate 1. Thus, a predetermined pattern is formed. In order to prevent the metallized layer from being oxidized and corroded and to improve the bonding property with the bonding wire, the exposed surface is usually plated with nickel having a thickness of about 1 to 20 μm and 0.1 to 0.1 μm.
Gold plating having a thickness of about 3 μm is sequentially applied.

【0033】なお、これらの厚みや幅、例えば線路導体
5の幅W1 、下面側線路導体8の幅W2 ・貫通導体7の
長さ・貫通導体7の径等は、使用高周波信号の周波数や
特性インピーダンス整合などを考慮して適宜設定され
る。
It should be noted that these thicknesses and widths, for example line width W 1 of the conductor 5, diameter of the width W 2 of, through conductors 7 length, through conductors 7 of the lower surface side line conductor 8, the frequency of the use frequency signal It is appropriately set in consideration of the impedance and characteristic impedance matching.

【0034】また、一対の線路導体5・5の幅W1 と下
面側線路導体8の幅W2 とは、理想とする特性インピー
ダンスに整合する幅となるように、必要とする仕様に応
じて通常はW1 ≧W2 として適宜設定される。
The width W 1 of the pair of line conductors 5 and the width W 2 of the lower-side line conductor 8 are determined in accordance with the required specifications so that the width W 2 matches the ideal characteristic impedance. Usually, it is appropriately set as W 1 ≧ W 2 .

【0035】さらに、貫通導体7はその内部が導体によ
り充填されたいわゆるビアホール導体とすることが高周
波特性上好ましいが、内部が完全に充填されていないい
わゆるスルーホール導体であってもよく、その断面形状
も円形の他に矩形状または楕円状としてもよい。
The through conductor 7 is preferably a so-called via-hole conductor whose inside is filled with a conductor in view of high-frequency characteristics, but may be a so-called through-hole conductor whose inside is not completely filled. The shape may be rectangular or elliptical in addition to circular.

【0036】そして、本発明においては、誘電体基板1
の上面の一対の線路導体5の両側に同一面接地導体6を
形成していることから、線路導体5と同一面接地導体6
との距離の設計自由度が大きく、線路導体5と同一面接
地導体6との距離を短くすることにより「高次モード」
に起因して発生する遮断周波数を使用高周波信号の周波
数よりも高い周波数に移動させることが可能となり、ミ
リ波帯において数十GHzの広い周波数帯に渡って損失
が少なく、伝送特性の良好な高周波用入出力端子を得る
ことが可能となる。
In the present invention, the dielectric substrate 1
Are formed on both sides of the pair of line conductors 5 on the upper surface of the line conductor 5, the same plane ground conductor 6 as the line conductor 5 is formed.
The degree of freedom in designing the distance between the line conductor 5 and the ground conductor 6 on the same plane is shortened by increasing the degree of freedom in design.
It is possible to shift the cut-off frequency generated due to the frequency to a frequency higher than the frequency of the used high-frequency signal, reduce loss over a wide frequency band of several tens of GHz in the millimeter wave band, and obtain a high-frequency signal having good transmission characteristics. Input / output terminals can be obtained.

【0037】なお、線路導体5と同一面接地導体6との
距離は、その距離が0.05mm未満では、その隣接間隔が
極めて狭いものとなり、隣接する線路導体5と同一面接
地導体6との間に電気的な絶縁不良や短絡が発生しやす
くなる。したがって、線路導体5と同一面接地導体6と
の距離は、0.05mm以上であることが好ましい。
When the distance between the line conductor 5 and the ground conductor 6 is less than 0.05 mm, the distance between the adjacent line conductors 5 and the ground conductor 6 is extremely small. Insufficient electrical insulation and short circuits are likely to occur. Therefore, the distance between the line conductor 5 and the same-plane ground conductor 6 is preferably 0.05 mm or more.

【0038】また、本発明においては、下面側線路導体
8を誘電体基板1の下面に設けた凹部3の底面に形成し
て、高周波信号の進行方向が90°変更される下面側線路
導体8と貫通導体7との接続部を、誘電体基板1に較べ
てその比誘電率がはるかに低く高周波信号を伝搬しにく
い空気層に露出するようにしていることから、伝送線路
からの高周波信号の漏れを大幅に減少させることが可能
となり、その結果、低入射損失・低反射損失で伝送特性
の劣化の少ない高周波用入出力端子とすることができ
る。
In the present invention, the lower-side line conductor 8 is formed on the bottom surface of the concave portion 3 provided on the lower surface of the dielectric substrate 1 so that the traveling direction of the high-frequency signal can be changed by 90 °. And the through conductor 7 is exposed to an air layer whose relative dielectric constant is much lower than that of the dielectric substrate 1 and in which a high-frequency signal is difficult to propagate. Leakage can be greatly reduced, and as a result, a high frequency input / output terminal with low incidence loss and low reflection loss and little deterioration in transmission characteristics can be obtained.

【0039】凹部3は、その大きさが数mm角の略四角
状・円形状・楕円状あるいは小判型等の形状であり、内
層線路導体8を誘電体基板1の下面側の空気層へ露出さ
せるために設けられている。この凹部3の側壁と内層線
路導体8との距離が 0.1mm未満であると伝送線路より
漏れだした高周波信号が誘電体基板1へ流れやすくなる
傾向があり、またその距離が2mmより長いと基板の薄
い領域が増大して誘電体基板1の強度が低下してしまう
傾向がある。したがって、凹部3の側壁と内層線路導体
8との距離は、 0.1〜2mmの範囲であることが好まし
い。
The concave portion 3 has a shape of approximately square, circular, elliptical, oval, or the like having a size of several mm square, and exposes the inner layer line conductor 8 to the air layer on the lower surface side of the dielectric substrate 1. It is provided for the purpose. If the distance between the side wall of the concave portion 3 and the inner layer line conductor 8 is less than 0.1 mm, the high-frequency signal leaked from the transmission line tends to flow to the dielectric substrate 1. There is a tendency that the thickness of the thin region increases and the strength of the dielectric substrate 1 decreases. Therefore, the distance between the side wall of the concave portion 3 and the inner layer line conductor 8 is preferably in the range of 0.1 to 2 mm.

【0040】かくして、本発明の高周波用入出力端子に
よれば、ミリ波帯の高周波信号において数十GHzの広
い周波数帯にわたって低入射損失・低反射損失で、伝送
特性の良好な高周波用入出力端子を提供することができ
る。
Thus, according to the high-frequency input / output terminal of the present invention, the high-frequency input / output terminal of the millimeter wave high-frequency signal has low incidence loss and low reflection loss over a wide frequency band of several tens of GHz, and has good transmission characteristics. Terminals can be provided.

【0041】なお、本発明においては、壁部材2として
パッケージの蓋体を兼ねた誘電体または導電体から成る
キャップを用いてもよく、パッケージのハーメチックシ
ール部を構成する構造として、図1・図2に示したよう
に一対の線路導体5・5間にハーメチックシール部を構
成するための壁部材2を接合するものの他にも、多層構
成を必要とする場合の誘電体壁によるものや、さらに金
属部材を上に取着するためのメタライズ金属層を有する
誘電体壁によるもの、1層の表面の誘電体壁やそれに類
する壁を設けない基板状の端子構造によるもの、誘電体
壁の代わりに誘電体のコーティング、例えばアルミナコ
ーティング等を施したものであってもよい。
In the present invention, a cap made of a dielectric or a conductor also serving as a lid of the package may be used as the wall member 2, and the structure constituting the hermetic seal portion of the package is shown in FIGS. As shown in FIG. 2, in addition to the structure in which the wall member 2 for forming the hermetic seal portion is joined between the pair of line conductors 5 and 5, the structure using a dielectric wall when a multilayer structure is required, and the like. By a dielectric wall having a metallized metal layer for attaching a metal member thereon, by a substrate-like terminal structure having no dielectric wall on the surface of one layer or a similar wall, instead of a dielectric wall A dielectric coating, for example, an alumina coating may be applied.

【0042】次に、本発明の高周波用半導体素子収納用
パッケージを添付の図面に基づいて詳細に説明する。
Next, the package for storing a high-frequency semiconductor device of the present invention will be described in detail with reference to the accompanying drawings.

【0043】図3および図4は本発明の高周波用半導体
素子収納用パッケージの実施の形態の一例を示す斜視図
である。
FIGS. 3 and 4 are perspective views showing an example of the embodiment of the package for housing a high-frequency semiconductor element according to the present invention.

【0044】これらの図において、21は誘電体または導
電体から成る基板であり、その上面には高周波用半導体
素子(図示せず)を搭載するための搭載部21aを有して
いる。図3は搭載部21aを平坦面とした例であり、図4
は搭載部21aに凹部を形成した例である。22は基板21上
に搭載部21aを囲むように接合された枠体であり、基板
21と同様に誘電体または導電体から成る。
In these figures, reference numeral 21 denotes a substrate made of a dielectric or a conductor, and has on its upper surface a mounting portion 21a for mounting a high-frequency semiconductor element (not shown). FIG. 3 shows an example in which the mounting portion 21a has a flat surface.
Is an example in which a concave portion is formed in the mounting portion 21a. Reference numeral 22 denotes a frame joined on the substrate 21 so as to surround the mounting portion 21a.
Like 21, it is made of a dielectric or a conductor.

【0045】また、23は枠体22を切り欠いて形成され、
その底面を導電性とした入出力端子取付部である。な
お、図4の例においては基板21に同様の切欠を設けて入
出力端子取付部23を形成している。この入出力端子取付
部23の底面は、基板21および枠体22が導電体から成る場
合は導電性であるが、基板21および枠体22が誘電体から
成る場合には導体層を被着形成することによって導電性
とする。この底面は基板21および枠体22あるいはそれら
に被着形成された図示しない接地導体層を介して接地さ
れている。
The frame 23 is formed by cutting the frame 22.
This is an input / output terminal mounting portion whose bottom surface is made conductive. In the example of FIG. 4, the input / output terminal mounting portion 23 is formed by providing a similar notch in the substrate 21. The bottom surface of the input / output terminal mounting portion 23 is conductive when the substrate 21 and the frame 22 are made of a conductive material, but is formed by applying a conductive layer when the substrate 21 and the frame 22 are made of a dielectric material. To make it conductive. This bottom surface is grounded via the substrate 21 and the frame 22 or a ground conductor layer (not shown) formed on the substrate 21 and the frame 22.

【0046】そして、19は入出力端子取付部23に嵌着さ
れた上記構成の本発明に係る高周波用入出力端子であ
り、11は誘電体基板、12は誘電体基板11の上面に接合さ
れた誘電体または導電体から成る壁部材、14は誘電体基
板11の下面の接地導体、15は誘電体基板11の上面の壁部
材12の両側に互いに一直線上に形成された一対の線路導
体、16は線路導体15・15の両側に形成された同一面接地
導体である。また、17は図示しない下面側線路導体の両
端と一対の線路導体15・15の壁部材12の両側の各端部と
を電気的に接続する貫通導体である。なお、接地導体14
は入出力端子取付部23の導電性の底面と接続されて接地
されている。なお、図4は、枠体22が高周波用入出力端
子の壁部材を兼ねている例を示している。
Reference numeral 19 denotes a high-frequency input / output terminal according to the present invention having the above-mentioned structure fitted to the input / output terminal mounting portion 23, 11 being a dielectric substrate, and 12 being joined to the upper surface of the dielectric substrate 11. A wall member made of a dielectric or a conductor, 14 is a ground conductor on the lower surface of the dielectric substrate 11, 15 is a pair of line conductors formed on both sides of the wall member 12 on the upper surface of the dielectric substrate 11, Reference numeral 16 denotes a ground conductor on the same plane formed on both sides of the line conductors 15. Reference numeral 17 denotes a through conductor that electrically connects both ends of the lower-side line conductor (not shown) and both ends of the pair of line conductors 15 on both sides of the wall member 12. The ground conductor 14
Is connected to the conductive bottom surface of the input / output terminal mounting portion 23 and is grounded. FIG. 4 shows an example in which the frame 22 also serves as a wall member of the high frequency input / output terminal.

【0047】このような本発明の高周波用半導体素子収
納用パッケージによれば、その高周波用入出力端子部の
構造として上記構成の本発明に係る高周波用入出力端子
19を具備していることから、前記と同様に数十GHzの
広い周波数帯に渡って損失が少なく、良好な伝送特性を
有した高周波用半導体素子収納用パッケージとなる。
According to such a package for accommodating a high-frequency semiconductor element of the present invention, the high-frequency input / output terminal according to the present invention having the above-described structure as the structure of the high-frequency input / output terminal portion.
As a result, the semiconductor device package for high-frequency devices has a small loss over a wide frequency band of several tens of GHz and has good transmission characteristics.

【0048】そして、線路導体15を搭載部21aに搭載さ
れる高周波用半導体素子の端子電極ならびに外部電気回
路の配線導体にワイヤやリボン等を介して接続してパッ
ケージ内部の高周波用半導体素子と外部電気回路とを電
気的に接続し、枠体22の上面にFe−Ni−Co合金や
Fe−Ni42アロイ等のFe−Ni合金・無酸素銅・ア
ルミニウム・ステンレス・Cu−W合金・Cu−Mo合
金などから成る蓋体を半田・AuSnロウやAuGeロ
ウ等の高融点金属ロウ・シームウェルド(溶接)等によ
り取着することによって高周波用半導体素子がパッケー
ジ内部に気密封止して収容され、製品としての高周波用
半導体装置となる。
Then, the line conductor 15 is connected to the terminal electrode of the high-frequency semiconductor element mounted on the mounting portion 21a and the wiring conductor of the external electric circuit via a wire, a ribbon, or the like to connect the high-frequency semiconductor element inside the package to the outside. An electric circuit is electrically connected, and an Fe-Ni-Co alloy or an Fe-Ni alloy such as an Fe-Ni42 alloy, oxygen-free copper, aluminum, stainless steel, Cu-W alloy, Cu-Mo A high-frequency semiconductor element is hermetically sealed and housed in a package by attaching a lid made of an alloy or the like with a high-melting-point metal solder such as solder, AuSn wax, or AuGe wax, or seam welding (welding). As a high-frequency semiconductor device.

【0049】基板21および枠体22としては、パッケージ
の仕様に応じて高周波用入出力端子19の誘電体基板11と
同様の誘電体あるいは上記の枠体12と同様の金属を用
い、誘電体から成る場合には少なくとも入出力端子取付
部23の底面を導電性とする。
The substrate 21 and the frame 22 are made of the same dielectric material as the dielectric substrate 11 of the high frequency input / output terminal 19 or the same metal as the above-mentioned frame 12 according to the specifications of the package. In this case, at least the bottom surface of the input / output terminal mounting portion 23 is made conductive.

【0050】また、基板21と枠体22とはAgCuロウ・
AuSnロウ・AuGeロウ等の高融点金属ロウにより
接合される。また、高周波用入出力端子19と入出力端子
取付部23とは嵌着され同様の高融点金属ロウにより接合
される。
The substrate 21 and the frame 22 are made of AgCu solder.
It is joined by a high melting point metal brazing such as AuSn brazing or AuGe brazing. Further, the high frequency input / output terminal 19 and the input / output terminal mounting portion 23 are fitted and joined by the same high melting point metal brazing.

【0051】なお、本発明では基板21の両側に高周波用
入出力端子19を1つずつ取り付けているが、必要に応じ
て他の位置にも、あるいは1つの側に複数の端子を取り
付けてもよく、この場合には入出力端子取付部23を複数
設けて高周波用入出力端子19を並列的に複数取り付けれ
ばよい。
In the present invention, the high frequency input / output terminals 19 are mounted on both sides of the substrate 21 one by one. However, if necessary, a plurality of terminals may be mounted at other positions or on one side. In this case, a plurality of input / output terminal mounting portions 23 may be provided, and a plurality of high frequency input / output terminals 19 may be mounted in parallel.

【0052】さらに、高周波用入出力端子19と壁部材22
の上面ならびに壁部材22と誘電体基板21の側面にそれぞ
れ接地導体を設けてもよく、それらを設けた場合には、
各々の接地導体が理想的な接地(電位0)となって高周
波信号に対するシールドとすることができる。
Further, the high frequency input / output terminal 19 and the wall member 22
Ground conductors may be provided on the upper surface of the wall member 22 and the side surfaces of the dielectric substrate 21 respectively.
Each ground conductor becomes an ideal ground (potential 0) and can be a shield for high-frequency signals.

【0053】次に、図5(a)・(b)は本発明の高周
波用半導体素子収納用パッケージの実施の形態の他の例
を示す斜視図および断面図である。
FIGS. 5A and 5B are a perspective view and a sectional view showing another embodiment of the high frequency semiconductor element housing package of the present invention.

【0054】同図において、30は誘電体基板であり、前
述の誘電体基板11と同様の材料から成り、その上面には
高周波用半導体素子(図示せず)を搭載するための搭載
部30aを有している。本例では搭載部30aを平坦状
に形成した場合を示したが、凹状に形成してもよい。33
は誘電体基板30の下面に形成された凹部、32は誘電体基
板30の上面に一部が凹部33の中央部分に対向するように
接合された誘電体または導電体から成る枠体、35は誘電
体基板30の上面の枠体32の両側に互いに一直線状に、各
先端部がそれぞれ凹部33の両側部分に対向するように形
成された一対の線路導体、36は線路導体35・35の両側に
形成された同一面接地導体、34は誘電体基板30の少なく
とも図5(a)中に点線で示した高周波用入出力端子39
を構成する誘電体基板31の下面の凹部33の周囲に設けら
れた接地導体、40は線路導体35・35と一直線状かつ平行
に、凹部33の底面に形成された下面側線路導体、37は下
面側線路導体40の両端と、一対の線路導体35・35の枠体
32のうち高周波用入出力端子39を構成する壁部材38に相
当する部位の両側の各端部とを電気的に接続する貫通導
体である。
In the figure, reference numeral 30 denotes a dielectric substrate, which is made of the same material as the above-mentioned dielectric substrate 11, and has a mounting portion 30a for mounting a high-frequency semiconductor element (not shown) on its upper surface. Have. In this example, the case where the mounting portion 30a is formed in a flat shape is shown, but the mounting portion 30a may be formed in a concave shape. 33
Is a concave portion formed on the lower surface of the dielectric substrate 30, 32 is a frame body made of a dielectric or a conductive member partially joined to the upper surface of the dielectric substrate 30 so as to face the central portion of the concave portion 33, 35 is A pair of line conductors are formed on both sides of the frame 32 on the upper surface of the dielectric substrate 30 so as to be linear with each other, and each end portion is opposed to both side portions of the concave portion 33, and 36 is both sides of the line conductors 35, 35 And a high-frequency input / output terminal 39 of the dielectric substrate 30 indicated by a dotted line in FIG.
A ground conductor provided around the concave portion 33 on the lower surface of the dielectric substrate 31 that constitutes the lower surface side line conductor 40 formed on the bottom surface of the concave portion 33 in a straight line and parallel to the line conductors 35, 35, 37 Both ends of the lower-side line conductor 40 and a frame of a pair of line conductors 35
It is a through conductor that electrically connects each end of both sides of a portion corresponding to the wall member 38 constituting the high frequency input / output terminal 39 among the 32.

【0055】このような構成により、誘電体基板31・壁
部材38・一対の線路導体35・35・同一面接地導体36・接
地導体34・下面側線路導体40・貫通導体37・37から成る
高周波用入出力端子39を一体的に形成して成る、本発明
の高周波用半導体素子収納用パッケージが構成される。
With such a configuration, a high-frequency wave including the dielectric substrate 31, the wall member 38, the pair of line conductors 35, 35, the same-plane ground conductor 36, the ground conductor 34, the lower-side line conductor 40, and the through conductors 37, 37 is provided. The input / output terminals 39 are integrally formed to constitute a high-frequency semiconductor element housing package of the present invention.

【0056】上記構成の本発明の高周波用半導体素子収
納用パッケージによれば、誘電体基板31の上面の一対の
線路導体35・35の両側に同一面接地導体36を形成してい
ることから、線路導体35と同一面接地導体36との距離の
設計自由度が大きく、線路導体35と同一面接地導体36と
の距離を短くすることにより「高次モード」に起因して
発生する遮断周波数を使用高周波信号の周波数よりも高
い周波数に移動させることが可能となり、ミリ波帯にお
いて数十GHzの広い周波数帯に渡って損失が少なく、
伝送特性の良好な高周波用半導体素子収納用パッケージ
を得ることができる。
According to the package for housing a high-frequency semiconductor element of the present invention having the above structure, the ground conductors 36 on the same plane are formed on both sides of the pair of line conductors 35 on the upper surface of the dielectric substrate 31. The design flexibility of the distance between the line conductor 35 and the same-plane ground conductor 36 is large, and the cut-off frequency generated due to the “higher-order mode” can be reduced by shortening the distance between the line conductor 35 and the same-plane ground conductor 36. It is possible to move to a frequency higher than the frequency of the used high-frequency signal, and the loss is small over a wide frequency band of several tens of GHz in the millimeter wave band,
A high-frequency semiconductor element housing package having good transmission characteristics can be obtained.

【0057】また、下面側線路導体40を誘電体基板31の
下面に設けた凹部33の底面に形成して、高周波信号の進
行方向が90°変更される下面側線路導体40と貫通導体37
・37との接続部を、誘電体基板31に較べてその比誘
電率がはるかに低く高周波信号を伝搬しにくい空気層に
露出するようにしていることから、伝送線路からの高周
波信号の漏れを大幅に減少させることが可能となり、そ
の結果、低入射損失・低反射損失で伝送特性の劣化の少
ない高周波用半導体素子収納用パッケージとすることが
できる。
Further, the lower surface side line conductor 40 is formed on the bottom surface of the concave portion 33 provided on the lower surface of the dielectric substrate 31 so that the traveling direction of the high-frequency signal is changed by 90 ° and the lower surface side line conductor 40 and the through conductor 37.
Since the connection portion with 37 is exposed to an air layer whose relative dielectric constant is much lower than that of the dielectric substrate 31 and does not easily transmit high-frequency signals, leakage of high-frequency signals from the transmission line is prevented. As a result, it is possible to obtain a package for housing a high-frequency semiconductor element that has low incidence loss and low reflection loss and has little deterioration in transmission characteristics.

【0058】そして、線路導体35を搭載部30aに搭載さ
れる高周波用半導体素子の端子電極ならびに外部電気回
路の配線導体にワイヤやリボン等を介して接続してパッ
ケージ内部の高周波用半導体素子と外部電気回路とを電
気的に接続し、枠体32の上面にFe Ni Co合金や
Fe Ni42アロイ等のFe Ni合金・無酸素銅・ア
ルミニウム・ステンレス・Cu W合金・Cu Mo合
意金などから成る蓋体を半田・AuSuロウやAuGe
ロウ等の高融点金属ロウ・シームウェルド(溶接)等に
より取着することによって高周波用半導体素子がパッケ
ージ内部に気密封止して収容され、製品としての半導体
装置となる。
Then, the line conductor 35 is connected to the terminal electrode of the high-frequency semiconductor element mounted on the mounting portion 30a and the wiring conductor of the external electric circuit via a wire, a ribbon, or the like to connect the high-frequency semiconductor element inside the package to the outside. An electric circuit is electrically connected, and a lid made of FeNi alloy such as FeNiCo alloy or FeNi42 alloy, oxygen-free copper, aluminum, stainless steel, CuW alloy, CuMo alloy, etc. is provided on the upper surface of the frame 32. Solder body, AuSu wax or AuGe
A high-frequency semiconductor element is hermetically sealed and accommodated in a package by being attached with a high-melting point metal such as brazing, seam welding (welding), and the like, thereby forming a semiconductor device as a product.

【0059】誘電体基板30は、パッケージの仕様に応じ
て高周波用入出力端子39の誘電体基板31と同様の誘電体
を用いて形成される。また、誘電体基板30の下面のほぼ
全面には、接地導体34と同様に接地導体を形成しておく
ことが、接地導体34を理想的なグランド状態とすること
が必要な点から望ましい。
The dielectric substrate 30 is formed using the same dielectric as the dielectric substrate 31 of the high frequency input / output terminals 39 according to the specifications of the package. It is desirable that a ground conductor be formed on almost the entire lower surface of the dielectric substrate 30 in the same manner as the ground conductor 34 from the viewpoint that the ground conductor 34 needs to be in an ideal ground state.

【0060】誘電体基板30は、例えば焼成後に誘電体基
板30となるセラミックグリーンシートに、線路導体35・
35・接地導体34・下面側線路導体40・貫通導体37・37・
同一面接地導体36となる導体ぺーストを所定パターンに
印刷塗布あるいは埋設して誘電体基板30と共に焼成して
一体化することにより製作される。
The dielectric substrate 30 is formed, for example, on a ceramic green sheet that becomes the dielectric substrate 30 after firing by line conductors 35.
35, ground conductor 34, lower side line conductor 40, through conductor 37, 37
It is manufactured by printing or embedding a conductor paste serving as the same-surface ground conductor 36 in a predetermined pattern, and firing and integrating it with the dielectric substrate 30.

【0061】枠体32は、導電体から成る場合であれば誘
電体基板30と同様の材料を用いてセラミックグリーンシ
ートを成形し、打抜き加工によって枠状に形成した後、
誘電体基板30となるセラミックグリーンシートと積層し
て焼成して一体化することにより誘電体基板30に被着固
定される。
If the frame 32 is made of a conductor, a ceramic green sheet is formed using the same material as the dielectric substrate 30 and formed into a frame by punching.
The ceramic green sheet serving as the dielectric substrate 30 is laminated, fired, and integrated to be fixed to the dielectric substrate 30.

【0062】また、枠体32が、導電体から成る場合であ
れば前記蓋体と同様な導電材料から成るインゴット
(塊)に圧延加工や打抜き加工法等、従来周知の金属加
工を施すことによって所定の形状に形成した後、ろう材
・樹脂・ガラス等の接着剤を介して誘電体基板30に接着
固定される。
In the case where the frame 32 is made of a conductive material, a well-known metal working such as rolling or punching is applied to an ingot made of the same conductive material as the lid. After being formed into a predetermined shape, it is bonded and fixed to the dielectric substrate 30 via an adhesive such as brazing material, resin, glass, or the like.

【0063】なお、本例では枠体32の高周波用入出力端
子39の壁部材38に相当する部分は枠体32と一体としてそ
の上面が枠体32の上面と同一面となるようにしている
が、このようにすればこれらの上面に蓋体(図示せず)
を直接あるいは枠状の金属シール等を介して取着するこ
とにより、搭載部30aに搭載した高周波用半導体素子を
内部に容易に気密封止して収容できる。
In this embodiment, the portion corresponding to the wall member 38 of the high frequency input / output terminal 39 of the frame 32 is integrated with the frame 32 so that the upper surface thereof is flush with the upper surface of the frame 32. However, in this case, a lid (not shown) is provided on these upper surfaces.
Is mounted directly or via a frame-shaped metal seal or the like, so that the high-frequency semiconductor element mounted on the mounting portion 30a can be easily hermetically sealed and accommodated therein.

【0064】また、本例では誘電体基板30の両側に高周
波用入出力端子39を1つずつ設けているが、必要に応じ
て他の位置にも、あるいは1つの側に複数の高周波用入
出力39を設けてもよい。
In this embodiment, one high frequency input / output terminal 39 is provided on each side of the dielectric substrate 30. However, if necessary, a plurality of high frequency input / output terminals may be provided at other positions or on one side. An output 39 may be provided.

【0065】さらに、この本発明の高周波用半導体素子
収納用パッケージにおいても、高周波用入出力端子39の
壁部材38に相当する枠体32の上面ならびに壁部材32と誘
電体基板30の側面にそれぞれ接地導体を設けてもよく、
それらを設けた場合には各々の接地導体が理想的な接地
(電位0)となって高周波信号に対するシールドとする
ことができる。
Further, in the high frequency semiconductor element housing package of the present invention, the upper surface of the frame 32 corresponding to the wall member 38 of the high frequency input / output terminal 39 and the side surfaces of the wall member 32 and the dielectric substrate 30 are respectively provided. A ground conductor may be provided,
When these are provided, each ground conductor becomes an ideal ground (potential 0), and can be used as a shield for high-frequency signals.

【0066】かくして、本発明の高周波用半導体素子収
納用パッケージによれば、超高周波帯、特に30GHz以
上のミリ波帯において、数十GHzの広い周波数帯にわ
たって損失が少なく、伝送特性の良好な高周波用半導体
素子収納用パッケージを提供することができる。
Thus, according to the package for storing a high-frequency semiconductor element of the present invention, in the ultra-high frequency band, especially in the millimeter wave band of 30 GHz or more, the loss is small over a wide frequency band of several tens of GHz, and the high-frequency wave having good transmission characteristics is obtained. A semiconductor device housing package.

【0067】[0067]

【実施例】 以下、本発明の実施例を示す。Hereinafter, examples of the present invention will be described.

【0068】〔例1〕本発明と従来の高周波用入出力端
子とを比較するために、次のような構成の解析モデルを
作成し、3次元電磁界シミュレーションを行なった。
Example 1 In order to compare the present invention with a conventional high frequency input / output terminal, an analysis model having the following configuration was created, and a three-dimensional electromagnetic field simulation was performed.

【0069】誘電体基板1・41と壁部材2・42の材質を
酸化アルミニウム(比誘電率εr =8.8)とし、誘電体
基板1・41の厚みを 1.0mm(誘電体層1aの厚みを0.
15mm,1bの厚みを0.85mm)、貫通導体7および47
同志の間隔を 1.7mm、貫通導体7・47の直径を0.15m
m、線路導体5・45の幅を0.15mm、下面側線路導体8
の幅を0.15mm、内層線路導体45の幅を0.08mm、線路
導体5と同一面接地導体6との距離を 0.075mm、誘電
体基板1の凹部3の幅・長さを 0.4mmと 2.2mmに設
定した。
The material of the dielectric substrates 1 and 41 and the wall members 2 and 42 is aluminum oxide (relative permittivity ε r = 8.8), and the thickness of the dielectric substrates 1 and 41 is 1.0 mm (the thickness of the dielectric layer 1a is 0.
15 mm, thickness of 1b is 0.85 mm), penetrating conductors 7 and 47
The distance between peers is 1.7mm, and the diameter of through conductor 7.47 is 0.15m
m, the width of the line conductor 5.45 is 0.15 mm, and the lower side line conductor 8
Is 0.15 mm, the width of the inner layer line conductor 45 is 0.08 mm, the distance between the line conductor 5 and the ground conductor 6 is 0.075 mm, and the width and length of the concave portion 3 of the dielectric substrate 1 are 0.4 mm and 2.2 mm. Set to.

【0070】これらの高周波用入出力端子に対して、入
力ポートを設定し40〜85GHzの高周波帯域についてシ
ミュレーションを行い、反射損失(Return Lo
ss)・挿入損失(Insertion Loss)の
周波数特性を得た。
For these high frequency input / output terminals, input ports are set, and a simulation is performed for a high frequency band of 40 to 85 GHz, and a return loss (Return Lo) is performed.
ss) and insertion loss (Insertion Loss) frequency characteristics were obtained.

【0071】これらの結果について、まず本発明の高周
波用入出力端子の反射損失の周波数特性および挿入損失
の周波数特性をそれぞれ図6(a)・(b)に線図で示
す。なお、これらの図において横軸は30〜90GHzの範
囲の周波数(単位:GHz)、縦軸は反射損失または挿
入損失(単位:dB)を表している。
Regarding these results, first, the frequency characteristics of the reflection loss and the frequency characteristics of the insertion loss of the high-frequency input / output terminal according to the present invention are shown in FIGS. 6A and 6B, respectively. In these figures, the horizontal axis represents the frequency in the range of 30 to 90 GHz (unit: GHz), and the vertical axis represents the reflection loss or insertion loss (unit: dB).

【0072】図6に示す結果より、本発明の高周波用入
出力端子は、40〜70数GHzの高周波帯域において特性
劣化(損失)の少ない、良好な伝送特性を有しているこ
とがわかる。
From the results shown in FIG. 6, it can be seen that the high frequency input / output terminal of the present invention has good transmission characteristics with little characteristic deterioration (loss) in the high frequency band of 40 to 70 GHz.

【0073】次に、比較例の従来の高周波用入出力端子
についての反射損失の周波数特性および挿入損失の周波
数特性の比較をそれぞれ図7(a)・(b)に線図で示
す。
Next, comparison of the frequency characteristics of the reflection loss and the insertion loss with respect to the conventional high-frequency input / output terminal of the comparative example is shown in FIGS. 7A and 7B, respectively.

【0074】図7に示す結果より、この従来の高周波用
入出力端子においては、40数GHzの周波数帯より特性
劣化(損失)が発生し、数十GHzの周波数帯に渡って
良好な伝送特性を得ることができないことがわかる。
From the results shown in FIG. 7, in this conventional high-frequency input / output terminal, characteristic deterioration (loss) occurs in a frequency band of more than 40 GHz, and good transmission characteristics are obtained over a frequency band of several tens GHz. Can not be obtained.

【0075】以上により、本発明の高周波用入出力端子
によれば、40〜80GHzの高周波信号に対して特性劣化
(損失)の少ない優れた伝送特性を有した、高周波入出
力端子であることが確認できた。
As described above, according to the high frequency input / output terminal of the present invention, the high frequency input / output terminal has excellent transmission characteristics with little characteristic deterioration (loss) for a high frequency signal of 40 to 80 GHz. It could be confirmed.

【0076】[0076]

【発明の効果】本発明の高周波用入出力端子によれば、
誘電体基板の上面の一対の線路導体の両側に同一面接地
導体を形成して、線路導体と接地導体との距離の設計自
由度を大きくしたことから、線路導体と同一面接地導体
との距離を短くすることにより「高次モード」に起因し
て発生する遮断周波数を使用高周波信号の周波数よりも
高い周波数に移動させることが可能であり、数十GHz
の広い周波数帯に渡って損失が少なく、伝送特性の良好
な高周波用入出力端子となる。
According to the high frequency input / output terminal of the present invention,
A ground conductor on the same plane is formed on both sides of a pair of line conductors on the top surface of the dielectric substrate to increase the degree of freedom in designing the distance between the line conductor and the ground conductor. , It is possible to shift the cut-off frequency generated due to the “higher-order mode” to a frequency higher than the frequency of the used high-frequency signal.
It is a high frequency input / output terminal with low loss over a wide frequency band with good transmission characteristics.

【0077】また、本発明の高周波用入出力端子によれ
ば、下面側線路導体を誘電体基板の下面に設けた凹部の
底面に形成して、高周波信号の進行方向が90°変更され
る下面側線路導体と貫通導体との接続部を、誘電体基板
に較べてその比誘電率がはるかに低く高周波信号を伝搬
しにくい空気層に露出するようにしたことから、伝送線
路からの高周波信号の漏れを大幅に減少させることが可
能となり、その結果、低入射損失・低反射損失で伝送特
性の劣化の少ない高周波用入出力端子とすることができ
る。
According to the high frequency input / output terminal of the present invention, the lower surface side line conductor is formed on the bottom surface of the concave portion provided on the lower surface of the dielectric substrate, and the traveling direction of the high frequency signal is changed by 90 °. The connection between the side line conductor and the through conductor is exposed to the air layer, whose relative dielectric constant is much lower than that of the dielectric substrate, making it difficult for high-frequency signals to propagate. Leakage can be greatly reduced, and as a result, a high frequency input / output terminal with low incidence loss and low reflection loss and little deterioration in transmission characteristics can be obtained.

【0078】本発明の高周波用半導体素子収納用パッケ
ージによれば、パッケージの入出力取付部にこの高周波
用入出力端子を嵌着して入出力端子としたことから、あ
るいはパッケージの誘電体基板にこの高周波用入出力端
子を一体的に形成して入出力端子としたことから、数十
GHzの広い周波数帯に渡って損失が少なく、伝送特性
の良好な高周波用半導体素子収納用パッケージとするこ
とができる。
According to the high frequency semiconductor element storage package of the present invention, the high frequency input / output terminal is fitted to the input / output mounting portion of the package to form an input / output terminal, or the package is mounted on the dielectric substrate of the package. Since this high frequency input / output terminal is integrally formed as an input / output terminal, a loss is small over a wide frequency band of several tens of GHz, and a high frequency semiconductor element housing package having good transmission characteristics is provided. Can be.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の高周波用入出力端子の実施の形態の
一例を示す断面図である。
FIG. 1 is a sectional view showing an example of an embodiment of a high frequency input / output terminal of the present invention.

【図2】 本発明の高周波用入出力端子の実施の形態の
一例を示す分解斜視図である。
FIG. 2 is an exploded perspective view showing one example of an embodiment of a high frequency input / output terminal of the present invention.

【図3】 本発明の高周波用入出力端子の実施の形態の
一例を示す断面図である。
FIG. 3 is a cross-sectional view illustrating an example of an embodiment of a high frequency input / output terminal of the present invention.

【図4】 本発明の高周波用半導体素子収納用パッケー
ジの実施の形態の一例を示す斜視図である。
FIG. 4 is a perspective view showing an example of an embodiment of a high-frequency semiconductor element housing package according to the present invention.

【図5】 (a)および(b)はそれぞれ本発明の高周
波用半導体素子収納用パッケージの実施の形態の一例を
示す斜視図および断面図である。
FIGS. 5A and 5B are a perspective view and a sectional view, respectively, showing an example of an embodiment of a high-frequency semiconductor element housing package according to the present invention.

【図6】 (a)および(b)はそれぞれ本発明の高周
波用入出力端子の反射損失および挿入損失の周波数特性
を示す線図である。
FIGS. 6A and 6B are diagrams showing frequency characteristics of reflection loss and insertion loss of the high frequency input / output terminal of the present invention, respectively.

【図7】 (a)および(b)はそれぞれ比較例の高周
波用入出力端子の反射損失および挿入損失の周波数特性
を示す線図である。
FIGS. 7A and 7B are diagrams showing frequency characteristics of reflection loss and insertion loss of a high frequency input / output terminal of a comparative example, respectively.

【図8】 従来の高周波用入出力端子の実施の形態の一
例を示す分解斜視図である。
FIG. 8 is an exploded perspective view showing an example of an embodiment of a conventional high frequency input / output terminal.

【図9】 従来の高周波用入出力端子の実施の形態の一
例を示す断面図である。
FIG. 9 is a cross-sectional view showing an example of an embodiment of a conventional high frequency input / output terminal.

【符号の説明】[Explanation of symbols]

1・11・31・・・誘電体基板 2・12・38・・・壁部材 3・33・・・・・凹部 4・14・34・・・接地導体 5・15・35・・・線路導体 6・16・36・・・同一面接地導体 7・17・37・・・貫通導体 8・40・・・・・下面側線路導体 19・39・・・・・高周波用入出力端子 21・・・・・・・基板 22・32・・・・・枠体 23・・・・・・・入出力端子取付部 30・・・・・・・誘電体基板 1 · 11 · 31 · · · dielectric substrate 2 · 12 · 38 · · · wall member 3 · 33 · · · · · concave section 4 · 14 · 34 · · · ground conductor 5 · 15 · 35 · · · line conductor 6 ・ 16 ・ 36 ・ ・ ・ Grounding conductors on the same plane 7.17 ・ 37 ・ ・ ・ Through conductors 8 ・ 40 ・ ・ ・ ・ ・ ・ Line conductors on the bottom side 19 ・ 39 ・ ・ ・ ・ ・ ・ High frequency input / output terminals 21 ・ ・・ ・ ・ ・ ・ Substrate 22 ・ 32 ・ ・ ・ ・ ・ ・ ・ Frame 23 ・ ・ ・ ・ ・ ・ ・ I / O terminal mounting part 30 ・ ・ ・ ・ ・ ・ ・ Dielectric substrate

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 下面に凹部を有するとともに該凹部の周
囲の下面に接地導体が形成された誘電体基板と、該誘電
体基板の上面に前記凹部の中央部分に対向するように接
合された誘電体または導電体から成る壁部材と、前記誘
電体基板の上面の前記壁部材の両側に互いに一直線状
に、各先端部がそれぞれ前記凹部の両側部分に対向する
ように形成された一対の線路導体と、各線路導体の両側
に形成された同一面接地導体と、前記誘電体基板の前記
凹部の底面に前記一対の線路導体と一直線状かつ平行に
形成され、両端が前記一対の線路導体の各先端部とそれ
ぞれ貫通導体により電気的に接続された下面側線路導体
とから成ることを特徴とする高周波用入出力端子。
1. A dielectric substrate having a concave portion on a lower surface and a ground conductor formed on a lower surface around the concave portion, and a dielectric bonded to an upper surface of the dielectric substrate so as to face a central portion of the concave portion. A wall member made of a body or a conductor, and a pair of line conductors formed on both sides of the wall member on the upper surface of the dielectric substrate in a straight line with each other so that each of the tip portions faces both side portions of the concave portion, respectively. Ground conductors formed on both sides of each line conductor, and formed on the bottom surface of the concave portion of the dielectric substrate in a straight line and parallel with the pair of line conductors, and both ends of each of the pair of line conductors are formed. A high-frequency input / output terminal comprising a tip portion and a lower-side line conductor electrically connected to each other by a through conductor.
【請求項2】 上面に高周波用半導体素子を搭載するた
めの搭載部を有する基板と、該基板上に前記搭載部を囲
むように接合された枠体と、該枠体を切り欠いて形成さ
れ、底面を導電性とした入出力端子取付部と、該入出力
端子取付部に嵌着された請求項1記載の高周波用入出力
端子とから成ることを特徴とする高周波用半導体素子収
納用パッケージ。
2. A substrate having a mounting portion for mounting a high-frequency semiconductor element on an upper surface, a frame joined to the substrate so as to surround the mounting portion, and a frame formed by cutting out the frame. A package for accommodating a high frequency semiconductor element, comprising: an input / output terminal mounting portion having a conductive bottom surface; and the high frequency input / output terminal according to claim 1 fitted to said input / output terminal mounting portion. .
【請求項3】 下面に凹部を有するとともに該凹部の周
囲の下面に接地導体が形成され、上面に高周波用半導体
素子を搭載するための搭載部を有する誘電体基板と、該
誘電体基板の上面に前記搭載部を囲むとともに一部が前
記凹部の中央部分に対向するように接合された誘電体ま
たは導電体から成る枠体と、前記誘電体基板の上面の前
記枠体の両側に互いに一直線状に、各先端部がそれぞれ
前記凹部の両側部分に対向するように形成された一対の
線路導体と、各線路導体の両側に形成された同一面接地
導体と、前記誘電体基板の前記凹部の底面に前記一対の
線路導体と一直線状かつ平行に形成され、両端が前記一
対の線路導体の各先端部とそれぞれ貫通導体により電気
的に接続された下面側線路導体とから成ることを特徴と
する高周波用半導体素子収納用パッケージ。
3. A dielectric substrate having a concave portion on the lower surface, a ground conductor formed on the lower surface around the concave portion, and a mounting portion for mounting a high-frequency semiconductor element on the upper surface, and an upper surface of the dielectric substrate A frame made of a dielectric or a conductor that is joined so as to surround the mounting portion and a part thereof faces the center portion of the concave portion, and a straight line is formed on both sides of the frame on the upper surface of the dielectric substrate. A pair of line conductors each formed so that each tip portion is opposed to both side portions of the concave portion, a same-plane ground conductor formed on both sides of each line conductor, and a bottom surface of the concave portion of the dielectric substrate A lower surface side line conductor formed in a straight line and parallel with the pair of line conductors, and both ends of which are electrically connected to each end portion of the pair of line conductors and through conductors, respectively. Semiconductor Package for element storage.
JP37165099A 1999-12-27 1999-12-27 High-frequency input/output terminal and package housing high-frequency semiconductor device Pending JP2001189405A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP37165099A JP2001189405A (en) 1999-12-27 1999-12-27 High-frequency input/output terminal and package housing high-frequency semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP37165099A JP2001189405A (en) 1999-12-27 1999-12-27 High-frequency input/output terminal and package housing high-frequency semiconductor device

Publications (1)

Publication Number Publication Date
JP2001189405A true JP2001189405A (en) 2001-07-10

Family

ID=18499073

Family Applications (1)

Application Number Title Priority Date Filing Date
JP37165099A Pending JP2001189405A (en) 1999-12-27 1999-12-27 High-frequency input/output terminal and package housing high-frequency semiconductor device

Country Status (1)

Country Link
JP (1) JP2001189405A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10998639B2 (en) 2019-01-31 2021-05-04 Toyota Motor Engineering & Manufacturing North America, Inc. Discrete metallic particles and multilayer structures comprising reflective core layers
US11339495B2 (en) 2020-05-20 2022-05-24 Toyota Motor Engineering & Manufacturing North America, Inc. Coated discrete metallic particles and multilayer structures comprising reflective core layers

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10998639B2 (en) 2019-01-31 2021-05-04 Toyota Motor Engineering & Manufacturing North America, Inc. Discrete metallic particles and multilayer structures comprising reflective core layers
US10998638B2 (en) 2019-01-31 2021-05-04 Toyota Motor Engineering & Manufacturing North America, Inc. Nickel-chromium particles and multilayer structures comprising nickel chromium core layers
US11749899B2 (en) 2019-01-31 2023-09-05 Toyota Motor Engineering & Manufacturing North America, Inc. Multilayer structures comprising reflective core layers
US11339495B2 (en) 2020-05-20 2022-05-24 Toyota Motor Engineering & Manufacturing North America, Inc. Coated discrete metallic particles and multilayer structures comprising reflective core layers

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