JP2000330495A - Video display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance video display performance by eliminating the luminance difference between the overlap part and the non-overlap part of pictures of boundary parts of adjacent display screens to reduce these boundary parts from becoming conspicuous. SOLUTION: In this video display device, in the case of displaying a video on two CRT screens becoming a continuous display areas, video data of screens A, B are read out from video storage memories 2a, 2b of the screens A, B with read-out controls based on respective display timing signals of screen A and screen B memory control parts 3a, 3b and videos based on respective video data are displayed on screens via respective video display output parts 6a, 6b while driving respective CRTs. Moreover, screen A, B display timing control parts 4a, 4b controls read-outs in the screen A, B memory control parts 3a, 3b by generating and also supplying signals of display timings which are arranged in phase inversion states in order to make videos so as to become alternately display and non-display for every pixel with respect to video data corresponding to pixels of the overlap parts based on phase timing signals from a timing phase control part 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video display device in which a plurality of color cathode ray tubes (hereinafter, referred to as CRTs) are arranged in a matrix in the vertical and horizontal directions to form one large screen. The present invention relates to an image display device capable of smoothly displaying an image at a boundary portion of the image display device.

[0002]

2. Description of the Related Art Conventionally, the size of an image display device has been rapidly increased, and since this type of image display device can display a large image with a sense of presence on a large screen,
Future demand is expected for general household use, corporate advertising, and display of various events.

[0003] Video display devices having a large screen include various types of display systems, such as a projection type comprising a plurality of projectors. However, in consideration of high image quality, a CRT is used. The advantage of the displayed image display device is greater. That is, this is the same as a configuration in which a plurality of CRTs used for a normal television receiver are combined.

The CRT generally includes a shadow mask type and a modified trinitron type, and a beam index type is practically used in other systems.

The beam index type CRT has no shadow mask or aperture grille, performs color selection by index phosphor stripes, and realizes color display by one electron beam. Since it has advantages such as high luminance, high resistance to vibration, and little influence of geomagnetism, it is particularly effective in configuring the above-described video display device.

Such an image display device can display one large image on one large screen composed of a plurality of screens, and of course, can display different images on each of a plurality of screens. Is also possible.

In general, in such a video display device, the timing of writing and reading each video data to and from a memory that temporarily stores video data based on each input video signal is controlled, and the video data is read out at that timing. The obtained video data is subjected to signal processing for display, and then output to a corresponding CRT drive circuit, whereby video display is performed on each screen constituting one large screen.

FIG. 4 shows an example of a screen display in the case where video display based on the input video signals is performed in the display areas of two screens among the display areas of a plurality of screens.

FIG. 4A shows an example of a screen display when different images are displayed on the display areas of two screens in a normal display process. An image based on the input image signal is displayed. In the display processing in this case, as shown in FIG. 4A, the read timing of each video data from the memory is controlled so that the portions corresponding to the boundary portions of the left and right screens do not overlap. The read video data is output to each video display output unit. FIG. 5 is a timing chart showing an example of this display processing.

That is, assuming that each of (a) and (b) shown in FIG. 5 is an input video signal for displaying on two screens, the (a) signal has a period corresponding to a boundary portion between the two screens ( At the same time as the reading from the memory is stopped at T), the reading of another signal (b) from the memory is started from this period (T). The signals (a) and (b) read out at such timings are subjected to processing necessary for display, respectively, and then supplied to the corresponding drive circuits of the respective CRTs. As shown in (a), an image based on the (a) signal and an image based on the (b) signal are displayed in, for example, the display areas of two continuous screens. When the signals (a) and (b) read at such timing are superimposed,
The signal (c) is as shown in FIG.

However, in such a display processing method, the switching portion of the video signal shown in the period (T) may be conspicuously seen as a discontinuous video boundary when the displayed video is actually viewed. is there.

Therefore, conventionally, in order to smoothly display an image on the boundary portion between adjacent screens, adjacent screen images are overlapped with each other for a predetermined period of time so that the seam of the boundary portion is less noticeable. I have to. FIG. 4 shows an example of a screen display in a case where images are respectively displayed on the display areas of two screens by such a display method.
FIG. 6B is a timing chart showing an example of the display processing in this case.

In such a display processing method, as shown in FIG. 6, in order to superimpose adjacent images, (a) during the period in which the signal is read from the memory,
Reading of the signal (b) from the memory is started from the period t1. Then, in the period T0 from the period t1 to the period t2 in which the reading of the signal (a) is completed, the signals (a) and (b) are combined so as to overlap. In other words, when the signal (a) and the signal (b) are superimposed and shown as a video signal, the composite signal (c) is obtained as shown in FIG.

However, when the respective signals (a) and (b) obtained by the display processing are displayed, as shown in a composite signal (c) superimposed on each other as shown in FIG. And (b) are added during the period T0, so that the luminance of the video portion (overlapping portion) corresponding to this period T0 increases, and the difference from the non-overlapping video portion is increased. Will occur. In particular, in a video display device using a beam index type CRT or the like, the occurrence is remarkable, and there is a disadvantage that the video quality is impaired.

In order to prevent an increase in the luminance of the superimposed portion of the image, the superimposed portion of the image (period T
The luminance levels of the (a) signal and the (b) signal corresponding to (0) are set to そ れ ぞ れ, respectively, so that the overlapped portion becomes a composite signal (c) suppressed to the average luminance level. A display processing method as shown in FIG. 7 in which an increase in the luminance of a superimposed portion of a video is prevented by performing signal processing on the video signal of In the overlapped portion corresponding to the period t0 from the period t1 to the period t2, when the two-screen display is actually viewed, the boundary line of the discontinuous video is prominently seen. Did not.

[0016]

As described above, for example, 1
In a video display device in which one screen is composed of a plurality of screen display areas, when displaying a video based on a plurality of input video signals in a plurality of screen display areas arranged continuously, a boundary portion between adjacent display screens is In order to prevent this, the image of adjacent screens is processed so that it overlaps with each other for a certain period of time. As a result, a difference from a non-overlapping image portion occurs, and as a result, the image quality is deteriorated.

In view of the above, the present invention has been made in view of the above-described problem, and eliminates the difference in luminance between the overlapping portion and the non-overlapping portion of the boundary between adjacent display screens.
An object of the present invention is to provide a video display device capable of improving the video display performance by reducing the visibility of the boundary portion.

[0018]

A video display apparatus according to the present invention forms a plurality of continuous display areas by arranging and combining a plurality of CRTs, and displays an image based on a plurality of input video data in each display area. A video display device capable of displaying each of the plurality of input video data to be displayed in each of the display areas; a plurality of memory means for capturing and storing the plurality of input video data; and processing the video data read from the plurality of memory means. Video display output means for outputting to a CRT in a display area to be written, memory control means for controlling writing of the video data to the plurality of memory means and reading of the stored video data, Phase control means for generating a timing phase signal for superimposing and displaying an image on a portion adjacent to each other; The control unit controls the read timing of the video data based on the timing phase signal, and alternately inverts the video data corresponding to the overlapped portion of the video data supplied to each of the CRTs at predetermined intervals. Display timing control means for controlling the reading by the memory control means so as to output the data in a state in which the data is read out.

According to the present invention, an image is superimposed and displayed on an adjacent portion among a plurality of continuous screen display areas. Pixels corresponding to the superimposed portion display each image. Since the levels are alternately inverted and output, an image can be displayed without increasing the luminance due to the superposition. Therefore, it is possible to eliminate the difference in luminance between the overlapping portion and the non-overlapping portion of the video, and the seam at the boundary between adjacent screens is not noticeable, so that the video display performance can be improved.

[0020]

Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a video display device according to the present invention. Note that, in the present embodiment, in order to simplify the description, video display is performed on two screens having a continuous display area among display areas on one large screen configured by a plurality of CRT screens. Will be described.

In FIG. 1, a video display device according to the present embodiment is, for example, a plurality of beam index type CRTs.
Are arranged in a matrix in the vertical and horizontal directions to constitute one large screen. For example, two input terminals necessary for displaying images on two consecutively arranged CRT screens, respectively. 1a and 1b. These input terminals 1a and 1b are connected to the CRTs arranged continuously.
Each piece of video data for displaying a video in each display area of the screen (in this case, one is called screen A video data and the other is described as screen B video data) is input.

The screen A video data input through the input terminal 1a is supplied to the screen A video storage memory 2a, and the screen B video data input through the input terminal 1b is stored in the screen B video storage memory 2b. The data is supplied and written into the respective video storage memories 2a and 2b. At this time, writing to the video storage memories 2a and 2b is controlled by the memory control units 3A and 3b for the screen A and the screen B.

When the display mode is executed, the video data of the screen A and the video data of the screen B are read out from the screen A video storage memory 2a and the screen B video storage memory 2b by the reading control by the control means which is a feature of the present embodiment. After that, the video output signals 7a and 7b of the screens A and B to be supplied to the drive circuits of the respective CRTs are generated by being supplied to the video display output units 6a and 6b of the screens A and B, respectively. Is made.

As shown in FIG. 1, the control means for performing the read control includes a screen A memory control unit 3a, a screen B
A memory control unit 3b, a screen A display timing control unit 4a,
It is configured to include a screen B display timing control unit 4b and a timing phase control unit 5.

The screen A memory control unit 3a receives a screen A from the screen A video storage memory 2a based on a display timing signal from a screen A display timing control unit 4a to be described later.
Controls reading of video data. Similarly, the screen B
The memory control unit 3b controls reading of screen B video data from the screen B video storage memory 2b based on a display timing signal from a screen B display timing control unit 4b described later.

The screen A display timing control section 4a generates the display timing signal based on the phase timing signal from the timing phase control section 5, and supplies the display timing signal to the screen A memory control section 3a. Similarly, the screen B display timing control unit 4b generates the display timing signal based on the phase timing signal from the timing phase control unit 5, and provides the display timing signal to the screen B memory control unit 3b.

Although not shown, the timing phase controller 5 is supplied with respective synchronizing signals extracted from the screen A video data and the screen B video data. Is generated and supplied to the display timing control units 4a and 4b of the screen A and the screen B.

According to the display processing method in the video display device of the present embodiment, for example, when a video is displayed in a display area of two screens arranged consecutively, the seam at the boundary between adjacent screens is noticeable. In order to reduce and smooth the image display, a display processing method is adopted in which adjacent screen images are overlapped with each other for a predetermined period of time. However, in this case, an increase in the brightness of the overlapped portion which occurs in this case is prevented. As described above, the screen A display timing control unit 4a
The display timing is controlled by the screen B display timing control unit 4b.

FIG. 2 is a timing chart for explaining a display processing method employed in the video display device according to the present embodiment. In FIG.
A signal indicates screen B video data, and a signal (c) indicates combined data when these pieces of video data are combined.

As shown in this figure, when a period corresponding to a superimposed portion in the case of displaying the image data of the screen A and the image data of the screen B is T0 (t1 to t5), the screen A display timing control section 4a shows that the luminance level is low during the period from t2 to t3 when the (a) signal is from the phase timing signal.
OW level, and during the subsequent period from t3 to t4, the luminance level becomes HIGH level, that is, a display timing signal is generated such that display and non-display are alternately repeated every predetermined period in the period T0. Give to 3a.

In synchronization with this, the screen B display timing control section 4b determines from the phase timing signal that the (b) signal is at the LOW level during the period of t1 to t2 and the luminance level is at the LOW level during the subsequent period of t2 to t3. A display timing signal is generated such that display and non-display are alternately repeated every predetermined period in the T0 period so that the luminance level becomes the HIGH level and the LOW level again during the period from t3 to t4. 3b.

That is, the display timing control units 4a and 4b for the screen A and the screen B, when the respective display images of the screen A image data and the screen B image data overlap each other (within the T0 period), Display timing control is performed so that the screen B video data alternates between display and non-display at predetermined intervals. Therefore, the display timing phase in the T0 period corresponding to the overlapping portion of the video data is inverted.

In the display timing method described above,
In the period T0 corresponding to the portion where the images overlap,
Although the display timing phase has been described to be alternately inverted every predetermined period, the predetermined period is set to a unit of a certain width of video data, for example, a period corresponding to a pixel unit, and is turned on / off for each pixel unit. Display timing control such as turning off may be performed. The control such as the timing setting of the inversion phase of the display timing signal is managed by the timing phase control unit 5, so that the inversion phase timing can be freely set and changed.

The display timing signals thus generated are supplied to the corresponding screen A memory controller 3a and screen B memory controller 3b, and in response thereto, these screen A memory controller 3a and screen B memory Control unit 3b
In order to display an image at the display timing shown in FIG. 2, each of the screen A image storage memory 2a and the screen B image storage memory 2B based on the supplied display timing signal.
To control the reading of each screen A video data and screen B video data.

Therefore, each video data output based on such display timing is subjected to signal processing for display by the video display output units 6a and 6b of the screens A and B, and then output. The video is displayed by being supplied to the corresponding CRT drive circuit via the terminals 7a and 7b. However, the video signals to be displayed in this case can be represented as a composite (c) signal shown in FIG. 2 when they are superimposed. Thus, when the display mode of these video signals is actually executed,
It is possible to perform video display and display at a constant luminance without causing a luminance difference between a superimposed portion of an image and a portion other than the superimposed portion when a video signal is superimposed. .

Next, the display control operation of the video display device shown in FIG. 1 will be described in detail.

Now, it is assumed that the display mode of the screen A video data and the screen B video data is executed.

Then, the screen A video data input through the input terminal 1a is supplied to the screen A video storage memory 2a, and the screen B video data input through the input terminal 1b is converted into the screen B video storage memory. 2b, screen A
The screen B is written into the respective video storage memories 2a and 2b by the control of the memory control units 3A and 3b.

Then, in order to perform the two-screen display of the stored image A video data and image B video data, the screen A memory control unit 3a and the screen B video storage memory 2a and the screen B video storage memory 2b are used. The image A video data and the image B video data are read by the read control by the memory control unit 3b.

At this time, the screen A display timing control unit 4
a and the screen B display timing control unit 4b
A display timing signal necessary for performing read control by the memory control unit 3a and the screen B memory control unit 3b is generated and provided to these memory control units 3a and 3b. That is, the screen A display timing control unit 4a and the screen B
The display timing is controlled by the display timing control unit 4b.

In this case, as shown in FIG. 2, the display timing of the signal (screen A video data) and the signal (b) signal (screen B video data) overlap each other as shown in FIG. ), The display timing is such that the screen A video data and the screen B video data alternately alternate between display and non-display every predetermined period (for example, every pixel). A display timing signal indicating such a display timing is given to the screen A memory control unit 3a and the screen B memory control unit 3b, respectively, so that the display timing signal by the screen A memory control unit 3a and the screen B memory control unit 3b is provided. Is performed based on the read control.

Each of the read video data is
After that, it is supplied to the screen A video display output section 6a and the screen B video display output section 6b and subjected to signal processing necessary for display, respectively, and then the corresponding CRT drive circuit is output via the output terminals 7a and 7b. Is supplied to the display area, the respective images are displayed in the display area where the screen of the CRT (not shown) is continuous. In this case, the display timing is controlled by the display processing method described above. In addition, it is possible to display an image with a constant luminance without causing a luminance difference between the superimposed portion of the image and the other portion.

Therefore, according to the present embodiment, with a simple configuration, the difference in brightness between the overlapping portion of the screen and the non-overlapping portion of the boundary portion of the adjacent display screen is eliminated, and the boundary portion is less noticeable. As a result, display performance can be improved.

In the present embodiment, the signal processing for displaying an image on two screens having a continuous display area among the display areas on one large screen constituted by a plurality of CRT screens is described. Although the present invention has been described, the present invention is not limited to this, and is also effective when displaying images in a plurality of display areas in which a plurality of CRT screens are continuous. In this case, a circuit group such as a video storage memory, a screen memory control unit, and a display timing control unit is provided for each input signal for displaying a plurality of video images. The reading control may be performed from each video storage memory so as to be as follows. In this case, the control circuits such as the screen memory control unit and the display timing control are configured as one control circuit, and if the overall memory control and the display timing control are performed, the circuit scale does not increase.

In the above embodiment, the display timing control in the horizontal scanning direction of two screens, which are continuous display areas, has been described. In the present invention, the display timing control in the vertical scanning direction of the two screens to be displayed is adapted. Is possible. Such an embodiment will be described with reference to FIG.

FIG. 3 is an explanatory diagram for explaining a display processing method according to another embodiment. FIG. 3A shows display timing control so as to be alternately turned on / off for each pixel in the horizontal scanning direction. FIG. 3B shows a state in which the display timing is controlled so as to be alternately turned on / off for each pixel in the vertical scanning direction. It should be noted that a predetermined number of pixels shown in the drawing are shown as corresponding to portions where the images overlap.

The overall configuration is the same as the configuration in the above embodiment. The different point is a display timing control method by the screen A display timing control unit 4a and the screen B display timing control unit 4b.

That is, in this embodiment, the screen A display timing control section 4a and the screen B display timing control section 4a
b is based on the phase timing signal from the timing phase control unit 5, and as shown in FIG. 3B, in each pixel unit in the pixel vertical scanning direction of a plurality of pixel portions corresponding to the overlapping portion of the video data. A display timing signal that alternately repeats display and no display is generated, and given to the screen A memory control unit 3a and the screen B memory control unit 3b.

Thus, the screen A memory control unit 3a and the screen B memory control unit 3b to which the display timing signal has been supplied receive the screen A image storage memory 2a and the screen B image storage based on the supplied display timing signal. Read control of each storage data from the memory 2b is performed,
Thereafter, each image data read out in the same manner as in the above-described embodiment is output to the screen A image display output unit 6a and the screen B image display output unit 6b, so that a vertical screen is displayed on each CRT screen (not shown). It is possible to display two screens at a constant luminance without causing a luminance difference between the superposed part of the image and the other part in the scanning direction.

Therefore, according to the present embodiment, with a simple configuration, the difference in luminance between the overlapping portion and the non-overlapping portion of the boundary between adjacent display screens in the vertical scanning direction is eliminated, and this boundary portion is conspicuous. Can be reduced, and as a result, the same effect as in the above-described embodiment can be obtained.

In the embodiment according to the present invention, as one display means having a plurality of screen display areas, one display means having a plurality of continuous screen display areas by combining a plurality of CRTs in the vertical and horizontal directions. Although the description has been given of the case where the CRT screen is configured as one CRT screen, the present invention is not limited to this, and one large screen having a plurality of screen display areas may be configured by using other display means. good. Also in this case, the same effect as in the above embodiment can be obtained.

[0052]

As described above, according to the present invention, the difference in luminance between the overlapped portion and the non-overlapping portion of the boundary portion of the adjacent display screen is eliminated, and the boundary portion is less noticeable. be able to. Therefore, the effect that the multi-screen display performance can be improved can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a video display device according to the present invention.

FIG. 2 is a timing chart for explaining a display processing method in a horizontal scanning direction employed in the apparatus of FIG. 1;

FIG. 3 is an explanatory diagram for explaining a display processing method in a vertical scanning direction.

FIG. 4 is a screen display diagram showing an example of a two-screen display by a conventional device.

FIG. 5 is a timing chart for explaining a normal display processing method.

FIG. 6 is a timing chart for explaining a display processing method of superimposing images.

FIG. 7 is a timing chart for explaining a display processing method when the luminance of a video signal portion to be superimposed is set to ２.

[Explanation of symbols]

 1a: Screen A video data input terminal, 1b: Screen B video data input terminal, 2a: Screen A video storage memory, 2b: Screen B video storage memory, 3a: Screen A memory control unit, 3b: Screen B memory control unit, 4a: Screen A display timing control unit, 4b: Screen B display timing control unit, 5: Timing phase control unit, 6a: Screen A video display output unit, 6b: Screen B video display output unit, 7a: Screen A video signal output Terminal, 7b: Screen B video signal terminal output.

Claims (6)

[Claims] 1. A video display device capable of forming a plurality of continuous display areas by arranging and combining a plurality of CRTs and displaying an image based on a plurality of input video data in each of the display areas. A plurality of memory means for fetching and storing the plurality of input video data to be displayed in an area; and a video display output means for processing video data read from the plurality of memory means and outputting the processed video data to a CRT of a corresponding display area. A memory control unit that controls writing of the video data to the plurality of memory units and reading of the stored video data; and superimposing and displaying images on mutually adjacent portions in the plurality of display areas. Control means for generating a timing phase signal for reading the video data by the memory control means Controlling the timing based on the timing phase signal so that the video data corresponding to the superimposed portion of the video data supplied to each of the CRTs is output in a state of being alternately inverted every predetermined period. And a display timing control means for controlling reading by the memory control means. 2. The memory control means includes switch means for turning on / off output of stored video data when reading and controlling the plurality of memory means, and the display timing control means controls the switch means. 2. The video display device according to claim 1, wherein the stored video data can be read out. 3. The video display device according to claim 1, wherein said memory control means and said display timing control means are constituted by one control means. 4. The display timing control means according to claim 1, wherein said image data corresponding to a superimposed portion of adjacent images on the screen of said display means is output in a state of being alternately inverted for each pixel. 2. The video display device according to claim 1, wherein reading by the memory control means is controlled. 5. The display timing control means according to claim 1, wherein each of the video data corresponding to the superimposed portion of the video is output in a state of being alternately inverted for each pixel in a horizontal scanning direction and a vertical scanning direction. 2. The video display device according to claim 1, wherein reading by said memory control means is controlled. 6. The CRT is a beam index type C
The video display device according to claim 1, wherein the video display device is an RT.