JP2000092146A - Multi-modem transmitter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simultaneously use plural analog channels and to transmit data at high speed. SOLUTION: A demultiplexer 8 divides high-speed data outputted by a high- speed data terminal 10 into three and converts them into low-speed data. The low-speed data are transmitted by using the three analog channels via a modem 12. A multiplexer 14 reconstitutes the original high-speed data, by integrating the three low-speed data received with the use of the three modems 12 and sends them out to the high-speed data terminal 10.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to high-speed digital data communication using an analog communication line.

[0002]

2. Description of the Related Art A voice band (0.3 to
Even when data communication at 3.4 kHz) is performed by, for example, a modem employing the QAM modulation method, the communication speed is at most about 36.4 kbps. Also, 48kbps
An SSB modem or the like using a line of a 48 kHz band is known as a device capable of performing the data communication. In such SSB modems and the like, high-performance and stable frequency characteristics and group delay characteristics within a signal band of a line are required.

[0003]

[0005] Techniques indispensable for realizing a data modem for high-speed data communication include a high-performance equivalent circuit and an automatic equivalent circuit that can cope with seasonal fluctuations. However, an analog communication line belongs to a wide band in terms of band, but its frequency characteristics and group delay characteristics are generally unstable. Therefore, it has been difficult to realize a high-performance equivalent circuit that can be used for an analog line or a high-performance automatic equivalent circuit that can cope with seasonal fluctuations.

Therefore, it is extremely difficult to realize a data modem for high-speed data communication that can be used on an analog communication line. The simplest way to realize high-speed data communication is to use a high-speed line. Particularly in recent years, high-speed lines such as ISDN have become widespread.

[0005] However, there are many areas where high-speed lines such as ISDN cannot be used, such as mountainous areas and remote islands. In these areas, while using slow analog lines,
There is a great demand for high-speed data communication.

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above problems, and has as its object to realize high-speed data communication even in a situation where only low-speed lines can be used.

[0007]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention uses a plurality of low-speed analog lines at the same time and operates like a single high-speed line.
In order to perform such an operation, data to be transmitted is divided into the same number as a plurality of low-speed analog lines, and the divided data is transmitted through the corresponding analog lines.

In the present invention, a plurality of analog lines are used as described above. However, in order to transmit high-speed data without errors and to enable the receiving side to recover without errors, a plurality of analog lines are used. It constantly monitors whether the line is working properly.

Also, the data transmitted by the data modem in the voice band has a different delay time due to the difference in line characteristics used by each modem and the route of the communication line. As described above, it is known that the delay time varies depending on time and season.

For this reason, high-speed data on the premise of using a high-speed digital data line is separated and transmitted.
When this data is received via a data modem, the bit position of the received data is shifted between the respective modems. In the present invention, means for reassembling the bit position shifted by the difference in the delay time so as to return to the original position is taken.

Specifically, the present invention employs the following means in order to solve the above problems.

According to a first aspect of the present invention, there is provided separating means for dividing high-speed digital data to be transmitted into N pieces of low-speed data, and modulating N pieces of low-speed data separated by the separating means to form N analog signals. N transmission-side modem means for transmitting data via the line, and N demodulated N low-speed data transmitted via the N analog lines, respectively, A multi-function device comprising: N receiving modem means for receiving; and restoring means for integrating the N low-speed data received by the N receiving modem means and restoring the high-speed digital data. It is a modem transmission device. Where N is 2
This is a positive integer.

Since the data is divided into N pieces of low-speed data, a low-speed analog line can be used. In other words, since N analog lines are collectively used, a transmission speed substantially similar to that of a high-speed data line can be realized.

According to a second aspect of the present invention, in the multi-modem transmission apparatus according to the first aspect of the present invention, the separating means includes a delay detection correction bit, a time adjustment stuff bit and a delay adjustment stuff bit for each of the separated low-speed data. , And the restoring means obtains a difference in delay time between the low-speed data based on the reception timing of the delay detection correction bit in each of the received low-speed data. Delay time adjusting means for eliminating the time adjustment stuff bit in each received low-speed data,
A stuff bit deleting unit for extracting only the high-speed digital data to be transmitted.

According to a third aspect of the present invention, there is provided the multi-modem transmission apparatus according to the first or second aspect of the present invention, wherein the N modem means are monitored, and if an abnormality is found, the modem means which has found the abnormality. A multi-modem device characterized by including abnormality detecting means for performing only a stop or a recovery operation.

Since only the modem means in which an abnormality is found are stopped or the like, so-called degenerate operation can be performed by the remaining modem means.

According to a fourth aspect of the present invention, there is provided a separating means for dividing high-speed digital data to be transmitted into N pieces of low-speed data, and frequency-multiplexing the N pieces of low-speed data separated by the separating means into one piece of data. Power line transmitting means for transmitting to a power line, a power line receiving device for frequency-separating N low-speed data after frequency multiplexing transmitted via the power line and receiving the N low-speed data, and the power line receiving device And a restoring means for integrating the N pieces of received low-speed data and restoring the high-speed digital data.

In the present invention, the N analog lines of the first present invention are replaced by frequency multiplex communication on one power line, and the operation is basically the same as that of the first present invention.

[0019]

A block diagram representing the concept of multi-modem transmission apparatus according to the embodiment of the Invention Overview The exemplary embodiment is shown in FIG. In FIG. 1, the multi-modem transmission device includes a demultiplexing device 8 and a multiplexing device 1.
Shown as 4. As shown in this figure,
The multi-modem transmission device (separation device 8) according to the present embodiment operates as one high-speed data modem for high-speed data terminal 10.

FIG. 2 and FIG. 3 show block diagrams of the configuration of the demultiplexer 8 and the multiplexer 14, respectively.

In FIG. 2, upon receiving a communication start request from the high-speed data terminal 10, the data separation circuit 20 transmits training data, and each data modem 12 (in FIG. 1, for example, a V.34 modem is shown as the data modem 12). Start training).

Next, referring to FIG.
Is normally completed, the delay amount of the delay correction generation circuit 30 is adjusted, and the positions of the separated and received frames are adjusted in time. The coincidence of the frame positions is referred to as the completion of the delay correction. When the delay correction is completed, the multi-modem transmission device (separator 8, multiplexer 1
4) notifies the high-speed data terminal 10 that the training has been completed and enters the normal operation state. In a normal operation state, the high-speed data terminal 10 can perform communication via an analog line.

Detailed Description of Operation Hereinafter, a specific circuit operation will be described.

A high-speed data terminal having a communication speed of 64 kbps is compatible with a V.264 terminal having a communication speed of 28.8 kbps. An example of a configuration in which a connection is made via three analog lines with 34 modems is shown in the explanatory diagrams of FIGS. 1 to 3 described above.

FIG. 4 is an explanatory diagram of the bit structure of the demultiplexing and multiplexing. As shown in this figure, high-speed original data is divided into three groups for each bit. That is, the separated data 1 is D01, D04, etc., the separated data 2 is D02, D05, etc., and the separated data 3 is D0,
3, D06 and the like.

Each of the separated data includes a delay detection correction bit (two frame bits F01,
F02) and the time adjustment additional bit (XXX) are added, and distributed to the final three separated data.

By comparing the frame bits on the receiving side, it is possible to compensate for the difference in delay time between the three data. The time adjustment additional bit is a so-called stuff bit, and is used to adjust the data transfer rate so that the data transfer rate does not become exactly one-third. It should be noted that the delay detection correction bit may be set to one bit, and the extra bit may be adjusted by the time adjustment additional bit.

FIG. 2 is a block diagram showing the configuration of the separating device 8. As shown in FIG. In the data separation circuit 20, the high-speed data terminal 10
, And separates the data according to the number of channels of the modem to be used, and transmits the data together with the delay detection correction bit and the time adjustment additional bit output from the frame bit generation circuit 22 at a timing based on the signal of the write timing generation circuit. The data is written to the data buffer 24. At the timing based on the signal of the read timing generation circuit 26, the data written for each frame is read from the transmission data buffer 24, and
8 and transmitted using an analog line.

FIG. 3 is a block diagram showing the configuration of the multiplexer 14. The synchronization detection circuit 32 performs synchronization detection on the data received from each modem 12. Then, in synchronization with the reception clock of each modem 12,
The received data is written to the reception data buffer 34. One modem data is selected as the reference selection clock by the PLL clock selection circuit 36, and the reception PLL generates a reference clock for multiplexing.
In the present embodiment, it is assumed that the frame length is sufficiently larger than the difference in time delay. Therefore, by comparing the position of the head (frame bit) of each frame, it is possible to determine the modem data to be used as a reference (the latest modem data). The other two modem data are added with a delay time so that they can be time aligned with the reference modem data.

Upon receiving the frame position signal (pulse signal indicating the beginning of the frame) from each synchronization detection circuit 32, the delay correction generation circuit 30 transmits the frame correction signal to each read address generation circuit 38. This frame correction signal is an address offset value indicating how much the read address is advanced.

FIG. 5 shows the timing of the frame correction signal. The read address generation circuit 38 uses the reference clock and the synchronization detection circuit 32 based on the frame correction signal.
, And supplies the read address to the reception data buffer 34. From each received data buffer 34,
Data is sequentially read out to the data multiplexing circuit 40.

Then, after deleting the delay detection correction bit and the time adjustment additional bit, the data multiplexing circuit 40 arranges and multiplexes the data to reproduce the original high-speed data. Note that the reception timing generation circuit 42 generates a reception clock based on the reference clock, and supplies the reception clock to the external high-speed data terminal 10.

The data terminal speed is 64 kbp
In addition to s, there are 128 kbps and the like, and the present invention is applicable to these. The modem 12 can also operate at 14.4 kbps other than 28.8 kbps.

In the above-described embodiment, an example has been described in which high-speed data is divided into three. However, any division number may be used as long as the division number is two or more. For example, 64 kbp
FIG. 7 shows an example in which s is divided into 5 and configured by a 14.4 kbps modem.

In the above embodiment, an example of transmission using a plurality of telephone lines has been described. However, other types of low-speed analog lines may be used. For example, FIG. 6 shows an example in which the demultiplexing device 8 and the multiplexing device 14 of the present invention are used in a power line carrier 62 that uses a frequency multiplexed power transmission line as a communication line as an analog line. Further, in FIG. 6, the operation state of the data modem 12 can be monitored by the modem monitoring control CPU 60, and the recovery operation can be executed individually. According to such a configuration, even when a failure occurs in the operation of one modem, data transmission by four divisions can be continued by the operations of the remaining four modems. In this case, by increasing the data transfer rate itself and changing the frame configuration, data transmission at the same data transfer rate can be continued, and the reliability of the device is improved.

[0036]

The power line which is generally robust against natural disasters but is a low-quality analog communication line can be used for high-speed data communication, so that it can be used as a backup line in the event of a disaster. Further, even in an area where only analog communication lines cannot be used for high-speed data communication, if the number of lines is sufficient, high-performance terminals can be used and advanced services can be enjoyed.

Specifically, the following effects are obtained.

According to the present invention, since a plurality of analog lines are used, high-speed data transmission can be realized without using high-speed ISDN or the like.

According to the present invention, since data for delay detection and the like are added to data, it is possible to efficiently perform separation / multiplexing (integration) of data.

According to the present invention, the modem in which the abnormality has occurred can be stopped, so that the degenerate operation can be performed.

According to the present invention, data can be transmitted using frequency multiplex communication on a power line, so that a single power line can achieve the same effects as the plurality of analog lines described above.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a connection configuration between data terminals.

FIG. 2 is a block diagram of a separation transmission unit.

FIG. 3 is a multiplex reception block diagram.

FIG. 4 is a configuration diagram of a frame bit embodiment.

FIG. 5 is a conceptual diagram of data restoration multiplex processing.

FIG. 6 is a configuration diagram of an embodiment of a 5-division power line demultiplexer.

FIG. 7 is a configuration diagram of a five-divided frame bit embodiment.

[Description of Signs] 8 separation device, 10 high-speed data terminal, 12 data modem, 14 multiplexer, 20 data separation circuit, 22
A frame bit generation circuit, 24 transmission data buffers,
26 read timing generation circuit, 28 modem interface, 30 delay correction generation circuit, 32 synchronization detection circuit, 34 reception data buffer, 36 PLL clock selection circuit, 38 read address generation circuit, 40 data multiplexing circuit, 42 reception timing generation circuit, 60 modem Monitoring control CPU, 62 Power line carrier.

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Tetsuo Hayashi 7-3-16 Kikuna, Kohoku-ku, Yokohama, Kanagawa Prefecture Inside Oi Electric Co., Ltd. (72) Yukinobu Abe 7-3-Kikuna, Kohoku-ku, Yokohama, Kanagawa 16 Oi Electric Co., Ltd. (72) Inventor Masato Fujii 7-3-16 Kikuna, Kohoku-ku, Yokohama, Kanagawa Prefecture F-term (reference) 5K022 AA01 AA12 AA22 5K030 GA01 HA01 JA05 LA15 5K034 AA01 CC01 CC06 DD01 EE07 EE12 FF05 HH01 HH02 HH07 HH12 KK02 MM25 TT01 TT02 5K046 AA03 BB05 EE50 PP01 PP04 PS03 PS05 YY01

Claims (4)

[Claims] 1. Separating means for dividing high-speed digital data to be transmitted into N low-speed data, modulating N low-speed data separated by the separating means, and respectively modulating the low-speed data via N analog lines. N to send
Transmitting modem means, and N receiving modems respectively demodulating the modulated N low-speed data transmitted through the N analog lines and receiving the N low-speed data, respectively. Means for integrating the N low-speed data received by the N receiving modem means and restoring the high-speed digital data. N is 2
This is a positive integer. 2. The multi-modem transmission apparatus according to claim 1, wherein the separating unit adds a bit for delay detection correction and a time adjustment stuff bit to each of the separated low-speed data. Means for recovering, based on the reception timing of the delay detection correction bit in each of the received low-speed data, a delay time difference for each low-speed data, and a delay time for eliminating this time difference A multi-modem transmission apparatus comprising: an adjusting unit; and a stuff bit deleting unit that deletes the time adjustment stuff bit in each of the received low-speed data and extracts only the high-speed digital data to be transmitted. 3. The multi-modem transmission device according to claim 1, wherein the N modem units are monitored, and if an abnormality is found, only the modem unit that has found the abnormality is stopped or restored. A multi-modem device comprising: 4. A separating unit for dividing high-speed digital data to be transmitted into N low-speed data, and a power line for frequency-multiplexing the N low-speed data separated by the separating unit and transmitting the multiplexed data to one power line. Transmitting means, a power line receiving device for frequency-separating N low-speed data after frequency multiplexing transmitted via the power line and receiving the N low-speed data, and N power lines received by the power line receiving device. Restoring means for integrating the low-speed data and restoring the high-speed digital data.