GB2208767A

GB2208767A - Sweep tuning RDS receiver

Info

Publication number: GB2208767A
Application number: GB8819218A
Authority: GB
Inventors: Koichi Kasa; Toshihito Ichikawa; Junichi Nishida
Original assignee: Pioneer Electronic Corp
Current assignee: Pioneer Corp
Priority date: 1987-08-12
Filing date: 1988-08-12
Publication date: 1989-04-12
Anticipated expiration: 2008-08-12
Also published as: GB2208767B; GB8819218D0; DE3827310A1; DE3827310C2

Description

1

DESCRIPTION

RDS RADIO RECEIVER AND ITS OPERATI.M 90/3176/01 21-. 1 t -6,1 c u 8 / 1 The present invention relates to a radio data system (RDS) receiver and to a method for controlling such a receiver.

A radio data system (RDS) is known which provides a service in which when an ordinary radio station broadcasts a program, the information associated with program contentst is transmitted as data through multiplex modulation, thereby permitting the radio listeners to select program contents of their preference on the basis of the data demodulated is at the receiver.

With this radio data system, a subcarrier of 57KHz, which resides outside the band occupied by the FM modulation signal and which is the third harmonic of a 19 KHz stereo pilot signal, is amplitude modulated by a data signal which is filtered and biphase-coded, representative of the program contents to thereby provide radio data signals. A main carrier wave is frequency modulated by this amplitude modulated subcarrier, and then the main carrier is broadcast.

As apparent from Fig. 3, a base band coding struture of the radio data signal consists of 104 bits to form one group and is multiplex transmitted in a repeated manner. one group consists of four blocksp each including 26 bits, and each block consists of a 16 bit information word and a 10-bit checkword. In Fig. 4, block 1 is assigned a program identity code (PI), block 2 a traffic program identity code (TI), block 3 a station frequency (AF) of a network station which is broadcasting the same program as the station currently being received and 4 program service name information data (PS) such as 90/3176/01 2 station name or network name. Each group is distinguished by 4 bits into 16 types, i.e. type 0 to type 15 differing in contents. Furthert two versions, version A and version B are defined with respect to respective types (0 to 15). These identification codes are located in block 2. The station frequency code of the network stations (referred to as AF hereafter) is arranged to be transmitted only by type 0. group A. In this mannery the radio data of the type Or group A contains AF data of the network stations which are broadcasting the same program as the station currently being received. When the broadcast wave is received, the AF data obtained by demodulating the broadcast wave is read and is then stored. when the receiving sensitivity of the station currently being received has become poor due to disturbances such as decreasing signal strength, another network station can be selected instead on the basis of the AF data of the network stations stored previously, thereby always permitting the radio listeners to listen to the same program with a good receiving condition free from disturbances.

Where a plurality of such RDS broadcasting 25 stations exist, it is desirable if a receiver can be tuned quickly to a station of a network which is broadcasting a program different from theprogram currently being received, and an object of the present invention is to provide such a method.

With a mobile receiver carried on vehiclesr there are occasions in which, when the receiver is switched on. the receiving condition of the signal.

being received immediately before it was switched off, has degraded as compared to the condition immediately before the receiver was switched off.

However, receiving one RDS braodcast can provide the AF data of stations in a network which is 3 broadcasting the same program. It would be advantageous if a station of another network, which is broadcasting the same program as that of the station which was being received immediately before the receiver was switched off. can be received with a good receiving condition by effectively utilising the AP data when the receiver is switched on again.

A further object of the invention is to provide an RDS sweep receiver which can select an RDS broadcasting station quickly.

Now, when the signal strength of the broadcast currently being received has decreased with some AF data having been stored previously, stations of other networks can be selected instead as described above.

When the signal strength of the broadcast wave currently being received has decreased with the AF data not having been stored yet, a network station is selected on the basis of the AF data obtained from the broadcast wave currently being received.

However, if a network station is to be received on the basis of the AF data of the broadcast wave currently being received, poor receiving conditions resulting from decreasing signal level of the station currently received may possibly cause erroneous data correction, in which case the system reads erroneously corrected data. Also, it is not only AF data, but also other radio data that varies with time. Such data should be read every time it varies, in which case the system may also possibly read erroneously corrected data due to degraded receiving conditions resulting from decrease of signal level currently being received.

Moreover. a receiver may be provided with a preset station selection function in which the receiving frequency of a broadcast selected by frequency-sweeping is stored as data in a memory, the stored data is read from the memory through a simple 90/3176/01 4 operation i.e., pushing a button, and then a receiving frequency is autopreset in accordance with the frequency data. In a sweep receiver, sweeping is terminated when the received signal is at a level higher than a search stop level so that the sweep is not terminated at a frequency where no broadcast exists, owing to noise disturbances. Some receivers can arbitrarily adjust their search levels to receive only stations which are received in a stable receiving condition. However, if such a search level is not properly set, problems such as unacceptable reception of a desired broadcast wave may be encountered. Thust an easy setting of the search stop level is preferred.

is According to the present invention, there is provided a method of controlling an RDS receiver which comprises the steps of:

sampling the data signal from an RDS broadcast wave received; reading program identification information and then holding the program identification information; initiating a sweep of receiving-frequency across an RDS broadcast frequency band when a sweep mode is specified; comparing, when an RDS broadcast wave is received during the sweep of the receiving-frequency, the newly read program identification information with program identification information which has been read previously; and terminating the sweep of the receiving-frequency only when the program identification information is not identical.

The invention also includes an RDS receiver which includes apparatus for carrying out this method.

Preferably, in an RDS receiver which is provided with a memory in which frequency data for stations of the same network is storedy the method includes the steps of:

90/3176/01 receiving, when the receiver is switched on, the frequency which had been received until immediately before the receiver was switched off, if a same-station-track command is given; reading. selectively from a memoryr the frequency data which belong to the same network but differ in data value to the previously received frequency, every time the receiving signal level is detected to be less than a predetermined level for a predetermined period of time; switching the receiving-frequency to the frequency indicated by frequency data which is read from the memory; continuing to receive the receiving-frequency if the signal level thereof is higher than a predetermined level; and reverting to receiving the previous broadcast frequency if the signal level received is less than the predetermined level.

Additionally, an RDS receiver which in accordance with the invention may include: a demodulation means for reproducing the data signals from an RDS broadcast wave received and outputting data in sychronism with the data signals; a frequency adjusting means for causing a search for a signal across a broadcast frequency band when a sweep mode is specified; means for producing a station-detection signal by detecting that the receiving-signal has a level higher than a predetermined level; means for producing a synchronism-detection signal when synchronism is established with data signals in the demodulation means; and means for terminating the sweep of the frequency adjusting means in response to the station detection signal and the synchronism detection signal being obtained during a sweep period of the frequency adjusting means.

90/3176/01 6 A further object of the invention is to provide an RDS receiver with which the radio listeners can easily check whether or not the station currently being received is a radio data transmitting station.

Preferably therefore, an RDS receiver according to the present invention includes:

a display element which can display characters; means for detecting the signal strength of a broadcast currently being received; data extracting means for extracting data from the broadcast currently being received; and a display and control means for displaying on the display element the frequency of the broadcast wave currently being received when a data signal is not extracted by the data extracting meanst and for displaying on the display element a program service name when a data signal is extracted by the data extracting means; wherein the display and control means displays the frequency of the broadcast currently being received on the display element, even when a data signal has been extracted by the data extracting means, if the signal strength is less than a predetermined level for a predetermined period of time.

The RDS receiver of the invention can also preferably prevent readout of erroneously corrected data due to poor receiving condition when the signal strength of the currently received broadcast decreases. To this end therefore, data control apparatus in an RDS receiver according to the present invention is so arranged that the level detection circuit provides a first detection signal when a signal level of the broadcast wave currently being received is less than a first set levelr and a second detection signal when a signal level of the broadcast wave currently being received is higher than the first set level but less than a second set level, 7 respectively; and the reading of data is inhibitted when the first detection signal is output, and error correction is inhibitted and only error detection is effected when the second detection signal is output.

Occasionally, a diversity receiver is used as a receiver for receiving RDS broadcasts. A diversity receiver is usually arranged in such a way that one of signals from a plurality of antennas is selected by means of switches so as to obtain a field strength higher than a predetermined level in a selected frequency. However, in the case where a data signal is to be read from a received broadcast wave by means of such a diversity receiver, the following problems are encountered. That is. switching noise when operating the antenna switches may be present in the data. In addition, since it is necessary to establish synchronisation after switching the antennas for reading the data, the data may be read erroneously when switching the antennas.

Thus, a further object of the present invention is to provide a diversity receiver in which erroneous data-reading is prevented. Thus the receiver of the invention may include:

an antenna switch for selectively outputting one of a number of received signals through a plurality of antennas; a switch control means for deciding which of the antenna switches should be closed for an incoming signal in accordance with the field strength of a station which is output from one of the switches; read means for sampling and reading the data signals from a broadcast currently being received; and means for generating a data-reading signal indicating that the data signals are being read; wherein the switch control means inhibits switching of the antenna switches in response to the data-reading signal.

90/3176/01 8 Preferably, the method and apparatus of the present invention can easily set a search stop level for terminating frequency sweep. To do this, the method comprises the steps of:

writing, when preset mode has been specified, to memory. frequency data of a frequency currently being receivedr the frequency data being obtained from a station selection means in response to operation of a preset channel button; selecting, when station selection mode is specified, a station by means of a station selection means to which one of the frequency data elements is input from the memory; and determining a search stop level in a search mode in accordance with the operation of the preset channel button.

An example of the method and apparatus of the present invention will now be described in greater detail with reference to the accompanying drawings in which:- Fig. 1 is a block diagram showing an arrangement of an RDS receiver to which a control method according to the present invention is applied; Fig. 2 is a flow diagram showing the operation of a processor in a controller of the receiver in Fig. 1; Fig. 3 is a diagram showing the structure of a base band coding of a radio data signal; Fig. 4 is a diagram showing the format of a type 0, group A signal; Fig. 5 is a flow chart illustrating a further operation carried out by the processor within a controller of the receiver shown in Fig. 1; Fig. 6 is a further flow chart for illustrating the sweep operation of the processor in a controller within a receiver as shown in Fig. 1; 90/3176/01 9 c Fig. 7 is a top view of the display element of the receiver shown in Fig. 1; Fig. 8 is a flow diagram showing the further operation of a processor in a controller in the receiver shown in Fig. 1; and, Fig. 9 is a flow diagram showing the operation of the processor to set a search stop level.

Fig. 1A shows a general fundamental arrangement of a receiver (in this example a diversity receiver) for receiving FM multiplex broadcasts. with this receivery two antennas la and lb may be coupledr outputs of the antennas la and lb being supplied to a switch 29 which selectively relays either the output of antenna la or the output of antenna lb to a front end 2. An antenna switching signal is supplied from a switch control circuit 28 which will be described laterr the switch 29 selecting the antenna lb if the antenna la has been selected, and selecting the antenna la if the antenna lb has been selected.

A desired station can be selected at a front end 2 from FM multiplex broadcasts received by an antenna 1 and then converted into an intermediate frequency (IF). The front end 2 supplys a local oscillator signal to a mixer 2b from a PLL synthesizer system which employs a PLL circuit 2a including a programmable frequency divider, the division ratio of which is controlled by a controller 14 (which will be described later), thereby effecting the operation of station selection. The intermediate frequency is supplied to an FM detector 4 through an IF amplifier 3. The detected output of the FM detector 4 is supplied to a MPL (multiplex) demodulator circuit 5 to produce audio signals separated into L (left) channel and R (right) channel. The detected output of. the FM detector 4 passes through a filter 6, and a radio data signal or a subcarrier of 57 KHz which is amplitude modulated 90/3176/01 by biphase coded data signals is sampled and then demodulated in a PLL circuit 7. The demodulated output is supplied to a digital D-PLL circuit 8 and a decoder 9. The D-PLL circuit 8 produces a clock for data demodulation on the basis of the demodulated output of the PLL circuit 7. The clock thus produced is supplied to a gate circuit 10. A lock detector circuit 11 detects that the D-PLL circuit 8 has been locked on, and generates a lock detection signal which is supplied to the gate circuit 10 causing it to open. Also, the lock detection signal is supplied to an AND circuit 17 as a synchronism detection signal indicating that synchronised demodulated data is obtained. The data signal which is a biphase coded output from the PLL circuit 7 is decoded in synchronism with the clock produced in the D-PLL circuit 8.

The output data of the decoder 9 is a group having 104 bits which consists of four 26-bit blocks as shown in Fig. 4, and is supplied sequentially to a group/block synchronism/error detection circuit 12. In the circuit 12, block synchronism with groupis effected on the basis of 10-bit offset words assigned to 10-bit checkwords of respective blocks, respectively, while at the same time error detection of a 16-bit information word is effected on the basis of the checkword. The error-detected data is subsequently corrected in an error correction circuit 13 and is supplied to the controller 14.

The controller 14 includes a microcomputer,, which reads the code information of the respective blocks in the radio data or radio data information (the aforementioned PI code, AF data, PS data etc.) associated with the program currently being received, the information being radio data which is input to the controller 14 sequentially group by group, and stores the information in a memory 15. The 90/3176/01 11 information includes a list of AF data fl, f2...... fn Of stations of the same network as thestation currently received. The controller 14 controls, on the basis of a sweep station selection command from a sweep mode button 23 of an operation unit 16. the receiving-frequency data for determining the division ratio of the programmable divider (not shown) of the PLL circuit 2a which is a part of the front end 2, thereby effecting selection of a station. The value of receiving-frequency data is the count value of a counter, for example. Meanwhile a station detection circuit 20 outputs a station detection signal when the IF amplifier 3 detects a IF level higher than a predetermined level, the AND gate 17 in which it is ANDed with the output of the lock detection circuit 11, the output of which is supplied to the controller 14. In addition. the memory 15 consists of a non-volatile RAM into which data such as P1 codes. and AF data is a program and data are receiving-frequency data, input and a ROM into which stored in advance. The operation unit 16 is provided with operation buttons such as an RDS receiving command button 24y preset channel buttons 25p 01" to "6", a preset mode button 30 and a level setting button 31, in addition to the aforementioned sweep mode button 23. With RDS receivers of such an arrangement. operating the sweep mode button 23 of the operation unit 16 effects a sweep mode. 30 The control procedure carried out by the processor.. in the controller 14 will now be described with reference to a flow chart shown in Fig. 2.

The sweep mode is initiated when the processor detects that the sweep mode button 23 of the operating unit 16 is operated. The processor causes a change in the receiving-frequency data supplied from the controller 14 to the PLL circuit 2a in the 11 90/3176/01 12 front end 2 (step 51), and the processor makes a decision based on whether or not the station detection signal is output (step 52). A change in the receiving-frequency data causes the division ratio of the divider of the PLL circuit 2a to be changed by a predetermined step size, thereby increasing the receiving-frequency, for example by 100 KHz. If a broadcast wave is not received at this new receiving-frequencyr the station detection signal is not output; therefore a decision is made based on whether or not a. predetermined amount of time has elapsed since the change of receivingfrequency data (step 53). If a predetermined amount of time has elapsedr then the processor reverts to step 51 and again causes a change in receiving-frequency. Thus. in the case where a broadcast is not received, the receiving-frequency shifts by a step of, for example 100 KHz at a predetermined interval. This predetermined interval is the time slightly longer than the time required for the station detection signal to be output after the receiving-frequency data is changed, provided that a broadcast is received.

If a new broadcast is received, then the IF signal level is higher than the predetermined level and the station detection circuit 20 outputs the station detection signal. If the station detection signal is output, the processor reads the data supplied from the error correction circuit 13 (step 54), and makes a decision based on whether or not the data is actually input (step 55). If data is not input, then it means that the received broadcast is not an RDS broadcast and the processor reverts to step 51.

If data is received. then the processor reads a PI code from the input data (step 56). Then the processor reads the PI code of an RDS broadcast which 13 was written in the memory 15 before the sweep mode is initialled (step 57), and makes a decision based on whether or not these two PI codes are coincident. If the PI codes are coincident, then it means that the receiver received a station of a network which contains the RDS broadcasting that had been received before the sweep mode was initiated; therefore the processor reverts to step 51. Meanwhilei if the PI codes are not coindicent. then it means that the receiver received a station of a network which does not contain the RDS broadcast that had been received before the sweep mode was initiated and therefore the current receiving-frequency data is held (step 59) to terminate the sweep mode. After the sweep mode is terminated, the PI code and PS code etc. are written into the memory 15.

Additionally, the method may be arranged in such a way that as soon as the sweep mode is initiated, a PI code is read from the memory 15 for storing temporarily in a memory such as a buffer or a register in the controller 14 and the input data such as PI code and PS code are written into the memory 15 as soon as an RDS broadcasting is received.

With a method of controlling an RDS receiver as thus far described, since the sweep operation of receiving-frequencies is terminated only when the program code obtained from an RDS broadcast which is acquired through sweep operation is different from the program code immediately before the sweep operation is initiated. an RDS broadcast station of a network which does not contain the RDS broadcast that had been received can be selected quickly so that a different program can be heard.

A further control procedure which may be carried out by the processor of the controller 14, will now be described with reference to the flow chart shown in Fig. 5.

90/3176/01 14 The processor carries out the same-program-track routine with a predetermined interval. In this same-program-track routine, a decision is made based on whether or not a flag F is equal to 1 (step 151). The flag F is initially set to 0 when power is on. If F=Oy then a decision is made based on whether or not it is immediately after the receiver is switched on (step 152). If it is immediately after the receiver is switched on, then the frequency data of a station which was being received immediately before the receiver was switched off is read from the memory 15 and is loaded into the frequency divider of the PLL circuit 2a (step 153).

Consequently. the same broadcast (of a frequency f& is again received. Then a decision is made based on whether or not a same-program-track button (not shown) of the operation unit 16 has been operated (step 154). On the other hand, if it is not immediately after the receiver is switched on, then the processor carries out step 154 immediately.

In step 154p if the same-program-track button has been operated, then the same-program-track command is output and the operation of the same-program-track button is registered in an associated register within the processor by means of an interrupt. If the same-program-track button has not been operated, this routine completes. On the other hand. if it is confirmed that the same-program-track button is operated. then the flag F is set to 1 (step 155) and then a decision is made from the output of the station detection circuit 20 based on whether or not the received signal level Vs of the broadcast wave of the frequency fD is less than a first set level V1 (step 156). If it is decided that F=1 in step 151, then it means that the same-program-track operation is initiated; thus the processor proceeds to step 156.

90/3176/01 If the received signal level Vs is less than the first set level V1r then a decision is made based on whether or not the received signal level Vs is higher than the second set level V2, which is a lower value than the first set level V1 (step 157). If V12:Vs2V2p then a decision is made based on whether or not this value of Vs has lasted longer than a predetermined period of time. (step 158). if VS does not satisfy the inequality V12Vs>-V2 for a period longer than the predetermined period of time _t-, then the processor reverts to step 156. However, if the relation, V12VS2W has lasted longer than a predetermined period of time, t-, then AF data, fAF is read out of fl, f2r fn in the AF data list which is written into the memory 15 and is loaded into the divider of the PLL circuit 2a (step 159), thereby changing the receiving-frequency to a frequency of another station in the same network.

A decision is then made based on whether the signal level of the new receiving-frequency is less than or equal to the first set level V1 (step 160). If the received signal level is higher than the first set level V1. then the receiving-frequency data in the memory 15 is renewed by replacing it by AF data. fAF to continue receiving the signal Of fAF (step 161), thereby completing this routine. Thus the frequency indicated by the AF data will now be the new receiving-frequency, fD and the same-program-track operation is effected when ' this routine is carried out next time. In this case,, AF data is also read to rewrite the list of AF data fl.

f2 fn in the memory 15.

If the receiving signal level Vs is less than the first set level V1, the processor reads the receiving-frequency data from the memory 15 for loading the divider of the PLL circuit 2a to revert to reception of the broadcast of the original 90/3176/01 16 frequency fD (step 162). meanwhile. if VsW1 at step 156. a decision is made based on whether or not the receiving condition (i.e. VsW1) has lasted longer than the predetermined period of time (step 163). if the receiving conditiony VsW1 has not lasted longer than the predetermined period of time t- yet. then the processor reverts to step 156; if the receiving condition, VsW1 has already lasted longer than the predetermined period of time t-, then the flag F is reset to 0 (step 164) thereby completing this routine.

Meanwhile. if VsM at step 157. a decision is made based on whether or not the receiving condition (i.e., VsW2) has lasted longer than the predetemined period of time -t- (step 165). If the receiving condition,, Vs<V2 has not lasted longer than the predetermined period of time _t- yet. then the processor reverts to step 157; if the receiving condition, Vs<V2 has already lasted longer than the predetermined period of time h., then the flag F is reset to 0 (step 64) thereby completing this routine.

Therefore. in the case where the same-program-track button is operated shortly after the receiver is switched on or the same-program-track mode still remains specified regardless of whether the receiver is switched on or off, the receiving-frequency will be the frequency fD which was received immediately before the receiver was switched off. If the received signal level Vs of this frequency fD decreases to a level less than the first set level V1 but higher than the second set level V2 for the predetermined period of time _t-, then AF data indicative of frequency fl is read from the list of AF data. fl,f2 fn of the same network stored in the memory 15, for loading into the frequency divider of the PLL circuit 2a to change the receiving-frequency to the frequency fl of another station in the same network. In the case where the 90/3176/01 17 receivedsignal level Vs of this new frequency fl is higher than the first level VlF then the receiver continues receiving this frequency fl. However, in the case where the received signal level Vs is less than the first set level VlF then the processor reverts to receiving the broadcast of the previous frequency fD. If the received signal level Vs at the frequency fD remains low in a range less than the first set level V1. but higher than the second level V2 for the predetermined period of time t., then AF data indicative of frequency f2 is read from the list of AF data. f1J2 fn to load the frequency divider of the PLL circuit 2a. That is. if the received signal level of the frequency fD remains low in the range less than the first set level V1 but higher than the second set level V2, the receiving-frequency will change in the order Of fD -5 fl -> f2..., and will continue changing until a broadcast whose received signal level Vs is higher than the first set level V1, is detected from stations in a network to which the frequency fD belongs. Similarlyr when the receiver is on, operating the same-program- track button will set the flag F to 1 to initiate the same-program-track operation.

While the receiving-frequency is changing on the basis of the frequencies in the AF data list, if the received signal Vs at the frequency fD increases to a level higher than the first set level V1 and lasts for a period longer than the predetermined period of time t., then the flag F is set to 0. thus the same-program-track operation is inhibited so that the receiving-frequency remains at fD Additionally, while the receiving-frequency is changing on the basis of the frequencies in the AP data list. if the received signal level Vs at the frequency fD decreases to a level less than the 90/3176/01 18 second set level V2 and lasts for a period longer than the predetermined period of time t.r the flag F is set to 0; thus, the same-program-track operation is inhibitted so that the receiving-frequency remains at fD.

As described above. if the same-program-track button is operated again with the same-program-track operation being inhibitted. the flag F is set to 1 so as to resume the same-program-track operation.

In additiont in the case where a broadcast is not acquired with. a signal level higher than the first set level V1 at the frequencies fl to fnr the flag F is set to 0 at step 159 to complete this routiney whereby the receiver continues receiving at frequency fD. Also during the received-frequency changes from the frequency fD to a frequency in the AF data list, a mute circuit, not shown, operates to shut off the audio signal; however, the receiver is demuted if a broadcasting wave whose received signal level Vs is higher than the first set level V1 is detected.

The duration time of the received signal level Vs in step 158, 63. and 165 are all assumed to be an identical predetermined period of time Jt-, but these times may take different values. Further, with the embodiment thus far describedr AP data is obtained from the RDS broadcast wave currently being received to store the, frequency data of the same network stations in the memory. but the frequency data of the same network stations which can be received may also be stored in the memory in advance.

Thus. when the receiver is switched on. it receives the broadcast which had been received until just before the receiver was switched off if the same-program-track command has been commanded.

1 90/3176/01 19 When the receiving condition of the broadcast currently being received becomes poor, the current receiving-frequency is replaced by frequency data stored in the memory; if the received signal level of this new receiving-frequency is higher than the predetermined level, then the receiver continues receiving this new frequency; if the received signal level of this new receiving-frequency is detected to be less than the predetermined level for a period longer than the predetermined period of timep then the receiver reverts to receiving the previous frequency; and if the received signal level of this previous frequency is still less than the predetermined level, then another frequency data element stored in the memory is read to replace the frequency currently being received.

Thus the frequency data is selectively read from the memory element after element every time the received signal level of the frequency currently received is detected to be less than the predetermined level for a period longer than the predetermined period of time. Therefore even if the receiving condition of the station which is received shortly after the receiver is switched on, is poor, it is still possible for the radio listeners to listen to programmes of the same network with a good receiving condition by first receiving the frequency which had been received until immediately before the receiver was switched off, then switching to the other stations of that network.

The sweep mode operation of Figure 6 will now be described.

The sweep mode illustrated by the flow chart of Fig. 6 is a modification or is additional to that of Fig. 2. The processor first causes a predetermined amount of change in receiving-frequency data which is supplied to the PLL circuit 2a in the front end 2 90/3176/01 from the controller 14 (step 251). At this time. a decision is made based on whether or not the RDS broadcast receiving has been commanded by the RDS receiving command button 24 (step 252). If RDS broadcasting receiving has not been commanded. then a decision is made based on whether or not the station detection signal has been output from the station detection circuit 20 (step 253). A change in receiving-frequency data causes the division ratio of the divider of the PLL circuit 2a by a predetermined step size, thereby increasing the receiving-frequency. for example by 100 KHz. If a broadcast is not received at this new receiving frequency, the station detection signal is not output; therefore a decision is made based on whether or not a predetermined amount of time has elapsed since change of receiving-frequency data was effected (step 254). If a predetermined amount of time has elapsed, then the processor reverts to step 251 and again causes a change in receiving-frequency. Thus, as before. in the case where broadcasts are not received, the receiving-frequency shifts by a step of, for example, 100 KHz with a predetermined interval. This predetermined interval is the time slightly longer than the time required for the station detection signal to be output after the receiving-frequency data is changed. If a new broadcast is received, then the IF signal level is higher than the predetermined level and the station detection circuit- 20 outputs thestation detec tion signal. The value of the receiving-frequency data is maintained in response to the station detection signal (step 257) to complete the sweep operation).

When the station detection signal and the synchronism detection signal are supplied simultaneously to the AND circuit 17, the output level of the AND circuit 17 turns from low level to 90/3176/01 21 high level, which is supplied as a sweep terminating signal to the controller 14. The processor in the controller 14 makes a decision based on whether or not the sweep terminating signal is output while the receiver is ready for receiving the RDS broadcasting (step 255). If the sweep terminating signal has been outputt the processor shifts to step 257 for maintaining the value of the receiving-frequency data to cause termination of the sweep operation. In the case where only the station detection is output but not the synchronism detection signal, the processor proceeds to step 256 since the output of the AND circuit is low level. Then, after a predetermined intervalp the content of the receiving-frequency data changes for causing the receiving-frequency to change.

The synchronism with the data signal in the data demodulating means is detected from the fact that the D-PLL circuit 8 is locked up. Howevert the embodiment is only exemplary and the detection can be effected from the group/block synchronism established in the group/block synchronism/error detection circuit 12.

Connected to the controller 14 through a drive circuit 21 is a matrix display element 22 capable of displaying eight characters including alphanumeric characters. Fig. 7 shows the appearance of the display element 22. The character pattern data which will be displayed on the display element 22, is written into a ROM 26 previously. The controller 14 reads the character pattern data of letters to be displayed from the ROM 26 and loads the data into a buffer (not shown) in the drive circuit 21 for displaying the letters on the display element 22.

The procedure carried out by controller 14 for controlling the display of information on the display 22 will now be described with reference to the flow chart in Fig. 8. The processor first makesa 90/3176/01 22 decision based on whether or not a radio data broadcast is being received (step 351). If the receiver is receiving a station which is not broadcasting the radio data. then the processor carries out a frequency display subroutine for displaying the frequency of this station on the display element 22 (step 352). In the frequency display subroutine, the processor reads the frequency data of the station currently being received which has been stored in the RAM 151 and also reads character patterns corresponding to this frequency from the ROM 26r then supplies the character patterns to the drive circuit 21.

On the other hand, when a radio data broadcasting station is being received, a decision is made based on whether or not a flag F is 1 (step 353),, and if F=Op then a PS subroutine is executed to display PS data on the display element 22 (step 354). The PS subroutine reads the PS data which has been written in the RAM 15, then reads character patterns corresponding to the PS data from the ROM 26 to supply them to the drive circuit 18. Thus a program service name, for example nNHK-FMn will appear on the display element 22. The flag F is initially set to 0 when power is switched on. When F=1 in step 353 or after step 354r a decision is made on the basis of the output of level detection circuit 20 whether or not the signal strength currently being received has decreased to a -level less than the predetermined level (step 355). If the signal strength has decreased below the predetermined level. then a decision is made based on whether or not this receiving condition has lasted for a predetermined period of time (step 356), where the predetermined period of time is the time required for a search of AF data within the memory to make one complete cycle. If the signal strengh is higher than the 90/3176/01 23 predetermined level, then the flag F is reset to 0 (step 357), and then the PS display will appear on the display if the signal strength is higher than the predetermined level at next process cycle. Also if the signal strength is less than the predetermined level, but does not last longer than the predetermined period of time, the PS display will remain on the display. However if the signal strength continues to.be less than the predetermined level for the predetermined period of time, then the flag F is set to 1 (step 358) and the procedure proceeds to step 352 to display the frequency currently being received on the display element 22.

Repeating the steps thus far described causes the PS display to appear on the display element 22 when receiving a radio data broadcast, and causes the receiving-frequency to appear on the display element 22 when receiving a broadcast not having radio data or not receiving any programme. However, when the - 20 field strength of the signal currently being received not only decreases to less t han the predetermined level. but also lasts longer than the predetermined period of time while the PS display is being displayed. the display will be switched to the frequency.

Thus radio listeners can confirm that the station is a radio data transmitting station. In addition, a single display element can effectively be used to perform the dual functions of displaying a receiving-frequency and of displaying PS data. Also, when the field strength of the signal currently being received continues to be less than the predetermined level during reception of a radio data broadcasty the display is switched from the PS data display to receiving-frequency display, thereby warning the radio listener of degradation of receiving condition.

90/3176/01 24 The level detection circuit 20 has a first set level and a second set level higher than the first set level in accordance with the signal level of the broadcast being received. The level detection circuit 20 provides a first detection signal when the IF signal level is less than a first set levely and a second detection signal when the IF level is higher than the first set level but less than the second set level. respectively and supplies the first or second detection signal to the controller 14. The controller 14 causes a switch circuit 27 to open when the first detection signal is outputy and causes the switch circuit 27 to close and inhibits error correction in the error correction circuit 13 when the second detection signal is output.

Thus when the first detection signal is output i.e.i when the signal strength of the broadcast currently being received has decreased considerably, supply of the demodulated data and the clock to the group/block synchronism/error detection circuit 12 are stopped; therefore the controller 14 is not allowed to read data. on the other hand, when the second detection signal is output. i.e., when the signal strength of the broadcasting wave currently being received has decreased by some amountr error correction is inhibited and only error detection is effected. thus the data in which an error is detected is either read as it is or disposed depending on the content. When the IF level exceeds the second set level, the sensitivity is good and thus both error detection and error correction are carried out to supply the controller 14 with only the data which is corrected properly. In this manner, if the signal strength of the broadcasting wave currently being received has decreased extremely, it is possibler by inhibiting the controller from data-reading, to prevent the controller from reading data which would 90/3176/01 have been improperly corrected if proper error correction is not effected due to poor receiving conditions caused by decreasing signal strength. If the signal strength of the broadcast wave currently being received has decreased by some amount, by inhibiting error correction and effecting only error detection, it is possible to read. depending on the content# data which has been error-detected and to prevent erroneous correction of data.

Thus reading of the radio data is inhibitted by not supplying the group/block/synchronism/error detection circuit 12 with the demodulated data and the clock.

The controller 14 also outputs a data reading signal through a preassigned output port, when it is reading the data from the error correction circuit 13. The data reading signal is supplied to the switch control circuit 28. The switch control circuit 28 receives the intermediate frequency signal level obtained at the IF amplifier 3 to take an average value of the level while also supplying the antenna switching signal to the switch29 when an intermediate frequency signal level becomes lower than the average value.

As shown in Fig. 1B, the switch control circuit 28 consists of an average detection circuit 121 for obtaining an average value of the intermediate frequency signal levelf a comparison circuit 122 which turns from low level to high level when the intermediate frequency signal level is below the average value obtained from the average value detection circuit 121, a switch 123 which is connected to the output of the comparison circuit 122 and is normally closed, and a signal generating circuit 124 for generating the antenna switching signal of a predetermined time duration when the high level output of the comparison circuit 122 is 90/3176/01 26 supplied through the switch 123. The switch 123 becomes "off" in response to the data reading signal from the controller 14.

In a diversity receiver thus arrangedr when the intermediate frequency level is below the average valuer the output level of the comparison circuit 123 becomes high level, which high level is supplied to the signal generating circuit 124 through the switch 123. The signal generating circuit 124 generates the antenna switch signal in response to this high levelr and supplies the antenna switch signal to the switch 29. If the switch 29 has selected the antenna lay then it selects the antenna lb instead in response to the antenna switch signal, if the switch 29 has selected the antenna lb. then it selects the the antenna la instead in response to the antenna switch signal.

Meanwhile, the controller 14 reads radio data supplied from the error correction circuit 13 in response to the command from the operation unit 16 or a command resulting from signal processing by the program. While the controller 14 is reading the radio data, it generates the data reading signal which is supplied to the switch which is supplied to the switch 123.

Thus the switch 123 becomes off. at which time the intermediate frequency signal is below the average, and therefore the switch 123 in off state does not allow the signal generating circuit 124 to generate the antenna switch signal even when the output of the comparison circuit 123 becomes high level. Thereby the switches remain unoperated during the time when radio data is being ready permitting continuous radio broadcasting reception through an antenna (either la or lb) selected immediately before reading the radio data.

A 90/3176/01 2 7 1 The processor can also be operated to set a search stop level for terminating frequency sweep as will now be described with reference to the flow chart in Fig. 9.

The processor makes a decision based on whether or not the operation is in a preset mode (step 451). In the preset mode, operating the preset mode button 30 initiates a preset subroutine (step 452). In the preset subroutine, when one of the preset channel buttons 25 "l" to "C is operated. the current receiving frequency data is written into a memory location in the memory 15 corresponding to the operated one of the preset channel buttons 25. If the operation is not in the preset mode. then a 15 decision is made based on whether or not it is a station selection mode (step 453). when the station selection mode is entered by operating one of the preset channel buttons 25. "ln to n6", the processor carries out the station selection subroutine (step 20 454). In the station selection subroutine, a decision is made based on which of the preset channel buttons 25. ul" to nC is operated. Display data is supplied to the drive circuit 21 for causing the display element 22 to display the 25 channel number corresponding to the operated one of the preset channel buttons 25. Then receiving frequency data is read from the memory location or address in the memory 15 corresponding to the operated one of the preset channel buttons 25 to supply the receiving frequency data to the divider of the PLL 2a. If the operation is not in the station selection mode, then a decision is made based on whether or not it is a level setting mode (step 455). The channel number indicative of the current search stop level Vr is read from the memory 15 when the level setting mode is entered by operating the level setting mode button 31r and display data is 90/3176/01 28 supplied to the drive circuit 21 for displaying the channel number on the display element 22 (step 456). The drive 21 drives the display element 22 to display the channel number in accordance with the display data. The search stop level Vr is set to one of six predetermined values, as is described latery and which are equated to channel numbers 1 to 6 for easy reading of the search stop level Vr.

Then a decision is made based on which of the preset channel buttons wlw to N6w was operated (steps 457 to 462). If the preset channel button '1 is operatedr then the search stop level Vr is set to a first predetermined value V1 (step 463). Similarly, if the preset channel button n21 is operated, then the search stop level Vr is set to a second predetermined value V2 (step 464); and so on up to step 468 for the sixth predetermined level V6. The search stop level Vr and the channel number are written in the memory 15 by operating these preset channel buttons. It is assumed that the levels are in the relation V1<V2M<V4<V5<V6.

Then the display data is supplied to the drive circuit 21 for the segment display element 22 to display the channel number corresponding to the preset channel button 25 operated (step 469). The display data supplied to the drive circuit 21 will appear on the display element 22, for example '5' if the preset channel button 25 n5" is operated. If none of the preset buttons 011 to w6n is operated or after display data is output in step 467r then a decision is made based on whether or not the level setting is completed (step 470). If a level setting button 31 or other mode button is operated, the level setting As regarded as being completed. If it is not in the level setting mode, then a decision is made based on whether or not it is in the search mode (step 471). When the search mode is entered upon a 90/3176/01 29 sweep command which is generated by operating the search mode button 23 of the operation unit 16, the processor executes the search subroutine (step 472). In the search subroutine mode, the processor causes a change in content of the receiving frequency data for the division ratio of the frequency divider to step by a unit step with a predetermined interval. After having caused the receiving frequency data to changer the processor makes- a decision based on whether or not the IF signal level VIF that is output from station detection circuit 20 is higherthan search stop level Vr; if the IF signal level higher than the search stop level Vr, then processor stops sweeping frequency. At this time, the preset mode button 30 is operated and further one of "l" to "6" of the preset channel buttons 25 the the is the if any is operated, then the current receiving frequency is written into the memory location in the memory 15 corresponding to the preset channel button 25 which is operated.

Additionally, if the search mode button 23 is again operated, then the processor repeats the aforementioned steps. Also, it is possible to stop sweeping every time the IF signal level VIF becomes higher than the search stop level Vr, then subsequently to write automatically in the memory 15 sequentially the frequency data at which the search stops.

If it is not in the search mode, the processor proceeds to other jobs such as increasing or decreasing the receiving frequency in response to the button operations, then reverts to step 451 to repeat the aforementioned operation.

The channel number appears on the display element 22 in accordance with the operation of the preset channel buttons 25, the embodiment is only exemplary and it may be arranged in such a way that which of the channels is operated is recognized by operation conditions such as position or location of the preset channel button 25 operated.

1 is 90/3176/01 31

Claims

CLAIMS 1. A method of controlling an RDS receiver, comprising the steps of: sampling the data signal from an RDS broadcast wave received; reading program identification information and then holding the program identification information; initiating a sweep of receiving-frequency across an RDS broadcast frequency band when a sweep mode is specified; comparing, when an RDS broadcast wave is received during the sweep of the receiving-frequency, the newly read program identification information with program identification information which has been read previously; and terminating the sweep of the receiving-frequency only when the program identification information is.not identical.

1

2. A method according to claim 1, in which the RDS receiver is provided with a memory in which frequency data for stations of the same network is stored, the method including the steps of: receiving, when the receiver is switched on, the frequency which had been received until immediately before the receiver was switched off. if a same-station-track command is given; reading, selectively from a memory. the frequency data which belong to the same network but differ in data value to the previously received frequency. every time the receiving signal level is detected to be less than a predetermined level for a predetermined period of time; switching the receiving-frequency to the frequency indicated by frequency data which is read from the memory; 90/3176/01 32 continuing to receive the receiving-frequency if the signal level thereof is higher than a predetermined level; and reverting to receiving the previous broadcast frequency if the signal level received is less than the predetermined level.

3. A method according to claim 1, which comprises the steps of: writing, when a preset mode has been specifiedr to memory frequency. data of a frequency currently being received# the frequency data being obtained from a station selection means in response to operation of a preset channel button; is selecting. when station selection mode is specified, a station by means of a station selection means to which one of the frequency data elements is input from the memory; and determining a search -stop level in a search mode in accordance with the operation of the preset channel button.

4. A method according to claim 1, substantially as described with reference to Figures 1 to 4 of the accompanying drawings.

5. A method according to claim 1, substantially as described with reference to Figures 1 to 4 and any of Figures 5 to 9 of the accompanying drawings.

6. An RDS radio receiver comprising:

means for samplingthe data signal from an RDS broadcast wave received; means for reading program identification information and then holding the program identification information; 1 33 means for initiating a sweep of receiving-frequency across an RDS broadcast frequency band when a sweep mode is specified; means for comparingi when an RDS broadcast wave is received during the sweep of the receiving-frequency, the newly read program identification information with program identification information which has been read previously; and means for terminating the sweep receiving-frequency only when the identification information is not identical.

of the program

7. An RDS radio receiver according to claim 6.

comprising:

means for causing the receiver, when it is switched on, to receive the frequency which had been received until immediately before the receiver was switched off, if a same-station-track command is given; means for reading, selectively from a memory.

the frequency data which belong to the same network but differ in data value to the previously received frequency, every time the receiving signal level is detected to be less than a predetermined level for a predetermined period of time; means for switching the receiving-frequency to the frequency indicated by frequency data which is read from the memory; means for causing the receiver to continue to receive the receiving-frequency if the signal level thereof is higher than a predetermined level; and means for causing the receiver revert to receiving the previous broadcast frequency if the signal level received is less than the predetermined level.

34

8. An RDS radio receiver according to claim 6 or claim 7, comprising:

a demodulation means for reproducing the data signals from an RDS broadcast wave received and outputting data in sychronism with the data signals; a frequency adjusting means for causing a search for a signal across a broadcast frequency band when a sweep mode is specified; means for producing a station-detection signal by detecting that the receiving-signal has a level higher than a predetermined level; means for producing a synchronism-detection signal when synchronism is established with data signals in the demodulation means; and means for terminating the sweep of the frequency adjusting means in response to the station detection signal and the synchronism detection signal being obtained during a sweep period of the frequency adjusting means.

9. An RDS radio receiver according to any of claims 6 to 8. comprising:

a display element which can display characters; means for detecting the signal strength of a broadcast currently being received; data extracting means for extracting data from the broadcast.currently being received; and a display and control means for displaying on the display element the frequency of the broadcast wave currently being received when a data signil is not extracted by the data extracting meansi and for displaying on the display element a program service name when a data signal is extracted by the data extracting means; wherein the display and control means displays the frequency of the broadcast currently being received on the display elementy even when a data signal has been extracted by the data extracting meanst if the signal strength is less than a predetermined level for a predetermined period of time.

10. An RDS radio receiver according to any of claims 6 to 91 comprising:

a level detection circuit which provides a first detection signal when a signal level of the broadcast wave currently being received is less than a first set level, and a second detection signal when a signal level of the broadcast wave currently being received is higher than the first set level but less than a second set level, respectively; means for inhibitting reading of data when the first detection signal is output; and means for inhibitting error correction and allowing error detection when the second detection signal is output.

11. An RDS radio receiver according to any of claims 6 to 10, comprising: an antenna switch for selectively outputting one of a number of received signals through a plurality of antennas; a switch control means for deciding which of the antenna switches should be closed for an incoming signal in accordance with the field strength of a station which is output from one of the switches; read means for sampling and reading the data signals from a broadcast currently being received; and means for generating a data-reading signal indicating that the data signals are being read; wherein the switch control means inhibits switching of the antenna switches in response to the data-reading signal.

90/3176/01 36

12. An RDS radio receiver according to anyof claims 6 to 11. comprising:

means for writingr when preset mode has been specified. to memory. frequency data of a frequency currently being received, the frequency data being obtained from a stationselection means in response to operation of a preset channel button; means for selecting. when station selection mode is specified. a station by means of a station selection means to which one of the frequency data elements is input from the memory; and means for determining a search stop level in a search mode in accordance with the operation of the preset channel button.

is

13. An RDS radio receiver according to claim 6, substantially as described with reference to Figures 1 to 4 of the accompanying drawings.

14. An RDS radio receiver according to claim 1. substantially as described with reference to Figures 1 to 4 and any of Figures 5 to 9 of the accompanying drawings.

Published 1988 at The Palent Offce Sza-e House ec- -- H_ -- L2nd= WC1P. 4TP Further ecr.,es m-m:, be obtairezi L-Orn The Patent Office Sales Branch. St Man. Cray. Orplngtcn. Kent BR5 3RD. Printed by MWtiplex teelimques ltd, St Mary Crky. Kent. Con. 187.