GB1238162A - - Google Patents

Info

Publication number
GB1238162A
GB1238162A GB1238162DA GB1238162A GB 1238162 A GB1238162 A GB 1238162A GB 1238162D A GB1238162D A GB 1238162DA GB 1238162 A GB1238162 A GB 1238162A
Authority
GB
United Kingdom
Prior art keywords
error
unit
data
notification
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1238162A publication Critical patent/GB1238162A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751Error or fault detection not based on redundancy
    • G06F11/0754Error or fault detection not based on redundancy by exceeding limits
    • G06F11/076Error or fault detection not based on redundancy by exceeding limits by exceeding a count or rate limit, e.g. word- or bit count limit
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177Initialisation or configuration control

Abstract

1,238,162. Data processing. INTERNATIONAL BUSINESS MACHINES CORP. 26 March, 1969, No. 15819/69. Heading G4A. In a data processing system, a data handling unit detects and counts errors in data handled thereby, the count being made available elsewhere in the system in response to a request signal. In a sytem with two processor units and two storage units, which is a modification of that of Specification 1,238,161, which is referred to, either processor unit can supply configuration data to the units to configure them into one or more subsystems, each unit then responding to signals from within the same subsystem only. On detection of an error, the error is corrected if possible, using an error-correcting code in a storage unit, and by instruction retry (up to a predetermined number), as in Specification 1,168,414, which is referred to, in a processor unit. Each unit counts its detected errors (including unsuccessful retries). If correction is not achieved as above, the processors are notified. The processors are also notified if correction is achieved, either every time (error counter non- zero) or when the error count is 16, according to two mode bits from the configuration data. The processor (assuming only one is configured to respond to the notification) interrupts its programme and reconfigures the system in response to the first sort of notification, e.g. to exclude the faulty unit. In response to the second sort of notification it interrupts its programme and requests stored error data (location of error, and optionally the error count) from the notifying unit and may respond to it by reconfiguring, or by changing the error-notification mode bits, or by continuing without change.
GB1238162D 1969-03-26 1969-03-26 Expired GB1238162A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1581969 1969-03-26

Publications (1)

Publication Number Publication Date
GB1238162A true GB1238162A (en) 1971-07-07

Family

ID=10066094

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1238162D Expired GB1238162A (en) 1969-03-26 1969-03-26

Country Status (4)

Country Link
JP (1) JPS4812652B1 (en)
DE (1) DE2014729C3 (en)
FR (1) FR2038876A5 (en)
GB (1) GB1238162A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4988436A (en) * 1972-12-01 1974-08-23
JPS49106745A (en) * 1973-01-22 1974-10-09
US4053751A (en) * 1976-04-28 1977-10-11 Bell Telephone Laboratories, Incorporated Adaptable exerciser for a memory system
US4251873A (en) * 1978-04-14 1981-02-17 Lucas Industries Limited Digital computing apparatus particularly for controlling a gas turbine engine

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60148548U (en) * 1984-03-15 1985-10-02 日立造船株式会社 Hot water generator in absorption chiller/heater

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4988436A (en) * 1972-12-01 1974-08-23
JPS5846800B2 (en) * 1972-12-01 1983-10-18 ハネイウエル インフオメ−シヨン システムス インコ−ポレ−テツド memory module
JPS49106745A (en) * 1973-01-22 1974-10-09
US4053751A (en) * 1976-04-28 1977-10-11 Bell Telephone Laboratories, Incorporated Adaptable exerciser for a memory system
US4251873A (en) * 1978-04-14 1981-02-17 Lucas Industries Limited Digital computing apparatus particularly for controlling a gas turbine engine

Also Published As

Publication number Publication date
DE2014729B2 (en) 1978-12-07
DE2014729C3 (en) 1979-08-23
FR2038876A5 (en) 1971-01-08
JPS4812652B1 (en) 1973-04-21
DE2014729A1 (en) 1970-10-15

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee