EP0645785A2 - Electronic circuitry - Google Patents

Abstract

An electronic circuit is proposed, in which resistors Ro...Rn+m connected in series with fuses Q0...Qn+m are provided, at least one fuse Q0...Qn+m being bridged by means of an additional resistor Rn+1', Rn+m'. The fuses Q0...Qn+m can be changed from a conducting state into a non-conducting state. This means that the admittance Ytotal of the electronic circuit can be set by means of specific blowing of individual fuses Q0...Qn+m. <IMAGE>

Description

State of the art

The invention relates to an electronic circuit according to the preamble of the main claim. It is already known to provide an electronic circuit in an integrated circuit which has a plurality of resistors connected in parallel, each of which is connected in series with a fuse, also known as the burning path, so that an adjustable resistance is achieved by deliberately blowing individual burning paths. This circuit can be used in particular where it is only possible to determine a specific resistance value when the complete integrated circuit has been completed. In order to be able to set resistance values in a wide range, very large resistance values are required for this electronic circuit, as a result of which the resistors occupy a correspondingly large space on the substrate with the integrated circuit. It is also known to design the electronic circuit as a series circuit of resistors with smaller resistance values, each of which is bridged with a firing path, but with an increased circuit complexity for the firing paths and their wiring.

Advantages of the invention

The electronic circuit according to the invention with the characterizing features of the main claim has the advantage that there is little circuitry for fuses and their wiring and at the same time small resistance values are sufficient to realize an adjustable resistor with great variability.

sowie des Zusatzwiderstands mit dem Wert ${\text{m x R}}_{\text{A}}{\text{- 1 / (1 / (2}}^{\text{k}}{\text{x R}}_{\text{D}}{\text{) + 1 / (m x R}}_{\text{A}}\text{))}$

und des Widerstands der parallel zu der zum Widerstand in Serie geschalteten Schmelzsicherung keinen Zusatzwiderstand aufweist mit dem Wert 2ⁱ x R_D bringt den Vorteil mit sich, daß durch diese Formeln eine einfache Realisierung der binären Stufen erfolgt ist. Die Auswahl der Anzahl der Zusatzwiderstände in dem Umfang, daß m x R_A ungefähr gleich dem Wert des Widerstands ist der parallel zu der zum Widerstand in Serie geschalteten Schmelzsicherung keinen Zusatzwiderstand aufweist und die höchste Nummer aufweist, dient der vorteilhaften Dimensionierung der Schaltung, dergestalt, daß ein optimales Verhältnis von Zusatzwiderständen zu den Widerständen erzielt ist, dergestalt, daß die Widerstandswerte der einzelnen Widerstände und Zusatzwiderstände dabei nahe beieinander liegen, wodurch derselbe Aufbau und ähnliche geometrische Maße für die Widerstände und Zusatzwiderstände wählbar sind, wodurch sich der Vorteil ergibt, daß die Widerstände und Zusatzwiderstände, wenn sie als integrierte Widerstände ausgeführt sind, ähnliches Verhalten bezüglich Spannungsmodulation, Temperaturabhängigkeit, piezoelektrischen Effekten aufweisen.Advantageous further developments and improvements of the electronic circuit specified in the main claim are possible through the measures listed in the subclaims. It is particularly advantageous to connect the fuses to a current or voltage source by means of switches, since the switch positions make it easy to program the fuses between the conductive and non-conductive states and only a single current or voltage source is required. It is further advantageous to design the switches as thyristors, since on the one hand they can also be integrated and on the other they are not exposed to any wear or aging effects. The control of the thyristors via outputs of a shift register has the advantage that only a single input for the serial input of the programming data bit pattern is provided for a parallel control of a large number of thyristors, so that in particular in the case of already assembled integrated circuits, only one pin for the Control of all thyristors is sufficient. The design of the electronic circuit as an integrated circuit offers the advantage of having additional circuits on one Semiconductor substrate to be integrated together, whereby the manufacturing effort is minimized. In addition, temperature-related effects, for example, can have an equal effect on the electronic circuit and the further circuits, whereby compensation can be achieved. The electronic circuit can be used in particular for ohmic resistors, since in particular the electronic circuit reduces the space problem and the behavior of the resistors is improved in comparison with one another. This behavior includes, in particular, dependencies on temperature effects and piezoelectric effects as well as a voltage modulation caused by the pretensioning of the substrate. It also proves to be an advantage if the resistances have different values, since different combinations of conductive and non-conductive fuses lead to different overall resistance values, which increases the variability of the electronic circuit. The formation of the resistors in the form of diffused resistors of different lengths and the same width and depth leads to the advantage that approximately the same exposure parameters can be selected for the resistors with regard to the photolithography used for the production, which results in advantages in terms of mask variety, lateral diffusion and layout. There is also the advantage that there are approximately the same contact resistances to the subsequent contacts. The dimensioning rule, in the form that the overall conductance of the electronic circuit, in which all fuses are in the conductive state, differs from the overall conductance of the electronic circuit, in which exactly one fuse is in the non-conductive state, by a power of two of a unit resistance value and that the exponent If the resistors are numbered from 0 to the number of resistors reduced by 1, this corresponds to the negated number of the resistor connected in series with exactly one non-conductive fuse, which has the advantage of being implemented of the binary system to the electronic circuit, so that between the lowest and the highest overall conductance without a gap, each stage of the overall conductance can be selected with a stage spacing of the unit conductance. The dimensioning of the resistance, which is connected in series with the fuse, which is connected in parallel with the additional resistor with the value ${\text{1 / (1 / (2nd}}^{\text{i}}{\text{x R}}_{\text{D}}{\text{) + 1 / (mx R}}_{\text{A}}\text{))}$

and the additional resistance with the value ${\text{mx R}}_{\text{A}}{\text{- 1 / (1 / (2nd}}^{\text{k}}{\text{x R}}_{\text{D}}{\text{) + 1 / (mx R}}_{\text{A}}\text{))}$

and the resistance of the fuse in parallel with the fuse connected in series with the resistor 2 ⁱ x R _D has the advantage that these formulas make it easy to implement the binary stages. The selection of the number of additional resistors to the extent that mx R _{A is} approximately equal to the value of the resistor which has no additional resistor parallel to the fuse connected in series with the resistor and has the highest number serves to advantageously dimension the circuit in such a way that An optimal ratio of additional resistors to the resistors is achieved in such a way that the resistance values of the individual resistors and additional resistors are close to each other, whereby the same structure and similar geometrical dimensions can be selected for the resistors and additional resistors, resulting in the advantage that the resistors and additional resistors, if they are designed as integrated resistors, have similar behavior with regard to voltage modulation, temperature dependence, piezoelectric effects.

drawing

Embodiments of the invention are shown in the drawing and explained in more detail in the following description.

1 shows a first exemplary embodiment of the electronic circuit with four resistors,
FIG. 2 shows a second exemplary embodiment of the circuit with a resistor and two switches,
Figure 3 shows a third embodiment of the circuit with thyristors and a shift register.

Description of the embodiments

1 shows a first exemplary embodiment of the electronic circuit. A series circuit comprising a first fuse Q₀ and a first resistor R₀ is connected between two terminals A, B. A further series circuit comprising a further resistor R 1 and a further fuse Q 1 is connected in parallel with this series circuit. Further connected in parallel is a third series circuit with a third fuse Q₂ and a third resistor R₂ and a fourth series circuit with a fourth resistor R₃ and a fourth fuse Q₃. The third fuse Q₂ is bridged by a first additional resistor R₂ '. Likewise, the fourth fuse Q₃ is bridged by a second additional resistor R₃ '.

This circuit is provided in particular as an integrated circuit, wherein individual by controlled melting through fuses Q₀, Q₁, Q₂, Q₃, different values are set for the _total measurable between the terminals A, B total conductance Y. Circuits of this type are used in particular when it is not yet possible to precisely set a conductance or resistance at the time the circuit is being designed or constructed. In the case of integrated circuits, which are surrounded by a housing, a melting through can occur, particularly in the case of integrated circuits zelner fuses Q₀, Q₁, Q₂, Q₃ still set a resistance after installation in a housing. Thus, circuits influenced by the housing can be adjusted so that the influence of the housing is compensated or minimized.

Figure 2 shows the representation of an electronic circuit with two switches. The series circuit consisting of the first fuse Q₀ and the first resistor R₀ is connected between the terminals A, B. In addition, terminal A is connected via a first switch N to a connection to a positive programming voltage V prog, while the common connection of fuse Q₀ and resistor R₀ is connected to the negative operating potential V _SS via a further switch M.

By closing the further switch M and the first switch N, a current path from the positive programming potential V prog to the negative operating potential V _{SS is established} via the first fuse Q₀. The large current I flowing thereby causes the first fuse Q₀ to melt, as a result of which the current path between the terminals A, B is interrupted. Closing switches M, N thus caused a change in resistance between terminals A, B. For the integrated form of this circuit, provision is made to actuate the first switch N after the further switch M in order to render switch operations of the further switch M ineffective before the desired programming operation. Only when the first switch N is closed is the then existing switch position of the further switch M relevant for programming.

The electronic circuit shown in Figure 3 also has the terminals A, B between which the first series circuit with the first fuse Q₀ and the first resistor R₀ is connected. More follow in parallel to this series connection Series circuits each with a further fuse Q₁ ... Q _{n + m} and each with a further resistor R₁ ... R _{n + m} , with a number of m fuses Q _{n + 1} ... Q _{n + m} each an additional resistor R _{n + 1} '... R _{n + m} ' is connected in parallel. In each series connection, a connection to a thyristor T₀ ... T _{n + m} branches off between the fuses Q₀ ... Q _{n + m} and the resistors R₀ ... R _{n + m} . The cathode connections of the thyristors T₀ ... T _{n + m} are connected to the negative operating potential V _SS . A programming switch S prog is arranged between a positive programming potential V prog and the terminal A. A shift register S has a data input E, a clock input T and reset inputs X₀ ... X _{n + m} . The shift register S has n + m + 1 stages, the outputs A₀ ... A _{n + m of which are} each connected to control inputs of the thyristors T₀ ... T _{n + m} . A reset line is connected to each reset input X₀ ... X _{n + m} .

) belegt. Dabei bezeichnet i den Index, d.h. die Nummer des Widerstands R₀...R_n+m, wenn die Widerstände R₀...R_n+m von 0 ausgehend bis zur um 1 verminderten Anzahl der Widerstände R₀...R_n+m numeriert wurden. Die Zusatzwiderstände R_n+1'...R_n+m' sind mit dem Wert ${\text{1 / (1 /(m x R}}_{\text{A}}{\text{- 2}}^{\text{i}}{\text{x R}}_{\text{D}}{\text{) + 1 / (m x R}}_{\text{A}}\text{))}$

versehen. m ist dabei die Anzahl der Zusatzwiderstände R_n+1'...R_n+m'. Durch diese Dimensionierung ist gewährleistet, daß der minimal erreichbare Grenzwert Y_min für den Gesamtleitwert Y_gesamt, der zwischen den Klemmen A, B gemessen werden kann, gleich dem reziproken Wert von R_A ist. Der maximal erreichbare Grenzwert Y_max für den Gesamtleitwert Y_gesamt bei einer unendlichen Anzahl von Serienschaltungen beträgt ${\text{1 / R}}_{\text{A}}{\text{+ 2 / R}}_{\text{D}}$

. Durch die Vorgabe der gewünschten Werte für den maximal erreichbaren Grenzwert Y_max und den minimal erreichbaren Grenzwert Y_min sowie des gewünschten Maximalaufwandes in Form der Anzahl der Serienschaltungen n+m+1 dient somit der Festlegung der Werte für R_A, R_D und n+m. Außerdem ändert sich der Gesamtleitwert Y_gesamt beim Durchschmelzen der Schmelzsicherung Q_i um den Wert ${\text{1 /(2}}^{\text{i}}{\text{x R}}_{\text{D}}\text{)}$

. Eine Optimierung des Verhältnisses von n zu m erhält man vorzugsweise bei dem Verhältnis, bei dem der Wert des Widerstands R₀...R_n+m, der parallel zu der zum Widerstand R₀...R_n+m in Serie geschalteten Schmelzsicherung Q₀...Q_n+m keinen Zusatzwiderstand R_n+1'...R_n+m' aufweist und der die höchste Nummer aufweist, gleich dem Wert m x R_A ist.
Bei ohmschen diffundierten Widerständen ist durch die Optimierung ein Layout erreichbar, bei dem die Widerstände R₀...R_n+m und Zusatzwiderstände R_n+1'...R_n+m' annähernd gleiche Größenordnungen aufweisen, wodurch ein identischer Aufbau der Widerstände R₀...R_n+m und Zusatzwiderstände R_n+1'...R_n+m' bezüglich Breite und Tiefe wählbar ist und die unterschiedlichen Werte lediglich durch Verändern der Länge erreicht werden. Dadurch ist das Verhalten der Widerstände R₀...R_n+m und Zusatzwiderstände R_n+1'...R_n+m' annähernd identisch, was für den Schaltungsentwurf von Vorteil ist. Dasselbe Schaltungsprinzip ist ebenfalls für komplexe Widerstände einsetzbar, also z.B. Kondensatoren oder auch Induktivitäten. Ein Beispiel für ein Einsatzgebiet der elektronischen Schaltung ist ein integrierter Drucksensor.To set a programming in the form of a certain sequence of fuses Q₀ ... Q _{n + m} which are in a conductive or non-conductive state, a bit pattern is pushed into the shift register controlled by the clock T via the data input E in the shift register while the programming switch S prog is still open. At the beginning of this shifting process, a reset pulse is sent via the reset input R to all reset inputs R₀ ... R _{n + m of} the shift register S. As a result, the content of the entire shift register is set to logic 0, as a result of which all thyristors T₀ ... T _{n + m + 1 are} in the blocked state. After the bit pattern has been inserted into the shift register S, the programming switch S prog is closed and the programming potential V prog is present at terminal A. By ignition using the programming voltage V prog and the bit pattern, each of the thyristors T₀ ... T _{n + m} , to which a 1 is present via one of the outputs A₀ ... A _{n + m,} becomes conductive. This creates a conductive path between the positive programming potential V prog and the negative operating potential V _SS via the fuses Q₀ ... Q _{n + m} , for which the associated thyristor T₀ ... T _{n + m was} ignited by the bit pattern of the data signal. The flowing melt current causes the selected fuses Q₀ ... Q _{n + m} to melt. It is intended to ramp up the programming voltage to its maximum value so slowly that unintentional overhead ignition is avoided. In order to enable an exact setting of the total conductance Y _total between the terminals A, B, the resistors R₀ ... R _{n + m have the} following values: Each of the resistors R₀ ... R _{n + m} in series with one of the fuses Q₀ ... Q _{n + m} , which is not bridged by means of an additional resistor R _{n + 1} '... R _{n + m} ', has the value 2 ⁱ x R _D. The remaining resistances R _{n + 1} ... R _{n + m} are with the value ${\text{1 / (1 / (2nd}}^{\text{i}}{\text{x R}}_{\text{D}}{\text{) + 1 / (mx R}}_{\text{A}}\text{)}$

) occupied. Here i denotes the index, ie the number of the resistor R₀ ... R _{n + m} , if the resistors R₀ ... R _{n + m} starting from 0 up to the number of resistors R₀ ... R _{n + m} reduced by 1 were numbered. The additional resistances R _{n + 1} '... R _{n + m} ' are with the value ${\text{1 / (1 / (mx R}}_{\text{A}}{\text{- 2nd}}^{\text{i}}{\text{x R}}_{\text{D}}{\text{) + 1 / (mx R}}_{\text{A}}\text{))}$

Mistake. m is the number of additional resistors R _{n + 1} '... R _{n + m} '. This dimensioning ensures that the minimum achievable limit value Y _min for the total conductance Y _total , which can be measured between the terminals A, B, is equal to the reciprocal value of R _A. The maximum achievable limit value Y _max for the total conductance Y _total for an infinite number of series connections is ${\text{1 / R}}_{\text{A}}{\text{+ 2 / R}}_{\text{D}}$

. By specifying the desired values for the maximum achievable Limit value Y _max and the minimum limit value Y _min that can be achieved as well as the desired maximum effort in the form of the number of series connections n + m + 1 thus serve to define the values for R _A , R _D and n + m. In addition, the total conductance Y _total changes by the value when the fuse Q _i melts ${\text{1 / (2nd}}^{\text{i}}{\text{x R}}_{\text{D}}\text{)}$

. An optimization of the ratio of n to m is preferably obtained with the ratio at which the value of the resistor R₀ ... R _{n + m} , the parallel to the fuse Q₀ connected in series with the resistor R₀ ... R _{n + m} . ..Q _{n + m has} no additional resistance R _{n + 1} '... R _{n + m} ' and which has the highest number, is equal to the value mx R _A.
In the case of ohmic diffused resistors, a layout can be achieved by the optimization in which the resistors R₀ ... R _{n + m} and additional resistors R _{n + 1} '... R _{n + m} ' have approximately the same orders of magnitude, resulting in an identical structure of the resistors R₀ ... R _{n + m} and additional resistances R _{n + 1} '... R _{n + m} ' can be selected with regard to width and depth and the different values can only be achieved by changing the length. As a result, the behavior of the resistors R₀ ... R _{n + m} and additional resistors R _{n + 1} '... R _{n + m} ' is approximately identical, which is advantageous for the circuit design. The same circuit principle can also be used for complex resistors, for example capacitors or inductors. An example of an area of application for the electronic circuit is an integrated pressure sensor.

Claims (11)

Electronic circuit with several series circuits connected in parallel with at least one resistor and one fuse, which can be brought into a non-conductive state by means of a fuse current applied thereto, characterized in that at least one fuse (Q₀ ... Q _{n + m} ) at least one Additional resistor (R _{n + 1} '... R _{n + m} ') is connected in parallel. Electronic circuit according to Claim 1, characterized in that the fuses (Q₀ ... Q _{n + m} ) are connected to at least one current or voltage source (V _DD , V _SS ) via connecting lines and in at least one of the connecting lines of each fuse (Q₀ ... Q _{n + m} ) at least one switch (M) is provided with which the melt current can be switched on and off. Electronic circuit according to claim 2, characterized in that the switches (M) are thyristors (T₀ ... T _{n + m} ). Electronic circuit according to Claim 3, characterized in that the thyristors are controlled via outputs (A₀ ... A _{n + m} ) of a shift register (S). Electronic circuit according to one of claims 1 to 4, characterized in that the electronic circuit is an integrated circuit. Electronic circuit according to one of Claims 1 to 5, characterized in that the resistors (R₀ ... R _{n + m} ) and the at least one additional resistor (R _{n + 1} '... R _{n + m} ') are ohmic resistors. Electronic circuit according to one of claims 1 to 6, characterized in that the resistors (R₀ ... R _{n + m} ) have mutually different values. Electronic circuit according to claims 5, 6 and 7, characterized in that the resistors (R₀ ... R _{n + m} ) and the at least one additional resistor (R _{n + 1} '... R _{n + m} ') are diffused resistors and only differ in length. Electronic circuit according to one of Claims 1 to 8, characterized in that the resistors (R₀ ... R _{n + m} ) and the at least one additional resistor (R _{n + 1} '... R _{n + m} ') are dimensioned in such a way that that the overall conductance of the electronic circuit, in which all fuses (Q₀ ... Q _{n + m} ) are in the conductive additive, does not differ from the overall conductance of the electronic circuit, in which exactly one fuse (Q₀ ... Q _{n + m} ) conductive state is by a power of two of a unit resistance value (R _D ) and that the exponent, with a numbering of the resistors (R₀ ... R _{n + m} ) from zero to the number of resistors reduced by one (Rinderten ... R _{n + m} ) equal to the negated number of the with the exact a non-conductive fuse (Q₀ ... Q _{n + m} ) series resistor (R₀ ... R _{n + m} ). Electronic circuit according to claim 9, characterized in that a) the at least one resistor (R₀ ... R _{n + m} ), which is connected in series with the at least one fuse (Q₀ ... Q _{n + m} ), the at least one additional resistor (R _{n + 1} '. ..R _{n + m} ') is connected in parallel, the value

has, where i is the number of the resistor (R₀ ... R _{n + m} ), m is the total number of additional resistors (R _{n + 1} '... R _{n + m} ') and R _{A is} the total resistance of the electronic circuit in which all fuses (Q₀ ... Q _{n + m} ) are in the non-conductive state, b) the at least one additional resistor (R _{n + 1} '... R _{n + m} ') the value

where k is the number of the resistor (R₀ ... R _{n + m} ) connected in series with the additional resistor (R _{n + 1} '... R _{n + m} '), c) the wengistens a resistor (R₀ ... R _{n + m} ) the parallel to the fuse (R₀ ... R _{n + m} ) connected in series fuse (Q₀ ... Q _{n + m} ) none Additional resistance (R _{n + 1} '... R _{n + m} ') has the value 2 ⁱ x R _D. Electronic circuit according to Claim 10, characterized in that the number of additional resistors (R _{n + 1} '... R _{n + m} ') is so large that mx R _{A is} approximately equal to the value of the resistor (R₀ ... R _{n + m} ), the parallel to the fuse (R₀ ... R _{n + m} ) connected in series with the fuse (Q₀ ... Q _{n + m} ) is no additional resistor (R _{n + 1} '... R _{n + m} ') and has the highest number.

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