EP0008087A1 - Dispositif pour la réalisation d'une transmission brouillée d'informations - Google Patents

Dispositif pour la réalisation d'une transmission brouillée d'informations Download PDF

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Publication number
EP0008087A1
EP0008087A1 EP79102785A EP79102785A EP0008087A1 EP 0008087 A1 EP0008087 A1 EP 0008087A1 EP 79102785 A EP79102785 A EP 79102785A EP 79102785 A EP79102785 A EP 79102785A EP 0008087 A1 EP0008087 A1 EP 0008087A1
Authority
EP
European Patent Office
Prior art keywords
information
time elements
time
arrangement according
information sections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP79102785A
Other languages
German (de)
English (en)
Inventor
Josef Brusch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP0008087A1 publication Critical patent/EP0008087A1/fr
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04K—SECRET COMMUNICATION; JAMMING OF COMMUNICATION
    • H04K1/00—Secret communication
    • H04K1/06—Secret communication by transmitting the information or elements thereof at unnatural speeds or in jumbled order or backwards

Definitions

  • the invention relates to an arrangement for carrying out a veiled transmission of information, in particular speech, by means of a controllable storage device, into which the information obtained is divided into time elements, one after the other, stored on the transmission side and in turn interchanged for their transmission, and in which the information is stored On the reception side this reversal of the time elements is reversed.
  • the information generated on the transmission side is divided into successive time elements and these are pseudo-randomly exchanged with one another in time and transmitted in this form to the reception side.
  • the technical effort here is smaller compared to frequency band swapping, but still quite considerable. This applies above all to the control part, since it must be ensured that no time element is excluded from the transmission or is transmitted two or more times in the pseudo-random exchange of time elements.
  • the invention is based on the object of specifying a further solution for an arrangement for swapping the time band, which requires a particularly small amount of control means.
  • the inversion of individual or successive information sections can be carried out at least twice in succession, the assignment of the time elements to the information sections being different.
  • the memory device has a double memory for alternately storing and releasing a number of time elements that determine an information section.
  • the information sections are stored in the opposite direction to the signal flow when they are stored.
  • the memory device has two double memories connected in series via a delay circuit, each of which is dimensioned for the alternate storage and retrieval of a number of time elements determining a section of information.
  • the information sections are stored in the opposite direction to the signal flow when they are stored.
  • the security of obfuscation against eavesdropping by unauthorized persons can be brought about in an extremely advantageous manner when using a double inversion of individual or successive sections of information in that the delay circuit and the second double memory can be bridged by means of a delay element, the delay time of which is equal to the sum of the signal delay of the delay circuit and of the second double memory is selected and that a controllable switching device is provided for optionally carrying out such a bridging in time intervals given by the information sections.
  • the regularity given by the inversion of sections of information can no longer be readily recognized by an unauthorized listener, especially if the switching device is controlled pseudo-randomly by a quasi-random generator with a preferably very large pulse repetition period.
  • control clocks for the memory device are derived from a common clock generator which can be controlled in frequency, and the frequency of the clock generator is pseudo-randomly derived from a quasi-random generator with preferably a very large pulse repetition period is controlled. In this way, the time limits of the successive time elements can be blurred with the simplest of means.
  • the block diagram according to FIG. 1 shows an arrangement for carrying out the concealment of information to be transmitted, as is to be used for the concealment on the transmission side and for the unveiling on the reception side.
  • the information arriving at the connection terminal x is first amplified in the amplifier V and after its limitation in the fil ter F of the actual storage device S supplied.
  • the memory device S is controlled with the clocks TU1, TU2, T1 and T2 by a clock center TZ.
  • the clock center TZ is in turn connected to the clock generator arrangement TGA, the output-side clock of which is used in the clock center to derive the control clocks mentioned.
  • a filter F for frequency band limitation follows again, the output signal of which is fed via the amplifier V to the connection terminal y.
  • the information subdivided into time elements is stored in the storage device S and again stored in a time-reversed position.
  • the position of the time elements is interchanged with one another in accordance with the scheme shown in FIG. 2.
  • the upper column shows time elements 1, 2, 3, 4, 5 and 1 ', 2', 3 ', 4', 5 ', which in this summary of five time elements each of duration to interchanged with one another in the time position as specified in the second series of time elements.
  • the swapping is additionally illustrated in FIG. 2 by connecting lines between the upper and lower rows of the time elements.
  • the exchange scheme from group to group of five time elements 1, 2, 3, 4, 5 or 1 ', 2', 3 ', 4', 5 ' q is to be carried out at random, then in the storage device S or in the clock center TZ a quasi-random generator can also be provided for controlling the quasi-random exchange.
  • the circuitry outlay for the memory device S including the controller can be considerably reduced if, as in the exchange scheme 3, the five consecutive time elements 1, 2, 3, 4, 5 or 1 ', 2', 3 ', 4', 5 'forming an information section ZA are inverted.
  • the embodiment of a memory device S according to FIG. 4, which is suitable for analog storage, has two charge stores CCD as stores, which are each designed for storing the time elements of an information section ZA.
  • Charge stores of this type are known, for example, from DE-AS 25 43 023.
  • Each of the two charge stores is connected at its connection a, which also represents the input and the output, to the switching arm of a switch U1 and U2, the switching contacts of which form the input and the output of the storage device in pairs.
  • the changeover switches U1 and U2 are controlled by the control clocks TU1 and TU2. In this exemplary embodiment, both control cycles can be in phase.
  • the clocks T1 and T2 control the charge stores CCD. They have the same repetition frequency, but are shifted by 180 ° against each other.
  • the exemplary embodiment of a storage device S shown in FIG. 5 performs the storage digitally.
  • Two "filo" memories (first in - last out - memories) are used here.
  • the signals arriving from the left are first converted into digital signals in the converter A / D and then alternately fed to one of the two "filo" memories via the input-side switch U1.
  • the input and output also have a common connection in these stores.
  • the stored information sections are fed in inverted form via the changeover switch U2 to the converter D / A, which converts the digital signals back into analog signals and makes them available on the output side.
  • the switches U1 and U2 are in turn controlled by the clocks TU1 and TU2.
  • the clock T2 is provided here for the converters A / D and D / A and the clock T1 for the "filo" memory.
  • the clock generator arrangement TGA according to FIG. 1 can be controlled in its clock frequency.
  • the clock generator arrangement consists of a fixed frequency oscillator 0 with high frequency stability, for example a quartz oscillator, the clock frequency of which is selected to be significantly higher than the clock frequency of the required control clocks.
  • This fixed frequency oscillator 0 is a Fre which is controllable in its division ratio n: 1 Sequence divider FT connected.
  • the frequency divider FT is controlled pseudo-randomly by a quasi-random generator QZG, the code addresses of which are converted into analog control signals for the frequency divider via the address detector AD.
  • the clock supply for the quasi-random generator QZG can either be from the output of the frequency divider or from the output of the fixed frequency oscillator 0, optionally via a fixed frequency divider FT '.
  • a control signal St from the output of the address decoder AD is also indicated by a broken line, which is also shown in FIG. 1. This control signal is required in the development of the control device S according to FIG. 7.
  • two "filo" double memories are connected to one another with their changeover switches U1 and U2 on the input and output sides via a delay device ⁇ .
  • the converter A / D is connected upstream of the switch U1 of the first "filo" double memory and the converter D / A is arranged downstream of the switch U2 of the converter D / A after the switch U2.
  • the delay device ⁇ can be bridged together with the second "filo" double memory by the delay element ⁇ '.
  • the switching device for this is formed by the changeover switch U3 in front of the delay device and the changeover switch U4 in front of the converter D / A on the output side.
  • the control signal St for the two changeover switches is fed to the changeover switch U4 via a further delay element ⁇ '.
  • Both delay elements ⁇ ' have a signal time which is equal to the sum of the signal delay times of the delay device and the second "filo" double memory.
  • the information sections inverted in this way are now from the output side of the first" filo "- Double memory via the time delay device ⁇ delayed by three time element units to and then fed to the input-side switch U1 of the second "filo" double memory
  • the second inversion of information sections can be suppressed by actuating the changeover switches U3 and U4 by means of the control signal St.
  • the inversion individually or in succession The information section in the second "filo" double memory 4 brings with it a further scrambling of the bit elements compared to the input information
  • the quasi-random change in the frequencies of the control clocks corresponding to the clock generator arrangement TGA according to FIG. 6 causes a broadening of the frequency band of the information to be transmitted when the frequency is increased. If the transmission channel is not designed for this, this results in a frequency band clipping which should not appear as a disturbance. However, this undesirable effect is negligible if the pseudo-randomly controlled variation of the control clocks remains within the limits of approx. + 10%.
  • the converters A / D and D / A can be dispensed with in the memory devices.
EP79102785A 1978-08-04 1979-08-02 Dispositif pour la réalisation d'une transmission brouillée d'informations Withdrawn EP0008087A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19782834316 DE2834316A1 (de) 1978-08-04 1978-08-04 Anordnung zur durchfuehrung einer verschleierten uebertragung von informationen
DE2834316 1978-08-04

Publications (1)

Publication Number Publication Date
EP0008087A1 true EP0008087A1 (fr) 1980-02-20

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ID=6046278

Family Applications (1)

Application Number Title Priority Date Filing Date
EP79102785A Withdrawn EP0008087A1 (fr) 1978-08-04 1979-08-02 Dispositif pour la réalisation d'une transmission brouillée d'informations

Country Status (3)

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EP (1) EP0008087A1 (fr)
DE (1) DE2834316A1 (fr)
DK (1) DK321879A (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2386041A (en) * 2002-03-01 2003-09-03 Sensaura Ltd A method of modifying intermittent audio signals such as speech or musical notes in real time

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2315398C1 (de) * 1973-03-28 1975-05-07 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zum Verschleiern von Sprachsignalen
DE2412732A1 (de) * 1974-03-16 1975-09-18 Licentia Gmbh Verfahren zum verschleiern von sprachsignalen
US3970790A (en) * 1973-03-19 1976-07-20 Patelhold Patentverwertungs & Elektro-Holding Ag Method and device for the coded transmission of messages

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3970790A (en) * 1973-03-19 1976-07-20 Patelhold Patentverwertungs & Elektro-Holding Ag Method and device for the coded transmission of messages
DE2315398C1 (de) * 1973-03-28 1975-05-07 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zum Verschleiern von Sprachsignalen
DE2412732A1 (de) * 1974-03-16 1975-09-18 Licentia Gmbh Verfahren zum verschleiern von sprachsignalen

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2386041A (en) * 2002-03-01 2003-09-03 Sensaura Ltd A method of modifying intermittent audio signals such as speech or musical notes in real time

Also Published As

Publication number Publication date
DK321879A (da) 1980-02-05
DE2834316A1 (de) 1980-02-28

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Inventor name: BRUSCH, JOSEF