DE3249578C2 - - Google Patents

Description

The invention relates to an arrangement for transcoding a first signal, which consists of samples of a first Repetition frequency consists of a second signal consisting of samples there is a second repetition frequency, according to Preamble of claim 1. An arrangement of this Genus is from British Patent 14 55 822 known. A possible but not exclusive area of application the invention is a digital television system, the one with the most common television standards of the World is compatible.

There are studies and suggestions regarding the desired properties of a world standard for compatible digital television. Various proposals have been made that during the entire duration of a horizontal line the same number of samples on both the 525- Line 60 Hz system (NTSC) as well as with the 625 line 50 Hz system (PAL / SECAM) should prevail or possibly the same number of samples during the active part of each line. For such a world standard too to consider that the sampling frequency for systems with limited Bandwidth must be suitable and still adequate Resolution exists, and whether the standard is a composite Brightness color system is supposed to be what the component systems as opposed to RGB or YIQ.  

A digital television standard should also be sought to have that is hierarchical. A hierarchical system is one at different degrees or levels of details or service can be easily transferred can, e.g. B. by filtering or omitting sampling points. Thus, a digital system can generate signals enable with very high sampling rate what a resolution results, which is suitable for cinema-like use. Such a resolution could be 2000 lines per grid in vertical direction and 2000 TV lines are horizontal. For editing reasons, television studios might want one Use resolution higher than the standard TV resolution is, however, may wish to establish facilities to use that cost less than those that work with data speeds that a 2000-line grid correspond. Thus, a television studio could have facilities use that the second level of the hierarchy use that is a 1000-line resolution. When a originally produced with a 2000 line resolution Tape recording is available in a television studio is done by filtering and omitting every other sample point the resolution in each line is reduced to the 1000-line level. The next level in the hierarchy can be the 500-line resolution will be in a television broadcaster can be used to broadcast analog video signals to generate the shipment. One from a television studio edited volume could be from the television broadcaster be used in a facility with a 500- Line resolution works, taking every other scan signal is omitted. A television station could also be a band use with 2000-line resolution, using three of each four successive scan signals are dropped. The next level in the hierarchy could be electronic News cameras with a 250-line resolution  be used, while the next lower Use the resolution level for monitoring purposes can.

It is widely expected in the United States and in other countries that use the NTSC standards, this device generally for processing television signals available in a compound form stands. With such a device, it is extremely advantageous if the sampling frequency is a whole multiple like that Three or four times the color subcarrier frequency (3 × SC, 4 × SC). It seems that the world standard for digital television when he finally adopted it or is introduced, not on a sampling frequency is based, which is firmly coupled to a color subcarrier. It however, is very desirable if a subcarrier is coupled sampled composite video signal easily encoded can be, so that it then the properties of the Standards when this standard is introduced. With high Probably this transcoding becomes an interpolation the values of the samples at the world standard the values of the closest samples of the composite Require NTSC television. If the clock frequency is identical the sample values would of course be identical so that no interpolation would be necessary. Exact Interpolation is complex and cumbersome and requires multiplication and additions for each interpolated scan. Multipliers specifically work slowly, and thus a workflow with high video data speeds can be achieved, it can be expected that such multipliers are expensive. It would be extremely desirable a world television standard for digital television too between the 625/50 and 525/60 standards its sampling frequency is compatible, which is hierarchical  and that is also easy without the use of multipliers from the composite NTSC video signal with a Multiples of the subcarrier sequence is scanned, transcoded can be.

The original NTSC standard horizontal line frequency for black and white television was 15 750 Hz. With the introduction color systems have changed the order of rows so that they are related to the sound carrier frequency of 4.5 MHz was standing. The exact horizontal line frequency is 1/286 × 4.5 MHz, which is the CCIR at 15 734.264 ± 0.0003% Hz standardized. The FCC has recently become the color carrier frequency defined in MHz as 315/88 quotient, and the line sequence is 2/455 times the color carrier frequency, which gives about 15,734,266. In the 625/50 standard is the horizontal line frequency 15 625 Hz.

It is known that a common clock frequency of exactly 13.5 MHz exactly 864 samples per horizontal line in 625 / 50- System results and that in the 525/60 system exactly 858 Samples per line arise. The sampling frequency of 13.5 MHz (and other sampling frequencies, which are multiples of 2.25 MHz are connected) result in whole numbers Samples per line in both systems.

The duration of the horizontal line in the 625/50 system is 64.00 µs and in the 525/60 system about 63.56 µs. In the CCIR standards for the 625/50 system, an active line duration is approximately 52 µs is provided, which means a blanking or return time of 12 µs corresponds. The blanking time at the current NTSC color standard is 10.9 ± 0.2 µs, but are suggestions been made to change this standard. The blanking time the NTSC standard is therefore not clearly defined. If it is assumed that the active line duration in the 525/60  System is also 52 µs, creates a 13.5 MHz sampling frequency 702 samples in the active section of a every line. However, this gives a relief Transcoding nothing. Therefore, it has already been proposed to use a number such as the number of samples. B. 704 to use which enables easier transcoding, because it contains the factor 2 many times.

From the British patent mentioned at the beginning 14 55 822 it is known to transcode a a first repetition frequency sampled first signal into a second signal, which consists of samples of a second Repetition rate exists, interpolations between the samples perform the first signal, for the interpolation of a given sample of the second Signals the values of neighboring samples of the first signal under selected weighting, which the Position of the interpolated sample relative to these Samples corresponds to be combined. in the known case is the relationship between the first, input-side sampling frequency and the second, output-side Sampling frequency so that the temporal position of the output-side samples relative to the input-side Samples over the entire duration of a every line changes. So if you have an accurate interpolation the output samples obtained from the input samples you need a very large number of different ones Weighting coefficients. To simplify here to achieve is in the aforementioned British patent showed a way how the high number of weighting coefficients can be reduced to a number of 16. This Way is with approximations of actually a lot higher number of necessary weight coefficients to work. The result of this approximation is said to be "without any remarkable Error ".  

There may be cases where the proximity Errors can be tolerated. There is also Cases in which even such errors are undesirable and to an unacceptable loss of accuracy result in decoding. This is high-definition television with the known technique described above cannot be implemented satisfactorily.

The object of the present invention is to an arrangement of the upper part of claim 1 described genus the equipment complexity of the transcoding to be kept low and still highest accuracy to achieve.

The features of the invention to solve this Task are in the characterizing part of claim 1 listed. Advantageous embodiments of the invention are characterized in the subclaims.

By the choice of the ratio between the first and the second sampling frequency as a quotient two integers result in succession blocks of equal length, the ends of which are practically simultaneous Occurrence of samples of the first and the second signal are defined and in which the number of one sample is different from the number of others Samples and within which the position of the samples of the second signal between the neighboring ones Samples of the first signal progressing from Shifts sample to sample by steps that in each of the successive blocks is the same are. That is, the total number of weighting coefficients is reduced to that required within a block Number. Each of these relatively few weighting coefficients is precisely determinable in the sense that he is the one in question Interpolation possible without any errors. Furthermore, the fact that one of the two Numbers of the quotient describing the frequency ratio is a multiple power of 2 and the other is a sum  this power with a small integer, to weighting coefficients, the only multiples of Reciprocal of the mentioned power of 2. this makes possible a further reduction in circuitry, because Multiplication by factors, which in turn products are whole numbers and reciprocal powers of two, are particularly easy to carry out in digital circuits.

If you e.g. B. in the arrangement according to the invention The power of two is 16, the weighting coefficients Multiples of 1/16, which are the relative positions accurately reflect the output samples. in the Contrary to this are those according to that described above Prior art used 16 coefficients, such as already mentioned, only approximations for a very large one Number of different coefficients that you actually all would have to use if one with the arrangement according to the invention wanted to achieve comparable accuracy.

From British Patent Specification 13 26 386 it is in itself known for interpolating transcoding "block by block" with recurring weighting coefficients work. In this known case, however, are not individual Samples, but whole lines of a video signal a second line frequency by interpolation between adjacent whole lines of a video signal of a first Line frequency formed. The weighting coefficients chosen here are also only approximations of a lot higher number of weighting coefficients for a exact interpolation would actually be necessary. In detail are the lines to be formed by interpolation in an irregular manner artificially in their position shifted to one of the weighting coefficients used to be assigned. There is no special one Choice of the ratio of the two sampling frequencies, rather is simply pretended to have for the purpose of approximation  which makes the sampling frequencies an integer ratio the interpolated position shift mentioned Rows.

The invention is illustrated below using exemplary embodiments explained using a drawing.  

The drawing shows in detail

Fig. 1 is a block diagram of a television system having a digital section according to an aspect of the invention,

Fig. 2 timing signals for understanding certain aspects of the arrangement of FIG. 1 are useful,

Fig. 3 is a useful for understanding the relative sampling time chart at the transcoding of composite NTSC color television signals into signals according to the standards of the arrangement according to Fig. 1,

A generalized graph that facilitates understanding of the errors that occur Fig. 4 when transcoding by interpolation of values of the original sampling signal at the new sampling points,

Fig. 5 is a functional block diagram of an embodiment of the invention, including transcoding,

Fig. 6 is a timing diagram that promotes an understanding of the relative sampling times when the PAL signals are transcoded into signals according to the standards of the assembly of Fig. 1,

Fig. 7 is a listing of interpolation weighting factors for PAL transcoding,

Fig. 8, 9 and 10 generalized waveforms which assist in understanding the link transcoding by interpolation errors that occur in a general manner,

Fig. 11 is a block diagram of a generalized interpolator similar to the interpolation of Fig. 5,

Fig. 12 is a more detailed block diagram of a generalized continuous interpolator for improved interpolation of the signals in the PAL 13.5MHz transcoding

Fig. 13 ^r dividing the block diagram of a digital device with which an input signal x by a number of mold 2, and this result is multiplied by p with a continuously changing variable,

Fig. 14 is a block diagram of a generalized interpolator according to an aspect of the invention,

Fig. 15 the listing of a conversion n to n ' for a specific transcoding and

Fig. 16 shows the block diagram of another embodiment of a converter from n to n ' .

Fig. 1 illustrates an arrangement according to the invention. From a signal source (not shown) such as a television camera, analog signals red (R), green (G) and blue (B) come along with horizontal synchronizing signals (H) at. The H signal is fed to the preparatory input of a counter 150 , while the R, G and B signals are fed through their particular lines to a corresponding "anti-alias" pre-filter 10 in which the bandwidth is limited to prevent the occurrence of Avoid errors (aliases) in the output signal. The bandwidth-limited signals R, G and B are fed to an analog / digital converter (ADC) 12 , within which the separate signals R, G and B are sampled and quantized with a 13.5 MHz sequence, for which purpose a clock generator 14 a clock signal is supplied for control. ADC 12 can output the signals R, G and B in the form of many parallel channels for each signal or a single serial channel for each signal at its output terminals. In the exemplary embodiment shown, 8 parallel lines are used for each signal.

The signals are fed from the ADC 12 to a gate 16 which can be prepared by a flip-flop 18 so that scan signals can pass through or which can prevent the passage of scan signals for subsequent digital signal processing - shown as block 20 . The digital signal processing 20 is not part of the invention, but should expediently work in a digital manner. This digital signal processing could perform tape recording, tape cutting, color control or mixing, or other special tasks. The digital signal processing device could also simply be a transmission channel via which the digital signals are fed to a remote location. After digital signal processing, the signals no longer need to be in digital form, which is why they are fed to a digital / analog converter (DAC) 22 , where quasi-analog scanning signals are generated. The resulting quasi-analog signals are input to a compensation filter 24 which filters or smoothes to produce a suitable analog video signal.

According to one aspect of the invention, gate 16 is prepared to define the active path and is controlled so that exactly 704 strobe signals pass through digital signal processor 20 during each path activation. The timing required for this is derived from the flip-flop 18 , a counter 150 and a counter 704 . H -synchronization signals 204 , which define the beginning of each horizontal line, are fed to the preparation input of the counter 150 , the second input of which is input by the generator 14 at the 13.5 MHz clock signals. The counter 150 counts 150 clock or sampling pulses and, at the end of this time interval, emits an output pulse which is fed to the reset input of the counter 150 , the preparation input of the counter 704 and the set input of the flip-flop 18 , as a result of which the Q output of the FF 18 goes to H goes and prepares the gate 16 , whereby this begins with the passage of the scanning signals. Counter 704 begins to count in synchronization with the strobe signals passing through gate 16 , and when exactly 704 strobe signals have been counted, counter 704 outputs an output signal, thereby resetting this counter; the output signal also comes to the reset input of the FF 18 and thereby sets the Q output to L, as a result of which the gate 16 is blocked and no further scanning signals are passed through, so that the end of an active interval is thereby determined.

The operation of the timing arrangement of FIG. 1 and the differences between the 525/60 and 625/50 operations can be seen more clearly from FIG. 2. In Fig. 2a the Taktabtastsignale 202 are shown without a time scale.

In Fig. 2b, the horizontal sync 204 are shown, which occur at a nominal frequency of 734.266 15. At time t 0, which corresponds to the beginning of the horizontal line, counter 150 counts up to time t 150, as shown in FIG. 2c, which emits an output pulse at time t 150, through which the passage of samples through gate 16 begins by which the counter 704 is prepared, which counts up to the time t 854, as shown in FIG. 2d. Fig. 2e shows the time remaining until the next horizontal synchronizing signal, that at time t 858 are used. The second part of the blanking interval, which is determined by the duration shown in FIG. 2e, takes up 4 scanning signals. Fig. 2f shows that the horizontal synchronizing signals occur at a nominal frequency of 15,625 Hz. The duration of the counting process of the counter 150 is shown in FIG. 2g, the duration of the counting process of the counter 704 in FIG. 2h, which, as in the first case, ended at time t 854. However, the blanking interval is now longer and extends from time t 854 to time t 864, where the next horizontal synchronization signal occurs and a new cycle begins.

Since the active interval in the system described is defined by 704 strobe signals, the rest of the interval is by definition blanking. The 150 counts of counter 150 essentially determine the total blanking interval that would occur if the input signal to the system came from a 525/60 source. For such a source, the portion of the blanking interval determined by the 150 counter is greater than the portion of the blanking interval that occurs after time t 854, in which counter 704 and flip-flop 18 are reset, until time t 0 of the next horizontal synchronization pulse. Thus, the first portion of the blanking interval occurs after each H sync pulse and is determined by counter 150 . The second part of the blanking interval begins after the active line and lasts until the next following H synchronization pulse occurs. Thus, the duration of the second portion of the blanking interval that occurs in each line changes depending on the duration of a horizontal line determined by the source status.

The meaning of the number 704 arises from the fact that 704 contains a larger number of powers of the number 2 (704 = 2⁶ × 11) so that they determine 6 hierarchy levels can. In addition, the number of 704 scanning signals enables per line that exactly the blanking interval of the 625/50 system is obtained and the blanking interval obtained extremely close to the limits of the NTSC blanking interval lies.

The arrangement of FIG. 1 represents a digital signal processing system according to the invention in which the synchronization of the source can correspond to either the 625/50 or the 525/60 standard and in which the input signal is present in analog form. In many cases, however, it may be desirable to transcode from another digital system to the standards described in connection with the arrangement of FIG. 1. So it has already been mentioned that z. For example, in the United States and possibly other countries, it is desirable to have a digital video system in which the standard clock frequency is based on a multiple of the subcarrier frequency, such as 4x SC. It will also be described that the number 704 is also advantageous because it allows the transcoding between such a composite NTSC digital standard and the world standard described in connection with FIG. 1 in a simple manner.

For a composite NTSC television signal sampled at 4 × SC, 810 samples appear during each full horizontal line. Of these, 754 scans occur during the active part, the remaining 156 during the scan interval. To perform transcoding in accordance with another aspect of the invention, 748 samples per active section of each line are required. The number 748 is chosen because it has the divider 44 (748 = 17 × 44) in common with the number of samples in the world standard (704 = 16 × 44). This means that each horizontal line in the two systems can be divided into 44 transcoding blocks, one block containing 17 scanning signals in one case and 16 in the other. Fig. 3 helps to clarify this scheme. The time is plotted on the horizontal axis in FIG. 3. The length of the line in Fig. 3b is 16 units, each mark representing the time of a scan. The 16 samples in one block of FIG. 3b correspond to one of the 44 identical blocks that occur successively during the active part of a horizontal line in the digital world standard. The block of samples in FIG. 3a takes practically the same duration as the block of FIG. 3b. The block of samples in Fig. 3a, however, now contains 17 samples instead of the 16. Nevertheless, it will be appreciated that 44 blocks of samples as shown in Figure 3a occur within the same time of the 44 blocks of Figure 3b. By selecting the total number of samples so that they can be divided into relatively small blocks, the amount of signal processing required for transcoding can be significantly reduced.

Assuming that digital signals are available that occur with a sequence according to FIG. 3a, it is understandable that interpolation is required in order to obtain a signal according to the clock system of FIG. 3b. For example, the seventh scan signal in FIG. 3b is practically halfway between the seventh and eighth scan signals in FIG. 3a. Consequently, the value of the seventh signal may 3b in about equal to the average of the values of the signals 7 and 8 of the incoming signals be a clock sequence according to have 3 a. The second signal (sample number one) in Fig. 3b is very close to the second sample signal (sample number one) in Fig. 3a, so that it can be assumed that its value is equal to the signal value of the sample signal 1 in Fig. 3 plus 1/16 of the difference between the values of sampling points 1 and 2. Generally speaking, the value g _n 'of the nth , linearly interpolated output sampling signal is determined by

where n can take the values from 0-16 and is the number of scanning signals of the newly generated scanning signals. The fact that the factor 17/16 is a ratio of small integers and the denominator of the ratio is a power of 2 is used in the transcoding according to the invention.

In the curve f (t) of Fig. 4 it is assumed that f _{n is} the sequence of the scanning signal values with a frequency of 4 × SC, which is the frequency F ₁. The straight lines connecting consecutive sample signal values represent a linear approximation to the analog waveform f (t) , and the sample signal values marked with g _n ′ form the interpolated values at a clock frequency of 13.5 MHz (F ₂). The operation procedure shown in FIG. 1 comprises two additions and one multiplication. One of the factors in the multiplication is the fraction n / 16, where n is a small integer. Although electronic multiplication of binary numbers is a complex and time consuming process, dividing by two can be accomplished very simply by shifting the contents of a shift register by one place. Any binary number, e.g. B. 234₁₀ = 11101010₂ can be easily divided by two, that a zero is placed in front of the highest digit and the lowest digit is omitted. The result is 01110101₂, which is half of the previous number, the initial eight-digit binary number has become a seven-digit number. The multiplication of a sample signal value by a factor of, for example, 7/16 can be carried out by dividing the initial sample signal value S four times by the number 2, 8/16 S , 4/16 S , 2/16 S and 1/16 S of the output sample signal value in succession be preserved. Then 7/16 times the value is obtained by adding the values obtained for 4/16 S , 2/16 S and 1/16 S one after the other. Each number can be multiplied in digital form by the factor n / 16 by four successive shifts and up to three successive additions. This technique can be generalized to any multiplier n / 2 ^r for any integer r .

The linear approximation in the technique described above can lead to errors in the interpolation process. The error in Fig. 4 corresponds to the difference between the value of the curve f (t) at the time n of the sampling point g _n 'and the point on the straight line 410 between f _{n +1} and f _n . This error can be small, especially if the interpolated result is quantized to the same number of levels as the input curve. The errors become particularly large at points of maximum curvature of the input curve and are always in the direction of the inside of the curvature. Such errors do not occur in areas of the image with a constant level or in linearly changing areas, but only in the vicinity of changes (curved downwards or upwards). These interpolation errors only occur in zones with precise determination or at abrupt transitions. The errors have the effect that the curvature is reduced or the image edges are made softer.

The interpolation error resulting from the curvatures in the analog approximation f (t) from which the output sample values f _{n were} taken can be significantly reduced by using information extracted from several of the surrounding points, namely three or four sample points instead of two are used for interpolation. This is done in such a way that the extensions 412 and 414 of the approximation line are taken between the two scanning signal points f _{n -1} and f _n and between f _{n +1} and f _{n +2} . Includes that the time of occurrence n of the new sample signal values g _n 'with the F ₂ clock frequency very close to the time of the sample f _n at the beginning of a block of samples and very close to the time of the sample f _{n +1} towards the end of Block of samples can be, it is clear that the weight to be given to the approximations g _n '' or g _n '''when determining the actual value g _n ' of the new sample at time n , from the vicinity of Time of the sample value g _n depends on the sample value f _n or f _{n +1} . From Figs. 3 and 4 should be clear that each new Abtastsignalwert g _n within a block of samples in a one-to-one relationship to an existing Abtastsignalwert f _n and, consequently, the numbering of the new samples g _n, as shown in Fig. 4, the numbering of the old or Ausgangsabtastsignalwerte f _n.

The value of g _n '' equals the known value of the output sample signal value f _n plus a small part of the difference between the sample signal values f _n and f _{n -1} , because this small additional value is the same whether it is between n -1 and n or between n and f _{n +1} lies. So is

In the same way, the value g _n ′ ′ ′ on the extension 414 can be determined in that the difference between the scanning signal values between f _{n +1} and f _{n +2} , multiplied by one minus the additional part, is added to the known value of f _{n +1} used to determine g _n ′ ′ can be determined so that one obtains:

It is understood that if the new sampling signal value g _{n is} close to the time of f _n , the value g _n ′ ′ can be added with some weighting to the value that was determined for g _n ′ in order to approximate it, and if g _{n is} close to the time for f _{n +1} , then the value of g _n ′ ′ ′ can be added with a weighting to the value of g _n ′.

A good approximation for the new sampling signal values g _n is if g _{n is} closer to f _n (if n = 0, 1, 2,..., 7)

and if g _{n is} closer to f _{n +1} (if n = 9, 10, 11,..., 15)

For n = 8, the results for g _{n are} averaged from equations (4) and (5) to obtain:

It should be noted that equations (4), (5) and (6) are sums of products in which the products have the form K / 16 g . Consequently, the quadratic or parabolic approximations g _n of the function f (t) can be carried out by successively dividing by two and summing processes, as was also the case with linear interpolation.

Because of the concave curvature of f (t) below a straight line tangent to f (t) at point f _n , the interpolated value of g _n between g _n ′ and g _n ′ ′ is closer to the middle of the interval between n and n +1 slightly larger than the actual value of f (t) before sampling to form the values f _n . The errors made with the quadratic interpolation method described lie in a direction that exaggerates changes, as a result of which transitions or edges appear more clearly in the television picture.

Fig. 5 shows an arrangement for performing the quadratic interpolation as described above. The clock frequencies F ₁ and F ₂ are generated by a clock generator 502 and have a ratio

which gives the desired possibility of dividing the scan signal times in each line into interpolation blocks or groups with time-coincident scan signals at each end. An analog color television signal mixture f (t) is fed to a sampler 504 which repetitively samples the incoming analog signal and holds the sample signals for a period sufficient for an A / D converter 506 to quantize the sample signals in M bits per sample signal. As is known, the M bits can occur simultaneously on parallel lines or in succession on a single line. Each sampling signal of M bit represents a sampling signal value f _n . The various sampling signals f _n (e.g., f _{n -1} , f _n , f _{n +1} , f _{n +2} ) are successively stored in a register 508 , where they are accessible so that the different g _n ', g _n '', g _n ''' and finally g _n can be calculated.

The synchronization of the various arithmetic processes with the blocks of scanning signals is achieved by the horizontal synchronization signals, which are separated from the analog input signal f (t) by a separating circuit 512 . The separated synchronizing signals include the H- synchronizing signal, the blanking, the recovered color carrier and the like. The synchronizing signals are fed to a synchronizer, indicated by a block 526 , which transmits a signal related to the color carrier to the clock signal generator 502 to couple the sampling frequency F 1 and 4 × SC. Synchronization block 526 also receives a signal indicating the fully counted state of N from an r level counter 510 to reset the counter. The synchronization block 526 also delays the preparation of the counter 510 until the beginning of the active part of each horizontal line. In the arrangement of Fig. 5, it has been assumed that the scan sequences are selected as described earlier in connection with the world digital standard for facilitating transcoding by interpolation from a scan signal sequence related to 4 x SC, so that the number r in equation (7) is known and z. B. can have a value such as r = 4, which means recurring interpolation blocks with a length of 16 new scanning signals g _n and 17 old scanning signals f _n . Counter 510 receives from the synchronizer 526 signals indicating the beginning of the blocks and counts F 1 clock pulses continuously and generates on line 514 a parallel data signal representing the current value of n , which in the example ranges between the values 0 and 15 may lie. Counter 510 is also reset by synchronizer 526 from n = N to 0 after each full cycle count. The current value of n on line 514 is input to a lookup table 516 , which is addressed by a signal on line 514 . Information is stored in each memory location as to which scanning signals near f _{n are to be used} for the calculation for the respective value of n . This information is input to a computer 518 , in which g _n ′, g _n ′ ′ and g _n ′ ′ ′ are calculated depending on the determination by those in table 516 for the values of n according to equations (1), (2) and (3) stored commands. These calculations are performed in the manner described by successively dividing by 2 the different values f _n and summing the results of the different divisions according to the stored instructions.

Rounding errors can be kept small by making these (M + r) places when performing the shifts for the divisions by two and the additions in the shift registers. The values of g _n ′, g _n ′ ′ and g _n ′ ′ ′, which have been calculated in 518 , are successively input into a memory register 520 and are then available to a further calculation circuit 522 , where the value of g _{n is given} according to instructions is calculated from register 516 for the respective value of n for the execution of equations (4), (5) and (6). After calculating g _n , the lowest digits are dropped to get an M- bit output and g _n is inserted into a buffer memory 524 . The interpolated signals are emitted from the buffer memory 524 at the frequency F ₂ and represent the transcoded signal.

Those skilled in the art will see that the component system of a world standard YIQ; Y, (BY), (RY) or components other than the components shown can use RGB . He also understands that the duration of the blanking interval, which is determined by counter 150 , can be set to the desired duration and position in relation to the synchronization signal.

The interpolation device described so far relates to transcoding by interpolation of signals which are related to one another by a sampling frequency ratio F 1 / F 2 = M / 2 ^r , where M is equal to (2 ^r ± 1), as a result of which the F 2 scanning signals progressively exceed the time interval between successive F 1 signals, as shown in FIG. 3, over the duration of a block of scanning signals. In the particular example described, a frequency ratio F 1 / F 2 is determined by the ratio of 4 × SC / 13.5 MHz, which corresponds to the ratio 35/33 and approximately to the ratio 17/16, so that it corresponds to equation (7 ) for a value of r = 4. This enables the advantage of interpolation by successive shifting and adding. The advantages of interpolation by shifting and adding are not limited to the case where the numerator differs from the denominator by the integer one, but occur with all positive integers M and r as long as M and 2 ^r have no common divisor .

The transcoding or implementation between PAL signals with 625 lines per picture and 50 Hz picture sequence and the suggested 13.5 MHz world standard can be obtained by interpolation carry out according to this additional procedure and can have a reduced interpolation error.  

As shown in FIG. 4, the interpolated value for a new sample g _n in the left half is determined for the interval between the times n and n +1 in the following way. First, the incoming scanning signals f _n and f _{n + 1 occur} at times n and n +1, respectively. Second, the amplitude differences are determined: between f _{n -1} and f _n and between f _n and f _{n +1} . Third, the amplitude differences are weighted according to the relative time position of the scan signals under consideration within the scan signal block. Fourth, each of the weighted differences is added to the value of f _n to form a strobe signal that is linearly interpolated between f _n and f _{n +1} and another strobe signal that is linear from the range between f _{n -1} and f _n is extrapolated. The linearly interpolated and extrapolated scanning signals are then further weighted according to their proximity to f _n and summed to form an interpolated value. In the second or right half of the interval between n and n +1, a corresponding scheme with the points f _n , f _{n +1} and f _{n +2 is} used. Thus, the interpolation scheme described in connection with FIG. 4 uses three samples of the incoming signal to determine each interpolated sample signal value. It is also possible to start from four sampling points of the output function at the same time in order to improve the interpolation process for each positive integer of M and r , as described.

A generalized transcoding scheme using any positive integers M and r finds e.g. B. Application when transcoding from the 625/50 PAL system to 13.5 MHz scanning signals according to the proposed world standard. For this transcoding process, the PAL signals are sampled at 4 × SC, whereby 1135.0064 scanning signals are obtained for each complete horizontal line. It is known that these signals can be corrected to exactly 1135 scanning signals per field, which only results in an error of 0.16% skew in the image geometry.

The ratio of 1135 scanning signals per PAL line to The ratio is 864 strobe signals for the world standard line 1135/864 = 1.3136574. This number is very close at the quotient 21/16 = 1.3125. Consequently, the active Line of 704 scanning signals at the 13.5 MHz world standard with scanning signals from the 4 × SC-PAL system by converting of 21 incoming signals with 4 × SC in 16 outgoing Strobe signals at 13.5 MHz in each block of strobe signals filled in at exactly 44 blocks per active line will. The result of the approximations made with such transcoding there is a geometrical accuracy from

(12/16) (864/1135) = 0.9991186,

resulting in a geometric distortion in the form of a Elongation of less than 0.1 percent results. Manipulations on the image leading to vertical or horizontal distortions lead of less than 1% are generally considered considered permissible because they are within the tolerance limits that cameras and film projectors can access. That by the approximations that in the transcoding included, introduced distortions are essential smaller than these limit values and therefore permissible.

As described above, within each transcoding block of scanning signals during the conversion from NTSC to world standard, the position of each new scanning signal g _{n runs} step by step over the time interval between the incoming scanning signals with a regular increase. At the beginning of each block, g _n occurs simultaneously with f _n , and with increasing time it moves between the successive scanning signals f _n and f _{n +1} until, at the end of the block of scanning signals g _n to be transcoded, simultaneously with f _{n +1} occurs. This regular progression results from the additional number 1 in the numerator of equation ( 7 ). This counter is labeled M. In the case of the PAL signal, M differs from the denominator by a value greater than 1. Transcoding from PAL to world standard results in the quotient

the denominator is M 21 and differs from the numerator 16 by 5. This difference means that in each block to be transcoded 21 scanning signals of the incoming signal occur within an interval in which 16 new transcoded scanning signals are generated. This is shown in FIG. 6. As in the case of FIG. 3, the length of line b represents the duration of an interpolation block and is divided into 16 positions which represent the sampling times. Points a are the sampling signal instants of the incoming signal. The difference M -2 ^r has a second meaning, which is related to the first. This second meaning can be explained with reference to FIG. 6, from which it can be determined that each new scanning signal point (points on line b in FIG. 6) lies between the scanning signal points a of the incoming signal in a time position which (M -2 ^r ) / 16 or 5/16 of a sampling signal interval from the previous position. So the sampling signal points 0 appear simultaneously, the new (b) signal point 1 appears on 5/16 therefore between the incoming (a) signal points 1 and 2, the new signal point 2 appears 5/16 + 5/16 = 10/16 of the distance between the incoming (a) signal points 2 and 3. In the same way, the new point 3 appears on 15/16 of the way between the incoming signal points 3 and 4, the new signal point 4 appears at a time (15/16 + 5/16) - 1 = 20 / 16-16 / 16 = 4/16 along the time interval between the incoming signal points 5 and 6. The new or outgoing scanning signal 5 appears by 4/16 + 5/16 = 9/16 between the incoming scanning signals 6 and 7 shifted with respect to signal 6 , and the new scanning signal 6 appears at the time 9/16 + 5/16 = 14/16 shifted with respect to the incoming scanning signal 7 to the scanning signal 8 . In FIG. 7 6 positions are occurring in a list all in FIG. Listed. In the time intervals between the incoming scanning signals 4-5; 8-9; 12-13 and 16-17 are no new strobe signals. Fig. 15 shows a list of related information for a transcoding, in the r = 4 and M = 25.

The interpolations described in connection with Fig. 4 use in the approximation calculation for g _n (the new value is estimated) g _n '', which is weighted by a first group of functions, in the first half of the interval between successive incoming scanning signals f _n and a second weighting function in the second half of the interval. This results in an interpolation that is useful under certain conditions, but a better approximation (less error) can be achieved by averaging the weighted assumptions g _n ', g _n ''and g _n ''' over the entirety of each inter-sampling interval is taken. Such an average is

wherein  

n ′ = [( M - 2 ^r ) xn ] (modulo 2 ^r ), (10)

n 'takes into account the position of the new sample value b in relation to the incoming sample values a . In the Fig. 6 results

n ′ = (21 - 16) n modulo 16 = 5 n modulo 16, (11)

which means that for each new sample n, the value for n 'increases by 5 parts out of 16, as already stated above.

The approximation to g _n of equation (12), as shown in FIG. 8, represents a parabola that runs through the points f _n , f _{n +1} . As can be seen, the parabola has a higher vertex than a third-order curve that runs through the four points f _{n -1} , f _n , f _{n +1} , f _{n +2} .

Another interpolation scheme is shown in FIG. 9. A first parabola 900 passes through the points f _{n -1} , f _n and f _{n +1} , while a second parabola 902 runs through the points f _n , f _{n +1} , f _{n +2} .

These can be given by the following equations:

In the interpolation of a new scanning signal g _n between the time n of the scanning signal f _n and the time n +1 of the scanning signal f _{n +1} , as described earlier, equation (12) in the first half of the interval and equation (13 ) in the second half and the average of both in the center. On the other hand, the average over the entire interval gives the equation

Another approximation to the value of the new strobe signal g _n interpolated between successive strobe signals f _n can be made so that equation (12) is weighted near the beginning of the interval and equation (13) is weighted near the end of the interval, for which the equation is then:

FIG. 10 generally shows the differences between the values of new scanning signals g _n when they are determined by interpolation approximations as given by equations (9) and (14). The solid curve 1009 has the shape of a parabola according to equation (9), while the dashed curve 1014 has the shape of a parabola according to equation ( 14 ). Curve 1009 is relatively sharply curved and falls below the points f _{n -1} and f _{n -2} , while curve 1014 is less sharply curved and lies above these points. The fact was mentioned that interpolation can be set up so that the transitions are amplified and thus an image is created which is less "soft" or whose contours are accentuated more sharply. From Fig. 10 it can be seen that interpolation using equation (9) creates new scan signal values which, in the area of sharp curvatures, increase the contour mapping compared to those obtained according to equation (14).

Equations (4) - (6) and (9) - (14) represent quadratic interpolations (or higher order) that have the property in common that they go through points f _n and f _{n +1} and that the sum of Represent multiplications or products of four sampling signal points f _{n -1} , f _n , f _{n +1} and f _{n +2} , and in which the factors have the form p / 2 r , where p is an integer between the values 0 and 2 ^{r +1 is} located. According to the invention, these algorithms can therefore be treated by a sequence of shifts and additions, which can be carried out in a simple manner at high speed.

A circuit arrangement as shown in FIG. 11 can be used to carry out a transcoding of a general type, as described above. In Fig. 11, the circuit elements corresponding to those in Fig. 5 are identified by the same reference numerals. Clock pulses with a pulse sequence F 2 are collected in an r -step- n- counter 510 , which is reset to zero by time control 1104 when the last count state of 2 ^{r -1 is reached (for the example PAL reset at 15). For each value of n from the r -stage counter 510 , the fixed value command register 516 selects the appropriate commands for the calculation of values g _n ′, g _n ′ ′ and g _n ′ ′ ′ from the continuously stored values of f _n in the memory register 508 . FIG. 12 shows a more detailed block diagram of an embodiment of a generalized transcoder which is suitable for transcoding PAL signals (approximately 17.7 MHz) sampled with 4 × SC to 13.5 MHz. Analog composite PAL signals f (t) are fed via input 1210 to a block 1212 , which works as a pre-filter, sampler and ADC for 17.7 MHz. The sampling in block 1212 is controlled by the F 1 clock. The output from block 1212 is a plurality (in this case 8) of parallel signal-carrying channels or lines, one of which is the lowest digit (LSB) and another the highest digit (MSB). The signals on these lines are fed in parallel or simultaneously to an equal number of shift registers in a block 1214 . Only the shift registers for the LSB and MSB signals are shown in block 1214 . The clocking of the shift registers 1214 control timing signals generated in a timing circuit 1216 . The timing circuit 1216 receives, in addition to the F 1 clock pulses, certain synchronization information related to the incoming PAL signal so that the processing of the incoming signals is synchronized to transcode blocks that begin with the active video signal. The latest signals in the shift registers correspond to f _{n +2} , the oldest to f _{n -1} , while f _n and f _{n +1} are stored in the places in between. These 8-bit signals are introduced by shift registers 1214 into input pairs of difference generator circuits 1218, 1220 and 1222 . Thus f _n and f _{n -1 are given} to 1218 , f _{n +1} and f _n to 1220 and f _{n +2} and f _{n +1} to 1222 . These difference generator circuits also receive timing inputs (T) from the timing circuit 1216 so that their workflow is synchronized with the strobe signals. The outputs of the difference forming circuits 1218 and 1220 are input to the inputs of multipliers 1224 and 1226 , respectively, which multiply by n '/ 16, which, as described, is done by dividing by two and adding depending on the value of the current variable n ' are supplied to the multipliers from the fixed value information table 1228 . As mentioned above, n 'indicates the temporal position of the new sample with respect to the times of the neighboring incoming samples. With the given transcoding from PAL to 13.5 MHz, the frequency ratio is known, and therefore the one-to-one correspondence of n 'to the scan number is known, as it is e.g. B. are listed in the table of FIG. 7. ROM 1228 is addressed by information which depends on the clock frequency F 2 of the new scanning signals which are counted by a counter 1230 as blocks n . Each memory location addressed in this way is previously provided with information which is related to the value of n 'and corresponds to an address number n for a specific coding. Thus, for each new scan signal that is generated within a transcoded block, the multipliers 1224 and 1226 from the read-only memory ROM 1228 receive an associated value of n ', which specifies the additions that have to be made with the difference signals divided by two. The output signal from multiplier 1226 is fed to an adder 1232 where it is summed with the current value of f _n to form a linear interpolated strobe signal g _n 'as described by equation (1). In the same way, the output signal from the multiplier 1224 is fed to a clock-controlled adding circuit 1234 , where it is summed with f _n to form a linearly extrapolated sample value g _n '' according to equation (2). The current n 'value is passed from the ROM 1228 to a (16- n ') difference forming circuit 1235 , and the difference signal comes to the input of a multiplier 1238 . The difference signal (f _{n +1} - f _{n +2} ) that has arisen in the difference generator circuit 1222 comes to a second input of the multiplier 1238 . This forms a product by multiple dividing by two and adding depending on the value of (16- n ′) to produce a product signal which is supplied to an adder 1240 for summing with the value of f _{n +1} to be according to equation (3 ) to form the value g _n ′ ′ ′. The g _n 'value is input by means of a further multiplier 1242 of a summing circuit 1244 . The multiplier 1242 multiplies by a constant value 11/16, which has the form n / 16 and can therefore be carried out with the aid of circuits divided by two and adding. The g _n '' and g _n '''values are weighted by multipliers 1246 and 1248 , in accordance with the position of the new sample value g _n in relation to the neighboring incoming sample values. Multiplier 1248 multiplied by n ′ / 16 and receives the current variable n ′ from the ROM 1228 for this purpose. Multiplier 1246 is multiplied by (16-n) / 16 and obtained as a running variable, the differential signal (16-n) from the Differenzbildnerschaltung 1236th These two multipliers are the desirable, high speed, shift and add circuits as described below. These weighted signals g _n '' and g _n '''are added together in a summing circuit 1250 . At the output of summer 1250 , the signal is the sum of a small portion of g _n '' and a large portion of g _n '''where n ' is small, which is the case when the new sample g _{n is} close to the sample f _n lies. If the new sample value g _{n is} close to the value f _{n +1} , ie if n ′ is close to 16, then the signal from the summer 1250 is generated using a large part of g _n ′ ′ and a small part of g _n ′ ′ ' generated. This weighting gives an approximately calculated value of f (t) if the analog input signal has peaks which are prominent. In order to reduce the contrast, the summed signal at the output of the summer 1250 is multiplied by a fixed factor 15/16 in a multiplier circuit 1252 , whereby the weight, which is due to the influence of the peak value, is reduced compared to the linear approximation g _n ′. The 11/16 weighted g _n 'and 5/16 weighted g _n ''and g _n ''' signals are summed in summer 1244 , and its output is rounded off to generate the new, approximately calculated value g _n . It has become apparent that the value of the weighting of the signals by multipliers 1242 and 1252 can be varied as desired, thereby producing a desired degree of emphasis on the transitions. The highlighting effect can be included in the algorithm with which the new scanning signals are formed: where k can be a contrast constant, which can be zero or a positive value up to the maximum value of 2 r . If k = 0, the second expression becomes zero, and the interpolated value of g _n is only the linear interpolation g _n 'according to equation (1). The part of the right expression of equation (16) in the parenthesis represents a parabola that is adapted to the values f _n and f _{n +1} , but has a much greater curvature than would be expected from the input signal f (t) . Since k is in the range between zero and 2 r , equation (16) gives all possible parabolas that pass through the values f _n and f _{n +1} and between the straight line g _n ′ and the very strongly curved parabola in the bracket of the equation (16) lie. A value k = 8 z. B. equation (9) gives a value k = 4 equation (14). In Fig. 12, the value k is comprised by multipliers 1242 and 1252 operating at a fixed constant. Multiplier 1242 is multiplied by 16-k / 16 and multiplier 1252 k / 16, where k = 5, and the transcoder operates generally in accordance with equation (16). Multipliers 1224, 1226, 1238, 1246 and 1248 multiply by the quotient of a running variable divided by 2 r , where r = 4 and 2 r = 16. Multipliers 1242 and 1252 are of the same form, but with a fixed value counter. FIG. 13 shows the block diagram of a digital device for dividing the input signal X by a number of the form 2 r and multiplying the result by a running variable, which is denoted by p . In FIG. 13, the current variable p is fed to an input terminal 1310 and the multiplicand X to an input terminal 1320 . The multiplicand X arrives (in series or in parallel) at a register 1322 , which in the example shown is loaded with an 8-bit digital word 10000001, which represents the value 129. The highest digit MSB of register 1322 represents the value 128 in itself. The division by two is achieved by entering the content of register 1322 into the last eight stages of a 9-digit second register 1324 . The highest position in register 1324 also represents 128 and is preloaded with zero. Thus, the transition from 10000001 from register 1322 to register 1324 causes division by two. The value stored in the 9-digit register 1324 is transferred to the last 9 digits of the 10-digit register 1326 , the highest digit of which is preloaded with the value 128. The transfer of the data from the register 1324 into the register 1325 thus represents a further division by two. The data is again divided into the 11-digit register 1328 and the 12-digit register 1330 by subsequent transfer. At the end of the transfer process, registers 1324, 1326, 1328 and 1330 contain the contents X / 2, X / 4, X / 8 and x / 16, respectively. Since these components represent 8/16 X , 4/16 X , 2/16 X and 1/16 X , it is easy to understand that each partial value of X between 1/16 and 15/16 is the sum of the different combinations of the divided ones and values stored in the registers can be formed. In the example shown, p has the value 7 (digital 0111), so that the contents of registers 1326, 1328 and 1330 must be summed to form a sum of 7/16 X. The value of p is read into a register 1332 . The content of each stage of register 1332 is used to control the opening of registers 1324 through 1330 , as represented by gates 1334 through 1340 . A value one in one stage of register 1332 enables the associated register 1324 to 1330 to be opened for the subsequent summing circuits. Registers 1324 and 1326 are connected to the inputs of a summing circuit 1342 and registers 1328 to 1330 are connected to the inputs of a summing circuit 1344 . The outputs of the summing circuits 1342 and 1344 are in turn connected to the inputs of a further summing circuit 1346 , from which the output signal (p / 16 X) is finally formed. The blocks adjacent to the summers 1342, 1344 and 1346 represent the digital values in these points. The exemplary embodiments described so far take advantage of the multiplication by shifting and adding, but interpolators of a more general form according to FIG. 14 can also be used. The sampling rate of the input and output signals are chosen such that an integer number of transcoding blocks are created during each active line with simultaneous input and output sampling signal instants at the beginning and end of each transcoding block. Such interpolators have advantages compared to the prior art, even if ordinary multipliers are used, since only a few multipliers are required to achieve a certain accuracy. The interpolator according to FIG. 14 with only 4 multipliers corresponds to an arrangement in the prior art with 15 multipliers. In Fig. 14, an input signal is supplied through an input terminal 1410 to the inputs of a delay element 1412 and a synchronizing or timing circuit 1424 . Delay element 1412 delays the signal by a known amount and thus generates a delayed signal f _n that defines the input signal as f _{n -1} . The delayed signal f _n is further fed to a delay element 1414 and then to a delay element 1416 , whereby further delayed signals f _{n +1} and f _{n +2} are produced. The signals f _{n -1} , f _n , f _{n +1} and f _{n +2} are applied to multipliers, which can usually be 8X8 multipliers, which generate the signals with a known function (taken from a tabular read-only memory 1420 ) of the current variable Multiply n generated by a synchronization or timing circuit 1424 . The multiplied signals are summed in an adder 1432 to form the desired interpolated output signal at the output terminal 1422 . Instead of a tabular read-only memory such as the memory ROM 1228 of FIG. 12 for the formation of the value of n 'from the value n according to the known pattern of the time position of the new scanning signal g _n between the time positions of adjacent incoming scanning signals f _n for a given general transcoding it is possible to use a logic circuit for calculating n 'from n according to the equation n ' = (M - 2 r ) × n (modulo 2 r ). Such a logic circuit is shown in FIG. 16. In FIG. 16, the input clock signals at the output or the new clock signal frequency F 2 are fed to an r -stage n counter 1230 , as in FIG. 12. The F 2 clock signals are also fed to a timing control circuit, which is shown as block 1616 and Reset pulses for the counter 1230 and for an n 'counter 1618 at the end of a count of 2 r F 2-clock pulses generated by the counter 1230 . Such a reset signal clears the contents of counters 1230 and 1618 at the beginning of each recurring block of strobe signals. Counter 1230 counts F 2 clock pulses to determine the current values of n , the number of output pulses within each interpolation block. The counting state continuously stored in register 1230 is shown at 13 (1101). With each successive F 2 clock pulse, the timing controller 1616 drives a clocked adder 1620 that has the value of n 'that is currently stored in the n ' register 1618 (as shown, the last or previous value of n 'was 13 or 1101 ), a fixed number (M -2 r ) added, which is represented by 5 (0101). The sum of these two is stored in a register 1622 , which has r +1 levels and in which the left level is the highest. The sum of 5 and the previous value of n '13 is 18 or 10010, which is stored in register 1622 as a running value. The lowest r levels of register 1622 are connected to corresponding levels of register 1618 in order to update the value of n 'to the current value. However, since only the lowest levels or places of register 1622 are connected, only these are stored in register 1618 as a new value n '. This arrangement causes the value of n 'to progress in units of five (M -2 r ) for each count of n until the sum exceeds the value (2 r -1), where the highest point in the (r + 1) Level of register 1622 switches to logic state 1. The transfer of the r lowest levels or digits allows progression in levels of five in a modulo-2 r manner. The embodiments described so far relate to interpolation between scan signal values along a horizontal scan line in a digital television system; it will be understood by those skilled in the art that the same interpolation methods can also be applied in the vertical direction to adjacent scan signal values in successive lines in order to interpolate between signals with different line scan speeds or in the time between scan signals at the same location in successive images for interpolation between signals different frame rates.}

Claims (6)

1. Arrangement for transcoding a first signal consisting of samples of a first repetition frequency F 1 (“ F 1 samples”) into a second signal consisting of samples of a second repetition frequency F 2 (“ F 2 samples”), by interpolation between F 1 samples, whereby for the interpolation of a given F 2 sample the values of neighboring F 1 samples under selected weighting, which corresponds to the position of the interpolated F 2 sample relative to these F 1 samples, are combined are characterized by
that the ratio F 2 / F 1 between the second sampling frequency F 2 and the first sampling frequency F 1 is essentially equal to the quotient of a sum and a predetermined multiple power r of the number 2, the sum mentioned being a small integer differs from the predetermined power of 2,
so that successive blocks of equal length result, the ends of which are defined by the practically simultaneous occurrence of an F 1 sample and an F 2 sample and in which the number of F 1 samples is different from the number of F 2 samples and within them the position of the F 2 samples between the adjacent F 1 samples progressively shifts from sample to sample by steps which are multiples of 1/2 ^r ;
that means ( 1228 ) are provided which determine respective weighting coefficients for the interpolation of the F 2 samples, which weighting ^coefficients contain corresponding multiples of 1/2 ^r ;
that an interpolator is provided which contains at least one weighting multiplier ( 1248 ) controlled by the weighting coefficients. 2. Arrangement according to claim 1, characterized in that the interpolator has the following:
delay means ( 1214 ) connected to receive the first signal to generate at least a second and a third delayed signal which are delayed from the first signal;
difference forming means ( 1220, 1222 ) coupled to the delay means to form difference signals representative of the amplitude difference between successive delayed signals;
multiplier means ( 1226, 1238 ) coupled to the difference forming means for receiving the difference signals and multiplying them by a running variable to form weighted difference signals;
a variable generator ( 1216, 1228, 1230 ) coupled to the multiplier and to a clock signal generator providing a clock signal of the second frequency to generate the current variable according to the timing of each new query between successive queries of the first signal;
a summing device ( 1232, 1234, 1240, 1250, 1244 ) coupled to the multiplication device for summing the weighted difference signals. 3. Arrangement according to claim 2, characterized in that the variable generator ( 1216, 1228, 1230 ) contains a counter ( 1230 ) which receives the clock signal of the second frequency and counts for the duration of one of the blocks by a progressively increasing count signal to generate the duration of each of the blocks. 4. Arrangement according to claim 3, characterized in that a read-only memory ( 1228 ) is coupled to the counter ( 1230 ), which is addressed by the progressively increasing counting signal to an output signal in the form of a predetermined sequence of numbers as said running variable generate that are representative of the temporal position of each query of the second signal with respect to adjacent queries of the first signal. 5. Arrangement according to claim 1, characterized in that the interpolator has the following:
means ( 1214 ) for determining the values of first, second and third samples of the first signal;
means ( 1218, 1220 ) for forming a first difference signal corresponding to the difference between the values of the first and second samples and for forming a second difference signal corresponding to the difference between the values of the second and third samples;
means ( 1224, 1226 ) for weighting the first and second difference signals in accordance with the mutual temporal position of the queries in accordance with the aforementioned progress;
means ( 1232 ) for summing the weighted second difference signal with the value of the second sample of the first signal to form a linear interpolated intermediate sample between the second and third samples;
means ( 1234 ) for summing the weighted first difference signal with the value of the second sample of the first signal to form a sample value linearly extrapolated from the first and second samples of the first signal;
means ( 1242 ) for weighting the linearly extrapolated intermediate query value in direct relation to the difference in the mutual temporal position of the query values within said progression to form a first partial value;
means ( 1246 ) for weighting the linearly extrapolated sample by a factor equal to one minus the weighting of the interpolated intermediate sample to form a second partial value;
means ( 1250, 1252, 1244 ) for summing the first and second partial values in order to obtain the quadratic approximated interpolated query value. 6. Arrangement according to claim 1, characterized in that the interpolator has the following:
delay means ( 1412-1416 ) connected to receive the first signal to delay that signal to form at least a second and a third delayed signal;
a variable generator ( 1420 ) coupled to a clock signal generator providing a clock signal of the second frequency to generate running variables that are related to the timing that each new query occupies between successive queries of the first signal;
multiplier means ( 1418, 1426-1430 ) coupled to the delay means and to the variable generator to receive the delayed signals and multiply them by the current variables to form weighted delayed signals;
summing means ( 1432 ) coupled to the multiplier for summing the weighted delayed signals.