CN214674403U - Charging and discharging circuit and electronic equipment - Google Patents
Charging and discharging circuit and electronic equipment Download PDFInfo
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- CN214674403U CN214674403U CN202120102456.4U CN202120102456U CN214674403U CN 214674403 U CN214674403 U CN 214674403U CN 202120102456 U CN202120102456 U CN 202120102456U CN 214674403 U CN214674403 U CN 214674403U
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Abstract
The embodiment of the utility model discloses a charging and discharging circuit and an electronic device, the charging and discharging circuit is applied to the electronic device, the electronic device at least comprises a first interface and a second interface, the charging and discharging circuit comprises a first charging circuit, a first discharging circuit and a second charging circuit, the first charging circuit and the first discharging circuit are connected with the first interface and the control unit, the first interface is connected with the control unit, the control unit is used for controlling the working state of the first charging circuit or the first discharging circuit according to input signals of the first interface, the second charging circuit and the second discharging circuit are connected with the second interface and the control unit, the second interface is connected with the control unit through the detection circuit, and the control unit is further used for controlling the working state of the second charging circuit or the second discharging circuit according to output signals of the detection circuit. By the mode, the charging function can be supported by any one of the interfaces.
Description
Technical Field
The utility model relates to an electronic circuit technical field especially relates to a charge-discharge circuit and electronic equipment.
Background
The Type-C interface is called USB Type-C interface, also called USB-C interface. It has the following characteristics: 1. the data transmission speed is high, and the maximum data transmission speed reaches 10 Gbit/s; 2. The function of 'forward and reverse insertion' which can be inserted from both the forward and reverse sides is supported; 3. supporting the power transfer function, the standard specification connecting wire equipped with the Type-C connector can provide 100W of power at most through 3A current. Since the release of Type-C interface, the coverage that the Type-C interface was used is wider and wider, and more dull and stereotyped and cell-phone all preferentially adopted the Type-C interface.
In current electronic equipment, be provided with a plurality of Type-C interfaces usually, however, only one interface can support the function of charging in a plurality of Type-C interfaces, and the user must find the corresponding charging opening according to the suggestion at every turn and just can charge, and user's experience is relatively poor.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides a aim at providing a charging and discharging circuit and electronic equipment can realize in a plurality of interfaces any interface all can support the function of charging.
In order to achieve the above object, in a first aspect, the present invention provides a charging and discharging circuit applied to an electronic device, the electronic device at least includes a first interface and a second interface, the charging and discharging circuit includes:
the device comprises a first charging circuit, a first discharging circuit, a second charging circuit, a second discharging circuit, a detection circuit and a control unit;
the first charging circuit and the first discharging circuit are both connected with the first interface and the control unit, the first interface is connected with the control unit, and the control unit is used for controlling the working state of the first charging circuit or the first discharging circuit according to an input signal of the first interface;
the second charging circuit and the second discharging circuit are both connected with the second interface and the control unit, the second interface is connected with the control unit through the detection circuit, and the control unit is further used for controlling the working state of the second charging circuit or the second discharging circuit according to the output signal of the detection circuit.
In an optional manner, the detection circuit includes a channel configuration pin detection circuit and a power supply detection circuit, the second interface has a channel configuration pin and a power supply pin, the channel configuration pin detection circuit is respectively connected to the channel configuration pin of the second interface and the control unit, and the power supply detection circuit is respectively connected to the power supply pin of the second interface and the control unit;
the channel configuration pin detection circuit is used for detecting an input signal of a channel configuration pin of the second interface;
the power supply detection circuit is used for detecting an input signal of a power supply pin of the second interface.
In an optional manner, the channel configuration pin detection circuit includes a first resistor, a second resistor, a nand gate logic circuit, and a first switch tube;
one end of the first resistor is connected with a first power supply, the other end of the first resistor is connected with the input end of the NAND gate logic circuit and the channel configuration pin of the second interface, the output end of the NAND gate logic circuit is connected with the control end of the first switch tube, the second end of the first switch tube is grounded, the first end of the first switch tube is respectively connected with one end of the second resistor and the control unit, and the other end of the second resistor is connected with a second power supply.
In an optional manner, the channel configuration pin detection circuit further includes a third resistor;
and two ends of the third resistor are respectively connected with the first end of the first switch tube and a third power supply.
In an alternative mode, the power detection circuit includes a fourth resistor and a fifth resistor connected in series;
the non-series end of the fourth resistor is connected with the power supply pin of the second interface, the connecting point between the fourth resistor and the fifth resistor is connected with the control unit, and the non-series end of the second resistor is grounded.
In an alternative mode, the second charging circuit includes a second switching tube;
the control end of the second switch tube is connected with the control unit, and the first end and the second end of the second switch tube are respectively connected with the battery of the electronic device and the second interface.
In an alternative mode, the second discharge circuit includes a first current limiting chip;
the enabling end of the first current limiting chip is connected with the control unit, the voltage input end of the first current limiting chip is connected with a battery of the electronic equipment, and the voltage output end of the first current limiting chip is connected with the second interface.
In an optional manner, the charge and discharge circuit further includes a sixth resistor and a seventh resistor;
the channel configuration pin of the first interface is respectively connected with one end of the sixth resistor and the control unit, the other end of the sixth resistor is connected with a fourth power supply, and two ends of the seventh resistor are respectively connected with the power supply pin of the first interface and the control unit.
In an alternative mode, the first charging circuit comprises a third switching tube;
the control end of the third switching tube is connected with the control unit, and the first end and the second end of the third switching tube are respectively connected with the battery of the electronic equipment and the first interface.
In an alternative mode, the first discharge circuit includes a second current limiting chip;
the enabling end of the second current-limiting chip is connected with the control unit, the voltage input end of the second current-limiting chip is connected with a battery of the electronic equipment, and the voltage output end of the second current-limiting chip is connected with the first interface.
In a second aspect, the embodiment of the present invention further provides an electronic device, where the electronic device includes a first interface, a second interface and the charging and discharging circuit as described above.
The embodiment of the utility model provides a beneficial effect is: the utility model provides a charge-discharge circuit is applied to electronic equipment, the electronic equipment at least comprises a first interface and a second interface, the charge-discharge circuit comprises a first charge circuit, a first discharge circuit, a second charge circuit, a second discharge circuit, a detection circuit and a control unit, wherein, the first charge circuit and the first discharge circuit are both connected with the first interface, the first interface is connected with the control unit, the second charge circuit and the second discharge circuit are both connected with the second interface, the second interface is connected with the control unit through the detection circuit, the control unit is used for controlling the working state of the first charge circuit or the first discharge circuit according to the input signal of the first interface, and controlling the working state of the second charge circuit or the second discharge circuit according to the output signal of the detection circuit, namely when the control unit controls the working state of the first charge circuit to be the charge state, when the working state of the first discharging circuit is a dormant state, the battery of the electronic equipment can be charged through the first interface; when the control unit controls the working state of the second charging circuit to be a charging state and the working state of the second discharging circuit to be a dormant state, the battery of the electronic device can be charged through the second interface, and therefore the charging function supported by any interface of the plurality of interfaces can be achieved.
Drawings
One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the figures in which like reference numerals refer to similar elements and which are not to scale unless otherwise specified.
Fig. 1 is a block diagram of an electronic device according to an embodiment of the present invention;
fig. 2 is a block diagram illustrating a charging/discharging circuit connected to a first interface and a second interface according to an embodiment of the present invention;
fig. 3 is a block diagram illustrating a connection structure between a control unit and a first interface and a second interface according to an embodiment of the present invention;
fig. 4 is a schematic circuit structure diagram of the connection between the first interface and the control unit according to the embodiment of the present invention;
fig. 5 is a schematic circuit structure diagram of the connection between the second interface and the control unit according to the embodiment of the present invention;
fig. 6 is a block diagram of an electronic device according to another embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some embodiments of the present invention, but not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a block diagram of an electronic device according to an embodiment of the present invention, as shown in fig. 1, the electronic device includes a charging and discharging circuit 100, a first interface 200, a second interface 300, and a battery 400, wherein the first interface 200 and the second interface 300 are both connected to the charging and discharging circuit 100, and the charging and discharging circuit 100 is connected to the battery 400.
It is understood that, in the embodiments of the present invention, the electronic device refers to an electronic device having a plurality of data interfaces. Electronic devices include, but are not limited to: smart phones (such as Android phones and iOS phones that carry other operating systems), tablet computers, palm computers, and notebook computers.
Specific types of electronic devices are listed above, but those skilled in the art will appreciate that embodiments of the present invention are not limited to the listed types, but may be applied to any other types of electronic devices.
Specifically, the first interface 200 and the second interface 300 can both realize the charging and discharging functions of the battery 400 through the charging and discharging circuit 100.
As shown in fig. 2, the charging and discharging circuit 100 includes a first charging circuit 10, a first discharging circuit 20, a second charging circuit 30, a second discharging circuit 40, a detecting circuit 50 and a control unit 60.
Specifically, the first charging circuit 10 and the first discharging circuit 20 are both connected to the first interface 200 and the control unit 60, the first interface 200 is connected to the control unit 60, the second charging circuit 30 and the second discharging circuit 40 are both connected to the second interface 300 and the control unit 60, and the second interface 300 is connected to the control unit 60 through the detection circuit 50.
In practical applications, if the first interface 200 is used to charge the battery 400, the control unit 60 can identify that the charging device is connected through an output signal on the first interface 200, and then the control unit 60 can control the operating state of the first charging circuit 10 to be a charging state, so that the charging device charges the battery 400 of the electronic device through the first charging circuit 10, otherwise, the control unit 60 controls the operating state of the first charging circuit 10 to be a sleep state, so as to disconnect a loop for charging the battery 400 of the electronic device; if the first interface 200 is used to discharge the battery 400, the control unit 60 recognizes the external device access through the output signal on the first interface 200, and then the control unit 60 may control the operating state of the first discharging circuit 20 to be the discharging state, so that the battery 400 of the electronic device is discharged through the first discharging circuit 20 and the first interface 200, otherwise, the control unit 60 controls the operating state of the first discharging circuit 20 to be the sleep state, so as to disconnect the circuit of discharging the battery 400 of the electronic device.
If the second interface 200 is used for charging, the control unit 60 recognizes the connection of the charging device through the output signal of the detection circuit 50 (the output signal of the detection circuit 50 is determined by the output signal of the second interface 200), and similarly, the control unit 60 may control the operating state of the second charging circuit 30 to be a charging state, so that the charging device charges the battery 400 of the electronic device through the second charging circuit 30; on the contrary, the control unit 60 controls the working state of the second charging circuit 30 to be a sleep state, so as to disconnect the circuit for charging the battery 400 of the electronic device; if the second interface 200 is used for discharging, the control unit 60 recognizes the connection of the external device through the output signal of the detection circuit 50, and at the same time, the control unit 60 controls the operating state of the second discharging circuit 40 to be the discharging state so that the battery 400 of the electronic device is discharged through the second discharging circuit 40, otherwise, the control unit 60 controls the operating state of the second discharging circuit 40 to be the sleeping state so as to disconnect the circuit for discharging the battery 400 of the electronic device.
In summary, the first interface 200 and the second interface 300 can both support the charging function.
It should be noted that the first interface 200 should be a USB OTG interface, and the second interface 300 should be a USB HOST interface. For the USB OTG interface, the control unit 60 identifies the external device (non-charging device) connected to the USB OTG interface through the level of the ID pin of the control unit, and all the external devices described in this embodiment are non-charging devices. And can also identify whether the USB OTG interface is connected with the charging device through the level of its own DET pin, so that the connection between the first interface 200 and the control unit 60 does not need to add an additional identification circuit. For the USB HOST interface, the control unit 60 cannot directly identify whether it is connected to the charging device or the external device, and therefore the detection circuit 50 is required to enable the control unit 60 to identify whether the USB HOST interface is connected to the charging device or the external device.
In an embodiment, as shown in fig. 3, the first interface 200 and the second interface 300 are both TYPEC interfaces, the first interface 200 is an OTG interface, the second interface 300 is a HOST interface, and the first interface 200 and the second interface 300 are both provided with a channel configuration pin and a power supply pin respectively.
For the first interface 200, the levels on the channel configuration pin 201 and the power supply pin 202 of the first interface 200 can be directly recognized by the control unit 60. The channel configuration pin 201 of the first interface 200 may be a CC pin in a TYPEC interface, where the CC pin is at a low level when the first interface 200 accesses an external device, and the CC pin is at a high level when the first interface 200 does not access the external device; the power pin 202 of the first interface 200 may be a VBUS pin in the TYPEC interface, and the VBUS pin is at a high level when the first interface 200 is connected to the charging device, and at a low level when the first interface 200 is not connected to the charging device.
Specifically, referring to fig. 4, the channel configuration pin 201 of the first interface 200 is connected to the resistor R6 and the ID pin of the control unit 60, the other end of the sixth resistor is connected to the fourth power source V4, and the power pin 202 of the first interface 200 is connected to the DET pin of the control unit through the resistor R7.
Therefore, when the first interface 200 is connected to an external device, the channel configuration pin 201 of the first interface 200 is changed from a high level to a low level, and the ID pin of the control unit 60 is also a low level, it is determined that the first interface 200 is connected to the external device, and the control unit 60 controls the operating state of the first discharge circuit 20 to be a discharge state, otherwise, if the channel configuration pin 201 of the first interface 200 is a high level, it is determined that the first interface 200 is not connected to the external device, and the control unit 200 controls the operating state of the first discharge circuit 20 to be a sleep state; when the first interface 200 is connected to the charging device, the power pin 202 of the first interface 200 changes from the low level to the high level, the VBUS pin of the control unit 60 is also at the high level, it is determined that the first interface 200 is connected to the charging device, and the control unit 60 controls the working state of the first charging circuit 10 to be the charging state, otherwise, if the power pin 202 of the first interface 200 is at the low level, it is determined that the first interface 200 is not connected to the charging device, and the control unit 60 controls the working state of the first charging circuit 10 to be the sleep state. It is understood that the fourth power source V4 may be a power source provided in the electronic device, for example, a 1.8V power source output by a voltage regulator unit in the electronic device, or an external power source, which is not limited herein.
Referring to fig. 3 again, for the second interface 300, if the levels on the channel configuration pin 301 and the power pin 302 of the second interface 300 cannot be directly identified by the control unit 60, the detection circuit 50 needs to be disposed between the second interface 300 and the control unit 60, wherein in an embodiment, the detection circuit 50 includes a channel configuration pin detection circuit 51 and a power detection circuit 52, the channel configuration pin detection circuit 51 is respectively connected to the channel configuration pin 301 and the control unit 60 of the second interface 300, and the power detection circuit 52 is respectively connected to the power pin 302 and the control unit 60 of the second interface 300.
Specifically, the channel configuration pin detection circuit 51 is configured to detect an input signal of the channel configuration pin 301 of the second interface 300, and output a corresponding signal to the control unit 60 according to the detected signal, so that the control unit 60 controls the operating state of the second discharge circuit 40; the power detection circuit 52 is configured to detect an input signal of the power pin 302 of the second interface 300, and output a corresponding signal to the control unit 60 according to the detected signal, so that the control unit 60 controls the operating state of the second discharging circuit 40.
Optionally, referring to fig. 5 in combination with fig. 3, the channel configuration pin detection circuit 51 includes a resistor R1, a resistor R2, a nand gate logic circuit U1, and a first switch tube Q1, wherein one end of the resistor R1 is connected to a first power supply V1, the other end of the first resistor is connected to one input terminal of a nand gate logic circuit U1, the other input terminal of the nand gate logic circuit U1 is connected to the channel configuration pin 301 of the second interface 300, an output terminal of the nand gate logic circuit U1 is connected to a control terminal of the first switch tube Q1, a second terminal of the first switch tube Q1 is grounded, a first terminal of the first switch tube Q1 is connected to one end of the resistor R2 and the control unit 60, and the other terminal of the resistor R2 is connected to a second power supply V2.
Optionally, the channel configuration pin detection circuit further includes a resistor R3, and two ends of the resistor R3 are respectively connected to the first end of the first switch transistor Q1 and the third power source V3.
Optionally, the power detection circuit 52 includes a resistor R4 and a resistor R5, wherein the resistor R4 and the resistor R5 are connected in series, a non-series end of the resistor R4 is connected to the power pin 302 of the second interface 300, a connection point between the resistor R4 and the resistor R5 is connected to the control unit 60, and a non-series end of the resistor R5 is connected to ground.
When the second interface 300 is connected to an external device, therefore, the channel configuration pin 301 of the second interface 300 changes from high level to low level, the low level is inputted to one of the input pins of the nand gate logic circuit U1, while the other input pin of the nand gate logic circuit U1 is constantly high level (the high level is provided by V1 through the resistor R1), the output pin of the nand gate logic circuit U1 outputs a high level to turn on the first switch Q1, and the control unit 60 obtains a low level from the first terminal of the first switch Q1, this is because, after the first switch tube Q1 is turned on, the first end of the first switch tube Q1 is connected to the ground through the second end, thereby being forcibly pulled down, at this time, the control unit 60 determines that the second interface 300 is accessed to the external device, and the control unit 60 controls the working state of the second discharging circuit 40 to be a discharging state; on the contrary, if the second interface 300 does not access an external device, the channel configuration pin 301 of the second interface 300 is kept at a high level, so that both input pins of the nand gate logic circuit U1 are at a high level, that is, the output pin of the nand gate logic circuit U1 is at a low level, so that the first switch tube Q1 is turned off, the control unit 60 obtains the high level from the first end of the first switch tube Q1, because after the first switch tube Q1 is turned off, the second power supply V2 forcibly pulls up the voltage at the first end of the first switch tube Q1 through the resistor R2, and at this time, the control unit 60 determines that the second interface 300 does not access the external device, and the control unit 60 controls the working state of the second discharge circuit 40 to be in the sleep state.
In another embodiment, in order to ensure more reliable circuit, a resistor R3 and a third power source V3 are further provided, and after the first switch Q1 is turned off, the third power source V3 keeps the voltage at the first end of the first switch Q1 at a high level through the resistor R3.
When the second interface 300 is connected to the charging device, at this time, the power pin 301 of the second interface 300 changes from low level to high level, and the high level is divided by the resistor R4 and the resistor R5, so that the control unit 60 receives a high level signal, determines that the second interface 300 is connected to the charging device, and the control unit 60 controls the operating state of the second charging circuit 30 to be the charging state, whereas if the second interface 300 is not connected to the charging device, the power pin 301 of the second interface 300 is kept at low level, the control unit 60 receives a low level signal, determines that the second interface 300 is not connected to the charging device, and the control unit 60 controls the operating state of the second charging circuit 30 to be the sleep state.
It should be understood that the first power source V1, the second power source V2, and the third power source V3 may be power sources of the electronic device, for example, the first power source V1, the second power source V2, and the third power source V3 are 5V power sources, 3.3V power sources, and 3.3V power sources output by a voltage regulator unit of the electronic device, respectively, and of course, the first power source V1, the second power source V2, and the third power source V3 may also be external power sources, which is not limited herein. In another embodiment, as shown in fig. 6, the first charging circuit 10 includes a third switching transistor Q3 and a PMIC chip U5, a control terminal of the third switching transistor Q3 is connected to the control unit 60, and a first terminal and a second terminal of the third switching transistor Q3 are respectively connected to the control unit 60 and the battery 400 through the PMIC chip U5. The PMIC is an abbreviation of power management IC, namely a power management integrated circuit, and is mainly characterized by high integration level, and the traditional multi-output power supply is packaged in one chip, so that the multi-power supply application scene is higher in high efficiency and smaller in size.
Therefore, when the first charging circuit 10 is in a charging state, the control unit 60 controls the third switch Q3 to be turned on, and at this time, the charging device charges the battery 400 through the first interface 200, the third switch Q3 and the PMIC chip U5.
In an embodiment, the first discharging circuit 20 includes a second current-limiting chip U3 and a voltage-boosting chip U4, and the second current-limiting chip U3 may be a USB current-limiting chip, such as a PL2700 current-limiting chip, wherein the second current-limiting chip U3 includes an enable terminal, a voltage input terminal, and a voltage output terminal, the enable terminal of the second current-limiting chip U3 is connected to the control unit 60, the voltage input terminal of the second current-limiting chip U3 is connected to the battery 400, and the voltage output terminal of the second current-limiting chip U3 is connected to the first interface 200.
Therefore, when the first discharging circuit 20 is in a discharging state, the control unit 60 outputs an enable signal to the enable terminal of the second current limiting chip U3 to enable the second current limiting chip U3 to start operating, and at this time, the battery 400 is discharged through the voltage boosting chip U4, the second current limiting chip U3 and the first interface 200.
In one embodiment, the second charging circuit 30 includes a second switch Q2 and a PMIC chip U5, a control terminal of the second switch Q2 is connected to the control unit 60, and a first terminal and a second terminal of the second switch Q2 are respectively connected to the second interface 300 and the battery 400 through the PMIC chip U5.
Therefore, when the second charging circuit 30 is in the charging state, the control unit 60 outputs a control signal to the second switch Q2 to control the second switch Q2 to be turned on, and at this time, the charging device charges the battery 400 through the second interface 300, the second switch Q2 and the PMIC chip U5.
In another embodiment, the second discharging circuit 40 includes a first current limiting chip U2, the first current limiting chip U2 also includes an enable terminal, a voltage input terminal, and a voltage output terminal, wherein the enable terminal of the first current limiting chip U2 is connected to the control unit 60, the voltage input terminal of the first current limiting chip U2 is connected to the battery 400, and the voltage output terminal of the first current limiting chip U2 is connected to the second interface 300.
Therefore, when the second discharging circuit 40 is in a discharging state, the control unit 60 outputs an enable signal to the enable terminal of the first current limiting chip U2 to enable the first current limiting chip U2 to start operating, and at this time, the battery 400 is discharged through the voltage boosting chip U4, the first current limiting chip U2 and the second interface 300.
It is understood that the first switch Q1, the second switch Q2 and the third switch Q3 may be implemented by one of a transistor, an IGBT switch or a MOS transistor, and the first switch Q1, the second switch Q2 and the third switch Q3 may be the same or different, for example, in an embodiment, the first switch Q1 is implemented by a transistor, and the second switch Q2 and the third switch Q3 are implemented by MOS transistors.
Meanwhile, in the above embodiment, only two interfaces are taken as an example for description, and if a plurality of interfaces (more than two interfaces) exist in the electronic device, only the corresponding circuit needs to be selected according to the type of the interface, for example, if two HOST interfaces are included in the electronic device, the two HOST interfaces may all adopt the second charging circuit, the second discharging circuit and the detection circuit connected to the second interface 300 as described in any of the above embodiments, so that both HOST interfaces can support the charging function.
The utility model provides a charge-discharge circuit is applied to electronic equipment, this electronic equipment includes first interface 200 and second interface 300 at least, charge-discharge circuit 100 includes first charging circuit 10, first discharging circuit 20, second charging circuit 30, second discharging circuit 40, detection circuitry 50 and control unit 60, wherein, first charging circuit 10 and first discharging circuit 20 all are connected with first interface 200, first interface 200 is connected with control unit 60, second charging circuit 30 and second discharging circuit 40 all are connected with second interface 300, second interface 300 is connected with control unit 60 through detection circuitry 50, control unit 60 is used for controlling the operating condition of first charging circuit 10 or first discharging circuit 20 according to the input signal of first interface 200 to and the operating condition of second charging circuit 30 or second discharging circuit 40 is controlled according to the output signal of detection circuitry 50, that is, when the control unit 60 controls the operating state of the first charging circuit 10 to be a charging state and the operating state of the first discharging circuit 20 to be a sleeping state, the battery 400 of the electronic device can be charged through the first interface 200; when the control unit 60 controls the operating state of the second charging circuit 30 to be a charging state and the operating state of the second discharging circuit 40 to be a sleeping state, the battery 400 of the electronic device can be charged through the second interface 300, and therefore, any one of the plurality of interfaces can support a charging function.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; within the idea of the invention, also technical features in the above embodiments or in different embodiments can be combined, steps can be implemented in any order, and there are many other variations of the different aspects of the invention as described above, which are not provided in detail for the sake of brevity; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.
Claims (11)
1. A charge and discharge circuit is applied to electronic equipment, the electronic equipment at least comprises a first interface and a second interface, and the charge and discharge circuit comprises:
the device comprises a first charging circuit, a first discharging circuit, a second charging circuit, a second discharging circuit, a detection circuit and a control unit;
the first charging circuit and the first discharging circuit are both connected with the first interface and the control unit, the first interface is connected with the control unit, and the control unit is used for controlling the working state of the first charging circuit or the first discharging circuit according to an input signal of the first interface;
the second charging circuit and the second discharging circuit are both connected with the second interface and the control unit, the second interface is connected with the control unit through the detection circuit, and the control unit is further used for controlling the working state of the second charging circuit or the second discharging circuit according to the output signal of the detection circuit.
2. The charging and discharging circuit according to claim 1,
the detection circuit comprises a channel configuration pin detection circuit and a power supply detection circuit, the second interface is provided with a channel configuration pin and a power supply pin, the channel configuration pin detection circuit is respectively connected with the channel configuration pin of the second interface and the control unit, and the power supply detection circuit is respectively connected with the power supply pin of the second interface and the control unit;
the channel configuration pin detection circuit is used for detecting an input signal of a channel configuration pin of the second interface;
the power supply detection circuit is used for detecting an input signal of a power supply pin of the second interface.
3. The charging and discharging circuit according to claim 2,
the channel configuration pin detection circuit comprises a first resistor, a second resistor, a NAND gate logic circuit and a first switching tube;
one end of the first resistor is connected with a first power supply, the other end of the first resistor is connected with the input end of the NAND gate logic circuit and the channel configuration pin of the second interface, the output end of the NAND gate logic circuit is connected with the control end of the first switch tube, the second end of the first switch tube is grounded, the first end of the first switch tube is respectively connected with one end of the second resistor and the control unit, and the other end of the second resistor is connected with a second power supply.
4. The charging and discharging circuit according to claim 3,
the channel configuration pin detection circuit further comprises a third resistor;
and two ends of the third resistor are respectively connected with the first end of the first switch tube and a third power supply.
5. The charging and discharging circuit according to claim 2,
the power supply detection circuit comprises a fourth resistor and a fifth resistor which are connected in series;
the non-series end of the fourth resistor is connected with the power supply pin of the second interface, the connecting point between the fourth resistor and the fifth resistor is connected with the control unit, and the non-series end of the fifth resistor is grounded.
6. The charging and discharging circuit according to any one of claims 1 to 5,
the second charging circuit comprises a second switching tube;
the control end of the second switch tube is connected with the control unit, and the first end and the second end of the second switch tube are respectively connected with the battery of the electronic device and the second interface.
7. The charging and discharging circuit according to any one of claims 1 to 5,
the second discharge circuit comprises a first current limiting chip;
the enabling end of the first current limiting chip is connected with the control unit, the voltage input end of the first current limiting chip is connected with a battery of the electronic equipment, and the voltage output end of the first current limiting chip is connected with the second interface.
8. The charging and discharging circuit according to claim 1,
the charging and discharging circuit further comprises a sixth resistor and a seventh resistor;
the channel configuration pin of the first interface is respectively connected with one end of the sixth resistor and the control unit, the other end of the sixth resistor is connected with a fourth power supply, and two ends of the seventh resistor are respectively connected with the power supply pin of the first interface and the control unit.
9. The charging and discharging circuit according to claim 1 or 8,
the first charging circuit comprises a third switching tube;
the control end of the third switching tube is connected with the control unit, and the first end and the second end of the third switching tube are respectively connected with the battery of the electronic equipment and the first interface.
10. The charging and discharging circuit according to claim 1 or 8,
the first discharge circuit comprises a second current limiting chip;
the enabling end of the second current-limiting chip is connected with the control unit, the voltage input end of the second current-limiting chip is connected with a battery of the electronic equipment, and the voltage output end of the second current-limiting chip is connected with the first interface.
11. An electronic device, characterized in that the electronic device comprises a first interface, a second interface and a charging and discharging circuit according to any one of claims 1-10.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120102456.4U CN214674403U (en) | 2021-01-14 | 2021-01-14 | Charging and discharging circuit and electronic equipment |
Applications Claiming Priority (1)
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| CN202120102456.4U CN214674403U (en) | 2021-01-14 | 2021-01-14 | Charging and discharging circuit and electronic equipment |
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