CN107077183B

CN107077183B - Low power implementation of Type-C connector subsystem

Info

Publication number: CN107077183B
Application number: CN201680003008.0A
Authority: CN
Inventors: 里什·阿加瓦尔; 尼古拉斯·亚历山大·伯德纳鲁克; 帕万·库马尔·库奇普蒂; 苏里什·奈杜·莱卡拉
Original assignee: Cypress Semiconductor Corp
Current assignee: Cypress Semiconductor Corp
Priority date: 2015-06-19
Filing date: 2016-03-02
Publication date: 2021-02-26
Anticipated expiration: 2036-03-02
Also published as: US10866627B2; DE112016002768T5; KR101924921B1; GB2553699B; CN107491159A; KR102052190B1; CN107491159B; GB202114929D0; US20170262035A1; GB2553699A; US9625988B1; US9400546B1; KR20170124579A; WO2016204832A1; GB201715810D0; CN111858432A; DE112016002768B4; JP2018517957A; JP2018206425A; JP6531208B2

Abstract

Techniques for low power implementation of a Universal Serial Bus (USB) Type-C connector subsystem are described herein. In an example embodiment, an Integrated Circuit (IC) chip device includes a Universal Serial Bus (USB) Type-C subsystem. The Type-C subsystem is configured to operate an Ra termination circuit that consumes no more than 100 μ Α of current after being applied to the Vconn line of the Type-C subsystem, and/or to operate one or more standby reference circuits in a deep sleep state of the device to perform detection on a Configuration Channel (CC) line of the Type-C subsystem, wherein the device consumes no more than 100 μ Α of current in the deep sleep state.

Description

Low power implementation of Type-C connector subsystem

Priority

This application is international application U.S. application No. 14/866,276 filed on 25/9/2015, claiming priority and benefit of U.S. provisional application No. 62/182,238 filed on 19/6/2015, all of which are incorporated herein by reference in their entirety.

Technical Field

The present disclosure generally relates to Type-C connector subsystems.

Background

Various electronic devices (e.g., such as smart phones, cellular phones, tablets, notebook computers, laptop computers, desktop computers, hubs, etc.) are configured to communicate through a Universal Serial Bus (USB) connector. An emerging technology for USB connectors, referred to as USB Type-C, has recently been defined in version 1.0 of the USB Type-C specification (published on 8/11/2014) and subsequently supplemented in version 1.1 (published on 3/4/2015). The USB Type-C specification defines USB Type-C sockets, plugs, and cables that can support USB communication and/or power delivery via older USB protocols (e.g., such as USB specification revision 2.0 published on 27/4/2000 and USB battery charging specification revision 1.2 published on 7/12/2010) and newer USB protocols (e.g., such as USB 3.1 published on 26/7/2013 and USB power delivery specification revision 2.0 published on 11/8/2014).

While the USB Type-C specification defines some power requirements (e.g., for USB suspend mode), it is left for a particular Type-C implementation to manage the overall power consumption of the Type-C subsystem in a particular electronic device. However, to this end, current USB Type-C implementations are not effective in their overall power consumption, even though effective power consumption may enhance the end-user experience and greatly improve the overall operation of the Type-C subsystem in Type-C cables and Type-C enabled USB devices.

Brief Description of Drawings

FIG. 1A illustrates an example on-die Integrated Circuit (IC) controller with a Type-C subsystem according to some embodiments.

FIG. 1B illustrates an example device including an IC controller with the Type-C subsystem of FIG. 1A, according to an example embodiment.

Fig. 2A illustrates Ra termination circuitry in an example on-chip USB Type-C subsystem, according to some embodiments.

FIG. 2B illustrates an alternate reference circuit in an example on-chip USB Type-C subsystem according to some embodiments.

Fig. 3 illustrates an example method for disabling Ra terminals in a Type-C subsystem, according to some embodiments.

FIG. 4 illustrates an example method for using alternate references in a Type-C subsystem, according to some embodiments.

Fig. 5A illustrates Ra termination circuitry in an example on-chip USB Type-C subsystem, according to some embodiments.

FIG. 5B illustrates a precision resistor circuit in an example on-chip USB Type-C subsystem according to some embodiments.

Detailed Description

The following description sets forth numerous specific details such as examples of specific systems, components, methods, etc. in order to provide a good understanding of various embodiments of the technology described herein for a low power USB Type-C subsystem. It will be apparent, however, to one skilled in the art that at least some embodiments may be practiced without these specific details. In other instances, well-known components, elements, or methods have not been described in detail or are presented in simple block diagram format in order to avoid unnecessarily obscuring the techniques described herein. Therefore, the specific details set forth below are merely exemplary. Particular embodiments may vary from these exemplary details and still be considered within the spirit and scope of the present invention.

Reference in the description to "an embodiment," "one embodiment," "an example embodiment," "some embodiments," and "various embodiments" means that a particular feature, structure, or characteristic described in connection with the embodiments is included in at least one embodiment of the invention. Moreover, the appearances of the phrases "an embodiment," "one embodiment," "an example embodiment," "some embodiments," and "various embodiments" in various places in the description are not necessarily all referring to the same embodiment.

The description includes reference to the accompanying drawings, which form a part hereof. The figures show diagrams in accordance with exemplary embodiments. These embodiments, which may also be referred to herein as "examples," are described in sufficient detail to enable those skilled in the art to practice embodiments of the claimed subject matter described herein. The embodiments may be combined, other embodiments may be utilized, or structural, logical, and electrical changes may be made without departing from the scope and spirit of the claimed subject matter. It should be appreciated that the embodiments described herein are not intended to limit the scope of the subject matter, but rather to enable any person skilled in the art to practice, make, and/or use the subject matter.

Described herein are various implementations of techniques for a low power USB Type-C subsystem in an electronic device. Examples of such electronic devices include, but are not limited to, personal computers (e.g., desktop computers, laptop computers, notebook computers, etc.), mobile computing devices (e.g., tablet computers, electronic reader devices, etc.), mobile communication devices (e.g., smart phones, cellular phones, personal digital assistants, messaging devices, pocket PCs, etc.), connection devices (e.g., cables, adapters, hubs, docking stations, etc.), audio/video/data recording and/or playing devices (e.g., cameras, voice recorders, handheld scanners, monitors, etc.), and other similar electronic devices that may use Type-C connectors (interfaces) for communication and/or battery charging.

As used herein, an electronic device is referred to as "USB-enabled" if it conforms to at least one version of the Universal Serial Bus (USB) specification. Examples of such USB specifications include, but are not limited to, USB specification revision 2.0, USB 3.0 specification, USB 3.1 specification, and/or various supplements (e.g., such as On-The-Go or OTG), versions and errata thereof. The USB specification generally defines the characteristics (e.g., attributes, protocol definitions, transaction types, bus management, programming interfaces, etc.) of a differential serial bus that are required for designing and building standard communication systems and peripherals. For example, a peripheral electronic device is attached to a host device through a USB port of the host device. The USB 2.0 port includes a 5V power supply line (denoted VBUS), a pair of differential data lines (denoted D + or DP and D-or DN), and a ground line for power return (denoted GND). The USB 3.0 port also provides VBUS, D +, D-and GND lines for backward compatibility with USB 2.0. In addition, to support faster differential buses (USB superspeed buses), the USB 3.0 port also provides a pair of differential transmitter data lines (denoted as SSTX + and SSTX-), a pair of differential receiver data lines (denoted as SSRX + and SSRX-), a power line for power supply (denoted as DPWR), and a ground line for power return (denoted as DGND). The USB 3.1 port provides the same lines as the USB 3.0 port for backward compatibility of communications with USB 2.0 and USB 3.0, but extends the performance of the superspeed bus by a set of features called enhanced superspeeds.

Some electronic devices may conform to a given USB Type-C specification or a particular version thereof (e.g., as USB Type-C specification version 1.0, USB Type-C specification version 1.1, or later). As used herein, a USB "Type-C subsystem" refers to hardware circuitry and firmware/software logic in an Integrated Circuit (IC) controller that is configured and operable to perform functions and meet requirements specified in at least one version of the USB Type-C specification. Examples of such Type-C functionality and requirements can include, but are not limited to, communications according to USB 2.0 and USB 3.1, electromechanical definitions and performance requirements for Type-C receptacles, electromechanical definitions and performance requirements for Type-C plugs, requirements for Type-C to legacy cable assemblies and adapters, requirements for Type-C based device detection and interface configuration, requirements for optimized power delivery for Type-C connectors, and the like.

According to the USB Type-C specification, a USB Type-C cable is an active cable having one or more Integrated Circuit (IC) devices disposed therein to define USB Type-C ports at both ends of the cable. To support USB communication according to USB 2.0 and USB 3.1, the Type-C port provides VBUS line, D + line, D-line, GND line, SSTX + line, SSTX-line, SSRX + line, SSRX-line, and the like. In addition, the Type-C port also provides sideband use (denoted SNU) lines for signaling sideband functionality and configuration channel (denoted CC) lines for discovering, configuring and managing connections across the Type-C cable. The Type-C port can be associated with a Type-C plug and with a Type-C receptacle. For ease of use, Type-C plugs and Type-C receptacles are designed as reversible pairs that operate regardless of the orientation of the plug to the receptacle. Thus, a standard Type-C connector (interface) arranged as a standard Type-C plug or receptacle provides pins for the following wires: four VBUS lines, four ground return (GND) lines, two D + lines (DP1 and DP2), two D-lines (DN1 and DN2), two SSTX + lines (SSTXP1 and SSTXP2), two SSTX-lines (SSTXN1 and SSTXN2), two SSRX + lines (SSRXP1 and SSRXP2), two SSRX-lines (SSRXN1 and SSRXN2), two CC lines (CC1 and CC2), and two SBU lines (SBU1 and SBU2), etc. When the Type-C plug of the cable is attached to the Type-C receptacle, one of the CC wires is connected by the cable to establish a signal orientation, and the other CC wire is reused as a 5V power line (denoted Vconn) for powering Integrated Circuit (IC) devices disposed within the Type-C cable.

According to the USB Type-C specification, several types of terminal circuits are used for identification according to a host device supporting USB, a peripheral device supporting USB, and a USB Type-C cable device. For example, a host electronic device (e.g., and/or its USB controller) needs to provide an Rp termination circuit ("Rp termination") that includes a pull-up resistor element that, when asserted, identifies the host device on the Type-C cable. In another example, the peripheral electronic device (e.g., and/or its USB controller) needs to provide an Rd termination circuit ("Rd termination") that includes a pull-down resistor element that, when asserted, identifies the peripheral device on the Type-C cable. In another example, a Type-C cable device (e.g., an IC controller disposed in a plug of a cable) requires provision of Ra termination circuitry ("Ra termination") that includes a pull-down resistor element that, when asserted, identifies the Type-C cable to the IC controller of the peripheral and/or host device connected thereto.

A USB Type-C cable is an active device having one or more Integrated Circuit (IC) devices disposed therein. Thus, when a Type-C cable is in use (e.g., when connected to at least one USB-enabled device), the ICs within the cable consume power. However, due to the complex requirements of the USB Type-C specification, conventional implementations of the USB Type-C subsystem (and the transceiver therein) typically keep the ICs within the Type-C cable in an active state, thereby enabling the cable to draw a relatively large amount of current (e.g., such as 5mA or higher). However, drawing a relatively large amount of current (and correspondingly power) is often a drawback, particularly for battery-powered devices. In addition, conventional implementations of USB Type-C subsystems (and transceivers therein) typically use external off-chip components (e.g., such as resistors, capacitors, etc.) to implement the termination and transmission circuitry required for the various Type-C's, which requires larger chips and further increases the total power used by the Type-C cable when in use.

To address the problem of relatively high power usage and other problems, the techniques for the low power USB Type-C subsystem described herein ensure that IC controller (e.g., system) power is reduced when the IC controller is in an attached/detached state and there is no active communication on the CC line of the Type-C subsystem. For example, the techniques described herein ensure that the Ra terminal of a Type-C cable is removed/disabled when the cable is attached to a USB-enabled device, thereby reducing the power used by the cable in some embodiments. Further, in these and/or other embodiments, the techniques described herein provide a new "wait for attach" state in which the IC controller in the Type-C cable even turns off system resources for deep sleep and thus consumes very low power. In these and/or other embodiments, sophisticated voltage and/or current references are generated by the IC controller in the deep sleep state that meet all of the attach/detach requirements of the USB Type-C specification in several types of Type-C applications, thereby avoiding the need to become voltage and current references for high power consumption active modes. Example types of Type-C applications include, but may not be limited to: a Downstream Facing Port (DFP) USB application, wherein an IC controller with a Type-C subsystem is configured (e.g., in a USB-enabled host device) to provide a downstream facing USB port; an Upstream Facing Port (UFP) USB application, wherein an IC controller with a Type-C subsystem is configured (e.g., in a USB-enabled peripheral device or adapter) to provide an upstream facing USB port; a dual-role port (DRP) USB application, wherein an IC controller with a Type-C subsystem is configured to support both DFP and UFP applications on the same USB port; and an electronically tagged cable application (EMCA), wherein an IC controller having a Type-C subsystem is configured to provide a Type-C port within a cable device (e.g., an active Type-C cable, a Vconn-powered accessory, etc.).

In an example embodiment, the device includes a USB Type-C subsystem. In some aspects of this embodiment, the device is an IC chip that can be disposed into a Type-C cable or another USB application (e.g., such as a hybrid cable, a USB-to-Type-C adapter, a Vconn-powered accessory, etc.). The Type-C subsystem includes a negative charge pump and Ra termination circuitry, where the negative charge pump is coupled to the Ra termination circuitry, and the Ra termination circuitry is coupled to the Vconn line of the Type-C subsystem. As used herein, a "negative charge pump" refers to an electronic circuit configured to create a sub-zero voltage supply (e.g., a voltage supply in the range of-0.7V to-1.95V for some implementations). The Ra termination circuit is designed such that the Ra termination is enabled (e.g., is "on") when the Type-C subsystem is not powered. The Type-C subsystem is configured to enable the negative charge pump when the voltage on the Vconn line reaches above a threshold voltage, and disable the Ra termination circuit when the negative charge pump is enabled, wherein the Ra termination circuit consumes no more than 50 μ Α of current after being disabled. In an example aspect of this embodiment, the threshold voltage is in a range of 2.375V to 2.625V. In the same or a different aspect, the Ra termination circuit comprises a native on-chip device that includes one or more N-type metal oxide (NMOS) transistors. The transistors of the local devices have depletion doping such that the local devices have a voltage gate threshold V of zero or near zero_T(for example, for various native device implementations, the native device has its gate voltage V_TIs zero or near zero (e.g., 0V or V much less than 700mV_TVoltage) turns on its channel). In an example aspect, the Type-C subsystem is further configured to detect when the voltage on the Vconn line is no longer applied and disable the negative charge pump to enable the Ra termination circuit.

In an example embodiment, the device includes a USB Type-C subsystem. In some aspects of this embodiment, the device is an IC chip that can be placed into a Type-C cable or configured in a DFP, UFP, or DRP USB application. In this embodiment, the Type-C subsystem includes a gate control device configured to control the Ra terminal and a negative charge pump coupled to the gate control device such that when the negative charge pump is enabled/activated, it is configured to disable the Ra terminal. The coupling of the negative charge pump to the gate control device of the Ra termination circuit ensures that the Ra termination can be disabled (e.g., become "off") when it no longer needs to be identified (e.g., to reduce power consumption). In an example aspect of this embodiment, the Ra terminal is implemented in a native on-chip device comprising one or more N-type metal oxide (NMOS) transistors, wherein the native device has a zero or near zero voltage gate threshold. In the same or another example aspect, when the Ra terminal is disabled, the total current consumed by the Type-C subsystem is equal to or less than 50 μ Α. In some example aspects of this embodiment, the Type-C subsystem may further include one or more backup references configured to apply the Rp termination and detect the Ra and Rd terminations on the CC line, wherein the one or more backup references consume a current in a range of 10 μ Α to 15 μ Α.

In an example embodiment, the equipment includes a USB Type-C subsystem. In some aspects, the equipment is a USB Type-C cable that includes a USB Type-C plug in which the Type-C subsystem is disposed, while in other aspects, the equipment includes a Type-C receptacle in which the Type-C subsystem is configured according to the receptacle. In this example embodiment, the Type-C subsystem includes a gate control device configured to control the Ra terminal and a negative charge pump coupled to the gate control device such that, when enabled/activated, the negative charge pump is configured to disable the Ra terminal. In some aspects of this embodiment, the Type-C subsystem may further include one or more backup references configured to apply Rp terminations and detect Rp and Rd terminations on the CC line of the Type-C subsystem.

In an example embodiment, the device is an Integrated Circuit (IC) chip that includes a processor and a USB Type-C subsystem coupled thereto. In some form factors, the device may be a USB Type-C cable that includes a USB Type-C plug in which the Type-C subsystem is disposed, while in other form factors, the device may be disposed in equipment (e.g., such as a mobile device) that includes a Type-C receptacle, wherein the Type-C subsystem is configured according to the receptacle. In this embodiment, the Type-C subsystem is configured to: an Ra termination circuit operatively coupled to the Vconn line of the Type-C subsystem, wherein the Ra termination circuit consumes no more than 100 μ Α of current (or more preferably, no more than 50 μ Α of current) after the Ra termination circuit is applied to the Vconn line; and operating one or more standby reference circuits in a deep sleep state of the device to perform detection on the CC line of the Type-C subsystem, wherein the device consumes no more than 100 μ Α of current (or more preferably, no more than 50 μ Α of current) in the deep sleep state. In an example aspect of this embodiment, the Ra termination circuit is configured to remain "on" when the Type-C subsystem is not powered. In the same or a different aspect, to operate the Ra termination circuit, the Type-C subsystem is configured to: keeping the Ra termination circuit "on" when the Type-C subsystem is not powered; detecting when the Vconn line is powered; and enabling the negative charge pump when the Vconn line reaches above the threshold voltage in order to disable the Ra termination circuit. In an example aspect of this embodiment, the Type-C subsystem is configured to transition from a deep sleep state of the device to an active state of the device when a communication is detected on the CC line, and to revert to the deep sleep state when the CC line becomes idle. In the same or a different aspect, the Type-C subsystem is configured to transition from a deep sleep state of the device to a waiting-for-attachment state of the device when detachment of the terminal is detected on the CC line in the deep sleep state.

In an example embodiment, an apparatus includes a processor and a USB Type-C subsystem coupled thereto, wherein the Type-C subsystem is disposed in an Integrated Circuit (IC) chip. In some form factors, the apparatus may also include a Type-C receptacle, wherein the Type-C subsystem is configured and coupled according to the receptacle. In this embodiment, the Type-C subsystem is configured to: the method includes enabling one or more standby reference circuits in an active state of the IC chip, transitioning from the active state of the IC chip to a deep sleep state of the IC chip, and operating the one or more standby reference circuits in the deep sleep state to perform detection on the CC line of the Type-C subsystem, wherein in the deep sleep state the IC chip consumes no more than 50 μ Α of current and/or the one or more standby reference circuits consume a current in a range of 10 μ Α to 15 μ Α. In an example aspect of this embodiment, the Type-C subsystem may be further configured to enable a precision Rd termination detector or a precision Ra termination detector when attachment of a termination is detected on one of the CC lines, and to enable one or more backup reference circuits after attachment of the termination is detected. In the same or a different aspect, the Type-C subsystem may be further configured to transition the IC chip from the deep sleep state back to the active state when a communication is detected on one of the CC lines, and to resume the deep sleep state when the CC line becomes idle. In the same or a different aspect, the Type-C subsystem may be further configured to transition the IC chip from the deep sleep state to a wait for attachment state of the IC chip when detachment of the terminal is detected on one of the CC lines in the deep sleep state. In the wait for attach state, the Type-C system can be configured to consume no more than 2 μ Α of current. Further, in the wait for attachment state, the Type-C subsystem may be configured to wait for attachment of the Rd terminal or the Ra terminal on one of the CC lines, and transition the IC chip from the wait for attachment state to the active state when either of the Rd terminal or the Ra terminal is detected.

In an example embodiment, a method for reducing power consumed by a USB Type-C subsystem includes: when the Type-C subsystem is not powered, keeping the Ra terminal 'on'; detecting when a Vconn line of the Type-C subsystem is powered; and disabling the Ra termination by enabling the negative charge pump when the Vconn line reaches the threshold voltage. In an example aspect of this embodiment, detecting when the Vconn line is powered comprises: detecting an attachment event on the Vconn line; postponing activation of circuitry required by the Type-C subsystem after the attachment event is detected and before the Vconn line reaches a threshold voltage; and activating the circuitry required for the Type-C subsystem after the Vconn line reaches a threshold voltage. In this aspect, deferring activation of the circuitry required by the Type-C subsystem is performed in a wait for attachment state in which the Type-C subsystem waits for attachment of either the Rd terminal or the Ra terminal on the CC line of the Type-C subsystem. In some aspects of this embodiment, the method for reducing power further comprises: when an attachment of an Rd termination or an Ra termination is detected, enabling a respective precision Rd termination detector or a precision Ra termination detector; and in a deep sleep state, enabling one or more backup references, wherein in the deep sleep state, a total current consumed by the Type-C subsystem is equal to or less than 50 μ Α. In these aspects, the method may further comprise: transitioning from a deep sleep state to an active state when communication is detected on the CC line, and resuming to the deep sleep state when the CC line becomes idle; and transitioning from the deep sleep state to a wait for attachment state when detachment of the Rd terminal or the Ra terminal is detected in the deep sleep state. In some aspects of this embodiment, the threshold voltage of the Vconn line is in the range of 2.375V to 2.625V. In these and/or other aspects, disabling the Ra terminal is performed without placing the Type-C subsystem in an active state, wherein in the active state, the Type-C subsystem consumes a total current of at least 1 mA.

FIG. 1A illustrates an example device 100 configured in accordance with the techniques for a low power USB Type-C subsystem described herein. In the embodiment illustrated in fig. 1A, the apparatus 100 is an Integrated Circuit (IC) controller chip fabricated on an IC wafer. For example, the IC controller 100 may be a single chip IC device in the USB controller family developed by the seplacian semiconductor corporation of san jose, california.

The IC controller 100 includes, among other components, a CPU subsystem 102, peripheral interconnects 114, system resources 116, various input/output (I/O) blocks (e.g., 118A-118C), and a USB subsystem 120. In addition, the IC controller 100 provides circuitry and firmware configured and operable to support a plurality of power consumption states 122.

The CPU subsystem 102 includes one or more CPUs (central processing units) 104, flash memory 106, SRAM (static random access memory) 108, and ROM (read only memory) 110, all coupled to a system interconnect 112. The CPU 104 is a suitable processor that may run in a system-on-chip device. In some embodiments, a CPU may be optimized for low power operation with extended clock gating and may include various internal controller circuits that allow the CPU to operate in various power consumption states. For example, the CPU may include a wake-up interrupt controller configured to wake up the CPU from a deep sleep state, thereby enabling power to be turned off while the IC chip is in the deep sleep state. Flash memory 106 may be any type of program memory (e.g., nand flash, nor flash, etc.) that may be configured to store data and/or programs. SRAM 108 may be any type of volatile or non-volatile memory suitable for storing data and firmware/software instructions accessed by CPU 104. ROM 110 may be any type of suitable memory configurable to store boot routines, configuration parameters, and other system-on-chip firmware. System interconnect 112 is a system bus (e.g., a single or multi-level advanced high performance bus or AHB) configured as an interface to couple various components of CPU subsystem 102 to each other and a data and control interface between various components of the CPU subsystem and peripheral interconnect 114.

Peripheral interconnect 114 is a peripheral bus (e.g., single-level or multi-level AHB) that provides a control interface and primary data between CPU subsystem 102 and its peripherals and other resources, such as system resources 116, I/O blocks (e.g., 118A-118C), and USB subsystem 120. The peripheral interconnect may include various controller circuits (e.g., direct memory access or DMA controllers) that may be programmed to pass data between peripheral blocks without burdening the CPU subsystem. In various embodiments, each component of the CPU subsystem and peripheral interconnections may differ with each choice or type of CPU, system bus, and/or peripheral bus.

System resources 116 include various electronic circuits that support operation of IC controller 100 in its various states and modes. For example, the system resources 116 may include a power subsystem that provides power resources required for each controller state/mode, such as, for example, voltage and/or current references, wake-up interrupt controllers (WICs), power-on-reset (PORs), and the like. In some embodiments, the power subsystem of the system resources 116 may also include circuitry that allows the IC controller 100 to draw power from an external source having several different voltage levels. The system resources 116 may also include a clock subsystem that provides various clocks used by the IC controller 100, as well as circuitry that allows various controller functions such as external resets.

In various embodiments and implementations, an IC controller, such as IC controller 100, may include a variety of different types of I/O blocks and subsystems. For example, in the embodiment illustrated in fig. 1A, the IC controller 100 includes a GPIO (general purpose input output) block 118A, TCPWM (timer/counter/pulse width modulation) block 118B, SCB (serial communication block) 118C and a USB subsystem 120. The GPIO 118A includes circuitry configured to implement various functions such as, for example, pull-up, pull-down, input threshold selection, input and output buffer enable/disable, multiplexing signals connected to various I/O pins, etc. TCPWM 118B includes circuitry configured to implement a timer, a counter, a pulse width modulator, a decoder, and various other analog/mixed signal elements configured to operate on input/output signals. SCB 118C includes a processor configured to implement various serial communication interfaces (such as, for example, I)²C. SPI (serial peripheral interface), UART (universal asynchronous receiver/transmitter), etc.).

The USB subsystem 120 is a Type-C subsystem configured according to the techniques described herein, and may also provide support for USB communications over USB ports (e.g., such as USB 2.0, USB 3.0, USB 3.1, etc.), as well as other USB functions such as power delivery and battery charging. The USB subsystem 120 includes a Type-C transceiver 120A and physical layer logic 120B. The Type-C transceiver 120A and PHY 120B are configured as integrated baseband PHY circuits to perform various digital encoding/decoding functions (e.g., bi-phase mark encoding or BMC, cyclic redundancy check or CRC, etc.) and analog signal processing functions related to physical layer transmissions. In accordance with the techniques described herein, the USB subsystem 120 is configured with termination circuitry required to identify the role of the IC controller 100 in Type-C operation. For example, in some embodiments, USB subsystem 120 includes: an Ra termination circuit configured to identify the IC controller 100 as a Vconn-powered accessory or electronically tagged cable; rd termination circuitry configured to identify IC controller 100 as a UFP application (e.g., in a hybrid cable or dongle); and Rp termination circuitry configured to identify the IC controller 100 as a DFP application and to use current sources that can be programmed to indicate a full range of current capacity on the VBUS line as defined in the USB Type-C specification. Additionally, in these and/or other embodiments, the IC controller 100 (and/or its USB subsystem 120) may be configured to respond to communications defined in the USB power delivery (USB-PD) specification, such as, for example, SOP', and SOP "messaging.

USB subsystem 120 includes circuitry configured to operate in accordance with the low power techniques described herein. In some embodiments, the USB subsystem 120 includes a gate control device configured to control the Ra termination circuit and a negative charge pump coupled to the gate control device such that when the negative charge pump is enabled/activated, it is configured to disable the Ra termination circuit. By design, the Ra termination circuit is enabled (e.g., "on") when the IC controller 100 is not powered. When power is applied on the Vconn line of the USB subsystem 120, the Ra termination circuit remains enabled (e.g., "on") while the voltage on the Vconn line remains below a threshold voltage (e.g., such as 2.5V). When the voltage on the Vconn line exceeds a threshold voltage, control circuitry in USB subsystem 120 enables the negative charge pump, which in turn disables the Ra terminal via the gate control device, thereby reducing the power used by the USB subsystem and IC controller 100.

In these and/or other embodiments, USB subsystem 120 may also include a backup reference source coupled to a voltage threshold detector on the CC/Vconn line to implement several power consumption states 122 of IC controller 100. The power consumption states 122 include an active state (e.g., where the IC controller consumes at least 1mA of current, and typically about 5mA of current) and a sleep state (which differs from the active state in the number of clocks running). In accordance with the techniques described herein, power consumption states 122 also include the following low power consumption states: a deep sleep state (where the IC controller consumes 50 μ Α or less of current), and a wait for attach state (e.g., where the IC controller consumes 2 μ Α or less of current). For example, the USB subsystem 120 is configured to maintain the IC controller 100 in a wait-for-attachment state while waiting for an attachment event on the CC line (or when the voltage on the Vconn line does not reach a threshold level), to transition the IC controller to an active/sleep state when the Ra or Rd termination circuit is enabled to detect the type of attached termination, to transition to a deep sleep state after detection based on the Ra/Rd termination circuit is complete, and to transition back to a wait-for-attachment state when the Ra/Rd termination circuit is disconnected.

FIG. 1B illustrates an example operating environment in which the described techniques for a low-power Type-C subsystem may be implemented. In each of these operating environments, an IC controller (such as IC controller 100 of fig. 1A) may be arranged and configured in a USB-enabled device according to the techniques described herein. Referring to fig. 1B, in an example embodiment, the USB controller 100A may be arranged and configured in a computing device (e.g., laptop 130) as a DFP or DRP USB application. In another example embodiment, the USB controller 100B may be arranged and configured in an electronic device (e.g., monitor 140) as a DFP or DRP USB application. In yet another example embodiment, USB controller 100C may be arranged and configured as a UFP USB application in a networked device (e.g., hub 150). In yet another embodiment, the USB controller 100D and (possibly) the USB controller 100E may be arranged and configured as an EMCA application within one (or both) plugs of the Type-C cable 160.

Fig. 2A illustrates Ra termination circuitry in an example on-chip USB Type-C subsystem that may be disposed in a USB controller, such as IC controller 100 in fig. 1A. In the example embodiment of fig. 2A, the IC controller and its Type-C subsystem 120 may be disposed within a cable and configured as an EMCA (cable) application in accordance with the techniques described herein.

In FIG. 2A, the USB Type-C subsystem 120 is part of an IC controller chip fabricated on an IC wafer. The Type-C subsystem 120 includes on-chip Ra termination circuitry coupled to the CC/Vconn line. In operation, one of the CC lines in the Type-C subsystem 120 is connected to establish a signal orientation and the other CC line is reused as the Vconn line for powering the USB controller and the Type-C subsystem therein. Thus, although not shown in fig. 2A, the Type-C subsystem 120 may include two Ra termination circuits, each coupled to a separate one of the CC/Vconn lines. The Ra termination circuit in fig. 2A includes Ra resistor elements (e.g., -1K Ω) coupled in series with the native on-chip device 206. A resistor element having a relatively high impedance (e.g., -1M Ω) is coupled between the CC/Vconn line and the gate of the local device 206. The native device 206 is an on-chip electronic circuit that may include one or more native NMOS transistors and other on-chip elements. The local device 206 has a zero or near zero threshold voltage-e.g., the local device turns on even when its gate is coupled to ground. In accordance with the techniques described herein, the gate of the native device 206 is coupled to a gate control apparatus 204, the gate control apparatus 204 being an electronic circuit that includes electronic elements (e.g., diodes, transistors, switches, etc.) configured to apply control functions. The gate control device 204 is coupled to the negative charge pump 202. The negative charge pump 202 is an electronic circuit configured to create a sub-zero (e.g., negative) voltage supply.

The native device 206 is configured such that the Ra termination circuitry remains enabled ("on") when the Type-C subsystem 120 is not powered. The coupling of the gate of the native device 206 to the CC/Vconn line through a high impedance resistor element ensures that when the Type-C subsystem 120 is not powered (and/or the voltage on the Vconn line is below a certain threshold), the voltage on the gate is zero or near zero, which turns on the native device 206 on the CC/Vconn line and effectively applies an Ra pull-down resistance. When the Type-C subsystem 120 is powered through the Vconn line and the voltage thereon reaches a threshold voltage, a firmware interrupt is generated to enable the negative charge pump 202. When the negative charge pump 202 is activated, it applies a negative voltage on the gate of the native device 206 via the gate control means 204. The negative voltage on its gate turns off the local device 206, thereby disabling the Ra terminal coupled to the Vconn line and effectively reducing the power used by the USB controller and its Type-C subsystem 120. When the power on the Vconn line is removed (e.g., when the Vconn line is disconnected/open), the negative charge pump 202 turns off and the voltage on the gate of the native device 206 returns to zero or near zero, turning on the native device and effectively enabling the Ra terminal on the Vconn line.

Note that all of the components of the Ra termination circuit in fig. 2A (e.g., negative charge pump 202, gate control device 204, local devices 206, Ra and high impedance resistor elements, etc.) are internal on-chip components in accordance with the low power techniques described herein. Further, by disabling the Ra termination circuit in fig. 2A, the techniques described herein reduce the current consumed by the Ra termination to less than 50 μ Α. This is in contrast to conventional implementations of Ra termination circuits, which typically use external off-chip components (e.g., such as enable/disable pins, precision resistors, capacitors, etc.) that keep the Ra termination on when the USB controller and its USB Type-C subsystem are powered and thus consume at least 5mA of current. Thus, the techniques described herein provide about a twenty-fold (20x) improvement in the current/power consumption of a USB controller and its Type-C subsystem.

FIG. 2B illustrates an example on-chip USB Type-C subsystem that may be disposed in a USB controller, such as IC controller 100 in FIG. 1A. In the example embodiment of fig. 2B, the IC controller and its Type-C subsystem 120 may be arranged and configured as a DFP or DRP application in accordance with the techniques described herein. In FIG. 2B, the Type-C subsystem 120 is part of an IC controller chip (not shown) fabricated on an IC wafer.

In accordance with the techniques described herein, the Type-C subsystem 120 includes a backup reference 210, the backup reference 210 being used to implement detection and termination on the CC line of the Type-C subsystem 120. The back-up reference 210 is a precision low-power voltage and/or current reference source that can consume currents of 10 muA to 15 muA. The back-up reference 210 is coupled to a voltage threshold detector 212, an Rp termination circuit 214, and an Rd termination circuit 216. The voltage threshold detector 212 is an electronic circuit coupled to the CC lines (CC1 and CC2) of the Type-C subsystem 120 and configured to detect a voltage level thereon. The Rp termination circuit 214 is coupled to the CC line of the Type-C subsystem 120 and is used for host device identification when the Type-C subsystem (and its USB controller) is disposed in the device as a DFP or DRP application. The Rd termination circuit 216 is coupled to the CC line of the Type-C subsystem 120 and is used for peripheral device identification when the Type-C subsystem (and its USB controller) is disposed in the device as a UFP application. In operation, when the USB controller enters a deep sleep state, the standby reference 210 is enabled by the Type-C subsystem 120. In the deep sleep state, the standby reference 210 is configured to provide a voltage/current reference to the voltage threshold detector 212, the Rp termination circuit 214, and/or the Rd termination circuit 216 without powering the USB controller into an active state. This allows the Type-C subsystem 120 to perform Rp termination and attach/detach detection on the CC line without having the USB controller consume power in the active state.

Note that in accordance with the low power techniques described herein, the back-up reference 210 in fig. 2B is a precision voltage and/or current reference source that draws a very low amount of current (e.g., in the range of 10 μ Α to 15 μ Α). This is in contrast to conventional implementations of Type-C detection and termination, which typically hold the USB controller in an active mode (resulting in increased power consumption) and use an active reference that consumes a relatively large amount of current (e.g., about 1mA or more).

Fig. 3 is a flow diagram illustrating an example method for disabling Ra terminals in a Type-C subsystem configured for an EMCA (cable) application in accordance with the techniques described herein. According to example embodiments, the operations of the method in fig. 3 are described as being performed by a controller (e.g., a USB controller) and/or its circuitry (e.g., a USB Type-C subsystem). However, it is noted that various implementations and embodiments may use various and possibly different components to perform the operations of the method in fig. 3. For example, in various embodiments, a device of a system-on-chip may be configured with firmware instructions that, when executed by one or more processors or other hardware components (e.g., microcontrollers, ASICs, etc.), are operable to perform the operations of the method in fig. 3. In another example, in various embodiments, the IC device may include a single-chip or multi-chip controller configured to perform the operations of the method in fig. 3. Accordingly, the following description of the method in fig. 3 performed by the controller and/or its circuitry is to be taken in an illustrative, rather than a restrictive, sense.

In operation 302, the controller (and/or its Type-C subsystem) is disposed in the cable and is not powered. In this unpowered state, the Ra terminal remains "on" in accordance with the techniques described herein. As long as power is not applied to the controller, the controller remains in an unpowered state, which may be determined in operation 304.

In operation 304, the controller (repeatedly) determines whether the cable is powered. For example, the controller (and/or its Type-C subsystem) determines whether a voltage is applied to the Vconn line of the Type-C subsystem. If it is determined in operation 304 that a voltage is not applied to the Vconn line, the controller returns to the unpowered state (e.g., per operation 302). If it is determined in operation 304 that a voltage is applied to the Vconn line, the controller (and/or its Type-C subsystem) proceeds to operation 306.

In operation 306, the controller (and/or its Type-C subsystem) determines that the cable is attached to the power source (e.g., this occurs when the cable is plugged into an outlet). For example, the controller (and/or its Type-C subsystem) determines that power is being supplied on the Vconn line and that the Ra terminal remains "on" while operation 308 is performed.

In operation 308, the controller determines whether the voltage on the Vconn line reaches a threshold level. For example, the controller (and/or its Type-C subsystem) determines whether the voltage on the Vconn line reaches above 2.5V. If it is determined in operation 308 that the voltage on the Vconn line does not reach above 2.5V, the Ra terminal remains "on" and the controller (and/or its Type-C subsystem) returns to the attached state (e.g., per operation 306). If it is determined in operation 308 that the voltage on the Vconn line reaches above 2.5V, the controller (and/or its Type-C subsystem) proceeds to operation 310.

In operation 310, the voltage on the Vconn line reaches above 2.5V and the controller (and/or its Type-C subsystem) generates a firmware interrupt to enable the negative charge pump coupled to the Ra termination circuit. Enabling/activating the negative charge pump disables the Ra terminal, thereby reducing the current (and thus power) consumed by the controller and its Type-C subsystem. In some embodiments, when the Ra terminal is "off," leakage circuitry coupled to Vconn may also be enabled/activated in order to meet the Vconn discharge requirement in the USB Type-C specification. In such embodiments, the leakage circuit may be programmable to provide additional power savings. For example, the leakage circuit level may be determined and dynamically programmed at the controller (system) level based on the amount of decoupling capacitance present on the Vconn line.

After operation 310 is completed, the Ra terminal remains "off" as long as power is provided on the Vconn line. When the cable is disconnected or the Vconn line is disconnected or otherwise removed, the power supply to the controller (and/or its Type-C subsystem) is removed. In this case, the negative charge pump is turned off, which enables the Ra terminal and controller (and its Type-C subsystem) to return to the unpowered state (e.g., per operation 302).

In this way, the techniques described herein for low power allow the controller and its USB Type-C subsystem to save at least 1mA of current compared to some conventional implementations. For example, in some embodiments, the current used by the controller (and/or its Type-C subsystem) can be varied from 1mA to less than a 50 μ A-20x improvement, while in other embodiments, the current used can be reduced from 5mA to 50 μ A or less for near 100x improvement.

Fig. 4 is a flow diagram illustrating an example method for using a backup reference in a USB Type-C subsystem configured as a DFP or DRP (e.g., host-based) application in accordance with the techniques described herein. According to example embodiments, the operations of the method in fig. 4 are described as being performed by a controller (e.g., a USB controller) and/or its circuitry (e.g., a USB Type-C subsystem). However, it is noted that various implementations and embodiments may use various and possibly different components to perform the operations of the method in fig. 4. For example, in various embodiments, a device of a system-on-chip may be configured with firmware instructions that, when executed by one or more processors or other hardware components (e.g., microcontrollers, ASICs, etc.), are operable to perform the operations of the method in fig. 4. In another example, in various embodiments, the IC device may include a single-chip or multi-chip controller configured to perform the operations of the method in fig. 4. Accordingly, the following description of the method in fig. 3 performed by the controller and/or its circuitry is to be taken in an illustrative, rather than a restrictive, sense.

In operation 402, a controller (and/or its Type-C subsystem) is configured in a USB enabled host device and is not powered. In this unpowered state, the Rd terminal may be present but not applied. As long as power is not applied to the controller, the controller (and/or its Type-C subsystem) remains in the unpowered state, which may be determined in operation 404.

In operation 404, the controller determines (repeatedly) whether a Power On Reset (POR) signal is applied to the controller. If it is determined in operation 404 that the POR signal is not applied, the controller returns to and remains in an unpowered state (e.g., per operation 402). If it is determined in operation 404 that the POR signal is applied, the controller (and/or its Type-C subsystem) proceeds to operation 406.

In operation 406, when POR is present or once power is applied to the controller and/or its Type-C subsystem, the controller enables the coarse (loud) Rp termination circuit (e.g., the circuit that applies the Rp termination based on a custom predetermined threshold using a minimum amount of power), turns on the coarse Rd/Ra attachment detector circuit (e.g., the circuit that detects Rd/Ra attachment events based on a single threshold using a minimum amount of power), and waits to detect a Rd or Ra attachment event on the CC line. In accordance with the techniques described herein, this state is referred to as a "wait for attach" state, in which the controller (and/or its Type-C subsystem) waits for an attach event on the CC line. For example, in the wait for attachment state, the controller (and/or its Type-C subsystem) may repeatedly perform operation 408 to detect attachment of an Rd terminal or an Ra terminal. The wait for attach state is a low power state in which the controller consumes a total current of about 2 μ Α.

In operation 408, the controller (and/or its Type-C subsystem) determines whether an Rd termination circuit or an Ra termination circuit is connected/applied on the CC line of the Type-C subsystem. If it is determined in operation 408 that either the Rd terminal or the Ra terminal is not connected/applied, the controller (and/or its Type-C subsystem) returns to the wait for attachment state (e.g., per operation 406). If it is determined in operation 408 that either the Rd terminal or the Ra terminal is connected or applied, the controller (and/or its Type-C subsystem) proceeds to operation 410.

In operation 410, the controller (and/or its Type-C subsystem) performs the actions normally performed in the active state according to the USB Type-C specification. For example, once either the Rd or Ra termination is connected/applied to the CC line, the controller (and/or its Type-C subsystem) transitions from the wait for attach state to the active state and applies the delicate Rp termination in order to identify the host device on the CC line. Additionally, in accordance with the techniques described herein, the controller (and/or its Type-C subsystem) enables the respective sophisticated Rd or Ra end-detector circuitry (e.g., such as circuitry that detects Rd or Ra attachment events based on multiple thresholds), and then proceeds to operation 412.

In operation 412, while in the active state, the controller (and/or its Type-C subsystem) enables the standby reference for deep sleep according to the techniques described herein. For example, in an example embodiment, the precision standby voltage reference may be configured to generate a reference voltage of 0.74V and the precision standby current reference may be configured to generate a reference current of 2.4 μ Α. Subsequently, the controller transitions from the active state to a deep sleep state, wherein the controller and/or its circuitry consumes less than 50 μ Α of current. The controller (and/or its Type-C subsystem) remains in the deep sleep state until one of two events occurs as determined in operation 414.

In operation 414, the controller (and/or its Type-C subsystem) determines: (1) whether an Rd terminal or an Ra terminal has disconnected from the CC line, and/or (2) whether activity (e.g., communication in the form of sending or receiving packets) exists on the CC line. If it is determined in operation 414 that the Rd terminal or Ra terminal (previously connected) has been disconnected (e.g., a disconnect event on the CC line), the controller (and/or its Type-C subsystem) transitions from the deep sleep state back to the wait for attachment state and enables the coarse Rp termination circuit and the coarse Rd/Ra attachment detector circuit (e.g., per operation 406). If it is determined in operation 414 that there is communication activity on the CC line, the controller (and/or its Type-C subsystem) proceeds to operation 416.

In operation 416, the controller (and/or its Type-C subsystem) transitions from the deep sleep state to the active state and performs any actions required for communication on the CC line as long as line activity continues, which may be determined (repeatedly) in operation 418. In operation 418, the controller (and/or its Type-C subsystem) determines whether the CC line is idle. If it is determined in operation 418 that the CC-line is not idle, the controller remains in an active state to support communication on the CC-line (e.g., per operation 416). If it is determined in operation 418 that the CC line has become idle, the controller (and/or its Type-C subsystem) proceeds to operation 412 to transition from the active state to the deep sleep state. For example, when it is detected that the CC line has become idle, the controller (and/or its Type-C subsystem) enables the standby reference and transitions to a deep sleep state.

In this manner, the techniques described herein for low power allow the controller and its USB Type-C subsystem to avoid the use of active voltage and/or current references that may consume relatively large amounts of current (e.g., -1 mA). In contrast, according to the techniques described herein, the backup reference consumes less than 15 μ Α of current in the deep sleep state, which is a nearly 60x improvement in current consumption. In addition, without a new wait for attach state, the total current consumption of the controller while waiting to detect an attach event on the CC-line may be 50 μ Α or more. In contrast, according to the techniques described herein, the total current consumed by the controller in the wait-for-attach state is about 2 μ Α, which is an improvement of about 25 x.

Fig. 5A illustrates Ra termination circuitry in an example on-chip USB Type-C subsystem that may be disposed in a USB controller, such as IC controller 100 in fig. 1A. The Ra termination circuit in the alternative embodiment of fig. 5A performs a similar disabling function as the Ra termination circuit in fig. 2A, except that a positive charge pump and conventional switching devices are used. In an alternative embodiment of fig. 5A, the IC controller and its Type-C subsystem 520 may be disposed within a cable and configured as an EMCA (cable) application in accordance with the techniques described herein.

Referring to fig. 5A, the USB Type-C subsystem 520 is part of an IC controller chip fabricated on an IC wafer. The Type-C subsystem 520 includes on-chip Ra termination circuitry coupled to the CC lines of the subsystem. The Ra termination circuit in fig. 5A includes an Ra resistor element (e.g., -1K Ω) coupled in series with the device 505. A resistor element having a relatively high impedance (e.g., -1M Ω) is coupled between the CC/Vconn line and the gate of device 505. Device 505 is a switching circuit having a positive threshold voltage. The gate of device 505 is coupled to logic 503, which logic 503 includes electronic circuitry configured to provide control functions and a positive charge pump. A positive charge pump is an electronic circuit configured to create a positive voltage supply. Logic 503 is coupled to the CC line of the Type-C subsystem 520 and to the detection circuit 501. Detection circuit 501 is coupled to the CC lines and is configured to detect an attachment event on any one of the CC lines.

In operation, detection circuit 501 detects a voltage pull-up on one of the CC lines and enables a positive charge pump in logic 503, where the positive charge pump is powered by the voltage on the CC line. When the positive charge pump and control devices in logic 503 are enabled/powered, they enable switching device 505. When device 505 is enabled, the Ra termination circuit is turned on and detected (e.g., by the host device) on another CC line (which is reused as a Vconn line). Note that once the Ra terminal is enabled, the voltage on the first CC line may be below 0.2V, and the positive charge pump may not remain running. To circumvent this problem, the voltage pumped by the positive charge pump needs to be stored (e.g., buffered) long enough so that a host device coupled on the CC line can detect the Ra termination and apply the voltage on the Vconn line. Once the Vconn line is applied and detected, logic 503 disables the positive charge pump, which pulls the gate of device 505 to ground, thereby turning off the device and disabling the Ra termination circuit in order to save power.

FIG. 5B illustrates an example on-chip USB Type-C subsystem that may be disposed in a USB controller, such as IC controller 100 in FIG. 1A. In an alternative embodiment of fig. 5B, the IC controller and its Type-C subsystem 520 may be arranged and configured as a DFP or DRP application in accordance with the techniques described herein. In FIG. 5B, the Type-C subsystem 520 is part of an IC controller chip (not shown) fabricated on an IC wafer.

According to the techniques described herein, the Type-C subsystem 520 includes a power supply 522. The power supply 522 is coupled to the CC lines (CC1 and CC2) of the Type-C subsystem 520 through an external off-chip high precision resistor 523. The power supply 522 is also coupled to a coarse attachment detector 524. The coarse attach detector 524 is coupled to the CC lines (CC1 and CC2) of the Type-C subsystem 520 through an Rd termination circuit 526 and is configured to detect voltage levels on the CC lines (e.g., by using a single voltage threshold). In operation, the circuit illustrated in fig. 5B is configured to reduce current consumption by implementing the wait for attach state described heretofore. For example, a power supply 522, a high precision resistor 523, and a coarse attach detector 524 may be used to detect an attach event on the CC line.

In some embodiments, the techniques described herein for a low power USB Type-C subsystem ensure that Ra terminations are implemented by using native devices in conjunction with a negative charge pump. This may reduce the total current consumed by the Ra termination circuit from about 5mA (e.g., as may be used in conventional implementations) to less than 50 μ Α. In these and/or other embodiments, the techniques described herein may also provide a sophisticated backup reference circuit that is used in a deep sleep state to perform termination and attach/detach detection on the CC line of a Type-C subsystem without having the USB controller consume power in an active state, yet still meet sophisticated voltage/current requirements. This may reduce the total current consumed by the IC (controller) in the deep sleep state from more than 1mA (e.g., as may be used in conventional implementations) to about 50 μ Α, where the backup reference itself may consume 10 μ Α to 15 μ Α of current. In these and/or other embodiments, the techniques described herein may also provide a new wait for attach state in which a Type-C subsystem configuration waits for an attach event on a CC line while in a DFP or DRP application. This can reduce the current consumed by an IC (controller) while waiting for an attach event (e.g., when the Type-C port provided by the controller is not attached to anything) from about 50 μ Α to about 2 μ Α (e.g., as can be used in conventional implementations).

Various implementations of the techniques for a low power USB Type-C subsystem described herein may include various operations. These operations may be performed and/or controlled by hardware components, digital hardware and/or firmware, and/or combinations thereof. As used herein, the term "coupled to" may mean coupled directly or indirectly through one or more intermediate components. Any of the signals provided over the various on-chip buses described herein may be time multiplexed with other signals and provided over one or more common on-chip buses. Further, the interconnections between circuit components or blocks may be shown as buses or as single signal lines. Alternatively, each bus may be one or more single signal lines, and alternatively, each single signal line may be a bus.

Certain embodiments may be implemented as a computer program product that may include instructions stored on a non-transitory computer-readable medium (e.g., such as volatile memory and/or non-volatile memory). These instructions may be used to program one or more devices including one or more general-purpose or special-purpose processors (e.g., such as a CPU) or their equivalents (e.g., such as processing cores, processing engines, microcontrollers, etc.), such that the instructions, when executed by the processor or its equivalent, cause the device to perform the described operations for the low power USB subsystem described herein. A computer-readable medium may also include instructions for storing or transmitting information in a form (e.g., software, processing application, etc.) readable by a machine (e.g., such as a device or a computer). The non-transitory computer-readable storage medium may include, but is not limited to, an electromagnetic storage medium (e.g., a floppy disk, a hard disk, etc.), an optical storage medium (e.g., a CD-ROM), a magneto-optical storage medium, a Read Only Memory (ROM), a Random Access Memory (RAM), an erasable programmable memory (e.g., EPROM and EEPROM), a flash memory, or another now known or later developed non-transitory type of medium suitable for storing information.

While the operations of the methods herein are shown and described in a particular order, in some embodiments, the order of the operations of each method may be changed such that certain operations may be performed in an inverse order, or such that certain operations may be performed, at least partially, concurrently and/or in parallel with other operations. In other embodiments, instructions or sub-operations of different operations may be in an intermittent and/or alternating manner.

In the foregoing specification, the invention has been described with reference to specific exemplary embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention as set forth in the appended claims. The specification and drawings are, accordingly, to be regarded in an illustrative sense rather than a restrictive sense.

Claims

1. A low power implementation device of a Type-C connector subsystem, comprising:

a processor; and

a Universal Serial Bus (USB) Type-C subsystem, wherein the Type-C subsystem is configured at least to:

operating Ra termination circuitry coupled to a Vconn line of the Type-C subsystem, the Ra termination circuitry comprising a negative charge pump, a gate control device, and an Ra termination, wherein the Ra termination circuitry consumes no more than 100 μ A of current after being applied to the Vconn line, wherein, to operate the Ra termination circuitry, the Type-C subsystem is configured to:

keeping the Ra terminal "on" when the Type-C subsystem is not powered;

detecting when the Vconn line is powered; and

enabling a negative charge pump when the Vconn line reaches above a threshold voltage, so as to disable the Ra termination; and

operating one or more standby reference circuits in a deep sleep state of the device to perform detection on a configuration channel, CC, line of the Type-C subsystem, wherein the one or more standby reference circuits are low power voltage reference sources and/or low power current reference sources, and wherein the device consumes no more than 100 μ A of current in the deep sleep state;

wherein the device is an Integrated Circuit (IC) chip.

2. The device of claim 1, wherein the Ra terminal is configured to remain "on" when the Type-C subsystem is not powered.

3. The device of claim 1, wherein the Type-C subsystem is configured to transition from the deep sleep state to an active state of the device when a communication is detected on the CC line, and to resume the deep sleep state when the CC line becomes idle.

4. The device of claim 1, wherein the Type-C subsystem is configured to transition from the deep sleep state to a wait for attachment state of the device when detachment of a terminal is detected on the CC line in the deep sleep state.

5. A low power implementation device of a Type-C connector subsystem, comprising:

a processor; and

a Universal Serial Bus (USB) Type-C subsystem comprising an Ra termination circuit comprising a negative charge pump, a gate control device, and an Ra termination, wherein the negative charge pump is coupled to the gate control device and the Ra termination is coupled to a Vconn line of the Type-C subsystem;

wherein the Type-C subsystem is configured to:

enabling the negative charge pump when a voltage on the Vconn line reaches above a threshold voltage; and

disabling the Ra terminal when the negative charge pump is enabled;

wherein the Ra terminal consumes less than 50 μ A of current after being disabled;

wherein the device is an Integrated Circuit (IC) chip.

6. The device of claim 5, wherein the Ra termination circuit comprises a native on-chip device comprising one or more N-type metal oxide (NMOS) transistors.

7. The device of claim 5, wherein the Type-C subsystem is configured to keep the Ra terminal "on" when the Type-C subsystem is not powered.

8. The device of claim 5, wherein the threshold voltage is in a range of 2.375V to 2.625V.

9. The device of claim 5, wherein the Type-C subsystem is further configured to:

detecting when the voltage on the Vconn line is no longer applied; and

disabling the negative charge pump to enable the Ra termination.

10. The device of claim 5, wherein the device is a cable.

11. A low power implementation arrangement of a Type-C connector subsystem, comprising:

a processor; and

a Universal Serial Bus (USB) Type-C subsystem comprising one or more standby reference circuits, wherein the one or more standby reference circuits are low-power voltage reference sources and/or low-power current reference sources, and wherein the Type-C subsystem is disposed in an Integrated Circuit (IC) chip and configured to:

transitioning the IC chip to an active state and enabling a precision Rd termination detector or a precision Ra termination detector when attachment of a termination is detected on one of the configuration channel CC lines on which the Type-C subsystem is disposed,

in the active state, enabling the one or more standby reference circuits;

transitioning the IC chip from the active state to a deep sleep state; and

operating the one or more standby reference circuits in the deep sleep state to perform detection on the CC line, wherein the IC chip consumes no more than 50 μ A of current in the deep sleep state.

12. The apparatus of claim 11, wherein the Type-C subsystem is further configured to transition the IC chip from the deep sleep state back to the active state when communication is detected on one of the CC lines, and to resume the deep sleep state when the one of the CC lines becomes idle.

13. The apparatus of claim 11, wherein the Type-C subsystem is further configured to transition the IC chip from the deep sleep state to a wait for attachment state of the IC chip when detachment of a terminal is detected on one of the CC lines in the deep sleep state.

14. The apparatus of claim 13, wherein the Type-C subsystem consumes no more than 2 μ Α of current in the wait for attach state.

15. The apparatus of claim 13, wherein the Type-C subsystem is configured to wait for attachment of an Rd terminal or an Ra terminal on one of the CC lines in the wait for attachment state, and wherein the Type-C subsystem is further configured to transition the IC chip from the wait for attachment state to the active state when either the Rd terminal or the Ra terminal is detected.

16. The apparatus of claim 11, wherein the one or more standby reference circuits consume a current in a range of 10 μ Α to 15 μ Α in the deep sleep state.

17. The apparatus of claim 11, wherein the Type-C subsystem further comprises one or more voltage threshold detectors and Rp termination circuitry, wherein the one or more spare reference circuits are coupled to the one or more voltage threshold detectors and to the Rp termination circuitry, and wherein the Rp termination circuitry is coupled to the CC line.

18. The apparatus of claim 11, further comprising a USB Type-C receptacle coupled to the Type-C subsystem.