CN1851477A - Measuring system and its data interface converting device - Google Patents
Measuring system and its data interface converting device Download PDFInfo
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- CN1851477A CN1851477A CN 200610084279 CN200610084279A CN1851477A CN 1851477 A CN1851477 A CN 1851477A CN 200610084279 CN200610084279 CN 200610084279 CN 200610084279 A CN200610084279 A CN 200610084279A CN 1851477 A CN1851477 A CN 1851477A
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Abstract
A data interface converter is used for connecting a to be tested circuit board and a computer. Said Computer has a circumference bus and storing with a test data, data interface converter containing a first transceiver circuit, a buffer circuit and a second transceiver circuit. First transceiver circuit is connected with circumference bus for receiving test data. Buffer circuit is connected with first transceiver circuit for storing test data. Second transceiver circuit is connected with buffer circuit for outputting test data to tested circuit board, wherein first transceiver circuit transmission rate being greater than that of second transceiver circuit.
Description
Technical field
The present invention relates to a kind of test macro and conversion equipment thereof, particularly a kind of test macro and data interface converting device thereof that promotes the transmission speed between computing machine and the circuit board to be tested.
Background technology
Along with the arriving of information age, can create the electronic product of various functions, for example motherboard, display card and sound card etc. by the design of various circuit boards.After circuit board was devised, the designer must test and carry out the step of follow-up debug (debug) again to guarantee the correctness of its function to circuit board.In present technology, have the RS232 interface in the circuit board and link up with test lead with convenient.
Please refer to shown in Figure 1ly, existing test macro 1 comprises a computing machine 11, a RS232 transmission line 12 and a circuit board 13 to be tested.Computing machine 11 has one first buffer 112, in order to produce a test instruction 111.Then electrically connect, export circuit board 13 to be tested to the test instruction 111 that will be stored in first buffer 112 by RS232 transmission line 12 and circuit board 13 to be tested.Circuit board to be tested then 13 is carried out test instructions 111, and producing a test result 131, and circuit board to be tested 13 has one second buffer 132, in order to store test results 131.At last, circuit 13 to be tested transfers to computing machine 11 by the test result 131 that RS232 transmission line 12 will be stored in second buffer 132, in order to do making the developer be able to learn at computing machine 11 whether circuit board 13 to be tested can normal operation.
Please refer to shown in Figure 2ly, existing test macro 1 more comprises another a RS232 transmission line 12 ' and a voltage transitions plate 14.Wherein RS232 transmission line 12 electrically connects with computing machine 11 and voltage transitions plate 14 respectively, and another RS232 transmission line 12 ' electrically connects with voltage transitions plate 14 and circuit board to be tested 13 respectively.Voltage transitions plate 14 is to be used for the magnitude of voltage of test instruction 111 that computing machine 11 is exported to be converted to the magnitude of voltage that is fit to input circuit board 13 to be tested.For example computing machine 11 instructs 111 to voltage transitions plate 14 by RS232 transmission line 12 with 12V magnitude of voltage test transmission.Then voltage transitions plate 14 instructs 111 to circuit 13 to be tested by RS232 transmission line 12 ' with 5V magnitude of voltage test transmission.
In addition, owing to use the RS232 transmission interface between computing machine 11 and the circuit board to be tested 13, make the transmission speed of data effectively to promote.Under general situation, the transmission speed of the RS232 transmission line 12 that computing machine 11 and circuit board to be tested are 13 is 57600bps.When the data volume of test result 131 is big, make the test result 131 that is stored in second buffer 132 can't all transmit back in real time computing machine 11.And in the process of test, the constantly tested circuit board 13 of second buffer 132 overrides, thereby test result 131 can cover by other data, also can't be stored in second buffer 132 muchly.If send out test result 131 to computing machine 11 from second buffer 132 untimelyly, then computing machine 11 can't be obtained correct complete test result 131, thereby cause the tester can't control test result 131 in real time, simultaneously also can't grasp the function situation of circuit board 13 to be tested, thereby slow down the speed of product development.If can promote the transmission speed between computing machine 11 and the circuit board to be tested 13, just the test result 131 that is stored in second buffer 132 can be transmitted back computing machine 11 in real time, make computing machine 11 obtain correct complete test result 131 effectively.
Therefore, how to provide a kind of test macro that can address the above problem and data interface converting device thereof, real one of the current important topic that belongs to.
Summary of the invention
Because above-mentioned problem, purpose of the present invention is for providing a kind of test macro and data interface converting device thereof that can promote the transmission speed between computing machine and the circuit board to be tested.
Edge is, for reaching above-mentioned purpose, be used to connect a circuit board to be tested and a computing machine according to data interface converting device of the present invention, wherein, computing machine has a peripheral bus and stores a test data, and data interface converting device comprises one first transmission circuit, a buffer circuit and one second transmission circuit.In the present invention, first transmission circuit is connected with peripheral bus, with the acceptance test data; Buffer circuit is connected with first transmission circuit, with store test data; Second transmission circuit is connected with buffer circuit, and to output test data to circuit board to be tested, wherein, the transfer rate of first transmission circuit is greater than the transfer rate of second transmission circuit.
In addition, for reaching above-mentioned purpose, the present invention also discloses a kind of test macro and comprises a circuit board to be tested, a computing machine, reaches a data interface converting device.In the present invention, computing machine has a peripheral bus and stores a test data; Data interface converting device has one first transmission circuit, a buffer circuit and one second transmission circuit, wherein, first transmission circuit is connected with peripheral bus with the acceptance test data, buffer circuit is connected with store test data with first transmission circuit, second transmission circuit is connected with buffer circuit to output test data to circuit board to be tested, wherein, the transfer rate of first transmission circuit is greater than the transfer rate of second transmission circuit.
From the above, according to test macro of the present invention and data interface converting device thereof, be connected with computing machine with employed RS232 transmission interface in the replacement prior art by high speed transmission interfaces such as peripheral bus such as IDE, SCSI, and be connected with circuit board to be tested by the employed transmission interface of circuit board to be tested (for example RS232 transmission interface).Therefore, the employed transmission interface of circuit board to be tested of the present invention (for example RS232 transmission interface) only uses between second transmission circuit and circuit board to be tested, but not as in the prior art, computing machine all uses identical transmission interface (for example RS232 transmission interface) with circuit board to be tested, thereby between computing machine and circuit board to be tested, the transmission path of transmission interface in the circuit board to be tested (for example RS232 transmission interface) is less than the transmission path of transmission interface in the existing circuit board to be tested, thereby can promote the transmission speed of transmission interface integral body between computing machine and the circuit board to be tested.Again because of being peripheral bus such as IDE between first transmission circuit and the computing machine, high speed transmission interfaces such as SCSI, its transfer rate is greater than transmission interface between second transmission circuit and the circuit board to be tested such as RS232 transmission interface, so second transmission circuit can output test data to circuit board to be tested from buffer circuit in real time, and promote computing machine to transfer rate whole between the circuit board to be tested, so that the tester can control circuit board to be tested by computer real-time, and also can positively learn the value of second buffer in the circuit board to be tested by operating result, in order to the function situation of grasping circuit board to be tested, and then the speed of expedite product exploitation.
Description of drawings
Fig. 1 is a synoptic diagram, shows existing test macro;
Fig. 2 is a synoptic diagram, shows another existing test macro;
Fig. 3 is a synoptic diagram, shows the data interface converting device according to the embodiment of the invention;
Fig. 4 is a synoptic diagram, shows the data interface converting device according to the embodiment of the invention;
Fig. 5 A is a synoptic diagram, the peripheral bus of the data interface converting device of displayed map 3; And
Fig. 5 B is a synoptic diagram, the output/input interface of the data interface converting device of displayed map 3.
The reference numeral explanation:
1 test macro
11,4 computing machines
111 test instructions
112,42 first buffers
12,12 ' RS232 transmission line
13,3 circuit boards to be tested
131 test results
132,32 second buffers
14 voltage transitions plates
2 data interface converting devices
21 first transmission circuits
22 buffer circuits
221 storage unit
221a first first-in first-out memory
221b second first-in first-out memory
222 control modules
23 second transmission circuits
24 first multiplexers
25 second multiplexers
31 output/input interfaces
41 peripheral bus
5 voltage transformation modules
The DATA test data
The INIT initialization directive
The CMD operational order
The RUT operating result
SEL selects signal
The FG pin
The TXD pin
The RXD pin
The RTS pin
The CTS pin
Embodiment
Hereinafter with reference to correlative type, test macro and data interface converting device thereof according to the embodiment of the invention are described, wherein, identical assembly will be illustrated with identical reference marks.
Please refer to shown in Figure 3ly, be used to electrically connect a circuit board 3 to be tested and a computing machine 4 according to data interface converting device 2 of the present invention, wherein, data interface converting device 2 comprises one first transmission circuit 21, a buffer circuit 22 and one second transmission circuit 23.At this, computing machine 4 has a peripheral bus 41 and one first buffer 42, and the test data DATA that 42 storages of first buffer are produced by computing machine 4.
In the present embodiment, first transmission circuit 21 is connected with peripheral bus 41, is stored in test data DATA in first buffer 42 with reception.Buffer circuit 22 is connected with first transmission circuit 21, with store test data DATA.In addition, second transmission circuit 23 is connected with buffer circuit 22, with the extremely circuit board 3 to be tested of DATA that outputs test data, moreover, peripheral bus 41 is IDE, SCSI, 1394 or high speed transmission interface such as PIC-X, and is fast than the RS232 transmission interface that is connected with computing machine in the prior art.
Circuit board to be tested 3 is by an output/input interface 31, and output/input interface 31 connects second transmission circuit 23 with acceptance test data DATA, and carries out test data DATA producing an operating result RUT, and operating result RUT is stored in one second buffer 32.Then, second transmission circuit 23 receives and is stored in the operating result RUT of second buffer 32 in the circuit board 3 to be tested, and exports buffer circuit 22 storages to.Last first transmission circuit 21 is read operation RUT as a result in buffer circuit 22, and exports operating result RUT to computing machine 4 by peripheral bus 41.In the present embodiment, because peripheral bus 41 is used IDE, SCSI, 1394 or high speed transmission interface such as PIC-X, output/input interface then uses the RS232 transmission interface.Because peripheral bus 41 employed transmission interfaces are fast than output/input interface 31 employed transmission interface speed, thereby the transmission speed of first transmission circuit 21 is faster than the transmission speed of second transmission circuit 23.
In general, test data DATA is an operational order CMD, functions such as the internal processes that is used for treating testing circuit board 3 writes, erases, reads, shows, calling or debug, and produce corresponding operating result RUT simultaneously to be back to computing machine 4, allow the tester in time understand the RUT as a result of test.
Please refer to shown in Figure 4ly, different be, more comprise one first multiplexer 24 and one second multiplexer 25 according to the data interface converting device 2 of another embodiment of the present invention with shown in Figure 3.First multiplexer 24 is electrically connected between first transmission circuit 21 and the buffer circuit 22, and second multiplexer 25 is connected between the buffer circuit 22 and second transmission circuit 23, and is connected with first transmission circuit 21 with first multiplexer 24.
In addition, data interface converting device 2 can be used and arrange in pairs or groups with a voltage transformation module 5 accordingly according to the required input voltage value difference of circuit board to be tested.At this, voltage transformation module 5 is converted to the magnitude of voltage that is fit to input circuit board 3 to be tested with the magnitude of voltage of the test data DATA that computing machine 4 is exported.Second transmission circuit 23 is connected in a side of a voltage transformation module 5, and circuit board 3 to be tested is connected in the opposite side of voltage transformation module 5, and voltage transformation module 5 provides the voltage level conversion between data interface converting device 2 and the circuit board to be tested 3.In the present embodiment, second transmission circuit 23 and circuit board to be tested 3 are followed RS232 communication protocol, with 12V magnitude of voltage transmitting test data DATA to voltage transformation module 5, then voltage transformation module 5 with 5V magnitude of voltage transmitting test data DATA to circuit board 3 to be tested.
In the present embodiment, computing machine 4 is connected with various types of peripheral devices by peripheral bus 41.Computing machine 4, peripheral bus 41 and first transmission circuit 21 can be followed IDE, SCSI, 1394 or PCI-X communication protocol transmitting test data DATA, and second transmission circuit 23 and circuit board to be tested 3 can be followed RS232 communication protocol transmitting test data DATA.
In addition, the peripheral bus 41 of computing machine 4 and first transmission circuit 21 are followed IDE communication protocol transmitting test data DATA, wherein the ide interface pin please refer to shown in Fig. 5 A, the IDE bus has 40 pins, wherein the 3rd to 18 pin is the data pins, 23rd, the direction of 24 pin control datas transmission, whether the 25th pin control data receives data by first transmission circuit 21, the stored address of the 33rd, 35,36 pins decision received data etc.
Second transmission circuit 23 and circuit board to be tested 3 are followed RS232 communication protocol transmitting test data DATA, and wherein, the RS232 interface pins please refer to figure shown in Fig. 5 B.The RS232 interface can be 25 pin types or 9 pin types, is example at this with 25 pin types, and is illustrated at the function of part pin wherein.Pin FG is that shell is used ground connection, and is connected with earth terminal in the circuit board 3 to be tested, and pin TXD is in order to send data, and pin RXD is in order to receive data, pin TXD and pin RXD realization bidirectional data transfers.In addition, pin RTS sends in order to output and requires (request to send), and pin CTS is to send permission (clear to send), the direction and the start of pin RTS and pin CTS may command data transmission in order to output.
Transmission speed can reach 1388800bps to computing machine 4 if transmit then with ide interface with data interface converting device 2, at this moment, RS232 interface transmission speed between data interface converting device 2 and the circuit board to be tested 3 can be promoted to 115200bps by 57600bps, and this speed is far above the transmission speed between active computer 11 and the circuit board to be tested 13.When data interface converting device 2 uses ide interface transmission data, to allow the RS232 interface transmission speed between data interface converting device 2 and the circuit board to be tested 3 accelerate.
Moreover, buffer circuit 22 comprises storage unit 221 and control module 222, and storage unit 221 comprises one first first-in first-out memory (input first output, FIFO) 221a and one second first-in first-out memory 221b, wherein the first first-in first-out memory 221a is used for store test data DATA, and second first-in first-out memory comes storage operation RUT as a result with 221b.In addition, the control module 222 and second transmission circuit 23 and storage unit 221 electrically connect, its test data DATA that will be stored in the first first-in first-out memory 221a exports second transmission circuit 23 to, or operating result RUT inputed to second first-in first-out memory 221b storage, therefore make buffer circuit 22 effectively the output of distribute data go into.
For making the present invention clearer, below row are given one example, how to utilize data interface converting device 2 tests circuit board 3 to be tested with explanation computing machine 4.
At first, computing machine 4 produces an initialization directive INIT with initialization data interface switching device 2.At this, first transmission circuit 21 electrically connects to receive initialization directive INIT with peripheral bus 41, produces one and selects signal SEL, and will select signal SEL to be set at 1.First multiplexer 21 and second multiplexer 23 receive selects signal SEL, so that initialization directive INIT is sent to second transmission circuit 23 from first transmission circuit 21.Initialization directive INIT initialization second transmission circuit 23, it sets the transfer rate and the transmission mode of second transmission circuit 23, so that second transmission circuit 23 can normal operation with circuit board 3 to be tested
After 23 initialization of second transmission circuit, computing machine 4 controls first transmission circuit 21 will select signal SEL to be set at 0, then, first multiplexer 24 is according to selecting signal SEL, from first first-in first-out memory (the input first output of first transmission circuit, 21 transfer operations instructions CMD (test data DATA) to the buffer circuit 22, FIFO) 221a, and second multiplexer 25 is according to selecting signal SEL, so that (input first output, FIFO) 221a transfer operation instruction CMD (test data DATA) is to second transmission circuit 23 from first first-in first-out memory by control module 222.
Then, voltage transformation module 5 is converted to the operational order CMD of magnitude of voltage 5V with the operational order CMD of 23 output voltage values 12V of second transmission circuit, and transfers to circuit board 3 to be tested.Then, testing circuit board 3 produces operating result RUT according to operational order CMD, and, receive operating result RUT by peripheral bus 41 by first transmission circuit 21 by computing machine 4 more at last by voltage conversion circuit 5, second transmission circuit 23, second multiplexer 25, control module 222 to second first-in first-out memory 221b storage.
In sum, according to test macro of the present invention and data interface converting device thereof, by high speed transmission interface and computing machine electric connections such as peripheral bus such as IDE, SCSI, to replace employed RS232 transmission interface in the prior art.And electrically connect with circuit board to be tested by the employed transmission interface of circuit board to be tested (as the RS232 transmission interface).Therefore, the employed transmission interface of circuit board to be tested of the present invention (for example RS232 transmission interface) only uses between second transmission circuit and circuit board to be tested, but not as in the prior art, computing machine all uses identical transmission interface (for example RS232 transmission interface) with circuit board to be tested.Thereby between computing machine and circuit board to be tested, the transmission path of transmission interface in the circuit board to be tested (for example RS232 transmission interface) is less than the transmission path of transmission interface in the existing circuit board to be tested, thereby can promote the transmission speed of transmission interface integral body between computing machine and the circuit board to be tested.Again because of being peripheral bus such as IDE between first transmission circuit and the computing machine, high speed transmission interfaces such as SCSI, its transfer rate is fast greater than transmission interface between second transmission circuit and the circuit board to be tested such as RS232 transmission interface, so second transmission circuit can output test data to circuit board to be tested from buffer circuit in real time, and can store from circuit board reception operating result to buffer circuit to be tested, therefore, when avoiding the existing test result that is stored in second buffer all to transmit back in real time computing machine, the problem that the constantly tested circuit board of second buffer overrides, and then promote computing machine to transfer rate whole between the circuit board to be tested.In order to do making the tester control circuit board to be tested by computer real-time, and also can positively learn the value of second buffer in the circuit board to be tested by operating result, in order to the function situation of grasping circuit board to be tested, and then the speed of expedite product exploitation.
The above only is an illustrative, but not is restricted person.Anyly do not break away from spirit of the present invention and category, and, all should be included in the accompanying claim its equivalent modifications of carrying out or change.
Claims (10)
1, a kind of data interface converting device is used to connect a circuit board to be tested and a computing machine, and this data interface converting device comprises:
One first transmission circuit is connected with a peripheral bus of this computing machine, to receive this test data;
One buffer circuit is connected with this first transmission circuit, to store this test data; And
One second transmission circuit, be connected with this buffer circuit, and export this test data to this circuit board to be tested of being connected with this output/input interface by an output/input interface, wherein, this peripheral bus is different with the transmission interface of output/input interface, to allow the transfer rate of this first transmission circuit greater than the transfer rate of this second transmission circuit.
2, data interface converting device as claimed in claim 1, wherein, this buffer circuit comprises:
One storage unit is connected with this first transmission circuit, to store this test data; And
One control module is connected with this storage unit, exports this test data to this second transmission circuit with control.
3, data interface converting device as claimed in claim 1, wherein, this second transmission circuit is connected in a side of a voltage transformation module, this circuit board to be tested is connected in the opposite side of this voltage transformation module, and this voltage transformation module provides the voltage level conversion between this data interface converting device and this circuit board to be tested.
4, data interface converting device as claimed in claim 1, wherein, this computing machine produces an initialization directive, and this first transmission circuit receives this initialization directive via this peripheral bus and produces one selects signal, and this data interface converting device more comprises:
One first multiplexer is connected between this first transmission circuit and this buffer circuit; And
One second multiplexer is connected between this buffer circuit and this second transmission circuit, and is connected with this first transmission circuit with this first multiplexer;
Wherein, this first multiplexer and this second multiplexer receive this selection signal, this initialization directive is sent to this second transmission circuit from this first transmission circuit, this second transmission circuit of this initialization directive initialization.
5, data interface converting device as claimed in claim 4, wherein, this first multiplexer is selected signal according to this, transmit this test data to this buffer circuit with this first transmission circuit certainly, this second multiplexer transmits this test data to this second transmission circuit according to this selection signal with this buffer circuit certainly.
6, data interface converting device as claimed in claim 1, wherein, this test data has an operational order, and this circuit board to be tested and this second transmission circuit electrically connect, and receiving this operational order, and carry out this operational order to produce an operating result.
7, a kind of test macro comprises:
One circuit board to be tested;
One computing machine has a peripheral bus and stores a test data; And
One data interface converting device, has one first transmission circuit, one buffer circuit and one second transmission circuit, wherein, this first transmission circuit is connected with this peripheral bus of this computing machine, to receive this test data, this buffer circuit is connected with this first transmission circuit, to store this test data, and this second transmission circuit is connected with this buffer circuit, to export this test data by an output/input interface to this circuit board to be tested, wherein, this peripheral bus is different with output/input interface, to allow the transfer rate of this first transmission circuit greater than the transfer rate of this second transmission circuit.
8, test macro as claimed in claim 7, wherein, this buffer circuit comprises:
One storage unit is connected with this first transmission circuit, to store this test data; And
One control module is connected with this memory module, exports this test data to this second transmission circuit with control.
9, test macro as claimed in claim 7 more comprises:
One voltage transformation module is connected between this second transmission circuit and this circuit board to be tested so that the voltage level conversion between this data interface converting device and this circuit board to be tested to be provided.
10, test macro as claimed in claim 7, wherein, this computing machine produces an initialization directive, and this first transmission circuit and this peripheral bus electrically connect to receive this initialization directive and to produce one and select signal, and this data interface converting device more comprises:
One first multiplexer is connected between this first transmission circuit and this buffer circuit; And
One second multiplexer is connected between this buffer circuit and this second transmission circuit, and electrically connects with this first multiplexer and this first transmission circuit;
Wherein, this first multiplexer and this second multiplexer receive this selection signal this initialization directive is sent to this second transmission circuit from this first transmission circuit, this second transmission circuit of this initialization directive initialization.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100842791A CN100460876C (en) | 2006-05-30 | 2006-05-30 | Measuring system and its data interface converting device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100842791A CN100460876C (en) | 2006-05-30 | 2006-05-30 | Measuring system and its data interface converting device |
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| CN1851477A true CN1851477A (en) | 2006-10-25 |
| CN100460876C CN100460876C (en) | 2009-02-11 |
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| CNB2006100842791A Active CN100460876C (en) | 2006-05-30 | 2006-05-30 | Measuring system and its data interface converting device |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102156680A (en) * | 2010-02-11 | 2011-08-17 | 爱国者电子科技有限公司 | Host device with multiple connectors, data transmission method and protocol selecting device |
| CN108882284A (en) * | 2017-05-10 | 2018-11-23 | 上海大唐移动通信设备有限公司 | A kind of wireless network test method and apparatus |
| CN110824330A (en) * | 2018-08-08 | 2020-02-21 | 致茂电子(苏州)有限公司 | Semiconductor integrated circuit test system and semiconductor integrated circuit test device thereof |
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| JPS58114241A (en) * | 1981-12-28 | 1983-07-07 | Fujitsu Ltd | Interface converting device |
| JPS59211120A (en) * | 1983-05-16 | 1984-11-29 | Fujitsu Ltd | Interface conversion system |
| JPS6181053A (en) * | 1984-09-28 | 1986-04-24 | Nec Corp | Interface converter |
| JPS63147250A (en) * | 1986-12-10 | 1988-06-20 | Nec Corp | Synchronizing dependent exchange control device |
| JPH02299098A (en) * | 1989-05-15 | 1990-12-11 | Hitachi Ltd | Interface conversion system |
| JP3161163B2 (en) * | 1993-05-28 | 2001-04-25 | 安藤電気株式会社 | Interface converter |
| JPH09200203A (en) * | 1996-01-12 | 1997-07-31 | Toyo Commun Equip Co Ltd | Interface converter |
| JPH10290269A (en) * | 1997-04-15 | 1998-10-27 | Nec Corp | Interface conversion circuit |
| CN1348120A (en) * | 2000-10-12 | 2002-05-08 | 德维森实业(深圳)有限公司 | Bottom controller with WEB-SERVERC function |
| CN2580699Y (en) * | 2002-09-27 | 2003-10-15 | 周志艳 | Web-linkage device for building office application network |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102156680A (en) * | 2010-02-11 | 2011-08-17 | 爱国者电子科技有限公司 | Host device with multiple connectors, data transmission method and protocol selecting device |
| CN102156680B (en) * | 2010-02-11 | 2015-09-30 | 爱国者电子科技有限公司 | The host apparatus of multiple connector and transmission data method and agreement selecting arrangement |
| CN108882284A (en) * | 2017-05-10 | 2018-11-23 | 上海大唐移动通信设备有限公司 | A kind of wireless network test method and apparatus |
| CN110824330A (en) * | 2018-08-08 | 2020-02-21 | 致茂电子(苏州)有限公司 | Semiconductor integrated circuit test system and semiconductor integrated circuit test device thereof |
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| Publication number | Publication date |
|---|---|
| CN100460876C (en) | 2009-02-11 |
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