CN116897508A

CN116897508A - Noise reduction circuit, method, device, equipment and optical receiver

Info

Publication number: CN116897508A
Application number: CN202180093851.3A
Authority: CN
Inventors: 廖科源; 王红玉
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2021-02-20
Filing date: 2021-02-20
Publication date: 2023-10-17
Also published as: WO2022174403A1

Abstract

The embodiment of the application discloses a noise reduction circuit, which comprises: the first signal detection module, the first earthing circuit, the first transimpedance amplifier, the second operational amplifier and the reference voltage generator; the first signal detection module is used for outputting a direct current signal and an alternating current signal; the first grounding circuit is coupled between the grounding end and the output end of the first signal detection module; the first transimpedance amplifier is coupled to the output end of the first signal detection module, and the signal output by the output end of the first operational amplifier included in the first transimpedance amplifier is opposite to the signal received by the input end; the negative input end of the second operational amplifier is coupled with the output end of the first operational amplifier; the positive input end of the second operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator. The application also provides a method, a device, equipment, an optical receiver and a medium, and the noise value generated by grounding the direct current signal can be adjusted by adjusting the voltage input by the reference voltage generator.

Description

Noise reduction circuit, method, device, equipment and optical receiver

Technical Field

The present application relates to the field of circuits, and in particular, to a noise reduction circuit, a noise reduction method, a noise reduction device, a noise reduction apparatus, a noise reduction device, and an optical receiver.

Background

In broadband communication, a coherent communication method of heterodyne detection in a radio digital communication system is generally applied to broadband communication. Heterodyne or homodyne detection mode is adopted in the bandwidth communication system, so that the receiving sensitivity and selectivity are remarkably improved. The bandwidth communication fully utilizes the characteristics of mixing gain, excellent channel selectivity, adjustability and the like of a coherent communication mode.

But current broadband communications typically have large input noise that affects the performance of reception.

Disclosure of Invention

The embodiment of the application provides a noise reduction circuit, a method, a device, equipment and an optical receiver, which are used for improving the noise performance of the input receiver.

In view of this, a first aspect of the present application provides a noise reduction circuit, including: the first signal detection module, the first earthing circuit, the first transimpedance amplifier, the second operational amplifier and the reference voltage generator; the first signal detection module is used for outputting a first direct current signal and a first alternating current signal; the first grounding circuit is coupled between the grounding end and the output end of the first signal detection module; the first transimpedance amplifier is coupled to the output end of the first signal detection module, and comprises a first operational amplifier and a first resistor, wherein the first resistor is coupled between the input end and the output end of the first operational amplifier, and the signal output by the output end of the first operational amplifier is opposite to the signal received by the input end of the first operational amplifier; the second operational amplifier includes a positive input, a negative input and an output, the negative input of the second operational amplifier being coupled to the output of the first operational amplifier; the positive input end of the second operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator; the output of the second operational amplifier is coupled to the first ground circuit for conditioning signals of the first ground circuit coupled to ground.

In this embodiment, since the signal output by the output terminal of the first operational amplifier is inverted to the signal received by the input terminal of the first operational amplifier, and the signal received by the input terminal of the first operational amplifier is input by the reference voltage generator through the second operational amplifier, the potentials of the reference voltage generator and the first transimpedance amplifier remain equal. Because the reference voltage output by the reference voltage generator is adjustable reference voltage, the potential of the reference voltage generator changes along with the output adjustable reference voltage, when the potential of the reference voltage generator changes, the potential of the first transimpedance amplifier correspondingly changes, and the proportion of the first direct current signal flowing into the first operational amplifier correspondingly changes at the moment, so that the proportion of the first direct current signal flowing into the first grounding circuit is reduced, thereby reducing noise generated by the direct current signal in the grounding circuit and improving the overall noise reduction performance.

Optionally, the reference voltage generator includes a third operational amplifier, and a first input current source is coupled between an input terminal and a power supply terminal of the third operational amplifier, and a current magnitude of the first input current source is adjustable.

In this embodiment, since the input current of the first input current source is adjustable, the reference voltage output by the reference voltage generator will correspondingly change along with the input current of the first input current source, so that the potential of the reference voltage generator changes. Thus by adjusting the magnitude of the input current, the proportion of the dc signal flowing into the first transimpedance amplifier can be adjusted.

Optionally, the reference voltage generator includes a third operational amplifier, and an output current source is coupled between an output end of the third operational amplifier and the ground end, and a current magnitude of the output current source is adjustable.

In this embodiment, since the output current of the output current source is adjustable, the reference voltage outputted by the reference voltage generator will correspondingly change along with the output current of the output current source, so that the potential of the reference voltage generator changes. Thus, by adjusting the magnitude of the output current, the proportion of the direct current flowing into the first transimpedance amplifier can be adjusted.

Optionally, an output current source is coupled to the output terminal of the first operational amplifier, and the output current source is grounded.

In this embodiment, an output current source is coupled to the output terminal of the first operational amplifier, and the output current source is grounded. So that the output current source can derive the direct current signal flowing into the first operational amplifier.

Optionally, the third operational amplifier is in proportional relationship to the first operational amplifier circuit.

In this embodiment, the third operational amplifier is in proportional relationship with the first operational amplifier circuit such that a change in potential across the third operational amplifier causes a corresponding change in the potential of the first operational amplifier.

Optionally, the first Signal detection module includes a first diode PD, where the first diode PD is coupled to an optical Mixer, where the Mixer is configured to mix a first Signal with a second Signal and send the mixed Signal to the first PD, optionally, the first Signal may be Signal light (Signal), and the second Signal may be Local Oscillator (Local Oscillator), where the first PD is configured to output the first dc Signal and the first ac Signal.

In this embodiment, the Mixer mixes the first signal with the second signal and sends the mixed first signal to the first PD, so that the first PD realizes signal detection, and then the first PD outputs a first direct current signal and the first alternating current signal according to the mixed signal, so as to realize signal input to the noise reduction circuit.

Optionally, the noise reduction circuit is coupled to a variable gain stage coupled to an output driver stage for amplifying the first ac signal, the output driver stage for transmitting the amplified first ac signal to an analog-to-digital sampler ADC.

In this embodiment, the noise reduction circuit, the variable gain stage and the output driving stage respectively filter, amplify and output the signal, thereby realizing the reception and amplification of the signal by the optical receiver.

Optionally, the first grounding circuit includes an NMOS transistor having a gate terminal coupled between the first signal detection module and the first transimpedance amplifier, and a source terminal coupled to the grounding terminal.

In this embodiment, the direct current signal is grounded through the NMOS tube, so as to realize the grounded derivation of the direct current signal, and because the direct current signal is regulated by the reference voltage generator, part of the direct current signal flows into the first transimpedance amplifier, so that the signal flowing into the NMOS tube is reduced, and the noise generated by the direct current signal passing through the NMOS tube is reduced.

Optionally, the noise reduction circuit further includes a second signal detection module, a second ground circuit, a second transimpedance amplifier and a fifth operational amplifier; the second signal detection module is used for outputting a second direct current signal and a second alternating current signal; the first grounding circuit is coupled between the grounding end and the positive electrode output end of the first signal detection module, the second grounding circuit is coupled between the grounding end and the negative electrode output end of the second signal detection module, and the grounding end are different grounding ends; the first transimpedance amplifier is coupled to the positive output end of the first signal detection module, the second transimpedance amplifier is coupled to the negative output end of the second signal detection module, the second transimpedance amplifier comprises a fourth operational amplifier and a second resistor, the second resistor is coupled between the input end and the output end of the fourth operational amplifier, and the signal output by the output end of the fourth operational amplifier is opposite to the signal received by the input end of the fourth operational amplifier; the fifth operational amplifier comprises a positive input end, a negative input end and an output end, wherein the negative input end of the fifth operational amplifier is coupled with the output end of the fourth operational amplifier; the positive input end of the fifth operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator; the output of the fifth operational amplifier is coupled to the second ground circuit for conditioning signals of the second ground circuit coupled to ground.

In this embodiment, the first grounding circuit, the first transimpedance amplifier, and the second operational amplifier constitute a first sub-noise reduction circuit; the second grounding circuit, the second transimpedance amplifier and the fifth operational amplifier form a second sub-noise reduction circuit. The first sub noise reduction circuit and the second sub noise reduction circuit are respectively connected with the same reference voltage generator through positive input ends of the second operational amplifier and the fifth operational amplifier, and the reference voltage generator inputs reference voltages to the first sub noise reduction circuit and the second sub noise reduction circuit at the same time, so that the adjustment of the reference voltage generator has a mirror effect between the first sub noise reduction circuit and the second sub noise reduction circuit, and the proportion of direct current signals flowing in the first transimpedance amplifier is kept synchronous with the proportion of direct current signals flowing in the second transimpedance amplifier.

A second aspect of an embodiment of the present application provides an optical receiver, including: the optical signal processing circuit comprises a signal light input optical path, a local oscillator light input optical path, a first optical Mixer, a second Mixer, a first diode PD, a second PD, a third PD, a fourth PD, a fifth PD, a sixth PD, a seventh PD, an eighth PD, a first transimpedance amplifier stage TIA, a second TIA, a third TIA, a fourth TIA, a first analog-to-digital converter ADC, a second ADC, a third ADC, a fourth ADC and a digital signal processor DSP;

The signal light input optical path is used for inputting two paths of signal light into the first Mixer and the second Mixer respectively;

the local oscillation light input optical path is used for inputting two paths of local oscillation light into the first Mixer and the second Mixer respectively;

the first Mixer and the second Mixer are respectively used for mixing the received signal light and the local oscillator light to obtain a first signal and a second signal;

the first Mixer sending the first signal to the first PD, the second PD, the third PD and the fourth PD;

the second Mixer sending the second signal to the fifth PD, the sixth PD, the seventh PD and the eighth PD;

the first TIA, the second TIA, the third TIA and the fourth TIA respectively comprise a positive input end, a negative input end and an output end, wherein the first PD is coupled with the positive input end of the first TIA, the second PD is coupled with the negative input end of the first TIA, the third PD is coupled with the positive input end of the second TIA, the fourth PD is coupled with the negative input end of the second TIA, the fifth PD is coupled with the positive input end of the third TIA, the sixth PD is coupled with the negative input end of the third TIA, the seventh PD is coupled with the positive input end of the fourth TIA, the eighth PD is coupled with the negative input end of the fourth TIA, the output end of the first TIA is coupled with the first ADC, the output end of the second IA is coupled with the second ADC, the output end of the third TIA is coupled with the third ADC, and the output end of the fourth IA is coupled with the fourth ADC;

The first PD and the second PD are used for outputting a first alternating current signal and a first direct current signal according to a first signal and sending the first alternating current signal and the first direct current signal to the first TIA;

the third PD and the fourth PD are used for outputting a second alternating current signal and a second direct current signal according to the first signal and sending the second alternating current signal and the second direct current signal to the second TIA;

the fifth PD and the sixth PD are used for outputting a third alternating current signal and a third direct current signal according to the second signal and sending the third alternating current signal and the third direct current signal to the third TIA;

the seventh PD and the eighth PD are configured to output a fourth ac signal and a fourth dc signal according to the second signal, and send the fourth ac signal and the fourth dc signal to the fourth TIA;

the first TIA, the second TIA, the third TIA and the fourth TIA are respectively used for filtering the first direct current signal, the second direct current signal, the third direct current signal and the fourth direct current signal, amplifying the first alternating current signal, the second alternating current signal, the third alternating current signal and the fourth alternating current signal;

the first TIA, the second TIA, the third TIA and the fourth TIA are respectively provided with a noise reduction device, and the noise reduction device is used for reducing noise generated when the first direct current signal, the second direct current signal, the third direct current signal and the fourth direct current signal pass through the first TIA, the second TIA, the third TIA and the fourth TIA;

The first TIA, the second TIA, the third TIA and the fourth TIA are respectively used for sending the amplified first alternating current signal, the second alternating current signal, the third alternating current signal and the fourth alternating current signal to the first ADC, the second ADC, the third ADC and the fourth ADC;

the first ADC, the second ADC, the third ADC and the fourth ADC are used for respectively collecting the first alternating current signal, the second alternating current signal, the third alternating current signal and the fourth alternating current signal and then sending the signals to the DSP;

the DSP is used for processing the first alternating current signal, the second alternating current signal, the third alternating current signal and the fourth alternating current signal.

In this embodiment, by the circuit structure of the optical receiver, the optical signal is received, collected, amplified, noise reduced and processed, so that a complete optical receiver receiving process is realized, where the TIA-level noise reducer can reduce noise in the process of filtering the direct current signal, thereby improving the overall performance of the whole optical receiver.

Optionally, the noise reduction device includes a noise reduction circuit, the noise reduction circuit including: a first ground circuit, a first transimpedance amplifier, a second operational amplifier and a reference voltage generator;

The first grounding circuit is coupled between the ground terminal and the output terminal of the first PD, the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD or the eighth PD, and is used for coupling signals output by the first PD, the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD or the eighth PD to ground;

the first transimpedance amplifier is coupled to the output end of the first PD, the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD or the eighth PD, and comprises a first operational amplifier and a first resistor, wherein the first resistor is coupled between the input end and the output end of the first operational amplifier, and the signal output by the output end of the first operational amplifier is opposite to the signal received by the input end of the first operational amplifier;

the second operational amplifier includes a positive input, a negative input and an output, the negative input of the second operational amplifier being coupled to the output of the first operational amplifier;

the positive input end of the second operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator;

The output of the second operational amplifier is coupled to the first ground circuit for conditioning signals of the first ground circuit coupled to ground.

In this embodiment, since the signal output by the output terminal of the first operational amplifier in the noise reduction circuit is opposite to the signal received by the input terminal of the first operational amplifier, and the signal received by the input terminal of the first operational amplifier is input by the reference voltage generator through the second operational amplifier, the potentials of the reference voltage generator and the first transimpedance amplifier remain equal. Because the reference voltage output by the reference voltage generator is adjustable reference voltage, the potential of the reference voltage generator changes along with the output adjustable reference voltage, when the potential of the reference voltage generator changes, the potential of the first transimpedance amplifier correspondingly changes, and the proportion of the first direct current signal flowing into the first operational amplifier correspondingly changes at the moment, so that the proportion of the first direct current signal flowing into the first grounding circuit is reduced, thereby reducing the noise generated by the direct current signal in the grounding circuit and improving the overall noise reduction performance of the optical receiver.

Optionally, the reference voltage generator in the noise reduction circuit of the TIA includes a third operational amplifier, and a first input current source is coupled between an input terminal and a power supply terminal of the third operational amplifier, and a current magnitude of the first input current source is adjustable.

Optionally, the reference voltage generator in the noise reduction circuit of the TIA includes a third operational amplifier, and an output current source is coupled to the output end of the third operational amplifier and the ground end, and the current magnitude of the output current source is adjustable.

Optionally, an output terminal of the first operational amplifier in the noise reduction circuit of the TIA is coupled to an output current source, and the output current source is grounded.

Optionally, a first Signal detection module in the noise reduction circuit of the TIA includes a first diode PD, where the first diode PD is coupled to an optical Mixer, where the Mixer is configured to mix a first Signal with a second Signal and send the mixed first Signal to the first PD, optionally, the first Signal may be Signal light (Signal), and the second Signal may be Local Oscillator (Local Oscillator), where the first PD is configured to output the first dc Signal and the first ac Signal.

Optionally, a first grounding circuit in the noise reduction circuit of the TIA includes an NMOS, a gate terminal of which is coupled between the first signal detection module and the first transimpedance amplifier, and a source terminal of which is coupled with the grounding terminal.

Optionally, the noise reduction circuit in the noise reduction circuit of the TIA further includes a second signal detection module, a second ground circuit, a second transimpedance amplifier, and a fifth operational amplifier; the second signal detection module is used for outputting a second direct current signal and a second alternating current signal; the first grounding circuit is coupled between the grounding end and the positive electrode output end of the first signal detection module, the second grounding circuit is coupled between the grounding end and the negative electrode output end of the second signal detection module, and the grounding end are different grounding ends; the first transimpedance amplifier is coupled to the positive output end of the first signal detection module, the second transimpedance amplifier is coupled to the negative output end of the second signal detection module, the second transimpedance amplifier comprises a fourth operational amplifier and a second resistor, the second resistor is coupled between the input end and the output end of the fourth operational amplifier, and the signal output by the output end of the fourth operational amplifier is opposite to the signal received by the input end of the fourth operational amplifier; the fifth operational amplifier comprises a positive input end, a negative input end and an output end, wherein the negative input end of the fifth operational amplifier is coupled with the output end of the fourth operational amplifier; the positive input end of the fifth operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator; the output of the fifth operational amplifier is coupled to the second ground circuit for conditioning signals of the second ground circuit coupled to ground.

A third aspect of an embodiment of the present application provides a circuit noise reduction method, which is applied to a noise reduction circuit, where the noise reduction circuit includes: the first signal detection module, the first earthing circuit, the first transimpedance amplifier, the second operational amplifier and the reference voltage generator; the first signal detection module is used for outputting a first direct current signal and a first alternating current signal; the first grounding circuit is coupled between the grounding end and the output end of the first signal detection module; the first transimpedance amplifier is coupled to the output end of the first signal detection module, and comprises a first operational amplifier and a first resistor, wherein the first resistor is coupled between the input end and the output end of the first operational amplifier, and the signal output by the output end of the first operational amplifier is opposite to the signal received by the input end of the first operational amplifier; the second operational amplifier includes a positive input, a negative input and an output, the negative input of the second operational amplifier being coupled to the output of the first operational amplifier; the positive input end of the second operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator; the output end of the second operational amplifier is coupled with the first grounding circuit and is used for adjusting the signal of the first grounding circuit coupled to the ground; the method comprises the following steps: acquiring a first direct current signal and a first alternating current signal which are output by the first signal detection module; the ratio of the first direct current signal to the first operational amplifier is adjusted by adjusting the adjustable reference voltage output by the reference voltage generator.

Optionally, the reference voltage generator includes a third operational amplifier, a first input current source is coupled between an input terminal and a power supply terminal of the third operational amplifier, and a current magnitude of the first input current source is adjustable; the adjusting the ratio of the first direct current signal to the first operational amplifier by adjusting the adjustable reference voltage output by the reference voltage generator comprises: the proportion of the first direct current signal to the first operational amplifier is adjusted by adjusting the magnitude of the input current of the first input current source, wherein the larger the current of the first input current source to the third operational amplifier is, the higher the proportion of the first direct current signal to the first operational amplifier is.

Optionally, the reference voltage generator includes a third operational amplifier, an output current source is coupled between an output end of the third operational amplifier and the ground end, and a current magnitude of the output current source is adjustable; the adjusting the ratio of the first direct current signal to the first operational amplifier by adjusting the adjustable reference voltage output by the reference voltage generator comprises:

and adjusting the proportion of the first direct current signal input to the first operational amplifier by adjusting the magnitude of the output current source, wherein the proportion of the first direct current signal input to the first operational amplifier is lower as the current value of the output current source is larger.

Optionally, the noise reduction circuit further includes a second signal detection module, a second ground circuit, a second transimpedance amplifier and a fifth operational amplifier; the second signal detection module is used for outputting a second direct current signal and a second alternating current signal; the first grounding circuit is coupled between the grounding end and the positive electrode output end of the first signal detection module, the second grounding circuit is coupled between the grounding end and the negative electrode output end of the second signal detection module, and the grounding end are different grounding ends; the first transimpedance amplifier is coupled to the positive output end of the first signal detection module, the second transimpedance amplifier is coupled to the negative output end of the second signal detection module, the second transimpedance amplifier comprises a fourth operational amplifier and a second resistor, the second resistor is coupled between the input end and the output end of the fourth operational amplifier, and the signal output by the output end of the fourth operational amplifier is opposite to the signal received by the input end of the fourth operational amplifier; the fifth operational amplifier comprises a positive input end, a negative input end and an output end, wherein the negative input end of the fifth operational amplifier is coupled with the output end of the fourth operational amplifier; the positive input end of the fifth operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator; the output end of the fifth operational amplifier is coupled with the second grounding circuit and is used for adjusting the signal of the second grounding circuit coupled to the ground; the method further comprises the steps of: and adjusting the proportion of the second direct current signal input to the fourth operational amplifier by adjusting the proportion of the first direct current signal input to the first operational amplifier, wherein the proportion of the second direct current signal input to the fourth operational amplifier is synchronous with the proportion of the first direct current signal input to the first operational amplifier.

A fourth aspect of the present application provides a broadband receiving apparatus, the apparatus being applied to a noise reduction circuit, the noise reduction circuit including: the first signal detection module, the first earthing circuit, the first transimpedance amplifier, the second operational amplifier and the reference voltage generator; the first signal detection module is used for outputting a first direct current signal and a first alternating current signal; the first grounding circuit is coupled between the grounding end and the output end of the first signal detection module; the first transimpedance amplifier is coupled to the output end of the first signal detection module, and comprises a first operational amplifier and a first resistor, wherein the first resistor is coupled between the input end and the output end of the first operational amplifier, and the signal output by the output end of the first operational amplifier is opposite to the signal received by the input end of the first operational amplifier; the second operational amplifier includes a positive input, a negative input and an output, the negative input of the second operational amplifier being coupled to the output of the first operational amplifier; the positive input end of the second operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator; the output end of the second operational amplifier is coupled with the first grounding circuit and is used for adjusting the signal of the first grounding circuit coupled to the ground; the device comprises:

The acquisition unit is used for acquiring the first direct current signal and the first alternating current signal output by the first signal detection module;

and the adjusting unit is used for adjusting the proportion of the first direct current signal acquired by the acquisition unit to the first operational amplifier by adjusting the adjustable reference voltage output by the reference voltage generator.

Optionally, the reference voltage generator includes a third operational amplifier, a first input current source is coupled between an input terminal and a power supply terminal of the third operational amplifier, and a current magnitude of the first input current source is adjustable; the adjusting unit is also used for:

the proportion of the first direct current signal to the first operational amplifier is adjusted by adjusting the magnitude of the input current of the first input current source, wherein the larger the current of the first input current source to the third operational amplifier is, the higher the proportion of the first direct current signal to the first operational amplifier is.

Optionally, the reference voltage generator includes a third operational amplifier, an output current source is coupled between an output end of the third operational amplifier and the ground end, and a current magnitude of the output current source is adjustable; the adjusting unit is also used for:

Optionally, the noise reduction circuit further includes a second signal detection module, a second ground circuit, a second transimpedance amplifier and a fifth operational amplifier; the second signal detection module is used for outputting a second direct current signal and a second alternating current signal; the first grounding circuit is coupled between the grounding end and the positive electrode output end of the first signal detection module, the second grounding circuit is coupled between the grounding end and the negative electrode output end of the second signal detection module, and the grounding end are different grounding ends; the first transimpedance amplifier is coupled to the positive output end of the first signal detection module, the second transimpedance amplifier is coupled to the negative output end of the second signal detection module, the second transimpedance amplifier comprises a fourth operational amplifier and a second resistor, the second resistor is coupled between the input end and the output end of the fourth operational amplifier, and the signal output by the output end of the fourth operational amplifier is opposite to the signal received by the input end of the fourth operational amplifier; the fifth operational amplifier comprises a positive input end, a negative input end and an output end, wherein the negative input end of the fifth operational amplifier is coupled with the output end of the fourth operational amplifier; the positive input end of the fifth operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator; the output end of the fifth operational amplifier is coupled with the second grounding circuit and is used for adjusting the signal of the second grounding circuit coupled to the ground; the adjusting unit is also used for:

And adjusting the proportion of the second direct current signal input to the fourth operational amplifier by adjusting the proportion of the first direct current signal input to the first operational amplifier, wherein the proportion of the second direct current signal input to the fourth operational amplifier is synchronous with the proportion of the first direct current signal input to the first operational amplifier.

A fifth aspect of the embodiments of the present application provides an electronic device comprising a memory, a processor and a computer program stored on the memory, which when executed by the processor implements the steps of the method described in any of the above third aspects or alternative implementations of the third aspect.

Drawings

Fig. 1 is a schematic diagram of an optical receiver according to an embodiment of the present application;

fig. 2 is a schematic diagram illustrating a signal processing performed by the diode PD according to an embodiment of the present application;

FIG. 3 is a schematic diagram of a noise reduction circuit in an optical receiver architecture according to an embodiment of the present application;

fig. 4 is a schematic diagram of a dc signal derived by a transimpedance amplifier stage TIA according to an embodiment of the present application;

FIG. 5 is a circuit diagram of a noise reduction circuit in an optical receiver according to an embodiment of the present application;

FIG. 6 is a circuit diagram of one implementation of a noise reduction circuit provided by an embodiment of the present application;

FIG. 7 is a circuit diagram of another implementation of a noise reduction circuit according to an embodiment of the present application;

FIG. 8 is a circuit diagram of another implementation of a noise reduction circuit according to an embodiment of the present application;

fig. 9a is a schematic diagram of an optical receiver according to an embodiment of the present application;

FIG. 9b is a schematic diagram of a circuit noise reduction method according to an embodiment of the present application;

fig. 10 is a schematic diagram of an electronic device according to an embodiment of the present application;

fig. 11 is a schematic diagram of a broadband receiving apparatus according to an embodiment of the present application.

Detailed Description

The embodiment of the application provides a noise reduction circuit, a method, a device, equipment, an optical receiver and a medium, which are used for solving the problem of larger input noise of the optical receiver.

In order that those skilled in the art will better understand the present application, a technical solution in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, shall fall within the scope of the present application.

The terms "first," "second," "third," "fourth" and the like in the description and in the claims and in the above drawings, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments described herein may be implemented in other sequences than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

In broadband communication, a coherent communication method of heterodyne detection in a radio digital communication system is generally applied to broadband communication. A coherent receiver in coherent optical communication is an important implementation, and a schematic block diagram thereof is shown in fig. 1. The Signal light Signal101 is coupled with the Local Oscillator102, then passes through the optical Mixer103, then is converted into an electrical Signal by the diode (PD) 104, is amplified by the transimpedance amplifier stage (transimpedance amplifier, TIA) 105, is sampled by the analog-to-digital converter (analog to digital converter, ADC) 106, and then is subjected to data processing by the digital Signal processor (digital Signal processor, DSP) 107.

Based on the architecture shown in fig. 1, the signal after mixing by Mixer is shown in fig. 2 by the conversion principle of PD, and after the signal light Es201 and the local oscillator light Elo202 enter the optical mixers Mixer203 and PD204 respectively, two paths of output of an alternating current signal Q (205) and a direct current signal I (206) are obtained, wherein the I path signal 206 comprises P1 and P2, and the Q path signal 205 comprises P3 and P4. Therefore, it is known that the current output by the PD includes a larger dc signal and a pair of differential ac signals.

The principle of the amplification of the transimpedance amplifier stage TIA is shown in fig. 3, and the working principle of the amplification stage TIA is shown in fig. 3, wherein the PD31 comprises a diode 301, the diode 301 sends the direct current signal and the alternating current signal to the transimpedance amplifier stage TIA32, the TIA32 comprises a noise reduction circuit 302, a variable gain stage 303 and an output driving stage 304, the noise reduction circuit 302 is used for filtering the direct current signal input by the PD31, the variable gain stage 303 is used for amplifying the alternating current signal input by the PD31, the output driving stage 304 is used for sending the amplified alternating current signal to the ADC33, and the ADC33 comprises an analog-to-digital sampler 305.

During operation as shown in fig. 3, the noise reduction circuit in the TIA needs to bypass the dc current to ground, since the variable gain stage in the TIA amplifies only the ac current. As shown in fig. 4, fig. 4 is a schematic diagram of a principle that the current TIA needs to bypass a direct current to ground, as shown in fig. 4, an output terminal of a PD401 is coupled to an input terminal of a transimpedance amplifier 402, the PD401 inputs a direct current signal Idc and an alternating current signal Iac to the transimpedance amplifier 402, and an NMOS 403 is coupled between the ground terminal and an output terminal of the PD401, so that the direct current signal Idc can be bypassed to ground through the NMOS 403.

The schematic diagram of fig. 4 is shown with reference to fig. 5. Fig. 5 is a specific implementation of the present noise reduction circuit. As shown in fig. 5, the circuit includes a first transimpedance amplifier 501, a second transimpedance amplifier 502, a second operational amplifier 503, a diode PD504, and an NMOS 505. The PD504 is configured to output a dc signal and an ac signal; NMOS tube 505 is coupled between ground and the output of PD 504; the first transimpedance amplifier 501 is coupled to the output terminal of the PD504, the first transimpedance amplifier 501 comprises a first operational amplifier 5011 and a first resistor 5012, the first resistor 5012 is coupled between the input terminal and the output terminal of the first operational amplifier 5011, and the signal output by the output terminal of the first operational amplifier 5011 is opposite to the signal received by the input terminal of the first operational amplifier 5011; the second operational amplifier 503 includes a positive input terminal, a negative input terminal, and an output terminal, the negative input terminal of the second operational amplifier 503 being coupled to the output terminal of the first operational amplifier 5011; the positive input of the second operational amplifier 503 is coupled to the second transimpedance amplifier 502; the output of the second operational amplifier 503 is coupled to an NMOS tube 505 for conditioning the signal that the first ground circuit is coupled to ground.

In fig. 5, the two operational amplifiers coupled to the output of the reference voltage generator 502 are the same structure, except that one structure is used to receive the positive pole of the PD output and the other structure is used to receive the negative pole of the PD output, so only one structure is used as an illustration.

In the configuration shown in fig. 5, since the signal output from the output terminal of the first operational amplifier 5011 is inverted from the signal received from the input terminal of the first operational amplifier 5011, and the signal received from the input terminal of the first operational amplifier 5011 is input from the second transimpedance amplifier 502 through the second operational amplifier 503, the potentials of the first transimpedance amplifier 501 and the second transimpedance amplifier 502 remain equal.

When the PD504 inputs the dc signal Idc and the ac signal Iac to the first transimpedance amplifier 501, since the potential of the ac signal Iac fluctuates up and down around the 0 point, the potential of the ac signal Iac is zero as a whole and does not cause an increase in the potential of the first transimpedance amplifier 501, so that the ac signal Iac can be input to the first transimpedance amplifier 501 through the input terminal, and the dc signal Idc causes an increase in the potential of the first transimpedance amplifier 501, and thus, the dc signal Idc flows out through the NMOS tube 505. Thereby realizing the bypass of the direct current to the ground.

In a specific working process, because the direct current signal current of the coherent receiver is larger, the direct current can generate larger input noise when flowing through the NMOS tube, and the performance of the receiver is affected.

Therefore, in order to solve the above-mentioned problems, an embodiment of the present application provides a noise reduction circuit capable of reducing the noise amplitude generated by the dc signal, thereby improving the overall performance of the receiver. For easy understanding, the following detailed description of the embodiments of the present application refers to the accompanying drawings.

Referring to fig. 6, as shown in fig. 6, a noise reduction circuit provided in an embodiment of the application includes.

A first signal detection module 604, a first grounding circuit 605, a first transimpedance amplifier 602, a second operational amplifier 603 and a reference voltage generator 601; wherein,

the first signal detection module 604 is configured to output a first dc signal Idc and a first ac signal Iac; optionally, the first signal detection module 604 includes a first diode PD, where the first PD is coupled to an optical Mixer, where the Mixer is configured to mix the first signal with the second signal and send the mixed signal to the first PD, and the first PD is configured to output the first dc signal Idc and the first ac signal Iac.

The first grounding circuit 605 is coupled between the grounding terminal and the output terminal of the first signal detection module 604; optionally, the first grounding circuit includes an NMOS transistor, a gate terminal of the NMOS transistor is coupled between the first signal detection module 604 and the first transimpedance amplifier 602, and a source terminal of the NMOS transistor is coupled to the ground terminal.

The first transimpedance amplifier 602 is coupled to the output terminal of the first signal detection module 604, the first transimpedance amplifier 602 comprises a first operational amplifier 6021 and a first resistor 6022, the first resistor 6022 is coupled between the input terminal and the output terminal of the first operational amplifier 6021, and the signal output by the output terminal of the first operational amplifier 6021 is opposite to the signal received by the input terminal of the first operational amplifier 6021;

the second operational amplifier 603 comprises a positive input, a negative input and an output, the negative input of the second operational amplifier 603 being coupled to the output of the first operational amplifier 6021;

the positive input terminal of the second operational amplifier 603 is coupled to the reference voltage generator 601, and is configured to receive the adjustable reference voltage output by the reference voltage generator 601;

the output of the second operational amplifier 603 is coupled to a first ground circuit 605 for conditioning signals of the first ground circuit 605 coupled to ground.

In the configuration shown in fig. 6, since the signal output from the output terminal of the first operational amplifier 6021 is inverted to the signal received from the input terminal of the first operational amplifier 6021, and the signal received from the input terminal of the first operational amplifier 6021 is input from the reference voltage generator 601 through the second operational amplifier 603, the potential of the reference voltage generator 601 and the potential of the first transimpedance amplifier 602 remain equal.

Since the reference voltage outputted from the reference voltage generator 601 is an adjustable reference voltage, the potential of the reference voltage generator 601 changes according to the magnitude of the outputted adjustable reference voltage, and when the potential of the reference voltage generator 601 changes, the potential of the first transimpedance amplifier 602 also changes accordingly, and at this time, the proportion (nIdc) of the first direct current signal flowing into the first operational amplifier 6021 changes accordingly, so that the proportion (1-n) Idc of the first direct current signal flowing into the first grounding circuit 605 (which may be an NMOS tube) decreases, where n is a positive integer greater than or equal to zero.

In this embodiment, in the structure shown in fig. 6, the first operational amplifier 6021 may absorb the first ac signal and the first dc signal (may be fully absorbed or partially absorbed), and when the first operational amplifier 6021 absorbs a part of the first dc signal, the remaining dc signal bypasses to the ground through the first grounding circuit 605, so that the dc current flowing into the first grounding circuit 605 (NMOS tube) is reduced, and the noise generated in the NMOS tube is greatly reduced, thereby greatly improving the performance of the coherent receiver.

Optionally, an output of the first operational amplifier may be coupled to an output current source (not shown) which is grounded. So that the output current source can derive the direct current signal flowing into the first operational amplifier.

Optionally, the embodiment of the present application provides two ways to adjust the reference voltage output by the reference voltage generator, which are respectively: 1. the input current at the input of the reference voltage generator is regulated. 2. The output current of the output end of the reference voltage generator is regulated. For easy understanding, the following describes two modes in detail with reference to the drawings.

1. The input current at the input of the reference voltage generator is regulated.

Referring to fig. 7, as shown in fig. 7, the reference voltage generator 701 includes a third operational amplifier 7011, and optionally, the reference voltage generator 701 further includes a third resistor 7012, and the third resistor 7012 is coupled between an input terminal and an output terminal of the third operational amplifier 7011. A first input current source 702 is coupled between the input terminal and the power supply terminal of the third operational amplifier 7011, and the current of the first input current source 702 is adjustable.

In this embodiment, since the input current of the first input current source 702 is adjustable, the reference voltage outputted by the reference voltage generator 701 will correspondingly change along with the input current of the first input current source 702, so that the potential of the reference voltage generator 701 changes. Thus, by adjusting the magnitude of the input current, the proportion of the direct current signal flowing into the first transimpedance amplifier 703 can be adjusted.

2. The output current of the output end of the reference voltage generator is regulated.

Referring to fig. 8, as shown in fig. 8, the reference voltage generator 801 includes a third operational amplifier 8011, and optionally, the reference voltage generator 801 further includes a third resistor 8012, and the third resistor 8012 is coupled between an input terminal and an output terminal of the third operational amplifier 8011. The output terminal and the ground terminal of the third operational amplifier 8011 are coupled to an output current source 802, and the current of the output current source 802 is adjustable.

In this embodiment, since the output current of the output current source 802 is adjustable, the reference voltage outputted by the reference voltage generator 801 will correspondingly change along with the output current of the output current source 802, so that the potential of the reference voltage generator 801 changes. Therefore, by adjusting the magnitude of the output current, the proportion of the direct current flowing into the first transimpedance amplifier 803 can be adjusted.

The third operational amplifier is in a proportional relationship with the first operational amplifier circuit. Optionally, the third operational amplifier and the first operational amplifier have the same circuit structure, and parameters of circuit components may be different between the third operational amplifier and the first operational amplifier.

It should be noted that, the above two ways of adjusting the reference voltage output by the reference voltage generator are provided, and those skilled in the art may also use other ways to change the reference voltage output by the reference voltage generator, which all fall within the protection scope of the embodiments of the present application.

Further, as shown in fig. 6, the noise reduction circuit provided by the embodiment of the present application further includes a second signal detection module 606, a second grounding circuit 607, a second transimpedance amplifier 608 and a fifth operational amplifier 609; wherein,

the second signal detection module 606 is configured to output a second direct current signal and a second alternating current signal;

the first grounding circuit is coupled between the grounding terminal and the positive output terminal of the first signal detection module, the second grounding circuit 607 is coupled between the grounding terminal and the negative output terminal of the second signal detection module 606, and the grounding terminal are different grounding terminals;

the first transimpedance amplifier is coupled to the positive output terminal of the first signal detection module, the second transimpedance amplifier 608 is coupled to the negative output terminal of the second signal detection module 606, the second transimpedance amplifier 608 comprises a fourth operational amplifier 6081 and a second resistor 6082, the second resistor 6082 is coupled between the input terminal and the output terminal of the fourth operational amplifier 6081, and the signal output by the output terminal of the fourth operational amplifier 6081 is opposite to the signal received by the input terminal of the fourth operational amplifier 6081;

The fifth operational amplifier 609 includes a positive input terminal, a negative input terminal and an output terminal, the negative input terminal of the fifth operational amplifier 609 is coupled to the output terminal of the fourth operational amplifier 6081;

the positive input terminal of the fifth operational amplifier 609 is coupled to the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator 601;

the output of the fifth operational amplifier 609 is coupled to the second ground circuit 607 for conditioning the signal of the second ground circuit 607 coupled to ground.

In this embodiment, the first signal detection module corresponds to the PD1 (1041) in fig. 1, the second signal detection module corresponds to the PD2 (1042) in fig. 1, and as shown in fig. 1, the PD1 (1041) is coupled to the positive input terminal of the transimpedance amplifier stage TIA105, the PD2 (1042) is coupled to the negative input terminal of the transimpedance amplifier stage TIA105, wherein the positive input terminal of the TIA105 is coupled to the first transimpedance amplifier, and the negative input terminal of the TIA105 is coupled to the second transimpedance amplifier. The first and second transimpedance amplifiers of the TIA105 are respectively connected to the same ADC106, so that the TIA105 transmits the amplified signal to the ADC106.

Further, regarding the specific operation principle of the second signal detection module 606, the second grounding circuit, the second transimpedance amplifier and the fifth operational amplifier in fig. 6, the operation modes of the first signal detection module, the first grounding circuit, the first transimpedance amplifier and the second operational amplifier are the same, so the description is omitted herein.

It should be noted that, the first grounding circuit, the first transimpedance amplifier and the second operational amplifier form a first sub-noise reduction circuit; the second grounding circuit, the second transimpedance amplifier and the fifth operational amplifier form a second sub-noise reduction circuit. The first sub noise reduction circuit and the second sub noise reduction circuit are respectively connected with the same reference voltage generator through positive input ends of the second operational amplifier and the fifth operational amplifier, and the reference voltage generator inputs reference voltages to the first sub noise reduction circuit and the second sub noise reduction circuit at the same time, so that the adjustment of the reference voltage generator has a mirror effect between the first sub noise reduction circuit and the second sub noise reduction circuit, and the proportion of direct current signals flowing in the first transimpedance amplifier is kept synchronous with the proportion of direct current signals flowing in the second transimpedance amplifier.

Further, based on the noise reduction circuit provided by the embodiment of the present application, referring to fig. 9a, the embodiment of the present application further provides an optical receiver, where the structure of the optical receiver provided by the embodiment of the present application is shown in fig. 9a, and the optical receiver includes: a signal light input optical path 91, a local oscillation light input optical path 92, a first optical Mixer93a, a second Mixer93b, a first diode PD94a, a second PD94b, a third PD94c, a fourth PD94d, a fifth PD94e, a sixth PD94f, a seventh PD94g, an eighth PD94h, a first transimpedance amplifier stage TIA95a, a second TIA95b, a third TIA95c, a fourth TIA95d, a first analog-to-digital converter ADC96a, a second ADC96b, a third ADC96c, a fourth ADC96d, and a digital signal processor DSP97;

The signal light input optical path 91 is used for inputting two paths of signal light into the first Mixer93a and the second Mixer93b respectively;

the local oscillation light input optical path 92 is used for inputting two paths of local oscillation light into the first Mixer93a and the second Mixer93b respectively;

the first Mixer93a and the second Mixer93b are respectively used for mixing the received signal light and the local oscillator light to obtain a first signal and a second signal;

the first Mixer93a sends a first signal to the first PD94a, the second PD94b, the third PD94c, and the fourth PD94d;

the second Mixer93b sends the second signal to the fifth PD94e, the sixth PD94f, the seventh PD94g, and the eighth PD94h;

the first TIA95a, the second TIA95b, the third TIA95c, and the fourth TIA95d each include a positive input, a negative input, and an output, wherein the first PD94a is coupled to the positive input of the first TIA95a, the second PD94b is coupled to the negative input of the first TIA95a, the third PD94c is coupled to the positive input of the second TIA95b, the fourth PD94d is coupled to the negative input of the second TIA95b, the fifth PD94e is coupled to the positive input of the third TIA95c, the sixth PD94f is coupled to the negative input of the third TIA95c, the seventh PD94g is coupled to the positive input of the fourth TIA95d, the eighth PD94h is coupled to the negative input of the fourth TIA95d, the output of the first TIA95a is coupled to the first ADC96a, the output of the second IA is coupled to the second ADC96b, the output of the third TIA95c is coupled to the third ADC96c, and the fourth ADC96d is coupled to the fourth ADC 95 d;

The first PD94a and the second PD94b are configured to output a first ac signal and a first dc signal according to the first signal, and transmit the first ac signal and the first dc signal to the first TIA95a;

the third PD94c and the fourth PD94d are configured to output a second ac signal and a second dc signal according to the first signal, and transmit the second ac signal and the second dc signal to the second TIA95b;

the fifth PD94e and the sixth PD94f are configured to output a third ac signal and a third dc signal according to the second signal, and transmit the third ac signal and the third dc signal to the third TIA95c;

the seventh PD94g and the eighth PD94h are configured to output a fourth ac signal and a fourth dc signal according to the second signal, and transmit the fourth ac signal and the fourth dc signal to the fourth TIA95d;

the first TIA95a, the second TIA95b, the third TIA95c, and the fourth TIA95d are configured to filter the first direct current signal, the second direct current signal, the third direct current signal, and the fourth direct current signal, respectively, and amplify the first alternating current signal, the second alternating current signal, the third alternating current signal, and the fourth alternating current signal;

noise reducing devices are respectively arranged in the first TIA95a, the second TIA95b, the third TIA95c and the fourth TIA95d, and are used for reducing noise generated when the first direct current signal, the second direct current signal, the third direct current signal and the fourth direct current signal pass through the first TIA95a, the second TIA95b, the third TIA95c and the fourth TIA95d;

Optionally, the noise reduction device includes a noise reduction circuit, the noise reduction circuit including: a first ground circuit, a first transimpedance amplifier, a second operational amplifier and a reference voltage generator; the first grounding circuit is coupled between the grounding terminal and the output terminal of the first PD, the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD or the eighth PD, and is used for coupling signals output by the first PD, the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD or the eighth PD to ground; the first transimpedance amplifier is coupled to the output end of the first PD, the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD or the eighth PD, and comprises a first operational amplifier and a first resistor, wherein the first resistor is coupled between the input end and the output end of the first operational amplifier, and a signal output by the output end of the first operational amplifier is opposite to a signal received by the input end of the first operational amplifier; the second operational amplifier comprises a positive input end, a negative input end and an output end, and the negative input end of the second operational amplifier is coupled with the output end of the first operational amplifier; the positive input end of the second operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator; the output of the second operational amplifier is coupled to the first ground circuit for conditioning signals coupled to ground by the first ground circuit.

Further, the reference voltage generator comprises a third operational amplifier, wherein the input end of the third operational amplifier is coupled with a first input current source, and the current of the first input current source is adjustable. Or, an output current source is coupled between the output end of the third operational amplifier and the grounding end, and the current of the output current source can be adjusted.

The first TIA95a, the second TIA95b, the third TIA95c, and the fourth TIA95d are configured to send the amplified first ac signal, the second ac signal, the third ac signal, and the fourth ac signal to the first ADC96a, the second ADC96b, the third ADC96c, and the fourth ADC96d, respectively;

the first ADC96a, the second ADC96b, the third ADC96c and the fourth ADC96d are configured to collect a first ac signal, a second ac signal, a third ac signal and a fourth ac signal, respectively, and send the signals to the DSP97;

the DSP97 is used for processing the first ac signal, the second ac signal, the third ac signal and the fourth ac signal.

The optical receiver provided by the embodiment of the application, wherein the noise reduction circuit in the TIA provided by the embodiment of the application is the noise reduction circuit provided by the embodiment of the application. By the introduction, the optical receiver provided by the embodiment of the application can greatly reduce the noise generated by the direct current signal in the TIA due to the adoption of the noise reduction circuit, so that the performance of the optical receiver is improved.

Further, in order to ensure that the noise reduction circuit and the optical receiver provided by the embodiments of the present application can operate smoothly, based on the above structure, the embodiments of the present application further provide a circuit noise reduction method, and for easy understanding, the method provided by the embodiments of the present application is described in detail below with reference to the accompanying drawings.

Referring to fig. 9b, as shown in fig. 9b, the circuit noise reduction method provided by the embodiment of the application includes the following steps.

901. And acquiring a first direct current signal and a first alternating current signal which are output by the first signal detection module.

In this embodiment, the optical mixer sends an optical signal obtained by coupling signal light with a local oscillator to the first signal detection module, where the first signal detection module may be a PD, and the PD converts the optical signal into an electrical signal and sends the electrical signal to the main TIA, where the electrical signal includes a first ac signal Iac and a first dc signal Idc.

902. The ratio of the first direct current signal input to the first operational amplifier is adjusted by adjusting the adjustable reference voltage output by the reference voltage generator.

In this embodiment, the adjustable reference voltage output by the reference voltage generator is adjusted to adjust the proportion of the dc signal ndicc input into the first operational amplifier, and the dc signal (1-n) Idc not input into the first operational amplifier is led out through the NMOS ground. The distribution of the direct current ratio of the input first operational amplifier is thus achieved, in particular, the ratio, i.e. the value of n, is achieved by adjusting the adjustable reference voltage output by the adjustable reference voltage generator.

The embodiment of the application provides two ways for adjusting the reference voltage output by the reference voltage generator, which are respectively as follows: 1. the input current at the input of the reference voltage generator is regulated. 2. The output current of the output end of the reference voltage generator is regulated. For easy understanding, the following describes two modes in detail with reference to the drawings.

As shown in fig. 7, the reference voltage generator includes a third operational amplifier, and a first input current source is coupled between an input terminal and a power supply terminal of the third operational amplifier, and a current magnitude of the first input current source is adjustable.

The specific way of adjustment is: the proportion of the first direct current signal to the first operational amplifier is adjusted by adjusting the magnitude of the input current of the first input current source, wherein the larger the current of the first input current source to the third operational amplifier is, the higher the proportion of the first direct current signal to the first operational amplifier is. The magnitude of the input current of the output current source is inversely proportional to the potential of the first operational amplifier.

As shown in fig. 8, the reference voltage generator includes a third operational amplifier, and an output current source is coupled between the output end of the third operational amplifier and the ground end, and the current of the output current source is adjustable.

The specific way of adjustment is: and adjusting the proportion of the first direct current signal input to the first operational amplifier by adjusting the magnitude of the output current source, wherein the larger the value of the output current source is, the lower the proportion of the first direct current signal input to the first operational amplifier is. The magnitude of the current value of the output current source is in direct proportion to the potential of the first operational amplifier.

Alternatively, the two modes can be combined, and the input current of the first input current source and the output current of the output current source are adjusted simultaneously to realize the adjustment of the potential of the first operational amplifier. The embodiments of the present application are not described in detail.

Alternatively, according to actual needs, a person skilled in the art may also adopt other ways of changing the output reference voltage of the reference voltage generator according to other structures, which all fall within the protection scope of the method provided by the embodiment of the present application.

Further, as described above, since the second sub noise reduction circuit and the first sub noise reduction circuit are respectively connected to the same reference voltage generator, the reference voltage generator maintains mirror synchronization for the first sub noise reduction circuit and the second sub noise reduction circuit, so that the proportion of the second direct current signal input to the fourth operational amplifier can be adjusted by adjusting the proportion of the first direct current signal input to the first operational amplifier, wherein the proportion of the second direct current signal input to the fourth operational amplifier is kept synchronous with the proportion of the first direct current signal input to the first operational amplifier.

The circuit noise reduction method provided by the embodiment of the application comprises the following steps: acquiring a first direct current signal and a first alternating current signal which are output by a first signal detection module; the ratio of the first direct current signal input to the first operational amplifier is adjusted by adjusting the adjustable reference voltage output by the reference voltage generator. Therefore, the proportion of the direct current signal input into the first operational amplifier in the noise reduction circuit is changed by adjusting the adjustable reference voltage output by the reference voltage generator, so that the proportion of the direct current passing through the NMOS tube is reduced, the direct current noise generated by the NMOS tube is reduced, and the overall performance of the optical receiver is improved.

The embodiments of the present application are described above in terms of methods and physical devices. Next, from the perspective of the functional module, the processing device for a database provided in the embodiment of the present application is described.

From the perspective of functional modules, the present application may divide functional modules according to the apparatus of the processing method of a database according to the above method embodiment, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one functional module. The integrated functional modules may be implemented in hardware or in software functional units.

An embodiment of the present application provides an electronic device, where the electronic device includes a circuit board, where the circuit board includes a noise reduction circuit or an optical receiver provided by the embodiment of the present application, optionally, fig. 10 shows an implementation manner of the electronic device provided by the embodiment of the present application, and as shown in fig. 10, the device includes at least one processor 1001, a communication line 1002, a memory 1003, and at least one communication interface 1004.

The processor 1001 may be a general purpose central processing unit (central processing unit, CPU), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the program of the present application.

Communication line 1002 may include a pathway to transfer information between the aforementioned components.

Communication interface 1004, using any transceiver-like means for communicating with other devices or communication networks, such as ethernet, radio access network (radio access network, RAN), wireless local area network (wireless local area network, WLAN), etc.

The memory 1003 may be, but is not limited to, a read-only memory (ROM) or other type of static storage device that can store non-volatile information and instructions, a random access memory (random access memory, RAM) or other type of dynamic storage device that can store information and instructions, or an electrically erasable programmable read-only memory (electrically erable programmable read-only memory, EEPROM), a compact disc read-only memory (compact disc read-only memory) or other optical disk storage, a compact disc storage (including compact disc, laser disc, optical disc, digital versatile disc, blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. The memory may be self-contained and coupled to the processor via communication line 1002. The memory may also be integrated with the processor.

The memory 1003 is used for storing computer-executable instructions for executing the present application, and is controlled to be executed by the processor 1001. The processor 1001 is configured to execute computer-executable instructions stored in the memory 1003, thereby implementing a method for billing management provided in the following application of the present application.

Alternatively, the computer-executable instructions of the present application may be referred to as application code, and the present application is not limited thereto.

In a particular implementation, the processor 1001 may include one or more CPUs, such as CPU0 and CPU1 in fig. 10, as one embodiment.

In a particular implementation, as one embodiment, an electronic device may include multiple processors, such as processor 1001 and processor 1007 in FIG. 10. Each of these processors may be a single-core processor or a multi-core processor. A processor herein may refer to one or more devices, circuits, and/or processing cores for processing data (e.g., computer program instructions).

In a particular implementation, the electronic device may also include an output device 1005 and an input device 1006, as one embodiment. The output device 1005 communicates with the processor 1001 and may display information in a variety of ways. For example, the output device 1005 may be a liquid crystal display (liquid crystal display, LCD), a light emitting diode (light emitting diode, LED) display device, a Cathode Ray Tube (CRT) display device, or a projector (projector), or the like. The input device 1006 is in communication with the processor 1001 and may receive user input in a variety of ways. For example, the input device 1006 may be a mouse, a keyboard, a touch screen device, a sensing device, or the like.

The electronic device may be a general purpose device or a special purpose device. In a specific implementation, the electronic device may be a device for running the circuit noise reduction method in the embodiment of the present application. The application is not limited to the type of electronic device.

The embodiment of the application can divide the functional units of the electronic device according to the method example, for example, each functional unit can be divided corresponding to each function, and two or more functions can be integrated in one processing unit. The integrated units may be implemented in hardware or in software functional units. It should be noted that, in the embodiment of the present application, the division of the units is schematic, which is merely a logic function division, and other division manners may be implemented in actual practice.

For example, in the case of dividing each functional unit in an integrated manner, fig. 11 shows a schematic diagram of a broadband receiving apparatus according to an embodiment of the present application.

As shown in fig. 11, the broadband receiving apparatus provided by the embodiment of the present application includes.

The device is applied to a noise reduction circuit, and the noise reduction circuit comprises: the first signal detection module, the first earthing circuit, the first transimpedance amplifier, the second operational amplifier and the reference voltage generator; the first signal detection module is used for outputting a first direct current signal and a first alternating current signal; the first grounding circuit is coupled between the grounding end and the output end of the first signal detection module; the first transimpedance amplifier is coupled to the output end of the first signal detection module, and comprises a first operational amplifier and a first resistor, wherein the first resistor is coupled between the input end and the output end of the first operational amplifier, and the signal output by the output end of the first operational amplifier is opposite to the signal received by the input end of the first operational amplifier; the second operational amplifier includes a positive input, a negative input and an output, the negative input of the second operational amplifier being coupled to the output of the first operational amplifier; the positive input end of the second operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator; the output end of the second operational amplifier is coupled with the first grounding circuit and is used for adjusting the signal of the first grounding circuit coupled to the ground; the device comprises:

An obtaining unit 1101, configured to obtain a first dc signal and a first ac signal output by the first signal detection module;

an adjusting unit 1102 is configured to adjust the ratio of the first dc signal acquired by the acquiring unit 1101 to the first operational amplifier by adjusting the adjustable reference voltage output by the reference voltage generator.

Optionally, the reference voltage generator includes a third operational amplifier, a first input current source is coupled between an input terminal and a power supply terminal of the third operational amplifier, and a current magnitude of the first input current source is adjustable; the adjusting unit 1102 is further configured to:

Optionally, the reference voltage generator includes a third operational amplifier, an output current source is coupled between an output end of the third operational amplifier and the ground end, and a current magnitude of the output current source is adjustable; the adjusting unit 1102 is further configured to:

Optionally, the noise reduction circuit further includes a second signal detection module, a second ground circuit, a second transimpedance amplifier and a fifth operational amplifier; the second signal detection module is used for outputting a second direct current signal and a second alternating current signal; the first grounding circuit is coupled between the grounding end and the positive electrode output end of the first signal detection module, the second grounding circuit is coupled between the grounding end and the negative electrode output end of the second signal detection module, and the grounding end are different grounding ends; the first transimpedance amplifier is coupled to the positive output end of the first signal detection module, the second transimpedance amplifier is coupled to the negative output end of the second signal detection module, the second transimpedance amplifier comprises a fourth operational amplifier and a second resistor, the second resistor is coupled between the input end and the output end of the fourth operational amplifier, and the signal output by the output end of the fourth operational amplifier is opposite to the signal received by the input end of the fourth operational amplifier; the fifth operational amplifier comprises a positive input end, a negative input end and an output end, wherein the negative input end of the fifth operational amplifier is coupled with the output end of the fourth operational amplifier; the positive input end of the fifth operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator; the output end of the fifth operational amplifier is coupled with the second grounding circuit and is used for adjusting the signal of the second grounding circuit coupled to the ground; the adjusting unit 1102 is further configured to:

The above-described embodiments may be implemented in whole or in part by software, hardware, firmware, or any combination thereof, and when implemented in software, may be implemented in whole or in part in the form of a computer program product.

The computer program product includes one or more computer instructions. When the computer-executable instructions are loaded and executed on a computer, the processes or functions described in accordance with embodiments of the present application are produced, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by a wired (e.g., coaxial cable, fiber optic, digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be stored by a computer or a data storage device such as a server, data center, etc. that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid State Disk (SSD)), etc.

The terms first, second and the like in the description and in the claims and in the above-described figures, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances and are merely illustrative of the manner in which embodiments of the application have been described in connection with the description of the objects having the same attributes. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of elements is not necessarily limited to those elements, but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. In embodiments of the present application, "plurality" refers to two or more.

In embodiments of the application, words such as "exemplary" or "such as" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "e.g." in an embodiment of the present application is not to be taken as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.

In the various embodiments of the present application, various illustrations are provided for the sake of an understanding in terms of aspects. However, these examples are merely examples and are not meant to be the best implementation of the present application.

The above description has been made in detail for the technical solutions provided by the present application, and specific examples are applied in the present application to illustrate the principles and embodiments of the present application, and the above examples are only used to help understand the method and core ideas of the present application; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present application, the present description should not be construed as limiting the present application in view of the above.

Claims

A noise reduction circuit, comprising: the first signal detection module, the first earthing circuit, the first transimpedance amplifier, the second operational amplifier and the reference voltage generator;

the first signal detection module is used for outputting a first direct current signal and a first alternating current signal;

the first grounding circuit is coupled between a grounding end and an output end of the first signal detection module and is used for coupling signals output by the first signal detection module to ground;

The first transimpedance amplifier is coupled to the output end of the first signal detection module, and comprises a first operational amplifier and a first resistor, wherein the first resistor is coupled between the input end and the output end of the first operational amplifier, and a signal output by the output end of the first operational amplifier is opposite to a signal received by the input end of the first operational amplifier;

the second operational amplifier comprises a positive input end, a negative input end and an output end, and the negative input end of the second operational amplifier is coupled with the output end of the first operational amplifier;

the positive input end of the second operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator;

the output of the second operational amplifier is coupled to the first ground circuit for conditioning signals of the first ground circuit coupled to ground.
The noise reduction circuit of claim 1, wherein the reference voltage generator comprises a third operational amplifier having a first input current source coupled to an input thereof, the first input current source having an adjustable current magnitude.
The noise reduction circuit according to claim 1, wherein the reference voltage generator comprises a third operational amplifier, an output current source is coupled between an output terminal of the third operational amplifier and the ground terminal, and a current magnitude of the output current source is adjustable.
A noise reduction circuit according to any one of claims 1 to 3, wherein an output of the first operational amplifier is coupled to an output current source, the output current source being coupled to ground.
A noise reduction circuit according to claim 3, wherein the third operational amplifier is in proportional relationship to the first operational amplifier circuit.
The noise reduction circuit of any of claims 1-5, wherein the first signal detection module comprises a first diode PD coupled to an optical Mixer for mixing a first signal with a second signal and then transmitting the mixed signal to the first PD, and wherein the first PD is configured to output the first dc signal and the first ac signal.
The noise reduction circuit of claim 6, wherein the noise reduction circuit is coupled to a variable gain stage coupled to an output driver stage, the variable gain stage for amplifying the first ac signal, the output driver stage for transmitting the amplified first ac signal to an analog-to-digital sampler ADC.
The noise reduction circuit according to any one of claims 1 to 7, wherein the first grounding circuit comprises an NMOS transistor having a gate terminal coupled to the output terminal of the second operational amplifier, and a source terminal coupled to the ground terminal.
The noise reduction circuit according to any one of claims 1 to 8, further comprising a second signal detection module, a second ground circuit, a second transimpedance amplifier, and a fifth operational amplifier;

the second signal detection module is used for outputting a second direct current signal and a second alternating current signal;

the second grounding circuit is coupled between the grounding end and the output end of the second signal detection module;

the second transimpedance amplifier is coupled to the output end of the second signal detection module, and comprises a fourth operational amplifier and a second resistor, wherein the second resistor is coupled between the input end and the output end of the fourth operational amplifier, and the signal output by the output end of the fourth operational amplifier is opposite to the signal received by the input end of the fourth operational amplifier;

the fifth operational amplifier comprises a positive input end, a negative input end and an output end, wherein the negative input end of the fifth operational amplifier is coupled with the output end of the fourth operational amplifier;

The positive input end of the fifth operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage;

an output of the fifth operational amplifier is coupled to the second ground circuit for conditioning signals of the second ground circuit coupled to ground.
An optical receiver, comprising: the optical signal processing circuit comprises a signal light input optical path, a local oscillator light input optical path, a first optical Mixer, a second Mixer, a first diode PD, a second PD, a third PD, a fourth PD, a fifth PD, a sixth PD, a seventh PD, an eighth PD, a first transimpedance amplifier stage TIA, a second TIA, a third TIA, a fourth TIA, a first analog-to-digital converter ADC, a second ADC, a third ADC, a fourth ADC and a digital signal processor DSP;

the signal light input optical path is used for inputting two paths of signal light into the first Mixer and the second Mixer respectively;

the local oscillation light input optical path is used for inputting two paths of local oscillation light into the first Mixer and the second Mixer respectively;

the first Mixer and the second Mixer are respectively used for mixing the received signal light and the local oscillator light to obtain a first signal and a second signal;

the first Mixer sends the first signal to the first PD, the second PD, the third PD and the fourth PD;

The second Mixer sends the second signal to the fifth PD, the sixth PD, the seventh PD and the eighth PD;

the first TIA, the second TIA, the third TIA and the fourth TIA respectively comprise a positive input end, a negative input end and an output end, wherein the first PD is coupled with the positive input end of the first TIA, the second PD is coupled with the negative input end of the first TIA, the third PD is coupled with the positive input end of the second TIA, the fourth PD is coupled with the negative input end of the second TIA, the fifth PD is coupled with the positive input end of the third TIA, the sixth PD is coupled with the negative input end of the third TIA, the seventh PD is coupled with the positive input end of the fourth TIA, the eighth PD is coupled with the negative input end of the fourth TIA, the output end of the first TIA is coupled with the first ADC, the output end of the second IA is coupled with the second ADC, the output end of the third TIA is coupled with the third ADC, and the fourth ADC are coupled with the fourth ADC;

the first PD and the second PD are used for outputting a first alternating current signal and a first direct current signal according to the first signal and sending the first alternating current signal and the first direct current signal to the first TIA;

The third PD and the fourth PD are configured to output a second ac signal and a second dc signal according to the first signal, and send the second ac signal and the second dc signal to the second TIA;

the fifth PD and the sixth PD are configured to output a third ac signal and a third dc signal according to the second signal, and send the third ac signal and the third dc signal to the third TIA;

the seventh PD and the eighth PD are configured to output a fourth ac signal and a fourth dc signal according to the second signal, and send the fourth ac signal and the fourth dc signal to the fourth TIA;

the first TIA, the second TIA, the third TIA and the fourth TIA are respectively configured to filter the first direct current signal, the second direct current signal, the third direct current signal and the fourth direct current signal, and amplify the first alternating current signal, the second alternating current signal, the third alternating current signal and the fourth alternating current signal;

the first TIA, the second TIA, the third TIA and the fourth TIA are respectively provided with a noise reduction device, the noise reduction devices are used for reducing noise generated when the first direct current signal, the second direct current signal, the third direct current signal and the fourth direct current signal pass through the first TIA, the second TIA, the third TIA and the fourth TIA;

The first TIA, the second TIA, the third TIA and the fourth TIA are configured to send the amplified first ac signal, the second ac signal, the third ac signal and the fourth ac signal to the first ADC, the second ADC, the third ADC and the fourth ADC, respectively;

the first ADC, the second ADC, the third ADC and the fourth ADC are used for respectively collecting the first alternating current signal, the second alternating current signal and the third alternating current signal and the fourth alternating current signal and then sending the signals to the DSP;

the DSP is used for processing the first alternating current signal, the second alternating current signal, the third alternating current signal and the fourth alternating current signal.
The optical receiver of claim 10, wherein the noise reduction device comprises a noise reduction circuit comprising: a first ground circuit, a first transimpedance amplifier, a second operational amplifier and a reference voltage generator;

the first grounding circuit is coupled between the grounding end and the output end of the first PD, the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD or the eighth PD, and is used for coupling signals output by the first PD, the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD or the eighth PD to the ground;

The first transimpedance amplifier is coupled to a first PD, the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD or the output end of the eighth PD, and comprises a first operational amplifier and a first resistor, wherein the first resistor is coupled between the input end and the output end of the first operational amplifier, and the signal output by the output end of the first operational amplifier is opposite to the signal received by the input end of the first operational amplifier;

the second operational amplifier comprises a positive input end, a negative input end and an output end, and the negative input end of the second operational amplifier is coupled with the output end of the first operational amplifier;

the positive input end of the second operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator;

the output of the second operational amplifier is coupled to the first ground circuit for conditioning signals of the first ground circuit coupled to ground.
The optical receiver of claim 11, wherein the reference voltage generator comprises a third operational amplifier having a first input current source coupled to an input thereof, the first input current source having an adjustable current magnitude.
The optical receiver of claim 11, wherein the reference voltage generator comprises a third operational amplifier, an output current source is coupled between an output of the third operational amplifier and the ground, and a current magnitude of the output current source is adjustable.
A method of circuit noise reduction, the method being applied to a noise reduction circuit comprising: the first signal detection module, the first earthing circuit, the first transimpedance amplifier, the second operational amplifier and the reference voltage generator; the first signal detection module is used for outputting a first direct current signal and a first alternating current signal; the first grounding circuit is coupled between a grounding end and an output end of the first signal detection module; the first transimpedance amplifier is coupled to the output end of the first signal detection module, and comprises a first operational amplifier and a first resistor, wherein the first resistor is coupled between the input end and the output end of the first operational amplifier, and a signal output by the output end of the first operational amplifier is opposite to a signal received by the input end of the first operational amplifier; the second operational amplifier comprises a positive input end, a negative input end and an output end, and the negative input end of the second operational amplifier is coupled with the output end of the first operational amplifier; the positive input end of the second operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator; the output end of the second operational amplifier is coupled with the first grounding circuit and is used for adjusting a signal of the first grounding circuit coupled to ground; the method comprises the following steps:

Acquiring a first direct current signal and a first alternating current signal which are output by the first signal detection module;

the ratio of the first direct current signal input to the first operational amplifier is adjusted by adjusting an adjustable reference voltage output by the reference voltage generator.
A broadband receiving apparatus, the apparatus being applied to a noise reduction circuit, the noise reduction circuit comprising: the first signal detection module, the first earthing circuit, the first transimpedance amplifier, the second operational amplifier and the reference voltage generator; the first signal detection module is used for outputting a first direct current signal and a first alternating current signal; the first grounding circuit is coupled between a grounding end and an output end of the first signal detection module; the first transimpedance amplifier is coupled to the output end of the first signal detection module, and comprises a first operational amplifier and a first resistor, wherein the first resistor is coupled between the input end and the output end of the first operational amplifier, and a signal output by the output end of the first operational amplifier is opposite to a signal received by the input end of the first operational amplifier; the second operational amplifier comprises a positive input end, a negative input end and an output end, and the negative input end of the second operational amplifier is coupled with the output end of the first operational amplifier; the positive input end of the second operational amplifier is coupled with the reference voltage generator and is used for receiving the adjustable reference voltage output by the reference voltage generator; the output end of the second operational amplifier is coupled with the first grounding circuit and is used for adjusting a signal of the first grounding circuit coupled to ground; the device comprises:

The acquisition unit is used for acquiring the first direct current signal and the first alternating current signal output by the first signal detection module;

and the adjusting unit is used for adjusting the proportion of the first direct current signal acquired by the acquisition unit to the first operational amplifier by adjusting the adjustable reference voltage output by the reference voltage generator.
An electronic device comprising a circuit board comprising a noise reduction circuit according to any one of claims 1 to 9 or an optical receiver according to any one of claims 10 to 13.