WO2022174403A1

WO2022174403A1 - Noise reduction circuit, method, apparatus, device and photoreceiver

Info

Publication number: WO2022174403A1
Application number: PCT/CN2021/076966
Authority: WO
Inventors: 廖科源; 王红玉
Original assignee: 华为技术有限公司
Priority date: 2021-02-20
Filing date: 2021-02-20
Publication date: 2022-08-25
Also published as: CN116897508A

Abstract

The embodiments of the present application discloses a noise reduction circuit, comprising: a first signal detection module, a first grounding circuit, a first trans-impedance amplifier, a second operational amplifier and a reference voltage generator; wherein the first signal detection module is configured to output a direct current signal and an alternating current signal; the first grounding circuit is coupled between a grounding end and an output end of the first signal detection module; the first trans-impedance amplifier is coupled to the output end of the first signal detection module, and a signal outputted by an output end of a first operational amplifier included in the first trans-impedance amplifier is in the reverse direction to a signal received by the input end thereof; a negative input end of the second operational amplifier is coupled to the output end of the first operational amplifier; and a positive input end of the second operational amplifier is coupled to the reference voltage generator, and is configured to receive an adjustable reference voltage outputted by the reference voltage generator. The present application further provides a method, an apparatus, a device, a photoreceiver, and a medium. By adjusting a voltage inputted by the reference voltage generator, a noise value generated by the direct current signal grounding can be adjusted.

Description

Noise reduction circuit, method, apparatus, device and optical receiver

technical field

The present application relates to the field of circuits, and in particular, to a noise reduction circuit, method, apparatus, device and optical receiver.

Background technique

In broadband communication, the coherent communication method of heterodyne detection in radio digital communication system is usually applied to broadband communication. The heterodyne or homodyne detection method is used in the bandwidth communication system to significantly improve the receiving sensitivity and selectivity. Bandwidth communication takes full advantage of the mixing gain, excellent channel selectivity and tunability of coherent communication.

However, the current wideband communication usually has relatively large input noise, which affects the receiving performance.

SUMMARY OF THE INVENTION

Embodiments of the present application provide a noise reduction circuit, method, apparatus, device, and optical receiver, which are used to improve the noise performance of the input receiver.

In view of this, a first aspect of the embodiments of the present application provides a noise reduction circuit, including: a first signal detection module, a first ground circuit, a first transimpedance amplifier, a second operational amplifier, and a reference voltage generator; the first The signal detection module is used for outputting the first DC signal and the first AC signal; the first ground circuit is coupled between the ground terminal and the output terminal of the first signal detection module; the first transimpedance amplifier is coupled to the first The output end of the signal detection module, the first transimpedance amplifier includes a first operational amplifier and a first resistor, the first resistor is coupled between the input end and the output end of the first operational amplifier, and the output of the first operational amplifier The signal output by the terminal is opposite to the signal received by the input terminal of the first operational amplifier; the second operational amplifier includes a positive input terminal, a negative input terminal and an output terminal, and the negative input terminal of the second operational amplifier is connected to the first operational amplifier. The output end of the amplifier is coupled; the positive input end of the second operational amplifier is coupled with the reference voltage generator, for receiving the adjustable reference voltage output by the reference voltage generator; the output end of the second operational amplifier is connected to the first A ground circuit is coupled for conditioning a signal coupled to ground by the first ground circuit.

In this embodiment, since the signal output by the output terminal of the first operational amplifier is opposite to the signal received by the input terminal of the first operational amplifier, and the signal received by the input terminal of the first operational amplifier is the reference voltage generator through the second operational amplifier amplifier input, so the reference voltage generator is kept equal to the potential of the first transimpedance amplifier. Since the reference voltage output by the reference voltage generator is an adjustable reference voltage, the potential of the reference voltage generator changes with the magnitude of the output adjustable reference voltage. When the potential of the reference voltage generator changes, the first cross The potential of the resistance amplifier also changes accordingly, then the proportion of the first DC signal flowing into the first operational amplifier will change accordingly, resulting in a reduction in the proportion of the first DC signal flowing into the first ground circuit, thereby reducing the DC The noise generated by the signal in the ground circuit improves the overall noise reduction performance.

Optionally, the reference voltage generator includes a third operational amplifier, a first input current source is coupled between the input terminal and the power supply terminal of the third operational amplifier, and the current magnitude of the first input current source is adjustable.

In this embodiment, since the magnitude of the input current of the first input current source can be adjusted, the reference voltage output by the reference voltage generator will correspondingly change with the magnitude of the input current of the first input current source, so that the potential of the reference voltage generator High and low change. Therefore, by adjusting the magnitude of the input current, the proportion of the DC signal flowing into the first transimpedance amplifier can be adjusted.

Optionally, the reference voltage generator includes a third operational amplifier, an output current source is coupled to the output terminal of the third operational amplifier and the ground terminal, and the current magnitude of the output current source is adjustable.

In this embodiment, since the output current of the output current source can be adjusted, the reference voltage output by the reference voltage generator will correspondingly change with the output current of the output current source, so that the potential of the reference voltage generator changes. Therefore, by adjusting the magnitude of the output current, the proportion of the direct current flowing into the first transimpedance amplifier can be adjusted.

Optionally, an output current source is coupled to the output end of the first operational amplifier, and the output current source is grounded.

In this embodiment, an output current source is coupled to the output end of the first operational amplifier, and the output current source is grounded. Thus, the output current source can derive the DC signal flowing into the first operational amplifier.

Optionally, the third operational amplifier is proportional to the first operational amplifier circuit.

In this embodiment, the third operational amplifier has a proportional relationship with the first operational amplifier circuit, so that a potential change on the third operational amplifier will cause a corresponding change in the potential of the first operational amplifier.

Optionally, the first signal detection module includes a first diode PD, and the first PD is coupled with an optical mixer Mixer, and the Mixer is used to mix the first signal and the second signal and send it to the first PD, optionally, the first signal may be signal light (Signal), the second signal may be local oscillator light (Local Oscillator), and the first PD is used to output the first DC signal and the first AC signal .

In this embodiment, the Mixer mixes the first signal with the second signal and sends it to the first PD, so that the first PD can detect the signal, and then the first PD outputs the first DC according to the mixed signal. signal and the first AC signal, thereby realizing the signal input to the noise reduction circuit.

Optionally, the noise reduction circuit is coupled with a variable gain stage, the variable gain stage is coupled with an output driver stage, the variable gain stage is used for amplifying the first AC signal, and the output driver stage is used for amplifying the amplified The first AC signal is sent to the analog-to-digital sampler ADC.

In this embodiment, the noise reduction circuit, the variable gain stage and the output driver stage respectively filter, amplify and output the signal, thereby realizing the reception and amplification of the signal by the optical receiver.

Optionally, the first ground circuit includes an N-type metal-oxide-semiconductor field effect transistor NMOS transistor, and the gate terminal of the NMOS transistor is coupled between the first signal detection module and the first transimpedance amplifier, and the source of the NMOS transistor is coupled between the first signal detection module and the first transimpedance amplifier. The stage terminal is coupled to the ground terminal.

In this embodiment, the DC signal is grounded through the NMOS tube, thereby realizing the grounding of the DC signal. Since the DC signal is adjusted by the reference voltage generator, part of the DC signal flows into the first transimpedance amplifier, thereby reducing the flow into the NMOS tube. signal, reducing the noise generated by the passing of the DC signal in the NMOS tube.

Optionally, the noise reduction circuit further includes a second signal detection module, a second ground circuit, a second transimpedance amplifier and a fifth operational amplifier; the second signal detection module is used to output a second DC signal and a second AC signal ; The first ground circuit is coupled between the ground terminal and the positive output terminal of the first signal detection module, the second ground circuit is coupled between the ground terminal and the negative output terminal of the second signal detection module, the ground The first transimpedance amplifier is coupled to the positive output terminal of the first signal detection module, the second transimpedance amplifier is coupled to the negative output terminal of the second signal detection module, and the The second transimpedance amplifier includes a fourth operational amplifier and a second resistor, the second resistor is coupled between the input terminal and the output terminal of the fourth operational amplifier, and the signal output by the output terminal of the fourth operational amplifier is the same as the fourth operational amplifier. The signal received by the input end of the operational amplifier is reversed; the fifth operational amplifier includes a positive input end, a negative input end and an output end, and the negative input end of the fifth operational amplifier is coupled with the output end of the fourth operational amplifier; The positive input terminal of the fifth operational amplifier is coupled to the reference voltage generator for receiving the adjustable reference voltage output by the reference voltage generator; the output terminal of the fifth operational amplifier is coupled to the second ground circuit for adjusting the The second ground circuit is coupled to the ground signal.

In this embodiment, the first ground circuit, the first transimpedance amplifier and the second operational amplifier constitute the first sub-noise reduction circuit; the above-mentioned second ground circuit, the second transimpedance amplifier and the fifth operational amplifier constitute the second sub-circuit Noise reduction circuit. The first sub-noise reduction circuit and the second sub-noise reduction circuit are respectively connected to the same reference voltage generator through the positive input terminals of the second operational amplifier and the fifth operational amplifier, and the reference voltage generator simultaneously supplies the first sub-noise reduction circuit and the second sub-noise reduction circuit. The reference voltage is input to the two sub-noise reduction circuits, so that the adjustment of the reference voltage generator has a mirror effect between the first sub-noise reduction circuit and the second sub-noise reduction circuit. The proportions of the DC signals flowing into the two transimpedance amplifiers are kept in sync.

A second aspect of an embodiment of the present application provides an optical receiver, including: a signal optical input optical path, a local oscillator optical input optical path, a first optical mixer Mixer, a second Mixer, a first diode PD, a second PD, The third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD, the eighth PD, the first transimpedance amplifier stage TIA, the second TIA, the third TIA, the fourth TIA, the first analog-to-digital converter ADC, second ADC, third ADC, fourth ADC and digital signal processor DSP;

The signal light input light path is used for inputting two signal lights into the first Mixer and the second Mixer respectively;

The local oscillator light input optical path is used for inputting two local oscillator lights into the first Mixer and the second Mixer respectively;

The first Mixer and the second Mixer are respectively used for mixing the received signal light and the local oscillator light to obtain the first signal and the second signal;

The first Mixer sends the first signal to the first PD, the second PD, the third PD and the fourth PD;

The second Mixer sends the second signal to the fifth PD, the sixth PD, the seventh PD and the eighth PD;

The first TIA, the second TIA, the third TIA and the fourth TIA respectively comprise a positive input terminal, a negative input terminal and an output terminal, wherein the first PD is coupled to the positive input terminal of the first TIA, the The second PD is coupled to the negative input of the first TIA, the third PD is coupled to the positive input of the second TIA, the fourth PD is coupled to the negative input of the second TIA, and the fifth PD is coupled to the The positive input terminal of the third TIA is coupled, the sixth PD is coupled to the negative input terminal of the third TIA, the seventh PD is coupled to the positive input terminal of the fourth TIA, and the eighth PD is coupled to the negative input terminal of the fourth TIA The input end is coupled, the output end of the first TIA is coupled with the first ADC, the output end of the second IA is coupled with the second ADC, the output end of the third TIA is coupled with the third ADC, and the fourth TIA The output terminal of is coupled with the fourth ADC;

The first PD and the second PD are configured to output a first AC signal and a first DC signal according to a first signal, and send the first AC signal and the first DC signal to the first TIA;

The third PD and the fourth PD are configured to output the second AC signal and the second DC signal according to the first signal, and send the second AC signal and the second DC signal to the second TIA;

The fifth PD and the sixth PD are configured to output a third AC signal and a third DC signal according to the second signal, and send the third AC signal and the third DC signal to the third TIA;

The seventh PD and the eighth PD are configured to output a fourth AC signal and a fourth DC signal according to the second signal, and send the fourth AC signal and the fourth DC signal to the fourth TIA;

The first TIA, the second TIA, the third TIA and the fourth TIA are respectively used to filter the first DC signal, the second DC signal, the third DC signal and the fourth DC signal, and also use for amplifying the first AC signal, the second AC signal, the third AC signal and the fourth AC signal;

The first TIA, the second TIA, the third TIA and the fourth TIA are respectively provided with noise reduction devices, the noise reduction devices are used to reduce the first DC signal, the second DC signal, the third DC Noise generated when the signal and the fourth DC signal pass through the first TIA, the second TIA, the third TIA and the fourth TIA;

The first TIA, the second TIA, the third TIA and the fourth TIA are respectively used to transmit the amplified first AC signal, the second AC signal, the third AC signal and the fourth AC signal to the first ADC, the second ADC, the third ADC and the fourth ADC;

The first ADC, the second ADC, the third ADC and the fourth ADC are used to collect the first AC signal, the second AC signal, the third AC signal and the fourth AC signal respectively and then send them to the DSP;

The DSP is used for processing the first AC signal, the second AC signal, the third AC signal and the fourth AC signal.

In this embodiment, through the above-mentioned circuit structure of the optical receiver, the reception, collection, amplification, noise reduction and processing of the optical signal are realized, thereby realizing a complete receiving process of the optical receiver. The device can reduce noise in the process of filtering the DC signal, thereby improving the overall performance of the entire optical receiver.

Optionally, the noise reduction device includes a noise reduction circuit, the noise reduction circuit comprising: a first ground circuit, a first transimpedance amplifier, a second operational amplifier and a reference voltage generator;

The first ground circuit is coupled to the ground terminal and the first PD, the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD or the eighth PD Between the output ends, the first PD, the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD or the eighth PD output signals to land;

The first transimpedance amplifier is coupled to the output end of the first PD, the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD or the eighth PD, The first transimpedance amplifier includes a first operational amplifier and a first resistor, the first resistor is coupled between the input end and the output end of the first operational amplifier, and the signal output by the output end of the first operational amplifier is the same as the signal output by the output end of the first operational amplifier. The signal received at the input of an operational amplifier is reversed;

The second operational amplifier includes a positive input terminal, a negative input terminal and an output terminal, and the negative input terminal of the second operational amplifier is coupled to the output terminal of the first operational amplifier;

The positive input end of the second operational amplifier is coupled with the reference voltage generator, and is used for receiving the adjustable reference voltage output by the reference voltage generator;

The output of the second operational amplifier is coupled to the first ground circuit for conditioning a signal coupled to ground by the first ground circuit.

In this embodiment, since the signal output by the output end of the first operational amplifier in the noise reduction circuit is opposite to the signal received by the input end of the first operational amplifier, and the signal received by the input end of the first operational amplifier is the reference voltage generator input through the second operational amplifier, so the reference voltage generator is kept equal to the potential of the first transimpedance amplifier. Since the reference voltage output by the reference voltage generator is an adjustable reference voltage, the potential of the reference voltage generator changes with the magnitude of the output adjustable reference voltage. When the potential of the reference voltage generator changes, the first cross The potential of the resistance amplifier also changes accordingly, then the proportion of the first DC signal flowing into the first operational amplifier will change accordingly, resulting in a reduction in the proportion of the first DC signal flowing into the first ground circuit, thereby reducing the DC The noise generated by the signal in the ground circuit improves the overall noise reduction performance of the optical receiver.

Optionally, the reference voltage generator in the noise reduction circuit of the TIA includes a third operational amplifier, and a first input current source is coupled between the input end of the third operational amplifier and the power supply end, and the first input current source is The current size can be adjusted.

Optionally, the reference voltage generator in the noise reduction circuit of the TIA includes a third operational amplifier, an output current source is coupled to the output end of the third operational amplifier and the ground terminal, and the current size of the output current source is adjustable.

In this embodiment, since the output current of the output current source can be adjusted, the reference voltage output by the reference voltage generator will change correspondingly with the output current of the output current source, so that the potential of the reference voltage generator changes. Therefore, by adjusting the magnitude of the output current, the proportion of the direct current flowing into the first transimpedance amplifier can be adjusted.

Optionally, an output end of the first operational amplifier in the noise reduction circuit of the TIA is coupled with an output current source, and the output current source is grounded.

Optionally, the first signal detection module in the noise reduction circuit of the TIA includes a first diode PD, the first PD is coupled with an optical mixer Mixer, and the Mixer is used to mix the first signal with the second signal. After frequency, it is sent to the first PD. Optionally, the first signal can be a signal light (Signal), the second signal can be a local oscillator light (Local Oscillator), and the first PD is used to output the first DC signal and the first AC signal.

Optionally, the first ground circuit in the noise reduction circuit of the TIA includes an N-type metal oxide semi-field effect transistor NMOS transistor, and the gate terminal of the NMOS transistor is coupled between the first signal detection module and the first transimpedance amplifier. During this time, the source terminal of the NMOS transistor is coupled to the ground terminal.

Optionally, the noise reduction circuit in the noise reduction circuit of the TIA further includes a second signal detection module, a second ground circuit, a second transimpedance amplifier and a fifth operational amplifier; the second signal detection module is used to output the second signal detection module. DC signal and second AC signal; the first ground circuit is coupled between the ground terminal and the positive output terminal of the first signal detection module, and the second ground circuit is coupled between the ground terminal and the negative terminal of the second signal detection module Between the output terminals, the ground terminal and the ground terminal are different ground terminals; the first transimpedance amplifier is coupled to the positive output terminal of the first signal detection module, and the second transimpedance amplifier is coupled to the second signal detection module The negative output terminal of the module, the second transimpedance amplifier includes a fourth operational amplifier and a second resistor, the second resistor is coupled between the input terminal and the output terminal of the fourth operational amplifier, and the output terminal of the fourth operational amplifier The output signal is opposite to the signal received by the input terminal of the fourth operational amplifier; the fifth operational amplifier includes a positive input terminal, a negative input terminal and an output terminal, and the negative input terminal of the fifth operational amplifier is connected to the fourth operational amplifier. The output terminal of the fifth operational amplifier is coupled to the positive input terminal of the fifth operational amplifier and is coupled to the reference voltage generator for receiving the adjustable reference voltage output by the reference voltage generator; the output terminal of the fifth operational amplifier is connected to the second ground A circuit coupling for conditioning a signal coupled to ground by the second ground circuit.

A third aspect of the embodiments of the present application provides a circuit noise reduction method. The method is applied to a noise reduction circuit. The noise reduction circuit includes: a first signal detection module, a first ground circuit, a first transimpedance amplifier, and a second operational amplifier and a reference voltage generator; the first signal detection module is used to output a first DC signal and a first AC signal; the first ground circuit is coupled between the ground terminal and the output end of the first signal detection module; the first signal detection module A transimpedance amplifier is coupled to the output end of the first signal detection module, the first transimpedance amplifier includes a first operational amplifier and a first resistor, and the first resistor is coupled between the input end and the output end of the first operational amplifier During the period, the signal output by the output terminal of the first operational amplifier is opposite to the signal received by the input terminal of the first operational amplifier; the second operational amplifier includes a positive input terminal, a negative input terminal and an output terminal, and the second operational amplifier includes a positive input terminal, a negative input terminal and an output terminal. The negative input terminal of the operational amplifier is coupled to the output terminal of the first operational amplifier; the positive input terminal of the second operational amplifier is coupled to the reference voltage generator for receiving the adjustable reference voltage output by the reference voltage generator; the second operational amplifier The output end of the operational amplifier is coupled to the first ground circuit for adjusting the signal coupled to the ground by the first ground circuit; the method includes: acquiring a first DC signal and a first AC signal output by the first signal detection module ; Adjust the ratio of the first DC signal input to the first operational amplifier by adjusting the adjustable reference voltage output by the reference voltage generator.

Optionally, the reference voltage generator includes a third operational amplifier, a first input current source is coupled between the input end of the third operational amplifier and the power supply end, and the current size of the first input current source can be adjusted; Adjusting the adjustable reference voltage output by the reference voltage generator to adjust the ratio of the first DC signal input to the first operational amplifier includes: adjusting the input of the first DC signal by adjusting the magnitude of the input current of the first input current source The ratio of the first operational amplifier, wherein, the larger the current that the first input current source inputs into the third operational amplifier, the higher the ratio of the first DC signal input to the first operational amplifier.

Optionally, the reference voltage generator includes a third operational amplifier, the output terminal of the third operational amplifier is coupled to the ground terminal with an output current source, and the current size of the output current source can be adjusted; the reference voltage generator is adjusted by adjusting the reference voltage generator. The output adjustable reference voltage adjusts the ratio of the first DC signal input to the first operational amplifier, including:

The ratio of the input of the first DC signal to the first operational amplifier is adjusted by adjusting the magnitude of the current flowing out of the output current source, wherein the larger the value of the current flowing out of the output current source, the more the first DC signal is input to the first operational amplifier. The lower the ratio of the op amp.

Optionally, the noise reduction circuit further includes a second signal detection module, a second ground circuit, a second transimpedance amplifier and a fifth operational amplifier; the second signal detection module is used to output a second DC signal and a second AC signal ; The first ground circuit is coupled between the ground terminal and the positive output terminal of the first signal detection module, the second ground circuit is coupled between the ground terminal and the negative output terminal of the second signal detection module, the ground The first transimpedance amplifier is coupled to the positive output terminal of the first signal detection module, the second transimpedance amplifier is coupled to the negative output terminal of the second signal detection module, and the The second transimpedance amplifier includes a fourth operational amplifier and a second resistor, the second resistor is coupled between the input terminal and the output terminal of the fourth operational amplifier, and the signal output by the output terminal of the fourth operational amplifier is the same as the fourth operational amplifier. The signal received by the input end of the operational amplifier is reversed; the fifth operational amplifier includes a positive input end, a negative input end and an output end, and the negative input end of the fifth operational amplifier is coupled with the output end of the fourth operational amplifier; The positive input terminal of the fifth operational amplifier is coupled to the reference voltage generator for receiving the adjustable reference voltage output by the reference voltage generator; the output terminal of the fifth operational amplifier is coupled to the second ground circuit for adjusting the The second ground circuit is coupled to the ground signal; the method further includes: adjusting the ratio of the second DC signal input to the fourth operational amplifier by adjusting the ratio of the first DC signal input to the first operational amplifier, wherein the first DC signal is input to the fourth operational amplifier. The ratio of the two DC signals input to the fourth operational amplifier is synchronized with the ratio of the first DC signal input to the first operational amplifier.

A fourth aspect of the embodiments of the present application provides a wideband receiving device, which is applied to a noise reduction circuit, and the noise reduction circuit includes: a first signal detection module, a first ground circuit, a first transimpedance amplifier, a second operational amplifier, and a reference voltage generator; the first signal detection module is used for outputting a first DC signal and a first AC signal; the first ground circuit is coupled between the ground terminal and the output terminal of the first signal detection module; the first The transimpedance amplifier is coupled to the output end of the first signal detection module, the first transimpedance amplifier includes a first operational amplifier and a first resistor, and the first resistor is coupled between the input end and the output end of the first operational amplifier , the signal output by the output terminal of the first operational amplifier is opposite to the signal received by the input terminal of the first operational amplifier; the second operational amplifier includes a positive input terminal, a negative input terminal and an output terminal, and the second operational amplifier includes a positive input terminal, a negative input terminal and an output terminal. The negative input terminal is coupled to the output terminal of the first operational amplifier; the positive input terminal of the second operational amplifier is coupled to the reference voltage generator for receiving the adjustable reference voltage output by the reference voltage generator; the second operational amplifier The output end of the amplifier is coupled to the first ground circuit for adjusting the signal coupled to the ground by the first ground circuit; the device includes:

an acquisition unit, configured to acquire the first DC signal and the first AC signal output by the first signal detection module;

The adjusting unit is configured to adjust the ratio of the first direct current signal obtained by the obtaining unit to the first operational amplifier by adjusting the adjustable reference voltage output by the reference voltage generator.

Optionally, the reference voltage generator includes a third operational amplifier, a first input current source is coupled between the input terminal of the third operational amplifier and the power supply terminal, and the current size of the first input current source can be adjusted; the adjustment unit, also used to:

The ratio of the first DC signal input to the first operational amplifier is adjusted by adjusting the input current of the first input current source. The ratio of the DC signal input to the first operational amplifier is higher.

Optionally, the reference voltage generator includes a third operational amplifier, an output current source is coupled to the output end of the third operational amplifier and the ground terminal, and the current size of the output current source can be adjusted; the adjustment unit is further used for:

Optionally, the noise reduction circuit further includes a second signal detection module, a second ground circuit, a second transimpedance amplifier and a fifth operational amplifier; the second signal detection module is used to output a second DC signal and a second AC signal ; The first ground circuit is coupled between the ground terminal and the positive output terminal of the first signal detection module, the second ground circuit is coupled between the ground terminal and the negative output terminal of the second signal detection module, the ground The first transimpedance amplifier is coupled to the positive output terminal of the first signal detection module, the second transimpedance amplifier is coupled to the negative output terminal of the second signal detection module, and the The second transimpedance amplifier includes a fourth operational amplifier and a second resistor, the second resistor is coupled between the input terminal and the output terminal of the fourth operational amplifier, and the signal output by the output terminal of the fourth operational amplifier is the same as the fourth operational amplifier. The signal received by the input end of the operational amplifier is reversed; the fifth operational amplifier includes a positive input end, a negative input end and an output end, and the negative input end of the fifth operational amplifier is coupled with the output end of the fourth operational amplifier; The positive input terminal of the fifth operational amplifier is coupled to the reference voltage generator for receiving the adjustable reference voltage output by the reference voltage generator; the output terminal of the fifth operational amplifier is coupled to the second ground circuit for adjusting the The second ground circuit is coupled to the ground signal; the adjustment unit is also used for:

The ratio of the second DC signal input to the fourth operational amplifier is adjusted by adjusting the ratio of the first DC signal to the first operational amplifier, wherein the ratio of the second DC signal to the fourth operational amplifier is the same as the first operational amplifier. The ratio of the DC signal input to the first operational amplifier remains synchronized.

A fifth aspect of an embodiment of the present application provides an electronic device, including a memory, a processor, and a computer program stored on the memory, and when the processor executes the computer program, the third aspect or the third aspect is implemented Steps of a method described by any alternative implementation.

Description of drawings

FIG. 1 is an architectural diagram of an optical receiver in an embodiment of the application;

FIG. 2 is a schematic diagram of a diode PD processing a signal in an embodiment of the present application;

3 is a schematic diagram of a noise reduction circuit in an optical receiver architecture in an embodiment of the present application;

4 is a schematic diagram of a transimpedance amplifier stage TIA deriving a DC signal in an embodiment of the present application;

5 is a circuit diagram of a noise reduction circuit in an optical receiver according to an embodiment of the application;

FIG. 6 is a circuit diagram of an implementation manner of a noise reduction circuit provided by an embodiment of the application;

FIG. 7 is a circuit diagram of another implementation manner of the noise reduction circuit provided by the embodiment of the application;

FIG. 8 is a circuit diagram of another implementation manner of the noise reduction circuit provided by the embodiment of the application;

9a is a schematic diagram of an optical receiver provided by an embodiment of the present application;

FIG. 9b is a schematic diagram of a circuit noise reduction method provided by an embodiment of the present application;

10 is a schematic diagram of an electronic device provided by an embodiment of the application;

FIG. 11 is a schematic diagram of a broadband receiving apparatus provided by an embodiment of the present application.

Detailed ways

Embodiments of the present invention provide a noise reduction circuit, method, apparatus, device, optical receiver, and medium, which are used to solve the problem of large input noise of the optical receiver.

In order to make those skilled in the art better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only The embodiments are part of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the scope of protection of the present application.

The terms "first", "second", "third", "fourth", etc. (if any) in the description and claims of this application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to Describe a particular order or sequence. It is to be understood that data so used may be interchanged under appropriate circumstances so that the embodiments described herein can be practiced in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having" and any variations thereof, are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those expressly listed Rather, those steps or units may include other steps or units not expressly listed or inherent to these processes, methods, products or devices.

In broadband communication, the coherent communication method of heterodyne detection in radio digital communication system is usually applied to broadband communication. The coherent receiver in coherent optical communication is one of the important implementations, and its principle block diagram is shown in Figure 1. After the signal light Signal101 is coupled with the local oscillator light Local Oscillator102, it passes through the optical mixer Mixer103, and then the photodiode (PD) 104 converts the optical signal into an electrical signal, which is amplified by a transimpedance amplifier (TIA) 105. Then, sampling is performed by an analog-to-digital converter (analog to digital converter, ADC) 106, and then data processing is performed by a digital signal processor (digital signal processor, DSP) 107.

Based on the architecture shown in Figure 1, the conversion principle of the signal after optical mixing by the Mixer and the PD is shown in Figure 2. After the signal light Es201 and the local oscillator light Elo202 enter the optical mixers Mixer203 and PD204 respectively, the AC signal is obtained. The Q (205) and the DC signal I (206) are output in two channels, wherein the I channel signal 206 includes P1 and P2, and the Q channel signal 205 includes P3 and P4. Therefore, it can be known that the current output by the PD includes a large DC signal and a pair of differential AC signals.

For the PD output AC signal and DC signal, it needs to be amplified by the transimpedance amplifier stage TIA, and then used by the ADC. , the diode 301 sends the DC signal and the AC signal to the transimpedance amplifier stage TIA32, the TIA32 includes a noise reduction circuit 302, a variable gain stage 303 and an output driver stage 304, wherein the noise reduction circuit 302 is used to filter the DC input of the PD31. The variable gain stage 303 is used to amplify the AC signal input by the PD 31 , and the output driver stage 304 is used to send the amplified AC signal to the ADC 33 , and the ADC 33 includes an analog-to-digital sampler 305 .

During operation as shown in Figure 3, since the variable gain stage in the TIA only amplifies the AC current, the noise reduction circuit in the TIA needs to bypass the DC current to ground. The implementation method is shown in Figure 4, which is a schematic diagram of the current TIA needs to bypass the DC current to the ground. As shown in Figure 4, the output terminal of PD401 is coupled with the input terminal of the transimpedance amplifier 402, and the PD401 will The DC signal Idc and the AC signal Iac are input to the transimpedance amplifier 402 , and the NMOS transistor 403 is coupled between the ground terminal and the output terminal of the PD 401 , so the DC signal Idc can be bypassed to the ground through the NMOS transistor 403 .

For a specific implementation of the schematic diagram shown in FIG. 4 , please refer to FIG. 5 . FIG. 5 is a specific implementation of the current noise reduction circuit. As shown in FIG. 5 , the circuit includes a first transimpedance amplifier 501 , a second transimpedance amplifier 502 , a second operational amplifier 503 , a diode PD504 and an N-type MOSFET 505 . The PD504 is used to output DC signals and AC signals; the NMOS transistor 505 is coupled between the ground terminal and the output terminal of the PD504; the first transimpedance amplifier 501 is coupled to the output terminal of the PD504, and the first transimpedance amplifier 501 includes a first operational The amplifier 5011 and the first resistor 5012, the first resistor 5012 is coupled between the input terminal 5011 and the output terminal of the first operational amplifier, and the signal output by the output terminal of the first operational amplifier 5011 is the same as that received by the input terminal of the first operational amplifier 5011. The signal is reversed; the second operational amplifier 503 includes a positive input terminal, a negative input terminal and an output terminal, the negative input terminal of the second operational amplifier 503 is coupled with the output terminal of the first operational amplifier 5011; the positive input terminal of the second operational amplifier 503 It is coupled with the second transimpedance amplifier 502; the output end of the second operational amplifier 503 is coupled with the NMOS transistor 505 for adjusting the signal coupled to the ground by the first ground circuit.

In FIG. 5 , the two operational amplifiers coupled to the output end of the reference voltage generator 502 are of the same structure. The difference is that one structure is used to receive the positive pole of the PD output, and the other structure is used to receive the negative pole of the PD output. A structure as a description.

In the structure shown in FIG. 5 , since the signal output by the output end of the first operational amplifier 5011 is opposite to the signal received by the input end of the first operational amplifier 5011, and the signal received by the input end of the first operational amplifier 5011 is the first The two transimpedance amplifiers 502 are input through the second operational amplifier 503, so the potentials of the first transimpedance amplifier 501 and the second transimpedance amplifier 502 are kept equal.

When the PD 504 inputs the DC signal Idc and the AC signal Iac to the first transimpedance amplifier 501, since the potential of the AC signal Iac fluctuates up and down around the 0 point, the potential of the AC signal Iac is zero as a whole, which will not cause the first transimpedance signal. The potential of the impedance amplifier 501 increases, so the AC signal Iac can be input into the first transimpedance amplifier 501 through the input terminal, and the DC signal Idc will cause the potential of the first transimpedance amplifier 501 to rise. Therefore, the DC signal Idc passes through the NMOS Tube 505 flows out. Thus, the DC current is bypassed to ground.

In the specific working process, due to the large DC signal current of the coherent receiver, when the DC current flows through the NMOS tube, a large input noise will be generated, which will affect the performance of the receiver.

Therefore, in order to solve the above problem, an embodiment of the present application provides a noise reduction circuit, which can reduce the noise amplitude generated by the DC signal, thereby improving the overall performance of the receiver. For ease of understanding, the solutions of the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

Please refer to FIG. 6. As shown in FIG. 6, the noise reduction circuit provided by the embodiment of the present application includes.

a first signal detection module 604, a first ground circuit 605, a first transimpedance amplifier 602, a second operational amplifier 603 and a reference voltage generator 601; wherein,

The first signal detection module 604 is used to output the first DC signal Idc and the first AC signal Iac; optionally, the first signal detection module 604 includes a first diode PD, and the first PD is coupled to the optical mixer Mixer , the Mixer is used to mix the first signal with the second signal and then send it to the first PD, and the first PD is used to output the first DC signal Idc and the first AC signal Iac.

The first ground circuit 605 is coupled between the ground terminal and the output terminal of the first signal detection module 604; optionally, the first ground circuit includes an N-type metal oxide semiconductor field effect transistor NMOS transistor, and the gate terminal of the NMOS transistor is coupled to the first ground circuit. Between a signal detection module 604 and the first transimpedance amplifier 602, the source terminal of the NMOS transistor is coupled to the ground terminal.

The first transimpedance amplifier 602 is coupled to the output end of the first signal detection module 604 , the first transimpedance amplifier 602 includes a first operational amplifier 6021 and a first resistor 6022 , and the first resistor 6022 is coupled to the input end of the first operational amplifier 6021 and the output terminal, the signal output by the output terminal of the first operational amplifier 6021 is opposite to the signal received by the input terminal of the first operational amplifier 6021;

The second operational amplifier 603 includes a positive input terminal, a negative input terminal and an output terminal, and the negative input terminal of the second operational amplifier 603 is coupled to the output terminal of the first operational amplifier 6021;

The positive input terminal of the second operational amplifier 603 is coupled to the reference voltage generator 601 for receiving the adjustable reference voltage output by the reference voltage generator 601;

The output of the second operational amplifier 603 is coupled to the first ground circuit 605 for conditioning the signal coupled to the ground by the first ground circuit 605 .

In the structure shown in FIG. 6 , since the signal output by the output terminal of the first operational amplifier 6021 is opposite to the signal received by the input terminal of the first operational amplifier 6021, and the signal received by the input terminal of the first operational amplifier 6021 is the reference The voltage generator 601 is input through the second operational amplifier 603 , so the potentials of the reference voltage generator 601 and the first transimpedance amplifier 602 are kept equal.

Since the reference voltage output by the reference voltage generator 601 is an adjustable reference voltage, the potential of the reference voltage generator 601 changes with the magnitude of the output adjustable reference voltage. When the potential of the reference voltage generator 601 changes, The potential of the first transimpedance amplifier 602 also changes accordingly, then the ratio (nIdc) of the first DC signal flowing into the first operational amplifier 6021 will change accordingly, resulting in the first DC signal flowing into the first ground circuit The ratio (1-n) Idc of 605 (which can be an NMOS transistor) is reduced, and the above n is a positive integer greater than or equal to zero.

In this embodiment, in the structure shown in FIG. 6 , the first operational amplifier 6021 can absorb the first AC signal and the first DC signal (which can be absorbed entirely or partially). When the first operational amplifier 6021 When part of the first DC signal is absorbed, the remaining DC signal is bypassed to the ground through the first grounding circuit 605, so that the DC current flowing into the first grounding circuit 605 (NMOS tube) is reduced, and the The noise is greatly reduced, thereby greatly improving the performance of the coherent receiver.

Optionally, an output current source (not shown in the figure) may be coupled to the output end of the first operational amplifier, and the output current source is grounded. Thus, the output current source can derive the DC signal flowing into the first operational amplifier.

Optionally, the embodiment of the present application provides two ways to adjust the reference voltage output by the reference voltage generator, respectively: 1. Adjust the input current of the input terminal of the reference voltage generator. 2. Adjust the output current of the output terminal of the reference voltage generator. For ease of understanding, the two manners are described in detail below with reference to the accompanying drawings.

1. Adjust the input current of the input terminal of the reference voltage generator.

Please refer to FIG. 7, as shown in FIG. 7, the reference voltage generator 701 includes a third operational amplifier 7011, optionally, the reference voltage generator 701 further includes a third resistor 7012, the third resistor 7012 is coupled to the third operational amplifier between the input and output of amplifier 7011. A first input current source 702 is coupled between the input terminal and the power terminal of the third operational amplifier 7011, and the current of the first input current source 702 can be adjusted.

In this embodiment, since the magnitude of the input current of the first input current source 702 can be adjusted, the reference voltage output by the reference voltage generator 701 will correspondingly change with the magnitude of the input current of the first input current source 702, so that the reference voltage is generated. The potential level of the device 701 changes. Therefore, by adjusting the magnitude of the input current, the proportion of the DC signal flowing into the first transimpedance amplifier 703 can be adjusted.

2. Adjust the output current of the output terminal of the reference voltage generator.

Please refer to FIG. 8, as shown in FIG. 8, the reference voltage generator 801 includes a third operational amplifier 8011, optionally, the reference voltage generator 801 further includes a third resistor 8012, and the third resistor 8012 is coupled to the third operational amplifier between the input and output of amplifier 8011. An output current source 802 is coupled to the output end of the third operational amplifier 8011 and the ground end, and the current of the output current source 802 can be adjusted.

In this embodiment, since the output current of the output current source 802 can be adjusted, the reference voltage output by the reference voltage generator 801 will correspondingly change with the output current of the output current source 802 , so that the potential of the reference voltage generator 801 changes accordingly. High and low change. Therefore, by adjusting the magnitude of the output current, the proportion of the DC current flowing into the first transimpedance amplifier 803 can be adjusted.

It should be noted that the above-mentioned third operational amplifier is proportional to the above-mentioned first operational amplifier circuit. Optionally, the third operational amplifier and the first operational amplifier have the same circuit structure, and the parameters of the circuit components may be different between the two.

It should be noted that the above provides two methods for adjusting the output reference voltage of the reference voltage generator, and those skilled in the art can also use other methods to change the reference voltage output by the reference voltage generator, and these methods belong to the embodiments of the present application scope of protection.

Further, as shown in FIG. 6 , the noise reduction circuit provided by the embodiment of the present application further includes a second signal detection module 606, a second ground circuit 607, a second transimpedance amplifier 608 and a fifth operational amplifier 609; wherein,

The second signal detection module 606 is configured to output the second DC signal and the second AC signal;

The first ground circuit is coupled between the ground terminal and the positive output terminal of the first signal detection module, the second ground circuit 607 is coupled between the ground terminal and the negative output terminal of the second signal detection module 606, and the ground terminal and the ground terminal are different ground terminals;

The first transimpedance amplifier is coupled to the positive output terminal of the first signal detection module, the second transimpedance amplifier 608 is coupled to the negative output terminal of the second signal detection module 606, and the second transimpedance amplifier 608 includes a fourth operational amplifier 6081 and a third operational amplifier 6081. Two resistors 6082, the second resistor 6082 is coupled between the input terminal and the output terminal of the fourth operational amplifier 6081, and the signal output by the output terminal of the fourth operational amplifier 6081 is opposite to the signal received by the input terminal of the fourth operational amplifier 6081;

The fifth operational amplifier 609 includes a positive input terminal, a negative input terminal and an output terminal, and the negative input terminal of the fifth operational amplifier 609 is coupled to the output terminal of the fourth operational amplifier 6081;

The positive input terminal of the fifth operational amplifier 609 is coupled to the reference voltage generator, and is used for receiving the adjustable reference voltage output by the reference voltage generator 601;

The output of the fifth operational amplifier 609 is coupled to the second ground circuit 607 for conditioning the signal coupled to the ground by the second ground circuit 607 .

In this embodiment, the first signal detection module corresponds to PD1 (1041) in Figure 1, and the second detection module corresponds to PD2 (1042) in Figure 1. As shown in Figure 1, PD1 (1041) and transimpedance amplifier stage TIA105 The positive input of TIA105 is coupled to the positive input, PD2 (1042) is coupled to the negative input of the transimpedance amplifier stage TIA105, wherein the positive input of TIA105 is coupled with a first transimpedance amplifier, and the negative input of TIA105 is coupled with a second transimpedance amplifier. The first transimpedance amplifier and the second transimpedance amplifier of the TIA105 are respectively connected to the same ADC106, so that the TIA105 sends the amplified signal to the ADC106.

Further, the specific working principles of the second signal detection module 606, the second ground circuit, the second transimpedance amplifier and the fifth operational amplifier in FIG. 6 are the same as the aforementioned first signal detection module, the first ground circuit, and the first transimpedance amplifier. The working modes of the amplifier and the second operational amplifier are the same, so please refer to the foregoing description, and will not be repeated here.

It should be noted that the above-mentioned first grounding circuit, the first transimpedance amplifier and the second operational amplifier constitute the first sub-noise reduction circuit; the above-mentioned second grounding circuit, the second transimpedance amplifier and the fifth operational amplifier constitute the second sub-noise reduction circuit. Sub noise reduction circuit. The first sub-noise reduction circuit and the second sub-noise reduction circuit are respectively connected to the same reference voltage generator through the positive input terminals of the second operational amplifier and the fifth operational amplifier, and the reference voltage generator simultaneously supplies the first sub-noise reduction circuit and the second sub-noise reduction circuit. The reference voltage is input to the two sub-noise reduction circuits, so that the adjustment of the reference voltage generator has a mirror effect between the first sub-noise reduction circuit and the second sub-noise reduction circuit. The proportions of the DC signals flowing into the two transimpedance amplifiers are kept in sync.

Further, based on the noise reduction circuit provided by the embodiment of the present application, the embodiment of the present application further provides an optical receiver, please refer to FIG. 9a, the structure of the optical receiver provided by the embodiment of the present application is shown in FIG. 9a, including : Signal light input light path 91, local oscillator light input light path 92, first optical mixer Mixer93a, second Mixer93b, first diode PD94a, second PD94b, third PD94c, fourth PD94d, fifth PD94e, Six PD94f, seventh PD94g, eighth PD94h, first transimpedance amplifier stage TIA95a, second TIA95b, third TIA95c, fourth TIA95d, first analog-to-digital converter ADC96a, second ADC96b, third ADC96c, fourth ADC96d and digital signal processor DSP97;

The signal light input light path 91 is used for inputting the two signal lights into the first Mixer 93a and the second Mixer 93b respectively;

The local oscillator light input optical path 92 is used to input the two local oscillator lights into the first Mixer 93a and the second Mixer 93b respectively;

The first Mixer 93a and the second Mixer 93b are respectively used to mix the received signal light and the local oscillator light to obtain the first signal and the second signal;

The first Mixer93a sends the first signal to the first PD94a, the second PD94b, the third PD94c and the fourth PD94d;

The second Mixer93b sends the second signal to the fifth PD94e, the sixth PD94f, the seventh PD94g and the eighth PD94h;

The first TIA95a, the second TIA95b, the third TIA95c and the fourth TIA95d respectively include a positive input terminal, a negative input terminal and an output terminal, wherein the first PD94a is coupled to the positive input terminal of the first TIA95a, and the second PD94b is coupled to the first TIA95a The third PD94c is coupled with the positive input of the second TIA95b, the fourth PD94d is coupled with the negative input of the second TIA95b, the fifth PD94e is coupled with the positive input of the third TIA95c, and the sixth PD94f is coupled with the third TIA95c. The negative input terminal of the third TIA95c is coupled, the seventh PD94g is coupled to the positive input terminal of the fourth TIA95d, the eighth PD94h is coupled to the negative input terminal of the fourth TIA95d, the output terminal of the first TIA95a is coupled to the first ADC96a, and the second IA's output terminal is coupled to the first ADC96a. The output end is coupled with the second ADC96b, the output end of the third TIA95c is coupled with the third ADC96c, and the output end of the fourth TIA95d is coupled with the fourth ADC96d;

The first PD 94a and the second PD 94b are configured to output the first AC signal and the first DC signal according to the first signal, and send the first AC signal and the first DC signal to the first TIA 95a;

The third PD 94c and the fourth PD 94d are used to output the second AC signal and the second DC signal according to the first signal, and send the second AC signal and the second DC signal to the second TIA 95b;

The fifth PD94e and the sixth PD94f are used to output the third AC signal and the third DC signal according to the second signal, and send the third AC signal and the third DC signal to the third TIA95c;

The seventh PD 94g and the eighth PD 94h are used to output the fourth AC signal and the fourth DC signal according to the second signal, and send the fourth AC signal and the fourth DC signal to the fourth TIA 95d;

The first TIA95a, the second TIA95b, the third TIA95c and the fourth TIA95d are used to filter the first DC signal, the second DC signal, the third DC signal and the fourth DC signal, respectively, and amplify the first AC signal, the second AC signal signal, the third AC signal and the fourth AC signal;

The first TIA95a, the second TIA95b, the third TIA95c and the fourth TIA95d are respectively provided with noise reduction devices, and the noise reduction devices are used to reduce the first DC signal, the second DC signal, the third DC signal and the fourth DC signal. Noise generated when passing through the first TIA95a, the second TIA95b, the third TIA95c and the fourth TIA95d;

Optionally, the noise reduction device includes a noise reduction circuit, and the noise reduction circuit includes: a first ground circuit, a first transimpedance amplifier, a second operational amplifier and a reference voltage generator; the first ground circuit is coupled to the ground terminal and the first PD , between the output terminals of the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD or the eighth PD, for coupling the first PD, the second PD, the third PD, the first PD The four PD, the fifth PD, the sixth PD, the seventh PD or the eighth PD output the signal to ground; the first transimpedance amplifier is coupled to the first PD, the second PD, the third PD, the fourth PD, and the fifth PD , the sixth PD, the output end of the seventh PD or the eighth PD, the first transimpedance amplifier includes a first operational amplifier and a first resistor, the first resistor is coupled between the input end and the output end of the first operational amplifier, the first The signal output by the output terminal of an operational amplifier is opposite to the signal received by the input terminal of the first operational amplifier; the second operational amplifier includes a positive input terminal, a negative input terminal and an output terminal, and the negative input terminal of the second operational amplifier is connected to the first operational amplifier. The output end of the operational amplifier is coupled; the positive input end of the second operational amplifier is coupled with the reference voltage generator, and is used for receiving the adjustable reference voltage output by the reference voltage generator; the output end of the second operational amplifier is coupled with the first ground circuit, A signal for conditioning the first ground circuit coupled to ground.

Further, the reference voltage generator includes a third operational amplifier, an input end of the third operational amplifier is coupled with a first input current source, and the current size of the first input current source can be adjusted. Alternatively, an output current source is coupled between the output terminal of the third operational amplifier and the ground terminal, and the current size of the output current source can be adjusted.

The first TIA95a, the second TIA95b, the third TIA95c and the fourth TIA95d are respectively used to send the amplified first AC signal, the second AC signal, the third AC signal and the fourth AC signal to the first ADC96a, the second ADC96b , the third ADC96c and the fourth ADC96d;

The first ADC 96a, the second ADC 96b, the third ADC 96c and the fourth ADC 96d are used to collect the first AC signal, the second AC signal, the third AC signal and the fourth AC signal respectively and send them to the DSP97;

The DSP 97 is used for processing the first AC signal, the second AC signal, the third AC signal and the fourth AC signal.

In the optical receiver provided by the embodiment of the present application, the noise reduction circuit in the provided TIA is the noise reduction circuit provided by the embodiment of the present application. Through the above introduction, since the optical receiver provided by the embodiment of the present application adopts the above noise reduction circuit, the noise generated by the DC signal in the TIA can be greatly reduced, thereby improving the performance of the optical receiver.

Further, in order to ensure that the noise reduction circuit and the optical receiver provided by the embodiments of the present application can work smoothly, based on the above structure, the embodiments of the present application also provide a circuit noise reduction method. The methods provided in the embodiments of the present application are described in detail.

Please refer to FIG. 9b. As shown in FIG. 9b, the circuit noise reduction method provided by the embodiment of the present application includes the following steps.

901. Acquire the first DC signal and the first AC signal output by the first signal detection module.

In this embodiment, the optical mixer sends the optical signal after the signal light and the local oscillator light are coupled to the first signal detection module. The first signal detection module may be a PD, and the PD converts the optical signal into an electrical signal and sends it to the host TIA, wherein the electrical signal includes a first alternating current signal Iac and a first direct current signal Idc.

902. Adjust the ratio of the first DC signal input to the first operational amplifier by adjusting the adjustable reference voltage output by the reference voltage generator.

In this embodiment, the adjustable reference voltage output by the reference voltage generator is adjusted to adjust the ratio of the DC signal nIdc input to the first operational amplifier, and the DC signal (1-n) Idc not input to the first operational amplifier is grounded through the NMOS transistor export. Thus, the proportion of the DC current input to the first operational amplifier is realized. Specifically, the proportion, that is, the value of n, can be realized by adjusting the adjustable reference voltage output by the reference voltage generator.

The embodiments of the present application provide two ways to adjust the reference voltage output by the reference voltage generator, respectively: 1. Adjust the input current of the input terminal of the reference voltage generator. 2. Adjust the output current of the output terminal of the reference voltage generator. For ease of understanding, the two manners are described in detail below with reference to the accompanying drawings.

As shown in FIG. 7 , the reference voltage generator includes a third operational amplifier, and a first input current source is coupled between the input terminal of the third operational amplifier and the power supply terminal, and the current of the first input current source can be adjusted.

The specific method of adjustment is: adjusting the ratio of the first DC signal input to the first operational amplifier by adjusting the input current of the first input current source. The ratio of the DC signal input to the first operational amplifier is higher. The magnitude of the input current of the output current source is inversely proportional to the level of the potential of the first operational amplifier.

As shown in FIG. 8 , the reference voltage generator includes a third operational amplifier, an output current source is coupled to the output terminal of the third operational amplifier and the ground terminal, and the current size of the output current source can be adjusted.

The specific method of adjustment is: adjusting the ratio of the input of the first DC signal to the first operational amplifier by adjusting the magnitude of the outflow current of the output current source, wherein the larger the value of the current flowing out of the output current source is , the lower the ratio of the first DC signal input to the first operational amplifier. The magnitude of the current value flowing out of the output current source is proportional to the level of the potential of the first operational amplifier.

Optionally, the above two manners can also be combined to adjust the input current of the first input current source and the output current of the output current source at the same time to realize the adjustment of the potential of the first operational amplifier. This embodiment of the present application will not be repeated here.

Optionally, those skilled in the art can also adopt other ways of changing the output reference voltage of the reference voltage generator according to other structures according to actual needs, which all belong to the protection scope of the methods provided in the embodiments of the present application.

Further, as mentioned above, since the second sub-noise reduction circuit and the first sub-noise reduction circuit are respectively connected to the same reference voltage generator, the reference voltage generator keeps the first sub-noise reduction circuit and the second sub-noise reduction circuit. Mirror synchronization, so that by adjusting the ratio of the first DC signal to the first operational amplifier, the ratio of the second DC signal to the fourth operational amplifier can be adjusted, wherein the ratio of the second DC signal to the fourth operational amplifier is the same as the first DC signal. The ratio of the signal input to the first operational amplifier remains synchronized.

The circuit noise reduction method provided by the embodiment of the present application includes: acquiring a first DC signal and a first AC signal output by a first signal detection module; adjusting the first DC signal by adjusting an adjustable reference voltage output by a reference voltage generator The ratio of the signal input to the first operational amplifier. Therefore, by adjusting the adjustable reference voltage output by the reference voltage generator, the proportion of the DC signal input to the first operational amplifier in the noise reduction circuit is changed, thereby reducing the proportion of the DC current passing through the NMOS tube, reducing the NMOS tube. The resulting DC noise improves the overall performance of the optical receiver.

The embodiments of the present application are described above from the perspectives of methods and physical devices. Below, from the perspective of functional modules, the apparatus for processing the database provided by the embodiments of the present application is introduced.

From the perspective of functional modules, the present application can divide the functional modules of the apparatus of the database processing method according to the above method embodiments. For example, each functional module can be divided corresponding to each function, or two or more functions can be integrated. in a function module. The above-mentioned integrated functional modules may be implemented in the form of hardware or in the form of software functional units.

An embodiment of the present application provides an electronic device, the electronic device includes a circuit board, and the circuit board includes the noise reduction circuit or the optical receiver provided by the embodiment of the present application. Optionally, FIG. 10 shows the embodiment of the present application. In an embodiment of the provided electronic device, as shown in FIG. 10 , the device includes at least one processor 1001 , a communication line 1002 , a memory 1003 and at least one communication interface 1004 .

The processor 1001 may be a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more processors for controlling the execution of the programs of the present application. integrated circuit.

Communication line 1002 may include a path to communicate information between the components described above.

Communication interface 1004, using any transceiver-like device, for communicating with other devices or communication networks, such as Ethernet, radio access network (RAN), wireless local area network (WLAN), etc. .

Memory 1003 may be read-only memory (ROM) or other types of static storage devices that can store non-volatile information and instructions, random access memory (RAM) or other types of static storage devices that can store information and instructions other types of dynamic storage devices, which can also be electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM), or other optical disk storage , optical disc storage (including compact disc, laser disc, optical disc, digital versatile disc, blu-ray disc, etc.), magnetic disk storage medium or other magnetic storage device, or capable of carrying or storing desired program code in the form of instructions or data structures and Any other medium that can be accessed by a computer, but is not limited to this. The memory may exist independently and be connected to the processor through communication line 1002 . The memory can also be integrated with the processor.

The memory 1003 is used for storing computer-executed instructions for executing the solutions of the present application, and the execution is controlled by the processor 1001 . The processor 1001 is configured to execute the computer-executed instructions stored in the memory 1003, so as to implement the charging management method provided by the following applications of this application.

Optionally, the computer-executed instructions in this application may also be referred to as application code, which is not specifically limited in this application.

In a specific implementation, as an embodiment, the processor 1001 may include one or more CPUs, such as CPU0 and CPU1 in FIG. 10 .

In a specific implementation, as an embodiment, the electronic device may include multiple processors, such as the processor 1001 and the processor 1007 in FIG. 10 . Each of these processors can be a single-core processor or a multi-core processor. A processor herein may refer to one or more devices, circuits, and/or processing cores for processing data (eg, computer program instructions).

In a specific implementation, as an embodiment, the electronic device may further include an output device 1005 and an input device 1006 . The output device 1005 is in communication with the processor 1001 and can display information in a variety of ways. For example, the output device 1005 may be a liquid crystal display (LCD), a light emitting diode (LED) display device, a cathode ray tube (CRT) display device, or a projector (projector) Wait. The input device 1006 is in communication with the processor 1001 and can receive user input in a variety of ways. For example, the input device 1006 may be a mouse, a keyboard, a touch screen device, a sensor device, or the like.

The above-mentioned electronic device may be a general-purpose device or a special-purpose device. In a specific implementation, the electronic device may be the device used for running the circuit noise reduction method in the embodiments of the present application. This application does not limit the type of electronic device.

In this embodiment of the present application, the electronic device may be divided into functional units according to the foregoing method examples. For example, each functional unit may be divided corresponding to each function, or two or more functions may be integrated into one processing unit. The above-mentioned integrated units may be implemented in the form of hardware, or may be implemented in the form of software functional units. It should be noted that the division of units in the embodiments of the present application is illustrative, and is only a logical function division, and other division methods may be used in actual implementation.

For example, in the case of dividing each functional unit in an integrated manner, FIG. 11 shows a schematic structural diagram of a broadband receiving apparatus provided by an embodiment of the present application.

As shown in FIG. 11 , the broadband receiving apparatus provided by the embodiment of the present application includes.

The device is applied to a noise reduction circuit, and the noise reduction circuit comprises: a first signal detection module, a first ground circuit, a first transimpedance amplifier, a second operational amplifier and a reference voltage generator; the first signal detection module is used for outputting the first DC signal and the first AC signal; the first ground circuit is coupled between the ground terminal and the output terminal of the first signal detection module; the first transimpedance amplifier is coupled to the output terminal of the first signal detection module , the first transimpedance amplifier includes a first operational amplifier and a first resistor, the first resistor is coupled between the input end and the output end of the first operational amplifier, and the signal output by the output end of the first operational amplifier is the same as the output end of the first operational amplifier. The signal received by the input end of the first operational amplifier is reversed; the second operational amplifier includes a positive input end, a negative input end and an output end, and the negative input end of the second operational amplifier is coupled with the output end of the first operational amplifier; The positive input terminal of the second operational amplifier is coupled to the reference voltage generator for receiving the adjustable reference voltage output by the reference voltage generator; the output terminal of the second operational amplifier is coupled to the first ground circuit for conditioning a signal coupled to ground by the first ground circuit; the apparatus includes:

an acquisition unit 1101, configured to acquire the first DC signal and the first AC signal output by the first signal detection module;

The adjusting unit 1102 is configured to adjust the ratio of the input of the first DC signal obtained by the obtaining unit 1101 to the first operational amplifier by adjusting the adjustable reference voltage output by the reference voltage generator.

Optionally, the reference voltage generator includes a third operational amplifier, a first input current source is coupled between the input terminal of the third operational amplifier and the power supply terminal, and the current size of the first input current source can be adjusted; the adjustment Unit 1102, also used to:

Optionally, the reference voltage generator includes a third operational amplifier, an output current source is coupled to the output end of the third operational amplifier and the ground terminal, and the current size of the output current source can be adjusted; the adjustment unit 1102 is also used for :

Optionally, the noise reduction circuit further includes a second signal detection module, a second ground circuit, a second transimpedance amplifier and a fifth operational amplifier; the second signal detection module is used to output a second DC signal and a second AC signal ; The first ground circuit is coupled between the ground terminal and the positive output terminal of the first signal detection module, the second ground circuit is coupled between the ground terminal and the negative output terminal of the second signal detection module, the ground The first transimpedance amplifier is coupled to the positive output terminal of the first signal detection module, the second transimpedance amplifier is coupled to the negative output terminal of the second signal detection module, and the The second transimpedance amplifier includes a fourth operational amplifier and a second resistor, the second resistor is coupled between the input terminal and the output terminal of the fourth operational amplifier, and the signal output by the output terminal of the fourth operational amplifier is the same as the fourth operational amplifier. The signal received by the input end of the operational amplifier is reversed; the fifth operational amplifier includes a positive input end, a negative input end and an output end, and the negative input end of the fifth operational amplifier is coupled with the output end of the fourth operational amplifier; The positive input terminal of the fifth operational amplifier is coupled to the reference voltage generator for receiving the adjustable reference voltage output by the reference voltage generator; the output terminal of the fifth operational amplifier is coupled to the second ground circuit for adjusting the The second ground circuit is coupled to the ground signal; the adjustment unit 1102 is also used for:

The above embodiments may be implemented in whole or in part by software, hardware, firmware or any combination thereof, and when implemented in software, may be implemented in whole or in part in the form of computer program products.

The computer program product includes one or more computer instructions. When the computer-executed instructions are loaded and executed on the computer, all or part of the processes or functions described in the embodiments of the present application are generated. The computer may be a general purpose computer, special purpose computer, computer network, or other programmable device. The computer instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be downloaded from a website site, computer, server, or data center Transmission to another website site, computer, server, or data center is by wire (eg, coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (eg, infrared, wireless, microwave, etc.). The computer-readable storage medium may be any available medium that can be stored by a computer, or a data storage device such as a server, data center, etc., which includes one or more available media integrated. The usable media may be magnetic media (eg, floppy disks, hard disks, magnetic tapes), optical media (eg, DVD), or semiconductor media (eg, Solid State Disk (SSD)), and the like.

The terms "first", "second" and the like in the description and claims of the present application and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchanged under appropriate circumstances, and this is only a distinguishing manner adopted when describing objects with the same attributes in the embodiments of the present application. Furthermore, the terms "comprising" and "having" and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, product or device comprising a series of elements is not necessarily limited to those elements, but may include no explicit or other units inherent to these processes, methods, products, or devices. In the embodiments of the present application, "a plurality of" refers to two or more.

In the embodiments of the present application, words such as "exemplary" or "for example" are used to represent examples, illustrations or illustrations. Any embodiment or design described in the embodiments of the present application as "exemplary" or "such as" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present the related concepts in a specific manner.

In the various embodiments of the present application, various illustrations are provided for the sake of understanding. However, these examples are merely examples and are not meant to be the best way to implement the present application.

The technical solutions provided by the present application have been introduced in detail above, and the principles and implementations of the present application have been described with specific examples in the present application. The descriptions of the above embodiments are only used to help understand the methods and core ideas of the present application. At the same time, for those skilled in the art, according to the idea of the application, there will be changes in the specific implementation and application scope. To sum up, the content of this specification should not be construed as a limitation to the application.

Claims

A noise reduction circuit, comprising: a first signal detection module, a first ground circuit, a first transimpedance amplifier, a second operational amplifier and a reference voltage generator;

The first signal detection module is used for outputting the first DC signal and the first AC signal;

the first ground circuit is coupled between the ground terminal and the output terminal of the first signal detection module, and is used for coupling the signal output by the first signal detection module to the ground;

The first transimpedance amplifier is coupled to the output end of the first signal detection module, the first transimpedance amplifier includes a first operational amplifier and a first resistor, and the first resistor is coupled to the first operational amplifier Between the input end and the output end of the first operational amplifier, the signal output by the output end of the first operational amplifier is opposite to the signal received by the input end of the first operational amplifier;

The second operational amplifier includes a positive input terminal, a negative input terminal and an output terminal, and the negative input terminal of the second operational amplifier is coupled to the output terminal of the first operational amplifier;

The positive input terminal of the second operational amplifier is coupled with the reference voltage generator, and is used for receiving the adjustable reference voltage output by the reference voltage generator;

An output of the second operational amplifier is coupled to the first ground circuit for conditioning a signal coupled to ground by the first ground circuit.
The noise reduction circuit according to claim 1, wherein the reference voltage generator comprises a third operational amplifier, an input terminal of the third operational amplifier is coupled with a first input current source, and the first input current The source current is adjustable.
The noise reduction circuit according to claim 1, wherein the reference voltage generator comprises a third operational amplifier, an output current source is coupled between an output terminal of the third operational amplifier and the ground terminal, and the The current size of the output current source can be adjusted.
The noise reduction circuit according to any one of claims 1 to 3, wherein an output current source is coupled to an output end of the first operational amplifier, and the output current source is grounded.
The noise reduction circuit of claim 3, wherein the third operational amplifier is proportional to the first operational amplifier circuit.
The noise reduction circuit according to any one of claims 1 to 5, wherein the first signal detection module comprises a first diode PD, the first PD is coupled to an optical mixer Mixer, and the Mixer The first PD is configured to mix the first signal and the second signal and send them to the first PD, where the first PD is configured to output the first DC signal and the first AC signal.
The noise reduction circuit according to claim 6, wherein the noise reduction circuit is coupled with a variable gain stage, the variable gain stage is coupled with an output driver stage, and the variable gain stage is used to amplify the The first AC signal, the output driver stage is configured to send the amplified first AC signal to the analog-to-digital sampler ADC.
The noise reduction circuit according to any one of claims 1 to 7, wherein the first ground circuit comprises an N-type metal-oxide-semiconductor field-effect transistor (NMOS), and the gate terminal of the NMOS transistor is connected to the second operation The output terminal of the amplifier is coupled, and the source terminal of the NMOS transistor is coupled to the ground terminal.
The noise reduction circuit according to any one of claims 1 to 8, wherein the noise reduction circuit further comprises a second signal detection module, a second ground circuit, a second transimpedance amplifier and a fifth operational amplifier;

The second signal detection module is used for outputting a second DC signal and a second AC signal;

the second ground circuit is coupled between the ground terminal and the output terminal of the second signal detection module;

The second transimpedance amplifier is coupled to the output end of the second signal detection module, the second transimpedance amplifier includes a fourth operational amplifier and a second resistor, and the second resistor is coupled to the fourth operational amplifier Between the input end and the output end of the fourth operational amplifier, the signal output by the output end of the fourth operational amplifier is opposite to the signal received by the input end of the fourth operational amplifier;

The fifth operational amplifier includes a positive input terminal, a negative input terminal and an output terminal, and the negative input terminal of the fifth operational amplifier is coupled to the output terminal of the fourth operational amplifier;

a positive input terminal of the fifth operational amplifier is coupled to the reference voltage generator for receiving the adjustable reference voltage;

The output of the fifth operational amplifier is coupled to the second ground circuit for conditioning a signal coupled to the ground by the second ground circuit.
An optical receiver is characterized by comprising: a signal optical input optical path, a local oscillator optical input optical path, a first optical mixer Mixer, a second Mixer, a first diode PD, a second PD, a third PD, The fourth PD, the fifth PD, the sixth PD, the seventh PD, the eighth PD, the first transimpedance amplifier stage TIA, the second TIA, the third TIA, the fourth TIA, the first analog-to-digital converter ADC, the second ADC, third ADC, fourth ADC and digital signal processor DSP;

The signal light input light path is used for inputting two signal lights into the first Mixer and the second Mixer respectively;

The local oscillator light input optical path is used for inputting two local oscillator lights into the first Mixer and the second Mixer respectively;

The first Mixer and the second Mixer are respectively used to mix the received signal light and the local oscillator light to obtain the first signal and the second signal;

The first Mixer sends the first signal to the first PD, the second PD, the third PD and the fourth PD;

The second Mixer sends the second signal to the fifth PD, the sixth PD, the seventh PD and the eighth PD;

The first TIA, the second TIA, the third TIA and the fourth TIA respectively include a positive input terminal, a negative input terminal and an output terminal, wherein the first PD and the first TIA are The positive input terminal is coupled, the second PD is coupled to the negative input terminal of the first TIA, the third PD is coupled to the positive input terminal of the second TIA, and the fourth PD is coupled to the second TIA The negative input terminal of the third TIA is coupled to the negative input terminal, the fifth PD is coupled to the positive input terminal of the third TIA, the sixth PD is coupled to the negative input terminal of the third TIA, and the seventh PD is coupled to the fourth TIA. The positive input terminal of the TIA is coupled, the eighth PD is coupled to the negative input terminal of the fourth TIA, the output terminal of the first TIA is coupled to the first ADC, and the output terminal of the second IA is coupled to the the second ADC is coupled, the output end of the third TIA is coupled with the third ADC, and the output end of the fourth TIA is coupled with the fourth ADC;

The first PD and the second PD are configured to output the first AC signal and the first DC signal according to the first signal, and send the first AC signal and the first DC signal to the the first TIA;

The third PD and the fourth PD are configured to output a second AC signal and a second DC signal according to the first signal, and send the second AC signal and the second DC signal to the first Two TIAs;

The fifth PD and the sixth PD are configured to output a third AC signal and a third DC signal according to the second signal, and send the third AC signal and the third DC signal to the first Three TIAs;

The seventh PD and the eighth PD are configured to output a fourth AC signal and a fourth DC signal according to the second signal, and send the fourth AC signal and the fourth DC signal to the first Four TIAs;

The first TIA, the second TIA, the third TIA and the fourth TIA are respectively used to filter the first DC signal, the second DC signal, the third DC signal and the generating the fourth DC signal, and amplifying the first AC signal, the second AC signal, the third AC signal and the fourth AC signal;

The first TIA, the second TIA, the third TIA and the fourth TIA are respectively provided with noise reduction devices, the noise reduction devices are used to reduce the first DC signal, the third Two DC signals, the noise generated when the third DC signal and the fourth DC signal pass through the first TIA, the second TIA, the third TIA and the fourth TIA;

The first TIA, the second TIA, the third TIA and the fourth TIA are respectively used for the amplified first AC signal, the second AC signal, and the third AC signal and the fourth AC signal is sent to the first ADC, the second ADC, the third ADC and the fourth ADC;

The first ADC, the second ADC, the third ADC and the fourth ADC are used to collect the first AC signal, the second AC signal, the third AC signal and the The fourth AC signal is then sent to the DSP;

The DSP is used for processing the first AC signal, the second AC signal, the third AC signal and the fourth AC signal.
The optical receiver according to claim 10, wherein the noise reduction device comprises a noise reduction circuit, and the noise reduction circuit comprises: a first ground circuit, a first transimpedance amplifier, a second operational amplifier and a reference voltage generator;

The first ground circuit is coupled to the ground terminal and the first PD, the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the first PD Between the output ends of the seventh PD or the eighth PD, it is used to couple the first PD, the second PD, the third PD, the fourth PD, the fifth PD, and the sixth PD , the signal output by the seventh PD or the eighth PD is grounded;

The first transimpedance amplifier is coupled to the first PD, the second PD, the third PD, the fourth PD, the fifth PD, the sixth PD, the seventh PD or the The output end of the eighth PD, the first transimpedance amplifier includes a first operational amplifier and a first resistor, the first resistor is coupled between the input end and the output end of the first operational amplifier, and the first The signal output by the output terminal of an operational amplifier is inverse to the signal received by the input terminal of the first operational amplifier;

The second operational amplifier includes a positive input terminal, a negative input terminal and an output terminal, and the negative input terminal of the second operational amplifier is coupled to the output terminal of the first operational amplifier;

The positive input terminal of the second operational amplifier is coupled with the reference voltage generator, and is used for receiving the adjustable reference voltage output by the reference voltage generator;

An output of the second operational amplifier is coupled to the first ground circuit for conditioning a signal coupled to ground by the first ground circuit.
The optical receiver according to claim 11, wherein the reference voltage generator comprises a third operational amplifier, an input terminal of the third operational amplifier is coupled with a first input current source, and the first input current The magnitude of the source current can be adjusted.
The optical receiver according to claim 11, wherein the reference voltage generator comprises a third operational amplifier, an output current source is coupled between an output terminal of the third operational amplifier and the ground terminal, and the The current size of the output current source can be adjusted.
A circuit noise reduction method, characterized in that the method is applied to a noise reduction circuit, the noise reduction circuit comprising: a first signal detection module, a first ground circuit, a first transimpedance amplifier, a second operational amplifier and a reference a voltage generator; the first signal detection module is used for outputting a first DC signal and a first AC signal; the first ground circuit is coupled between the ground terminal and the output terminal of the first signal detection module; the The first transimpedance amplifier is coupled to the output end of the first signal detection module, the first transimpedance amplifier includes a first operational amplifier and a first resistor, and the first resistor is coupled to the first operational amplifier. Between the input terminal and the output terminal, the signal output by the output terminal of the first operational amplifier is opposite to the signal received by the input terminal of the first operational amplifier; the second operational amplifier includes a positive input terminal and a negative input terminal and output terminal, the negative input terminal of the second operational amplifier is coupled with the output terminal of the first operational amplifier; the positive input terminal of the second operational amplifier is coupled with the reference voltage generator for receiving the an adjustable reference voltage output by a reference voltage generator; an output end of the second operational amplifier is coupled to the first ground circuit for adjusting a signal coupled to the ground by the first ground circuit; the method includes:

acquiring the first DC signal and the first AC signal output by the first signal detection module;

The ratio of the first DC signal input to the first operational amplifier is adjusted by adjusting the adjustable reference voltage output by the reference voltage generator.
A broadband receiving device, characterized in that the device is applied to a noise reduction circuit, and the noise reduction circuit comprises: a first signal detection module, a first ground circuit, a first transimpedance amplifier, a second operational amplifier and a reference voltage a generator; the first signal detection module is used for outputting a first DC signal and a first AC signal; the first ground circuit is coupled between the ground terminal and the output terminal of the first signal detection module; the A first transimpedance amplifier is coupled to the output end of the first signal detection module, the first transimpedance amplifier includes a first operational amplifier and a first resistor, and the first resistor is coupled to the input of the first operational amplifier Between the terminal and the output terminal, the signal output by the output terminal of the first operational amplifier is opposite to the signal received by the input terminal of the first operational amplifier; the second operational amplifier includes a positive input terminal, a negative input terminal and an output terminal, the negative input terminal of the second operational amplifier is coupled to the output terminal of the first operational amplifier; the positive input terminal of the second operational amplifier is coupled to the reference voltage generator for receiving the reference an adjustable reference voltage output by a voltage generator; an output end of the second operational amplifier is coupled to the first ground circuit for adjusting a signal coupled to the ground by the first ground circuit; the device includes:

an acquisition unit, configured to acquire the first DC signal and the first AC signal output by the first signal detection module;

The adjusting unit is configured to adjust the ratio of the first direct current signal obtained by the obtaining unit to the first operational amplifier by adjusting the adjustable reference voltage output by the reference voltage generator.
An electronic device, characterized in that the electronic device comprises a circuit board, and the circuit board includes the noise reduction circuit according to any one of claims 1 to 9 or the light source according to any one of claims 10 to 13. receiver.