CN112825011A

CN112825011A - Power-on and power-off control method and system of PCIe device

Info

Publication number: CN112825011A
Application number: CN201911144077.5A
Authority: CN
Inventors: 王刘非; 戴庆军; 陈业嘉; 李双庭
Original assignee: ZTE Corp
Current assignee: ZTE Corp
Priority date: 2019-11-20
Filing date: 2019-11-20
Publication date: 2021-05-21
Also published as: WO2021098485A1

Abstract

The application discloses a power-on and power-off control method and system for PCIe equipment, wherein the method comprises the following steps: the logic module receives an operation instruction from the CPU, wherein the operation instruction comprises a power-on instruction or a power-off instruction carrying target equipment information; simulating the in-place state of the target equipment according to the operation instruction; enabling a clock and reset signal that controls the target device; triggering a hot plug driver of an operating system to execute the operation of adding or removing the target equipment; and outputting a corresponding power control instruction to a power control module so that the power control module controls the power signal supplied to the target equipment to be turned on or turned off. The system comprises: CPU, logic module and power control module. According to the technical scheme, the PCIe equipment of the machine room can be remotely controlled to be powered on and powered off, and the workload of operation and maintenance personnel is reduced. The PCIe equipment can be removed through a power-off instruction before the PCIe equipment is replaced, and system abnormity caused by violence plugging and unplugging of the equipment is avoided.

Description

Power-on and power-off control method and system of PCIe device

Technical Field

The present application relates to the field of electronic technologies, and in particular, to a power-on and power-off control method and system for a PCIe device.

Background

Pcie (peripheral Component Interconnect express) is a high-speed serial computer expansion bus standard, and is mainly used for data interaction between a Central Processing Unit (CPU) and peripheral devices.

For example, a Non-Volatile Memory host controller interface specification (Non-Volatile Memory express Solid State Disk, NVMe SSD) is a PCIe device based on a PCIe bus interface. At present, NVMe SSD is gradually replacing traditional mechanical hard disks and is widely applied to server storage systems. In server storage systems, a storage array containing multiple NVMe SSDs is typically employed. When the NVMe SSD of the storage array breaks down, operation and maintenance personnel are often required to perform one-time power-on and power-off operation on the NVMe SSD so as to judge whether the NVMe SSD can be recovered to be normal or not, and then whether the NVMe SSD needs to be replaced or not is determined. However, the power-on and power-off operation often requires manual operation by operation and maintenance personnel entering a machine room, which results in high operation and maintenance cost.

Disclosure of Invention

The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

On one hand, the embodiment of the application provides a power-on and power-off control method, system and device of a PCIe device and a computer readable storage medium, which can realize remote control of power-on and power-off of the PCIe device and is beneficial to reduction of operation and maintenance cost.

In another aspect, an embodiment of the present application provides a power-on and power-off control method for a PCIe device, including:

receiving an operation instruction from a CPU, wherein the operation instruction comprises a power-on instruction or a power-off instruction carrying target equipment information;

simulating the in-place state of the target equipment according to the operation instruction;

enabling a clock and a reset signal for controlling the target equipment according to the in-place state of the simulated target equipment;

reporting the simulated in-place state of the target equipment to the CPU so as to trigger a hot plug driver of an operating system to execute the operation of adding or removing the target equipment;

and outputting a corresponding power control instruction to a power control module according to the operation instruction so that the power control module controls the power signal supplied to the target equipment to be turned on or turned off.

receiving an operation instruction from a system application layer, and forwarding the operation instruction to a logic module, wherein the operation instruction comprises a power-on instruction or a power-off instruction carrying target equipment information;

and according to the simulated in-place state of the target device from the logic module, triggering a hot plug driver of an operating system to execute the operation of adding or removing the target device.

On the other hand, an embodiment of the present application provides a power on and power off control system, including:

the CPU is used for receiving an operation instruction from a system application layer and forwarding the operation instruction to the logic module, wherein the operation instruction comprises a power-on instruction or a power-off instruction carrying target equipment information; triggering a hot plug driver of an operating system to execute the operation of adding or removing the target equipment according to the simulated in-place state of the target equipment from the logic module;

the logic module is used for receiving an operation instruction from the CPU, wherein the operation instruction comprises a power-on instruction or a power-off instruction carrying target equipment information; simulating the in-place state of the target equipment according to the operation instruction; enabling a clock and a reset signal for controlling the target equipment according to the in-place state of the simulated target equipment; reporting the simulated in-place state of the target equipment to the CPU so as to trigger a hot plug driver of an operating system to execute the operation of adding or removing the target equipment; outputting a corresponding power control instruction to a power control module according to the operation instruction so that the power control module controls the power signal supplied to the target equipment to be turned on or turned off;

and the power control module is used for receiving and controlling the power signal supplied to the target equipment to be switched on or switched off according to the power control instruction from the logic module.

In another aspect, an embodiment of the present application provides an apparatus, including:

a memory for storing a program;

and the processor is used for executing the program stored in the memory, and when the processor executes the program stored in the memory, the processor is used for executing any one of the power-on and power-off control methods of the PCIe device.

In yet another aspect, embodiments of the present application provide a computer-readable storage medium storing computer-executable instructions for performing any one of the above methods for controlling power on and power off of a PCIe device.

The embodiment of the application comprises the following steps: receiving an operation instruction from a CPU, wherein the operation instruction comprises a power-on instruction or a power-off instruction carrying target equipment information; simulating the in-place state of the target equipment according to the operation instruction; enabling a clock and a reset signal for controlling the target equipment according to the in-place state of the simulated target equipment; reporting the in-place state of the simulated target equipment to a CPU (central processing unit) to trigger a hot plug driver of an operating system to execute the operation of adding or removing the target equipment; and outputting a corresponding power control instruction to a power control module according to the operation instruction so as to control the power signal supplied to the target equipment to be switched on or switched off by the power control module. According to the technical scheme, when the PCIe equipment fails, the PCIe equipment in the remote control machine room is powered on and off, whether the equipment needs to be replaced is judged, operation and maintenance personnel do not need to enter the machine room for operation, and the workload of the operation and maintenance personnel is reduced. The PCIe equipment can be removed through a power-off instruction before the PCIe equipment is replaced, and system abnormity caused by violence plugging and unplugging of the equipment is avoided. In addition, the scheme provided by the application can be used for testing the stability of the hot plug function of the PCIe equipment in the system development and test stage, so that a large amount of manual disk plugging operations are avoided, and the reliability of system testing is improved.

Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the application. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Drawings

The accompanying drawings are included to provide a further understanding of the claimed subject matter and are incorporated in and constitute a part of this specification, illustrate embodiments of the subject matter and together with the description serve to explain the principles of the subject matter and not to limit the subject matter.

Fig. 1 is a schematic structural diagram of a power-on and power-off control system of a PCIe device according to an embodiment of the present application;

fig. 2 is a schematic structural diagram of another PCIe device power-on and power-off control system provided in the embodiment of the present application;

fig. 3 is a flowchart of a power-on and power-off control method for a PCIe device according to an embodiment of the present application;

FIG. 4 is a flowchart of another power-on and power-off control method for a PCIe device provided by the embodiment of the present application;

fig. 5 is a schematic structural diagram of an apparatus according to an embodiment of the present disclosure.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

It should be understood that in the description of the embodiments of the present application, a plurality (or a plurality) means two or more, and more than, less than, more than, etc. are understood as excluding the present number, and more than, less than, etc. are understood as including the present number. If the description of "first", "second", etc. is used for the purpose of distinguishing technical features, it is not intended to indicate or imply relative importance or to implicitly indicate the number of indicated technical features or to implicitly indicate the precedence of the indicated technical features.

Pcie (peripheral Component Interconnect express) is a high-speed serial computer expansion bus standard, and is mainly used for data interaction between a CPU (Central Processing Unit) and peripheral devices.

In order to solve the above technical problems, embodiments of the present application provide a power-on and power-off control method, system, apparatus, and computer-readable storage medium for PCIe devices, which can implement remote control of power-on and power-off of PCIe devices, and implement removal operation of PCIe devices through a power-off command before replacing devices in a failure, so as to avoid system abnormality caused by violence plugging and unplugging devices.

Fig. 1 illustrates a power-on and power-off control system 100 for PCIe devices according to an embodiment of the present application. As shown in fig. 1, the system 100 includes, but is not limited to: a CPU110, a logic module 120, and a power control module 130. The CPU110 is connected to N PCIe devices 140 and the logic module 120, respectively, where N is an integer greater than or equal to 1; the logic module 120 is connected to the N PCIe devices 140 and the power control module 130, respectively. The power control module 130 is connected to N PCIe devices 140.

The topology of the system 100 shown in fig. 1 is suitable for being applied to the situation that the number of PCIe devices 140 is small, and the number of PCIe lanes of the CPU110 itself can meet the connection requirement of the N PCIe devices 140, the CPU110 may directly connect PCIe interfaces of the N PCIe devices 140 through the N PCIe buses correspondingly, and may connect the logic module 120 through the I2C bus, thereby reducing the complexity and cost of system design.

In another possible design, as shown in FIG. 2, CPU110 is connected to N PCIe devices 140 through a PCIe SWITCH (SWITCH) module 150, PCIe SWITCH module 150 serving to extend the number of PCIe lanes. Optionally, the CPU110 is connected to the PCIe switch module 150 through a PCIe bus, the PCIe switch module 150 is correspondingly connected to the N PCIe devices 140 through N PCIe buses, and the PCIe bus and the PCIe devices 140 may be connected through a fixed connector (e.g., a slot). The CPU110 is further connected to the logic module 120 through a PCIe switch module 150, and specifically, the PCIe switch module 150 and the logic module 120 may be connected through an I2C Bus, where the I2C Bus may flexibly select an interface access, such as a Local Bus interface, according to an interface provided by the PCIe switch module 150.

In this embodiment, the Logic module 120 may be a CPLD (Complex Programmable Logic Device). It should be understood by those skilled in the art that the logic module 120 may also be an FPGA (Field Programmable Gate Array) or other similar logic device, and the application is not limited to the type of the logic module 120.

Optionally, as shown in fig. 2, the logic module 120 may be connected to the power control module 130 through the I/O expansion chip 160, the logic module 120 and the I/O expansion chip 160 may be connected through an I2C bus, and the I/O expansion chip 160 is connected to the power control module 130 through N I/O signal transmission lines. It will be understood by those skilled in the art that when the number of PCIe devices 140 is large and one I/O expansion chip 160 cannot meet the I/O interface requirement, the number of I/O expansion chips 160 may be increased as needed, and only the I2C address of the I/O expansion chip 160 needs to be set to a different address.

It should be understood that when the number of PCIe devices 140 is small and the number of I/O interfaces of the logic module 120 is sufficient, the I/O expansion chip 160 may be eliminated, as shown in the structure of fig. 1, and the logic module 120 is directly connected to the power control module 130 through its own I/O interface and the N I/O signal transmission lines.

In this embodiment, the power control module 130 has N power output terminals, and the N power output terminals are correspondingly connected to the N PCIe devices 140 through the N power transmission lines to output power signals to the N PCIe devices 140. Here, the power signal outputs of the N power output units are respectively controlled by the I/O signal of the logic module 120 to enable power supply of the PCIe device 140 to be powered up and down.

Fig. 3 shows a flowchart of a power-on and power-off control method for a PCIe device according to an embodiment of the present application. The method may be applied to the power-up and power-down control system 100 including the CPU110, the logic module 120, and the power control module 130 described above. As shown in fig. 3, the method includes, but is not limited to, the following steps.

S201, the CPU receives an operation instruction from a system application layer and forwards the operation instruction to a logic module.

The operation instruction comprises a power-on instruction or a power-off instruction carrying target equipment information.

For example, the operation and maintenance personnel may input an operation instruction through an application installed in the system application layer, where the operation instruction includes a power-on instruction for performing a power-on operation on the target device and a power-off instruction for performing a power-off operation on the target device. After receiving a power-on instruction or a power-off instruction carrying target device information from a system application layer, the CPU forwards the power-on instruction or the power-off instruction to the logic module through an I2C bus.

S202, the logic module receives an operation instruction from the CPU.

And S203, simulating the in-place state of the target equipment by the logic module according to the operation instruction.

For example, the logic module receives an operation instruction from the CPU, may analyze the operation instruction to determine whether the operation instruction is a power-on instruction or a power-off instruction, and further determine the target device and the slot where the target device is located according to target device information carried in the power-on instruction or the power-off instruction.

When the operation instruction received by the logic module is a power-on instruction, simulating the real state of the target equipment; and when the operation instruction received by the logic module is a power-off instruction, the simulation target equipment is not in place.

Wherein the real state of the target device can be obtained from a register configured by the target device. In general, a PCIe device is configured with a register for recording the status of the bits, with the value in the register being capable of indicating whether the PCIe device at the corresponding slot is in bit. For example, when the value of the register is 1, it indicates that the PCIe device on the slot is not in the bit; when the value of the register is 0, the PCIe device at the slot is indicated to be in place.

In a specific implementation, a register for recording the in-place state of the simulated target device may be set in the logic module, and the purpose of simulating the state of the target device may be achieved by updating the value of the register for recording the in-place state of the simulated target device. For example, when the target device to be simulated is not in place, the value of a register for recording the in-place state of the simulated target device is set to 1; when the target device is to be emulated in place, the value of the register for recording the emulated target device in-place state is set to 0. The purpose of simulating the action of inserting or pulling out the equipment in the slot position corresponding to the target equipment is achieved by simulating the target equipment in place or out of place.

And S204, enabling a clock and a reset signal of the control target device by the logic module according to the simulated in-place state of the target device.

Illustratively, data transmission of a PCIe device, such as an NVMe SSD, is performed with the clock and reset signals on, and if the clock and reset signals of the PCIe device are off, the data transmission of the PCIe device is terminated. In this embodiment, the logic module determines whether to provide an enable signal for starting a clock and a reset signal to the target device according to the value of the register for recording the analog in-place state.

For example, when the logic module records that the value of the register simulating the on-bit state is 0, the logic module outputs an enable signal for starting a clock and a reset signal to the target device, and the target device can perform data transmission; when the logic module records that the value of the register simulating the in-place state is 1, the logic module stops outputting the enabling signal to the target device so as to close the clock and the reset signal of the target device and enable the target device to terminate data transmission.

And S205, the logic module reports the in-place state of the simulated target equipment to the CPU.

Illustratively, the logic module sends the bit status of the corresponding target device to the CPU via the I2C bus based on the value of the register recording the simulated bit status.

S206, the CPU triggers a hot plug driver of an operating system to execute the operation of adding or removing the target equipment according to the simulated in-place state of the target equipment from the logic module.

For example, the CPU determines whether a device plugging action occurs in a slot corresponding to the target device according to the simulated in-place state information of the target device updated by the logic module, and thereby triggers a hot plug driver of the operating system to execute an operation of adding or removing the target device.

For example, when the logic module records that the value of the register simulating the in-place state is updated from 1 to 0, after the CPU acquires the in-place state update information from the logic module, it is determined that a device insertion action occurs in the slot corresponding to the target device, and then the hot-plug driver of the operating system is triggered to execute the operation of adding the target device, thereby establishing the connection between the PCIe slot and the target device. When the logic module records that the value of the register simulating the in-place state is updated from 0 to 1, after the CPU obtains the in-place state updating information from the logic module, the CPU determines that the device is pulled out from the slot position corresponding to the target device, further triggers the hot plug driver of the operating system to execute the operation of removing the target device, and disconnects the PCIe slot from the target device. Here, the hot-plug driver is a device driver of the kernel of the operating system, and is not described herein again in view of the fact that the hot-plug driver is in the prior art.

And S207, the logic module outputs a corresponding power control instruction to the power control module according to the operation instruction.

Specifically, when the operation instruction received by the logic module is a power-on instruction, a power-on instruction of the target device is output to the power control module through the I/O signal transmission line, so that the power control module outputs a power signal to the target device.

Specifically, when the operation instruction received by the logic module is a power-off instruction, whether the hot plug drive completes the operation of removing the target device is judged, and if yes, a power-off instruction of the target device is output to the power control module through the I/O signal transmission line, so that the power control module stops outputting the power signal to the target device.

Here, the determining whether the hot plug driver completes the operation of removing the target device may specifically be implemented by the following steps: and acquiring the state value of the corresponding PCIe slot power supply state register, and judging whether the hot plug process is finished according to the state value.

Illustratively, the PCIe device is configured with a register for recording a power status of a PCIe slot corresponding to the target device, and the logic module may determine whether the hot plug process is ended by reading a status value of the power status register.

And S208, the power control module receives and controls the power signal supplied to the target device to be switched on or switched off according to the power control instruction from the logic module.

Illustratively, the power control module determines whether the power control instruction is a power on instruction or a power off instruction according to the received power control instruction from the logic module, and responds to the power control instruction to correspondingly perform an operation of turning on or off a power signal of the target device, thereby completing power-on and power-off operations of the target device.

Fig. 4 is a flowchart illustrating another PCIe device power-on and power-off control method according to an embodiment of the present application. In order to increase the speed of the CPU processing the power-up and power-down command, as shown in fig. 4 in conjunction with fig. 3, steps S205, S206 may be replaced with steps S301, S302, respectively.

S301, the logic module sends an interrupt signal for indicating the updating of the in-place state to the CPU, and reports the in-place state of the simulated target equipment to the CPU.

The interrupt signal is used to trigger the hot plug driving in step S206, so that the CPU executes step S302.

S302, the CPU receives an interrupt signal used for indicating the update of the in-place state from the logic module, and triggers a hot plug driver of an operating system to execute the operation of adding or removing the target hard disk according to the received simulated in-place state.

It should be noted that, in a specific implementation, in addition to a manner of sending an interrupt signal to the CPU, the hot plug driver may also be triggered in a polling manner, and this is not specifically limited in this embodiment of the application.

According to the technical scheme, when the PCIe equipment fails, the PCIe equipment in the remote control machine room is powered on and off, whether the equipment needs to be replaced is judged, operation and maintenance personnel do not need to enter the machine room for operation, and the workload of the operation and maintenance personnel is reduced.

In addition, although the PCIe device supports the hot plug function, if the system is unreliable in supporting the hot plug function of the PCIe device, when the system performs the plug operation in the process of replacing the device with a failure, the system is easily abnormal, and the service is interrupted. Based on the technical scheme of the embodiment of the application, the removal operation of the equipment can be realized through a power-off instruction before the PCIe equipment is replaced, and the system abnormity caused by violence plugging and unplugging of the equipment is avoided.

Furthermore, the technical scheme provided by the embodiment of the application can also be applied to a PCIe device hot plug function stability test scene in a system development test stage, so that a large amount of manual disk plugging operations are avoided, and the reliability of system test is improved.

Fig. 5 illustrates an apparatus 400 provided by an embodiment of the present application. As shown in fig. 5, the apparatus 400 includes, but is not limited to:

a memory 420 for storing a program;

and a processor 410 for executing the program stored in the memory 420, wherein when the processor 410 executes the program stored in the memory 420, the processor 410 is configured to execute the power-on and power-off control method of the PCIe device.

The processor 410 and the memory 420 may be connected by a bus or other means.

The memory 420, which is a non-transitory computer readable storage medium, may be used to store non-transitory software programs and non-transitory computer executable programs, such as the power-on and power-off control method of the PCIe device described in the embodiments of the present application. The processor 410 implements the power-up and power-down control method of the PCIe device described above by executing non-transitory software programs and instructions stored in the memory 420.

The memory 420 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store a power-on and power-off control method for executing the PCIe device described above. Further, the memory 420 may include high speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, memory 420 may optionally include memory located remotely from processor 410, which may be connected to the device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

Non-transitory software programs and instructions required to implement the power-up and power-down control method of the PCIe device described above are stored in the memory 420, and when executed by the one or more processors 410, perform the power-up and power-down control method of the PCIe device described above, e.g., perform method steps S201 and S206 described in fig. 3, method steps S202 to S205, step S207 described in fig. 3, method step S208 described in fig. 3, method steps S201 and S302 described in fig. 4, method steps S201 to S204, step S301, step S207 described in fig. 4, and method step S208 described in fig. 4.

The embodiment of the application also provides a computer-readable storage medium, which stores computer-executable instructions, and the computer-executable instructions are used for executing the power-on and power-off control method of the PCIe device.

In one embodiment, the computer-readable storage medium stores computer-executable instructions that are executed by one or more control processors 410, for example, by one of the processors 410 of the apparatus 400, and cause the one or more processors 410 to perform the above-described power-on and power-off control method for the PCIe device, for example, the method steps S201 and S206 described in fig. 3, the method steps S202 to S205 and S207 described in fig. 3, the method step S208 described in fig. 3, the method steps S201 and S302 described in fig. 4, the method steps S201 to S204 described in fig. 4, the step S301 and the step S207, and the method step S208 described in fig. 4.

The above-described embodiments of the apparatus are merely illustrative, wherein the units illustrated as separate components may or may not be physically separate, i.e. may be located in one place, or may also be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment.

One of ordinary skill in the art will appreciate that all or some of the steps, systems, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.

While the preferred embodiments of the present invention have been described, the present invention is not limited to the above embodiments, and those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention, and such equivalent modifications or substitutions are included in the scope of the present invention defined by the claims.

Claims

1. A power-up and power-down control method for a PCIe device, comprising:

2. The method of claim 1, wherein the simulating the in-place state of the target device comprises at least one of:

when the operation instruction is a power-on instruction, simulating the real state of the target equipment;

and when the operation instruction is a power-off instruction, simulating that the target equipment is not in place.

3. The method of claim 1, after enabling the clock and reset signals that control the target device, further comprising:

and sending an interrupt signal for indicating the updating of the in-place state to the CPU.

4. The method of claim 1, wherein outputting the corresponding power control command to a power control module according to the operation command comprises at least one of:

when the operation instruction is a power-on instruction, outputting a power-on instruction of the target equipment to the power control module;

and when the operation instruction is a power-off instruction, judging whether the hot plug drive finishes the operation of removing the target equipment, and if so, outputting a power-off instruction of the target equipment to the power control module.

5. The method of claim 4, wherein the determining whether the hot plug driver completes the operation of removing the target device comprises:

and acquiring the state value of the corresponding PCIe slot power supply state register, and judging whether the hot plug process is finished according to the state value.

6. A power-up and power-down control method for a PCIe device, comprising:

7. The method of claim 6, wherein triggering a hot plug driver of an operating system to perform operations to add or remove the target device based on the simulated target device in-place status from the logic module comprises:

receiving an interrupt signal used for indicating in-place state updating from the logic module, and triggering a hot plug driver of an operating system to execute the operation of adding or removing the target equipment according to the simulated in-place state of the target equipment from the logic module.

8. A power-up and power-down control system for a PCIe device, comprising:

9. The system of claim 8, further comprising a PCIe switch module, the CPU being connected to the logic module through the PCIe switch module; the CPU is also connected with N PCIe devices through the PCIe exchange module, wherein N is an integer greater than or equal to 1.

10. The system of claim 8, further comprising an I/O expansion module, wherein the logic module is coupled to the power control module via the I/O expansion module.

11. An apparatus, comprising:

a memory for storing a program;

a processor for executing the memory-stored program, the processor being configured to perform, when the processor executes the memory-stored program:

the method of any one of claims 1 to 5; or

The method of any one of claims 6 to 7.

12. A computer-readable storage medium storing computer-executable instructions for performing:

the method of any one of claims 1 to 5; or

The method of any one of claims 6 to 7.