CN104484260A

CN104484260A - Simulation monitoring circuit based on GJB289 bus interface SoC (system on a chip)

Info

Publication number: CN104484260A
Application number: CN201410752444.0A
Authority: CN
Inventors: 田泽; 杨峰; 王泉; 赵彬; 张骏; 邵刚
Original assignee: AVIC No 631 Research Institute
Current assignee: Xian Xiangteng Microelectronics Technology Co Ltd
Priority date: 2014-12-09
Filing date: 2014-12-09
Publication date: 2015-04-01
Anticipated expiration: 2034-12-09
Also published as: CN104484260B

Abstract

The invention belongs to the technical field of computers, and in particular relates to a simulation monitoring circuit based on a GJB289 bus interface SoC (system on a chip). The simulation monitoring circuit based on the GJB289 bus interface SoC comprises a protocol processing module, a control configuration module, a decoder module and a memory control module, wherein the control configuration module is directly connected with the memory control module through an address line and a data wire, and is connected with the control configuration module and the decoder module through different control signals and corresponding data lines. The simulation monitoring circuit is used for solving the problem that a CPU (central processing unit) is used as a host computer in the application of a 1553B miniature system, and the problem that a remote terminal and a bus monitor are simultaneously online, and corresponding treatment is carried out according to the specific requirements of a bus system.

Description

A kind of simulative surveillance circuit based on GJB289 bus interface SoC

Technical field

The invention belongs to field of computer technology, relate to a kind of simulative surveillance circuit based on GJB289 bus interface SoC.

Background technology

1553B bus be a kind of transmit stable, be easy to expand, there is the data bus of diagnosticability.Because it has very high reliability and dirigibility, and show many-sided excellent performances such as transmission range, this data bus is made to be widely used in military affairs, industry and sciemtifec and technical sphere, from various aircraft machine, LPX to all extensive application such as vehicle-mounted, spaceborne and space depot.

And in actual application, 1553B bus always breaks down, and can not fast and effeciently determine certain subsystem fault or bus failure, only have and investigation is carried out one by one to all subsystems in system could determine fault and keep in repair, this has had a strong impact on work efficiency, so studying a kind of can the equipment of controlling bus data and looking up the fault be very necessary.

The 1553B bus monitoring equipment used in the market and Related product a lot, it can be monitored in real time, data on record trunk, but CPU can not be overcome as main frame and remote terminal and the simultaneously online problem of watch-dog with the watch-dog on market, cannot meet and can either to serve as the remote terminal in bus at synchronization watch-dog according to needs in system emulation test, again can data on controlling bus, and the requirement of subsystem main frame can be served as, not only waste resource but also make troubles to developer.

Summary of the invention

Based on Problems existing in background technology, a kind of simulative surveillance circuit based on GJB289 bus interface SoC provided by the invention, serve as main frame problem and remote terminal and bus monitor on-line annealing simultaneously in order to solve CPU in the application of 1553B mini-system, and carry out respective handling according to bus system real needs.

Concrete technical solution of the present invention is as follows:

Protocol process module should be comprised, controlled configuration module, decoder module, memory control module based on the simulative surveillance circuit of GJB289 bus interface SoC; Control configuration module by address wire and data line direct attached storage module, be connected with control configuration module, decoder module by different control signals and corresponding data line.

Described protocol process module resolves the data from decoder module, protocol processes is carried out according to parsing content, obtain monitoring chained list and store monitoring message, and reporting bus state to described watch-dog configuration module, result is stored into memory control module the most at last;

Described control configuration module for control the startup of remote terminal and stopping, control bus monitoring enable and forbid, remote terminal, configuration CPU internal resource and configuration monitoring message in configuration bus system;

Described decoder module is for resolving from the signal in bus, and realize synchronous head, the detecting of data, the mistake of synchronous head, data detects, parity checking, for protocol process module provides effective information;

Described memory control module, be used for obtaining bus is monitored control information, data message and the data message as corresponding subaddressing during remote terminal, and by monitor control information, data message and corresponding subaddressing data information memory in the storage space of correspondence.

Remote terminal particular content in above-mentioned control configuration module configuration bus system comprises remote terminal address configuration, subaddressing configuration, sending/receiving message arrangement and message-length configuration; Described configuration CPU internal resource content specifically comprises address space access configuration, large small end configuration, storage space configuration and interrupt configuration; Described configuration monitoring message content specifically comprises monitoring remote terminal address, monitoring transmission message, monitoring receipt message, monitor command word.

Above-mentioned protocol process module carries out protocol processes according to parsing content, resolves content and comprises time interval of message, source address, subaddressing, source, destination address, target subaddressing, data amount check, instruction word, status word, the number of transmissions and errors number.

Above-mentioned decoder module resolves the serial data of Manchester II type coding received from transceiver in bus, for protocol process module provides effective information.

The invention has the advantages that:

Simulative surveillance circuit based on GJB289 bus interface SoC provided by the invention, is used for realizing remote terminal operation and controlling bus message; By controlling configuration module, protocol process module, solving CPU in the application of 1553B mini-system and serving as main frame problem and remote terminal and bus monitor on-line annealing simultaneously.

Simulative surveillance circuit based on GJB289 bus interface SoC provided by the invention, overcome problem and remote terminal that CPU can not join and bus monitor simultaneously online, control and the Data Data analysis of bus monitor is realized by PPC processor, effectively raise the dirigibility of system, to research and design important in inhibiting and the value of 1553 data highway systems.

Accompanying drawing explanation

fig. 1it is simulative surveillance circuit structure diagram of the present invention.

Embodiment

Below in conjunction with the drawings and specific embodiments, technical scheme of the present invention is stated clearly and completely.Obviously; the embodiment stated is only the present invention's part embodiment, instead of whole embodiments, based on the embodiment in the present invention; the every other embodiment that those skilled in the art are not making creative work prerequisite and obtain, all belongs to protection scope of the present invention.

Should comprise the following steps based on the method for designing of the simulative surveillance circuit of GJB289 bus interface SoC:

1] protocol process module design;

Be specially: protocol process module selects PPC processor as subsystem main frame.During as remote terminal, protocol process module receives demoder effective information, and the really effective information that aligns processes accordingly, carries out error handle for wrong information; Memory control module requires according to protocol processes the storage and the read operation that carry out data; According to the result of protocol processes, control configuration module responsive state word and carry out data transmission; Interrupt generation logic controls interruption generation according to the situation that Operation system setting and order perform, the communication of realization and processor.

During as monitoring message, protocol process module has two kinds of modes to carry out message monitoring, be a message all on controlling bus, as long as protocol processor receives receive decoder messages, this information is just put into memory control module additional space by protocol process module; Another kind monitors the terminal message of specifying, the data of record controls configuration module preassigned null terminator Null address and prespecified data

2] configuration module design is controlled;

The control be specially: in control configuration module, register definitions is divided into three kinds, and CPU controls class register, for the configuration of cpu resource space access, large small end configuration, storage space configuration, remote terminal starts, stopping; Monitoring bus enable, forbid control; Remote terminal register, for remote terminal address configuration, subaddressing configuration, sending/receiving message arrangement, message-length configuration; Monitoring message register, comprises monitoring remote terminal address, monitoring transmission message, monitoring receipt message, monitor command word for deploy content;

3] decoder module design;

Be specially: word 1553B bus having three types: command word, data word and status word, often kind of word length is 20, comprising 3 bit synchronization heads, and 16 effective informations, 1 bit parity check position.These information pass to scrambler by transceiver, scrambler is according to pulse width during level saltus step, saltus step situation and same level acquisition counter, utilize sequential circuit to control subsequent work state and export current decoding result and be correlated with and detect information, until complete the decode procedure of whole information word.

4] memory control module design;

Be specially: memory control module carries out data storage by EDMA mode, reply timeout treatment comprising the storage of EDMA application and response, the generation of address and counting, data and reading and EDMA; The function of the pseudo-twoport operation of line storage of going forward side by side.

According to above-mentioned mentality of designing, the invention provides a kind of simulative surveillance circuit based on GJB289 bus interface SoC, comprise protocol process module, control configuration module, decoder module, memory control module, protocol handler module is as central processing module, by address wire and data line direct attached storage module, be connected with control configuration module, decoder module by different control signals and corresponding data line.

Below the concrete function of modules is described in detail:

Protocol process module: resolve the data from decoder module, protocol processes is carried out according to parsing content, and obtain monitoring chained list and store monitoring message, and reporting bus state to described watch-dog configuration module, result is stored into described memory control module the most at last;

Protocol process module carries out protocol processes according to parsing content, resolves the time interval, source address, subaddressing, source, destination address, target subaddressing, data amount check, instruction word, status word, the number of transmissions, errors number etc. that content can comprise message.

Control configuration module: for controlling startup and the stopping of remote terminal; Control bus monitoring enable and forbid; Remote terminal in configuration bus system; Configuration CPU internal resource; Configuration monitoring message;

Control the bus message of configuration module remote terminal, configuration CPU internal resource, configuration monitoring in configuration bus system, remote terminal deploy content comprises remote terminal address configuration, subaddressing configuration, sending/receiving message arrangement, message-length configuration; Described CPU internal resource deploy content comprises address space access configuration, large small end configuration, storage space configuration, interrupt configuration; Described monitoring message deploy content comprises monitoring remote terminal address, monitoring transmission message, monitoring receipt message, monitor command word;

Decoder module: resolve from the signal in bus, is used for realizing synchronous head, the detecting of data; The mistake of synchronous head, data detects; Parity checking, for protocol process module provides effective information;

Decoder module resolves the serial data of Manchester II type coding received from transceiver in bus, for protocol process module provides effective information.

Memory control module: be used for obtaining bus is monitored control information, data message and the data message as corresponding subaddressing during remote terminal, and by monitor control information, data message and corresponding subaddressing data information memory in the storage space of correspondence.

Finally it should be noted that above embodiment only in order to technical scheme of the present invention to be described, be not intended to limit; Although with reference to previous embodiment to invention has been detailed description, those of ordinary skill in the art is to be understood that; It still can be modified to the technical scheme that foregoing embodiments is recorded, or carries out equivalent replacement to wherein portion of techniques feature; And these amendments or replacement, do not make the essence of appropriate technical solution depart from the spirit and scope of various embodiments of the present invention technical scheme.

Claims

1. the simulative surveillance circuit based on GJB289 bus interface SoC, it is characterized in that, comprise protocol process module, control configuration module, decoder module, memory control module, described protocol process module resolves the data from decoder module, carries out protocol processes according to parsing content, obtains monitoring chained list and stores monitoring message, and reporting bus state to described watch-dog configuration module, result is stored into memory control module the most at last; Described control configuration module for control the startup of remote terminal and stopping, control bus monitoring enable and forbid, remote terminal, configuration CPU internal resource and configuration monitoring message in configuration bus system; Described decoder module for resolving from the signal in bus, realize synchronous head, the detecting of data, synchronous head, data mistake detect, parity checking, for protocol process module provides effective information; Described memory control module, be used for obtaining bus is monitored control information, data message and the data message as corresponding subaddressing during remote terminal, and by monitor control information, data message and corresponding subaddressing data information memory in the storage space of correspondence; Described control configuration module, by address wire and data line direct attached storage module, is connected with control configuration module, decoder module by different control signals and corresponding data line.

2. the simulative surveillance circuit based on GJB289 bus interface SoC according to claim 1, is characterized in that: the remote terminal particular content in described control configuration module configuration bus system comprises remote terminal address configuration, subaddressing configuration, sending/receiving message arrangement and message-length configuration; Described configuration CPU internal resource content specifically comprises address space access configuration, large small end configuration, storage space configuration and interrupt configuration; Described configuration monitoring message content specifically comprises monitoring remote terminal address, monitoring transmission message, monitoring receipt message, monitor command word.

3. the simulative surveillance circuit based on GJB289 bus interface SoC according to claim 1, it is characterized in that: described protocol process module carries out protocol processes according to parsing content, resolve content and comprise time interval of message, source address, subaddressing, source, destination address, target subaddressing, data amount check, instruction word, status word, the number of transmissions and errors number.

4. the simulative surveillance circuit based on GJB289 bus interface SoC according to claim 1, it is characterized in that: described decoder module resolves the serial data of Manchester II type coding received from transceiver in bus, for protocol process module provides effective information.