CN110708489A - Communication method, communication device, electronic device and storage medium - Google Patents

Communication method, communication device, electronic device and storage medium Download PDF

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CN110708489A
CN110708489A CN201910877991.4A CN201910877991A CN110708489A CN 110708489 A CN110708489 A CN 110708489A CN 201910877991 A CN201910877991 A CN 201910877991A CN 110708489 A CN110708489 A CN 110708489A
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front panel
communication
interface
communication protocol
detection information
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王淑瑶
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Zhejiang Dahua Technology Co Ltd
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Zhejiang Dahua Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • H04N5/765Interface circuits between an apparatus for recording and another apparatus
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/18Multiprotocol handlers, e.g. single devices capable of handling multiple protocols

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  • Computer Networks & Wireless Communication (AREA)
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Abstract

The application provides a communication method, a communication device, an electronic device and a storage medium, which relate to the technical field of communication, wherein a communication interface of a mainboard comprises the following steps: the communication method comprises the following steps of a first interface multiplexing pin, a second interface multiplexing pin, a power supply pin and a grounding pin: after a front panel is plugged in through a communication interface of the mainboard, level information of a front panel data signal is acquired through the first interface multiplexing pin and the second interface multiplexing pin; and determining the interface type of the mainboard according to the level information, and communicating with the front panel through a communication protocol corresponding to the interface type of the mainboard. The communication between the mainboard and the front panel is realized through the mode, the flexible adaptation of the communication interface of the mainboard can be realized, and the manufacturing material cost of the communication interface of the mainboard is saved.

Description

Communication method, communication device, electronic device and storage medium
Technical Field
The present application relates to the field of communications technologies, and in particular, to a communication method and apparatus, an electronic device, and a storage medium.
Background
At present, a hard disk Video Recorder/Network hard disk Video Recorder (Digital Video Recorder/Network Video Recorder, DVR/NVR) mainboard can be compatible with various front panels, and when the mainboard is adapted to different front panels, interfaces for butting the mainboard and the front panels are different. As shown in fig. 1, the motherboard includes three interfaces, which are a universal asynchronous Receiver/Transmitter (UART) interface, an Inter-integrated circuit (IIC) interface, and a General-purpose input/output (GPIO) interface. In practical applications, in order to support different types of front panels, the motherboard needs to be configured with the aforementioned three types of interfaces. When only one type of front panel is needed to be connected with the mainboard, other interfaces on the mainboard are not used, and the waste of mainboard interface configuration resources is caused.
Disclosure of Invention
The embodiment of the application provides a communication method, a communication device and a storage medium, which are used for solving the problem of low utilization rate of mainboard communication interface configuration resources in the prior art.
In a first aspect, the present application provides a communication method, where a communication interface of a motherboard includes: the method comprises the following steps of firstly multiplexing a first interface pin, secondly multiplexing a second interface pin, a power supply pin and a grounding pin, and the method comprises the following steps:
after a front panel is plugged in through a communication interface of the mainboard, level information of a front panel data signal is acquired through the first interface multiplexing pin and the second interface multiplexing pin;
and determining the interface type of the mainboard according to the level information, and communicating with the front panel through a communication protocol corresponding to the interface type of the mainboard.
Optionally, the communication interface of the motherboard further includes: a power down control pin, the interface types including: at least two of a GPIO interface type, a UART interface type, and an IIC interface type.
Optionally, the determining the interface type of the motherboard according to the level information and communicating with the front panel through a communication protocol corresponding to the interface type of the motherboard includes:
if the level information is low level, judging that the front panel is of a GPIO type, and configuring a communication interface of the mainboard into the GPIO interface type;
communicating with the front panel through a communication protocol of the GPIO interface type;
and if the level information is high level, communicating with the front panel by adopting a communication protocol of an interface type corresponding to the high level.
Optionally, if the data signal state is a high level, communicating with the front panel by using a communication protocol of an interface type corresponding to the high level, including:
configuring the communication interface to adopt a first communication protocol corresponding to the UART interface type to send first detection information to the front panel;
if the communication with the front panel is determined to be successful according to the first detection information, the communication with the front panel is carried out through the first communication protocol;
if the communication with the front panel by adopting the first communication protocol fails, reconfiguring the communication interface to adopt a second communication protocol corresponding to the IIC interface type to send second detection information to the front panel;
and if the communication with the front panel is determined to be successful according to the second detection information, communicating with the front panel through the second communication protocol.
Optionally, the method further includes:
and if the communication failure with the front panel is determined according to the second detection information, determining that the front panel is abnormal.
Optionally, if the data signal state is a high level, communicating with the front panel by using a communication protocol of an interface type corresponding to the high level, including:
configuring the communication interface to send second detection information to the front panel by adopting a second communication protocol corresponding to the IIC interface type;
if the communication with the front panel is determined to be successful according to the second detection information, the communication with the front panel is carried out through the second communication protocol;
if the fact that the communication with the front panel by adopting the second communication protocol fails is determined, reconfiguring the communication interface to adopt a first communication protocol corresponding to the UART interface type to send first detection information to the front panel;
and if the communication with the front panel is determined to be successful according to the first detection information, the communication with the front panel is carried out through the first communication protocol.
Optionally, the method further includes:
and if the communication failure with the front panel is determined according to the first detection information, determining that the front panel is abnormal.
In a second aspect, the present application provides a communication device, where a communication interface of a motherboard includes: first interface multiplexing pin, the multiplexing pin of second interface, power pin and ground pin, the device includes:
the acquisition module is used for acquiring the level information of the front panel data signal through the first interface multiplexing pin and the second interface multiplexing pin after the communication interface of the mainboard is plugged in a front panel;
and the determining module is used for determining the interface type of the mainboard according to the level information and communicating with the front panel through a communication protocol corresponding to the interface type of the mainboard.
Optionally, the communication interface of the motherboard further includes: a power down control pin, the interface types including: at least two of a GPIO interface type, a UART interface type, and an IIC interface type.
Optionally, the determining module is configured to:
if the level information is low level, judging that the front panel is of a GPIO type, and configuring a communication interface of the mainboard into the GPIO interface type;
communicating with the front panel through a communication protocol of the GPIO interface type;
and if the level information is high level, communicating with the front panel by adopting a communication protocol of an interface type corresponding to the high level.
Optionally, the determining module is configured to:
configuring the communication interface to adopt a first communication protocol corresponding to the UART interface type to send first detection information to the front panel;
if the communication with the front panel is determined to be successful according to the first detection information, the communication with the front panel is carried out through the first communication protocol;
if the communication with the front panel by adopting the first communication protocol fails, reconfiguring the communication interface to adopt a second communication protocol corresponding to the IIC interface type to send second detection information to the front panel;
and if the communication with the front panel is determined to be successful according to the second detection information, communicating with the front panel through the second communication protocol.
Optionally, the apparatus further comprises:
and the first abnormity determining module is used for determining that the front panel is abnormal if the communication with the front panel is determined to be failed according to the second detection information.
Optionally, the determining module is configured to:
configuring the communication interface to send second detection information to the front panel by adopting a second communication protocol corresponding to the IIC interface type;
if the communication with the front panel is determined to be successful according to the second detection information, the communication with the front panel is carried out through the second communication protocol;
if the fact that the communication with the front panel by adopting the second communication protocol fails is determined, reconfiguring the communication interface to adopt a first communication protocol corresponding to the UART interface type to send first detection information to the front panel;
and if the communication with the front panel is determined to be successful according to the first detection information, the communication with the front panel is carried out through the first communication protocol.
Optionally, the apparatus further comprises:
and the second abnormity determining module is used for determining that the front panel is abnormal if the communication with the front panel is determined to be failed according to the first detection information.
In a third aspect, an embodiment of the present invention further provides an electronic device, including: a memory and a processor;
a memory for storing program instructions;
a processor for calling the program instructions stored in the memory and executing the method of the first aspect according to the obtained program.
In a fourth aspect, an embodiment of the present invention further provides a computer storage medium storing computer-executable instructions for performing the method according to the first aspect.
In an embodiment of the present application, a communication method and apparatus, an electronic device, and a storage medium are provided, where a communication interface of a motherboard includes: the communication interface of the mainboard is plugged into a front panel, level information of a front panel data signal is acquired through the first interface multiplexing pin and the second interface multiplexing pin, the interface type of the mainboard is determined according to the level information, and the communication protocol corresponding to the interface type of the mainboard is used for communicating with the front panel. The communication between the mainboard and the front panel is realized through the mode, the flexible adaptation of the communication interface of the mainboard can be realized, and the manufacturing material cost of the communication interface of the mainboard is saved.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the application. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments of the present invention will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of a connection between a motherboard and a front panel in the prior art;
fig. 2 is a schematic structural diagram of a motherboard communication interface provided in an embodiment of the present application;
fig. 3 is a flowchart of a communication method according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of another motherboard communication interface provided in the embodiment of the present application;
fig. 5 is a schematic circuit diagram of a motherboard communication interface according to an embodiment of the present disclosure;
fig. 6 is a flowchart illustrating a communication method according to level information according to an embodiment of the present application;
fig. 7 is a flowchart illustrating a communication method in which level information is high according to an embodiment of the present application;
fig. 8 is a flowchart illustrating a communication method in which the level information is high according to an embodiment of the present application;
fig. 9 is a schematic connection diagram of a main board and a front panel according to an embodiment of the present disclosure;
fig. 10 is a schematic structural diagram of a communication device according to an embodiment of the present application;
fig. 11 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention.
The existing front panel mainly includes three types as shown in fig. 1, including a front panel type 1 having a UART interface, a front panel type 2 having an IIC interface, and a front panel type 3 having a GPIO interface. The front panel type 3 only needs simple indication lamps for displaying, so that the front panel type 3 is only connected with a mainboard in a butt joint mode through simple GPIO signals for controlling lighting, and the front panel type 3 is mainly communicated with the mainboard through 2 data signals of the hard disk and the network indication lamps.
The front panel type 1 needs to support multiple functions such as restart, key pressing, infrared and the like, so the front panel realizes the functions through a single chip microcomputer, most of communication interfaces butted with a main board are UART interfaces, namely UART (universal asynchronous receiver transmitter), the UART interfaces are serial communication modes, and the UART interfaces comprise TX and RX2 data signals.
The function of the front panel type 2 is relatively simple, but not only limited to the requirement of indicating lamp display, a simple single chip microcomputer supporting IIC communication may be selected for realization, at this time, the front panel type 2 is butted with a main board to form an IIC interface, an IIC bus is a two-wire serial multi-host bus, 2 signals including clock and data are output in a leakage mode, and a VDD power supply is pulled up during circuit design.
In order to adapt to front panels which can be butted, all external interfaces reserved on a main board in the prior scheme are used for adapting to various types of front panels, only one type of front panel is butted in product assembly, one type of front panel is actually used, and other interfaces are not used, so that the material cost of equipment is undoubtedly increased.
The present application provides a communication interface of a motherboard as shown in fig. 2, where the communication interface 20 of the motherboard includes: the communication method comprises a first interface multiplexing pin 21, a second interface multiplexing pin 22, a power pin 23 and a ground pin 24, wherein after the front panel is connected with the main board through a communication interface of the main board, power is supplied to the front panel through the power pin 23 and the ground pin 24, and data interaction between the main board and the front panel is realized through additionally adding two signal lines between the first interface multiplexing pin 21 and the second interface multiplexing pin 22 and pins of the front panel interface, and a flow of the communication method based on the main board communication interface provided by the application is shown in fig. 3.
Step 301: after the communication interface of the mainboard is plugged into the front panel, the level information of the data signal of the front panel is obtained through the first interface multiplexing pin and the second interface multiplexing pin.
Step 302: and determining the interface type of the mainboard according to the level information, and communicating with the front panel through a communication protocol corresponding to the interface type of the mainboard.
In one embodiment, the communication interface of the motherboard shown in fig. 4 further includes: power-off control pins 25, the interface types include: the power-off control pin is a pin specific to the UART interface and is used for controlling the power-off of the main board reversely, so that the communication interface shown in fig. 4 can realize the switching of three different interface types.
It should be noted that, when the communication interface of the motherboard is multiplexed, the embodiment shown in fig. 5 is taken as an example, but in specific application, the positions of five pins may be set according to actual requirements, where pin 5 in fig. 5 is a power supply pin, pin 4 is a ground pin, and pin 3 is a pin for a specific function of the UART interface, and is used for controlling the power failure of the motherboard reversely, and the front panel with the IIC and GPIO lighting functions does not have this function. In fig. 5, pins 1 and 2 are interface multiplexing pins, and may be adapted to a GPIO interface, a UART interface, and an IIC interface according to specific front panel types, where data signals corresponding to the interface multiplexing pins are shown in table 1, and level information of pins 1 and 2 corresponding to different communication modes is shown in table 2.
TABLE 1
Pin UART communication GPIO communication IIC communication
PIN_1 RXD_FRONT NET_LED IIC_SCL
PIN_2 TXD_FRONT HDD_LED IIC_SDA
TABLE 2
Figure BDA0002204968600000071
Figure BDA0002204968600000081
According to the convention in the table, when the front panel type is GPIO, a pull-down resistor is needed when the front panel IO is designed correspondingly, the default level is 00, when the front panel type is IIC, the clock and data signals are output in a leakage mode according to the IIC mentioned above, the clock and data signals need to be pulled up to a VCC power supply when the front panel IO is designed, according to the characteristic, the front panel can be arranged to be pulled up to VCC corresponding to the IIC interface, namely, the level of the 1 st pin and the level of the 2 nd pin are 11. Therefore, if the FRONT panel is of the IIC interface type, the default level acquired by the main control terminal is certainly 11, when the FRONT panel type is UART, the TXD _ FRONT (the RXD signal at the end of the FRONT panel singlechip to which the CPU is connected) corresponding to the CPU is pulled up to VCC, and the RXD _ FRONT sends a signal to the singlechip, and the default is usually output high level, that is, the 1 st and 2 nd pin levels may be 10 or 11, so that it is difficult to distinguish the UART interface or the IIC interface from the 1 st and 2 nd pin levels, a protocol needs to be selected to try to communicate and respond, and the UART interface or the IIC interface is determined according to the response result.
In one embodiment, the step 302 of confirming the communication mode according to the level information may be specifically executed by the flow of fig. 6:
step 601: judging whether the level information of the data signal is a high level or a low level; if the level information is low level, step 602 is executed, and if the level information is high level, step 503 is executed.
Step 602: and judging that the front panel is of a GPIO type, configuring the communication interface of the mainboard into the GPIO interface type, and executing step 604.
Step 604: and communicating with the front panel through the communication protocol of the GPIO interface type.
Step 603: and communicating with the front panel by adopting a communication protocol of an interface type corresponding to the high level.
The communication interface can be reused in the communication mode, the material cost is reduced, and the utilization rate of the interface is improved.
It should be noted that when the communication protocol of the interface type corresponding to the high level is used to communicate with the front panel, the determination may be performed in two ways.
In a first way,
In this manner, the communication interface of the motherboard is configured to be the communication protocol corresponding to the UART interface type to attempt to communicate with the front panel, and the specific flow of steps is shown in fig. 7.
Step 701: and configuring the communication interface to adopt a first communication protocol corresponding to the UART interface type to send first detection information to the front panel.
Step 702: judging whether the communication with the front panel is successful or not according to the first detection information; if yes, go to step 703, otherwise go to step 704.
Step 703: and communicating with the front panel through the first communication protocol.
Step 704: and reconfiguring the communication interface to adopt a second communication protocol corresponding to the IIC interface type to send second detection information to the front panel.
Step 605: judging whether the communication with the front panel is successful or not according to the second detection information; if yes, go to step 706, otherwise go to step 707.
Step 706: communicate with the front panel via the second communication protocol.
Step 707: determining the front panel anomaly.
The second way,
In this manner, the communication interface of the motherboard is configured as the communication protocol corresponding to the IIC interface type to attempt communication to the front panel, and the specific flow of the steps is shown in fig. 8.
Step 801: and configuring the communication interface to send second detection information to the front panel by adopting a first communication protocol corresponding to the IIC interface type.
Step 802: judging whether the communication with the front panel is successful or not according to the second detection information; if yes, go to step 803, otherwise go to step 804.
Step 803: communicate with the front panel via the second communication protocol.
Step 804: and reconfiguring the communication interface to adopt a second communication protocol corresponding to the UART interface type to send first detection information to the front panel.
Step 805: judging whether the communication with the front panel is successful or not according to the first detection information; if yes, go to step 806, otherwise go to step 807.
Step 806: and communicating with the front panel through the first communication protocol.
Step 807: determining the front panel anomaly.
When the mainboard acquires high-level information in the first mode or the second mode, which communication protocol is selected to communicate with the front can be accurately judged, so that the multiplexing type of the interface is acquired.
By adopting the communication method provided by the application, a communication interface can be arranged on the mainboard to butt joint the front panel with the corresponding type, as shown in fig. 9, when the type of the front panel is 1, the mainboard is adapted to communicate with the front panel by the communication protocol corresponding to the UART interface and perform data interaction; when the type of the front panel is 2, the main panel is adapted to a communication protocol corresponding to the IIC interface to communicate with the front panel and perform data interaction; when the front panel type is 3, the mainboard is adapted to the communication protocol corresponding to the GPIO interface to communicate with the front panel and perform data interaction.
The mode realizes the multiplexing of the interface, improves the utilization rate of materials and reduces the manufacturing cost of the interface.
The application provides a communication device, the communication interface of mainboard includes: a first interface multiplexing pin, a second interface multiplexing pin, a power supply pin, and a ground pin, and as shown in fig. 10, the apparatus includes: an acquisition module 101 and a determination module 102.
The obtaining module 101 is configured to obtain level information of a front panel data signal through the first interface multiplexing pin and the second interface multiplexing pin after the communication interface of the motherboard is plugged into the front panel.
And the determining module 102 is configured to determine an interface type of the motherboard according to the level information, and communicate with the front panel through a communication protocol corresponding to the interface type of the motherboard.
Optionally, the communication interface of the motherboard further includes: a power down control pin, the interface types including: at least two of a GPIO interface type, a UART interface type, and an IIC interface type.
Optionally, the determining module 102 is configured to:
if the level information is low level, judging that the front panel is of a GPIO type, and configuring a communication interface of the mainboard into the GPIO interface type;
communicating with the front panel through a communication protocol of the GPIO interface type;
and if the level information is high level, communicating with the front panel by adopting a communication protocol of an interface type corresponding to the high level.
Optionally, the determining module 102 is configured to:
configuring the communication interface to adopt a first communication protocol corresponding to the UART interface type to send first detection information to the front panel;
if the communication with the front panel is determined to be successful according to the first detection information, the communication with the front panel is carried out through the first communication protocol;
if the communication with the front panel by adopting the first communication protocol fails, reconfiguring the communication interface to adopt a second communication protocol corresponding to the IIC interface type to send second detection information to the front panel;
and if the communication with the front panel is determined to be successful according to the second detection information, communicating with the front panel through the second communication protocol.
Optionally, the apparatus further comprises:
and the first abnormity determining module is used for determining that the front panel is abnormal if the communication with the front panel is determined to be failed according to the second detection information.
Optionally, the determining module 102 is configured to:
configuring the communication interface to send second detection information to the front panel by adopting a second communication protocol corresponding to the IIC interface type;
if the communication with the front panel is determined to be successful according to the second detection information, the communication with the front panel is carried out through the second communication protocol;
if the fact that the communication with the front panel by adopting the second communication protocol fails is determined, reconfiguring the communication interface to adopt a first communication protocol corresponding to the UART interface type to send first detection information to the front panel;
and if the communication with the front panel is determined to be successful according to the first detection information, the communication with the front panel is carried out through the first communication protocol.
Optionally, the apparatus further comprises:
and the second abnormity determining module is used for determining that the front panel is abnormal if the communication with the front panel is determined to be failed according to the first detection information.
After the communication method and apparatus in the exemplary embodiment of the present application are introduced, an electronic device in another exemplary embodiment of the present application is introduced next.
As will be appreciated by one skilled in the art, aspects of the present application may be embodied as a system, method or program product. Accordingly, various aspects of the present application may be embodied in the form of: an entirely hardware embodiment, an entirely software embodiment (including firmware, microcode, etc.) or an embodiment combining hardware and software aspects that may all generally be referred to herein as a "circuit," module "or" system.
In some possible implementations, an electronic device according to the present application may include at least one processor, and at least one memory. The memory stores program code, which, when executed by the processor, causes the processor to perform the steps of the communication method according to various exemplary embodiments of the present application described above in the present specification. For example, the processor may perform steps 301-302 as shown in FIG. 3.
The electronic device 130 according to this embodiment of the present application is described below with reference to fig. 11. The electronic device 130 shown in fig. 11 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present application.
As shown in fig. 11, the electronic device 130 is embodied in the form of a general purpose computing apparatus. The components of the electronic device 130 may include, but are not limited to: the at least one processor 131, the at least one memory 132, and a bus 133 that connects the various system components (including the memory 132 and the processor 131).
Bus 133 represents one or more of any of several types of bus structures, including a memory bus or memory controller, a peripheral bus, a processor, or a local bus using any of a variety of bus architectures.
The memory 132 may include readable media in the form of volatile memory, such as Random Access Memory (RAM)1321 and/or cache memory 1322, and may further include Read Only Memory (ROM) 1323.
Memory 132 may also include a program/utility 1325 having a set (at least one) of program modules 1324, such program modules 1324 including, but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which, or some combination thereof, may comprise an implementation of a network environment.
The electronic device 130 may also communicate with one or more external devices 134 (e.g., keyboard, pointing device, etc.), with one or more devices that enable target objects to interact with the electronic device 130, and/or with any devices (e.g., router, modem, etc.) that enable the electronic device 130 to communicate with one or more other computing devices. Such communication may occur via input/output (I/O) interfaces 135. Also, the electronic device 130 may communicate with one or more networks (e.g., a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network, such as the internet) via the network adapter 136. As shown, network adapter 136 communicates with other modules for electronic device 130 over bus 133. It should be understood that although not shown in the figures, other hardware and/or software modules may be used in conjunction with electronic device 130, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, among others.
In some possible embodiments, the various aspects of the data processing method provided in the present application may also be implemented in the form of a program product including program code for causing a computer device to perform the steps in the communication method according to various exemplary embodiments of the present application described above in this specification when the program product is run on the computer device, for example, the computer device may perform steps 301-302 as shown in fig. 3.
The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The program product for smart device control of embodiments of the present application may employ a portable compact disc read only memory (CD-ROM) and include program code, and may be run on a computing device. However, the program product of the present application is not limited thereto, and in this document, a readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
A readable signal medium may include a propagated data signal with readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A readable signal medium may also be any readable medium that is not a readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Program code for carrying out operations of the present application may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the target object computing device, partly on the target object apparatus, as a stand-alone software package, partly on the target object computing device and partly on a remote computing device, or entirely on the remote computing device or server. In the case of a remote computing device, the remote computing device may be connected to the target object computing device over any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computing device (e.g., over the internet using an internet service provider).
It should be noted that although several units or sub-units of the apparatus are mentioned in the above detailed description, such division is merely exemplary and not mandatory. Indeed, the features and functions of two or more units described above may be embodied in one unit, according to embodiments of the application. Conversely, the features and functions of one unit described above may be further divided into embodiments by a plurality of units.
Further, while the operations of the methods of the present application are depicted in the drawings in a particular order, this does not require or imply that these operations must be performed in this particular order, or that all of the illustrated operations must be performed, to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step execution, and/or one step broken down into multiple step executions.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims (16)

1. A communication method is characterized in that a communication interface of a mainboard comprises the following steps: the method comprises the following steps of firstly multiplexing a first interface pin, secondly multiplexing a second interface pin, a power supply pin and a grounding pin, and the method comprises the following steps:
after a front panel is plugged in through a communication interface of the mainboard, level information of a front panel data signal is acquired through the first interface multiplexing pin and the second interface multiplexing pin;
and determining the interface type of the mainboard according to the level information, and communicating with the front panel through a communication protocol corresponding to the interface type of the mainboard.
2. The method of claim 1, wherein the communication interface of the motherboard further comprises: a power down control pin, the interface types including: at least two of a GPIO interface type, a UART interface type, and an IIC interface type.
3. The method according to claim 2, wherein the determining the interface type of the motherboard according to the level information and communicating with the front panel through a communication protocol corresponding to the interface type of the motherboard comprises:
if the level information is low level, judging that the front panel is of a GPIO type, and configuring a communication interface of the mainboard into the GPIO interface type;
communicating with the front panel through a communication protocol of the GPIO interface type;
and if the level information is high level, communicating with the front panel by adopting a communication protocol of an interface type corresponding to the high level.
4. The method of claim 3, wherein if the data signal status is high, communicating with the front panel using a communication protocol of an interface type corresponding to the high level comprises:
configuring the communication interface to adopt a first communication protocol corresponding to the UART interface type to send first detection information to the front panel;
if the communication with the front panel is determined to be successful according to the first detection information, the communication with the front panel is carried out through the first communication protocol;
if the communication with the front panel by adopting the first communication protocol fails, reconfiguring the communication interface to adopt a second communication protocol corresponding to the IIC interface type to send second detection information to the front panel;
and if the communication with the front panel is determined to be successful according to the second detection information, communicating with the front panel through the second communication protocol.
5. The method of claim 4, further comprising:
and if the communication failure with the front panel is determined according to the second detection information, determining that the front panel is abnormal.
6. The method of claim 3, wherein if the data signal status is high, communicating with the front panel using a communication protocol of an interface type corresponding to the high level comprises:
configuring the communication interface to send second detection information to the front panel by adopting a second communication protocol corresponding to the IIC interface type;
if the communication with the front panel is determined to be successful according to the second detection information, the communication with the front panel is carried out through the second communication protocol;
if the fact that the communication with the front panel by adopting the second communication protocol fails is determined, reconfiguring the communication interface to adopt a first communication protocol corresponding to the UART interface type to send first detection information to the front panel;
and if the communication with the front panel is determined to be successful according to the first detection information, the communication with the front panel is carried out through the first communication protocol.
7. The method of claim 6, further comprising:
and if the communication failure with the front panel is determined according to the first detection information, determining that the front panel is abnormal.
8. A communication device, wherein a communication interface of a motherboard comprises: first interface multiplexing pin, the multiplexing pin of second interface, power pin and ground pin, the device includes:
the acquisition module is used for acquiring the level information of the front panel data signal through the first interface multiplexing pin and the second interface multiplexing pin after the communication interface of the mainboard is plugged in a front panel;
and the determining module is used for determining the interface type of the mainboard according to the level information and communicating with the front panel through a communication protocol corresponding to the interface type of the mainboard.
9. The apparatus of claim 8, wherein the communication interface of the motherboard further comprises: a power down control pin, the interface types including: at least two of a GPIO interface type, a UART interface type, and an IIC interface type.
10. The apparatus of claim 9, wherein the determining module is configured to:
if the level information is low level, judging that the front panel is of a GPIO type, and configuring a communication interface of the mainboard into the GPIO interface type;
communicating with the front panel through a communication protocol of the GPIO interface type;
and if the level information is high level, communicating with the front panel by adopting a communication protocol of an interface type corresponding to the high level.
11. The apparatus of claim 10, wherein the determining module is configured to:
configuring the communication interface to adopt a first communication protocol corresponding to the UART interface type to send first detection information to the front panel;
if the communication with the front panel is determined to be successful according to the first detection information, the communication with the front panel is carried out through the first communication protocol;
if the communication with the front panel by adopting the first communication protocol fails, reconfiguring the communication interface to adopt a second communication protocol corresponding to the IIC interface type to send second detection information to the front panel;
and if the communication with the front panel is determined to be successful according to the second detection information, communicating with the front panel through the second communication protocol.
12. The apparatus of claim 11, further comprising:
and the first abnormity determining module is used for determining that the front panel is abnormal if the communication with the front panel is determined to be failed according to the second detection information.
13. The apparatus of claim 10, wherein the determining module is configured to:
configuring the communication interface to send second detection information to the front panel by adopting a second communication protocol corresponding to the IIC interface type;
if the communication with the front panel is determined to be successful according to the second detection information, the communication with the front panel is carried out through the second communication protocol;
if the fact that the communication with the front panel by adopting the second communication protocol fails is determined, reconfiguring the communication interface to adopt a first communication protocol corresponding to the UART interface type to send first detection information to the front panel;
and if the communication with the front panel is determined to be successful according to the first detection information, the communication with the front panel is carried out through the first communication protocol.
14. The apparatus of claim 13, further comprising:
and the second abnormity determining module is used for determining that the front panel is abnormal if the communication with the front panel is determined to be failed according to the first detection information.
15. An electronic device, comprising: a memory and a processor;
a memory for storing program instructions;
a processor for calling program instructions stored in said memory to execute the method of any one of claims 1 to 7 in accordance with the obtained program.
16. A computer storage medium storing computer-executable instructions for performing the method of any one of claims 1-7.
CN201910877991.4A 2019-09-17 2019-09-17 Communication method, communication device, electronic device and storage medium Pending CN110708489A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111491113A (en) * 2020-03-27 2020-08-04 浙江大华技术股份有限公司 Hard disk video recorder, video signal access method and computer equipment
CN111694776A (en) * 2020-05-29 2020-09-22 大唐微电子技术有限公司 Method and device for identifying communication interface in chip
CN111737177A (en) * 2020-05-18 2020-10-02 大唐微电子技术有限公司 Method and device for identifying communication interface of chip in BOOT state

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102045345A (en) * 2010-11-23 2011-05-04 广州数控设备有限公司 Method for realizing position sensor interface supporting various sensor communication protocols
CN102819501A (en) * 2012-08-21 2012-12-12 天地融科技股份有限公司 Electronic equipment and data interface type detection method
CN104184454A (en) * 2014-08-07 2014-12-03 长芯盛(武汉)科技有限公司 Circuit connection of SFP chip suitable for multi-type storage, and detection method thereof
CN106201929A (en) * 2016-07-22 2016-12-07 恒宝股份有限公司 A kind of USB interface multiplex circuit and using method
CN108255158A (en) * 2018-01-16 2018-07-06 深圳市道通科技股份有限公司 Vehicular diagnostic method and device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102045345A (en) * 2010-11-23 2011-05-04 广州数控设备有限公司 Method for realizing position sensor interface supporting various sensor communication protocols
CN102819501A (en) * 2012-08-21 2012-12-12 天地融科技股份有限公司 Electronic equipment and data interface type detection method
CN104184454A (en) * 2014-08-07 2014-12-03 长芯盛(武汉)科技有限公司 Circuit connection of SFP chip suitable for multi-type storage, and detection method thereof
CN106201929A (en) * 2016-07-22 2016-12-07 恒宝股份有限公司 A kind of USB interface multiplex circuit and using method
CN108255158A (en) * 2018-01-16 2018-07-06 深圳市道通科技股份有限公司 Vehicular diagnostic method and device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111491113A (en) * 2020-03-27 2020-08-04 浙江大华技术股份有限公司 Hard disk video recorder, video signal access method and computer equipment
CN111491113B (en) * 2020-03-27 2022-10-21 浙江大华技术股份有限公司 Hard disk video recorder, video signal access method and computer equipment
CN111737177A (en) * 2020-05-18 2020-10-02 大唐微电子技术有限公司 Method and device for identifying communication interface of chip in BOOT state
CN111694776A (en) * 2020-05-29 2020-09-22 大唐微电子技术有限公司 Method and device for identifying communication interface in chip
CN111694776B (en) * 2020-05-29 2022-03-18 大唐微电子技术有限公司 Method and device for identifying communication interface in chip

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Application publication date: 20200117