CN110417780A - Customize the multi-channel high-speed data interface conversion module of Data Transport Protocol - Google Patents
Customize the multi-channel high-speed data interface conversion module of Data Transport Protocol Download PDFInfo
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- CN110417780A CN110417780A CN201910694982.1A CN201910694982A CN110417780A CN 110417780 A CN110417780 A CN 110417780A CN 201910694982 A CN201910694982 A CN 201910694982A CN 110417780 A CN110417780 A CN 110417780A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
- H04L1/0083—Formatting with frames or packets; Protocol or part of protocol for error control
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40032—Details regarding a bus interface enhancer
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/06—Notations for structuring of protocol data, e.g. abstract syntax notation one [ASN.1]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/08—Protocols for interworking; Protocol conversion
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/16—Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/40208—Bus networks characterized by the use of a particular bus standard
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- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computer Security & Cryptography (AREA)
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Abstract
Customize the multi-channel high-speed data interface conversion module of Data Transport Protocol, it is related to satellite ground the field of test technology, to solve the problems, such as to customize high speed parallel interface data information acquisition difficulty during satellite test in the prior art, including Step 1: realizing that multichannel customizes interface protocol data receiver using the system on chip of high performance programmable；Step 2: interface data is carried；Step 3: data storage is encapsulated with format；Step 4: the transplanting and modification of lightweight Ethernet protocol stack；Step 5: the data based on lightweight Ethernet protocol stack are sent.The present invention has many advantages, such as that customizable interface protocol, data transmission bauds promotion 30%, accessible channel are more, can be to provide that protocol format acquires high speed LVDS interface signal, and the Ethernet protocol data for being translated into standard are exported to client.
Description
Technical field
The present invention relates to satellite ground the field of test technology, and in particular to a kind of multi-channel high-speed data interface conversion mould
Block.
Background technique
Satellite ground test is the key link for ensureing satellite and working normally, and dedicated satellite interface data format is converted
Processing module for the general Ethernet interface data format of ground installation be realize process control, result be visual, information can be right
The key of ratio.With the diversification and customization of satellite task, more and more data needs transmit between different single machines,
Interface therebetween is mostly the high speed LVDS parallel signal with individuation data agreement, although LVDS signal has transmission speed
The advantages that high, low in energy consumption, strong antijamming capability, but in functional test and Qualify Phase, because it is customized, degree is high, data parallel
Spending the features such as big is difficult to obtain the data content of LVDS interface, to ground test, troubleshooting, the data content comparison etc. of satellite
Work brings huge inconvenience.
Customizing Data Transport Protocol is important component that China's satellite develops entirely autonomousization, and designer can be with
A variety of limitations such as data format, interface hardware, channel bandwidth in standard agreement use are got rid of, according to the actual demand of application function
Design more efficient interface protocol.Although this provides more efficient solution in the realization of satellite function, in function
Also to ground checkout equipment, more stringent requirements are proposed on capable of testing.Common solution is specific for specific protocol design
Solution encode single machine, convert Ethernet protocol format for the interface of format and export to server or information and test eventually
End.Although this mode can customize the difficult problem of protocol data test with effective solution, its hardware design often needle
Relatively high to property, i.e., special test equipment tests dedicated single machine, cannot achieve a set of hardware and adapts to all or most of test wrappers
Border causes a problem in that and needs to redesign hardware if interface protocol varies slightly, in this way, in testing cost, people
Member's consumption and equipment R&D cycle etc. cause very big waste.In addition, traditional interface system is usually with list
The form of machine or cabinet is presented, and volume is big, quality weight, and movement is inconvenient in complicated test power house environment.Therefore,
Design one can satisfy agreement and customize Data Transport Protocol demand, while have the multi-channel high-speed data of stronger versatility
Interface conversion module is current satellite test field major issue urgently to be resolved.
Summary of the invention
The purpose of the present invention is: in order to solve to customize high speed parallel interface data during satellite test in the prior art
The problem of acquisition of information difficulty proposes a kind of multi-channel high-speed data interface conversion module for customizing Data Transport Protocol.
In order to solve the above-mentioned technical problem the present invention adopts the technical scheme that: customizing the multichannel of Data Transport Protocol
High speed interface conversion module, the module realize multi-channel high-speed data transmission the following steps are included:
Step 1: it is received using the programmable logic resource design multi-channel parallel in ZYNQ UltraScale+MPSoC
Logic unit, and by the multi-channel data received storage on piece random access memory；
Step 2: transmission control unit (TCU) is designed using programmable logic resource, judges whether data accord with using transmission control unit (TCU)
Transmission conditions are closed, data transmission unit is controlled if meeting transmission conditions, the initial data received is carried；
Step 3: the data after carrying are written by data transmission unit in the fixing address area of external cache, and root
Complete the splicing encapsulation of data packet in the buffer according to Cortex HDR protocol format；
Step 4: arm processor lightweight Ethernet protocol stack being transplanted in ZYNQ UltraScale+MPSoC
On, protocol stack program is changed, realizes the communication of same network segment Multi-netmouth；
Step 5: writing the reception of ICP/IP protocol data and sends function, receives client data request information, postpones
It deposits and is directly read in address and send data.
Further, the specific steps of the step 1 are as follows: by design external interface hardware circuit that LVDS is poor first
Sub-signal is converted into the single ended data signal for meeting processor input request signal, and interface circuit uses complete with interconnecting module inside
Complete isolated design；Later, the sequential relationship of input signal is matched according to the interface protocol timing diagram of customization, is utilized
The mode of high-frequency clock sampling reads input signal and the binary signal that will acquire is stored on piece random access memory, simultaneously
Read data frame is counted.
Further, the specific steps of the step 2 are as follows: the then frame count value first in read step one utilizes biography
Defeated controller judges whether it reaches half-full state according to the capacity of pre-set on-chip memory, if reaching half-full state
Think have a data transmission conditions, at this point, transmission control unit (TCU) is counted by order control bus into programmable logic resource
Configuration and control instruction are sent according to transmission unit, opens primary transmission, transmitted data amount is the half of on-chip memory total capacity.
Further, the specific steps of the step 3 are as follows: first will be in on-chip memory by data transmission unit
Data directly write in external cache, divide different size of dedicated cache area according to channel data total amount and carry out circulation covering
Formula storage, meanwhile, it is respectively written into before and after the address section of store frames of data according to Cortex HDR agreement in buffer area
The calculated agreement frame head of prescribed form the joint passage data Frame Properties and postamble.
Further, the specific steps of the step 4 are as follows: lightweight Ethernet protocol stack is transplanted to ZYNQ first
On arm processor in UltraScale+ platform, then protocol stack parameter is set, and modifies the registration letter of the network interface in protocol stack
Several and IP adaptation function.
Further, the specific steps of the step 5 are as follows: write the reception of ICP/IP protocol data first and send letter
Then number receives the data that designated port fixed ip address is sent, after receiving data sending request, is directly read by transmission function
The buffer area content in step 3 is taken, client software is sent to ICP/IP protocol by data cached.
The beneficial effects of the present invention are: the present invention has, interface protocol is customizable, data transmission bauds promotion 30%, can connect
Enter the advantages that channel is more, it can be to provide that protocol format acquires high speed LVDS interface signal, and it is translated into the ether of standard
FidonetFido data are exported to client.
Detailed description of the invention
Fig. 1 is hardware components whole design block diagram of the present invention.
Fig. 2 is Functional Design block diagram of the present invention.
Specific embodiment
Specific embodiment 1: illustrating present embodiment referring to Figures 1 and 2, present embodiment is to satellite data transmission list
4 channel high-speed datas of machine output have carried out interface conversion with Cortex HDR protocol format, realize expectation function, specifically according to
Following steps are implemented:
Step 1: realizing that multichannel customizes interface protocol data receiver using the system on chip of high performance programmable.
It is first converted LVDS differential signal to by design external interface hardware circuit and meets processor input signal and want
The single ended data signal asked, to ensure the safety with satellite test, interface circuit uses completely isolated with interconnecting module inside
Formula design；Later, using the programmable logic resource (part PL) in high-performance ZYNQ UltraScale+MPSoC, according to defending
Star number leaflet machine output data protocol format design customization logic glue, according to interface protocol timing diagram to input signal
Sequential relationship matched, read input signal in such a way that high-frequency clock samples, every 8192bit is a data frame,
With the storage of 32 bit wides into FIFO, and received data frame number is recorded in real time.Each group of data channel above-mentioned form into
Row design, and according to corresponding transport protocol custom interface logic.
Step 2: interface data is carried.
Transmission control unit (TCU) is designed using programmable logic resource, reads receive data frame count value in real time, when passing through step
When one obtained initial data is built up in FIFO greater than total capacity half, transmission control unit (TCU) issues to FIFO read data first
Request, later, by AXI Lite bus, into programmable logic resource, DMA unit sends configuration-direct and starts a DMA
Transmission, transmission total amount of data are the half of FIFO capacity.Every circuit-switched data channel is equipped with a DMA unit and carries out data transmission, DMA
Data input be all made of AXI Stream bus form with output and be read out and send.
Step 3: data storage is encapsulated with format
It is carried in external DDR caching by DMA unit by the data in each channel FIFO are continual, according to each logical
DDR is divided into the dedicated cache area of multiple suitable sizes by track data bit rate.Since satellite load data are needed with Cortex
HDR protocol format is sent, before data start transmission, according to Cortex HDR agreement prescribed form the joint passage data Frame Properties
The frame head address bit and postamble address bit for calculating agreement frame head and postamble data content, and being written into corresponding buffer area.
When data start transmission, the data frame of corresponding channel need to be only written to the address section between frame head and postamble, data are completed and spell
It connects and is encapsulated with protocol format.
Step 4: the transplanting and modification of lightweight Ethernet protocol stack
It will make on arm processor that lightweight Ethernet protocol stack (LWIP) is transplanted in ZYNQ UltraScale+ platform
For server-side, protocol stack efficiency itself is improved by setting protocol stack parameter.Because can be applied to the lightweight of embedded platform
Ethernet protocol stack only distinguishes the IP address equipment at different net ends, cannot achieve Multi-netmouth in process of data communication
The communication function of same network segment.So modifying the IP adaptation function in protocol stack for same network segment IP address Communication, increase
IP address last bit matching feature realizes the arbitration functions of same network segment different address.Meanwhile function is communicated based on the protocol stack of single network interface
Can, increase network interface registration function, to realize the same network segment communication of multichannel ethernet port.
Step 5: the data based on lightweight Ethernet protocol stack are sent.
It writes the reception of ICP/IP protocol data and sends function.Firstly, protocol stack starts to receive the fixed IP of designated port
The request of data that address is sent, after determining solicited message, by ARM controller by DDRC stone module directly from corresponding caching
Cortex HDR protocol formatted data is taken out in space, and is passed through by transmission function with the output of ICP/IP protocol data packet format
Multichannel gigabit ethernet interface sends data to the client of corresponding address, to realize multi-channel high-speed parallel number of ports
According to acquisition of information and interface transformation function.
In Fig. 1 1.: it is input to module buffer circuit data flow, 2.: module buffer circuit to mac controller data flow, 3.:
Mac controller is to Ethernet interface data flow.
It should be noted that specific embodiment is only the explanation and illustration to technical solution of the present invention, it cannot be with this
Limit rights protection scope.What all claims according to the present invention and specification were made is only locally to change, Reng Yingluo
Enter in protection scope of the present invention.
Claims (6)
1. customizing the multi-channel high-speed data interface conversion module of Data Transport Protocol, it is characterised in that the module is realized more
Channel high speed data transfer the following steps are included:
Step 1: logic is received using the programmable logic resource design multi-channel parallel in ZYNQ UltraScale+MPSoC
Unit, and by the multi-channel data received storage on piece random access memory；
Step 2: transmission control unit (TCU) is designed using programmable logic resource, judges whether data meet biography using transmission control unit (TCU)
Defeated condition controls data transmission unit if meeting transmission conditions and carries to the initial data received；
Step 3: the data after carrying being written by data transmission unit in the fixing address area of external cache, and according to
Cortex HDR protocol format completes the splicing encapsulation of data packet in the buffer；
Step 4: lightweight Ethernet protocol stack is transplanted on the arm processor in ZYNQ UltraScale+MPSoC, more
Change protocol stack program, realizes the communication of same network segment Multi-netmouth；
Step 5: writing the reception of ICP/IP protocol data and sends function, receives client data request information, from caching ground
It is directly read in location and sends data.
2. the multi-channel high-speed data interface conversion module according to claim 1 for customizing Data Transport Protocol, special
Sign is the specific steps of the step 1 are as follows: is first converted LVDS differential signal to by design external interface hardware circuit
Meet the single ended data signal of processor input request signal, interface circuit is used to be set with formula completely isolated inside interconnecting module
Meter；Later, the sequential relationship of input signal is matched according to the interface protocol timing diagram of customization, is adopted using high-frequency clock
The mode of sample reads input signal and the binary signal that will acquire is stored on piece random access memory, while to reading data
Frame is counted.
3. the multi-channel high-speed data interface conversion module according to claim 2 for customizing Data Transport Protocol, special
Sign is the specific steps of the step 2 are as follows: then the frame count value first in read step one utilizes transmission control unit (TCU) root
Judge whether it reaches half-full state according to the capacity of pre-set on-chip memory, thinks have one if reaching half-full state
Secondary data transmission conditions, at this point, transmission control unit (TCU) passes through order control bus data transmission unit into programmable logic resource
Configuration and control instruction are sent, primary transmission is opened, transmitted data amount is the half of on-chip memory total capacity.
4. the multi-channel high-speed data interface conversion module according to claim 3 for customizing Data Transport Protocol, special
Sign is the specific steps of the step 3 are as follows: is first write direct the data in on-chip memory by data transmission unit
Into external cache, different size of dedicated cache area is divided according to channel data total amount and carries out circulation cover type storage, meanwhile,
It is combined for being respectively written into before and after the address section of store frames of data according to Cortex HDR agreement prescribed form in buffer area
The calculated agreement frame head of channel data Frame Properties and postamble.
5. the multi-channel high-speed data interface conversion module according to claim 4 for customizing Data Transport Protocol, special
Sign is the specific steps of the step 4 are as follows: lightweight Ethernet protocol stack is transplanted to ZYNQ UltraScale+ first and is put down
On arm processor in platform, then protocol stack parameter is set, and modifies the network interface registration function in protocol stack and IP matching letter
Number.
6. the multi-channel high-speed data interface conversion module according to claim 5 for customizing Data Transport Protocol, special
Sign is the specific steps of the step 5 are as follows: writes the reception of ICP/IP protocol data first and sends function, then receives
The data that designated port fixed ip address is sent after receiving data sending request, are directly read in step 3 by transmission function
Buffer area content, client software is sent to ICP/IP protocol by data cached.
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Cited By (7)
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| CN111313997A (en) * | 2020-02-11 | 2020-06-19 | 哈尔滨工业大学 | Remote sensing satellite multi-priority non-equilibrium rate load data dynamic multiplexer simulation system |
| CN111339003A (en) * | 2020-01-08 | 2020-06-26 | 中国船舶重工集团公司第七二四研究所 | General multichannel data sending system and method based on FPGA |
| CN111460015A (en) * | 2020-03-10 | 2020-07-28 | 哈尔滨工业大学 | Customized multi-channel real-time accurate satellite data loading device |
| CN112835829A (en) * | 2021-02-10 | 2021-05-25 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Method for multi-channel DMA transmission measurement and control signal |
| CN114070386A (en) * | 2022-01-17 | 2022-02-18 | 成都国星宇航科技有限公司 | Satellite-borne Ethernet communication system |
| CN114896183A (en) * | 2022-05-25 | 2022-08-12 | 安徽隼波科技有限公司 | Serial port data sending method based on ZYNQ |
| CN115174701A (en) * | 2022-06-30 | 2022-10-11 | 江苏科瑞恩自动化科技有限公司 | Data transmission method and device, computer equipment and storage medium |
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| CN111460015A (en) * | 2020-03-10 | 2020-07-28 | 哈尔滨工业大学 | Customized multi-channel real-time accurate satellite data loading device |
| CN112835829A (en) * | 2021-02-10 | 2021-05-25 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Method for multi-channel DMA transmission measurement and control signal |
| CN112835829B (en) * | 2021-02-10 | 2022-10-28 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Method for multi-channel DMA transmission measurement and control signal |
| CN114070386A (en) * | 2022-01-17 | 2022-02-18 | 成都国星宇航科技有限公司 | Satellite-borne Ethernet communication system |
| CN114896183A (en) * | 2022-05-25 | 2022-08-12 | 安徽隼波科技有限公司 | Serial port data sending method based on ZYNQ |
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