CN108829374A - A kind of pseudo random sequence generator circuit - Google Patents
A kind of pseudo random sequence generator circuit Download PDFInfo
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- CN108829374A CN108829374A CN201810834556.9A CN201810834556A CN108829374A CN 108829374 A CN108829374 A CN 108829374A CN 201810834556 A CN201810834556 A CN 201810834556A CN 108829374 A CN108829374 A CN 108829374A
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/582—Pseudo-random number generators
- G06F7/584—Pseudo-random number generators using finite field arithmetic, e.g. using a linear feedback shift register
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Abstract
The present invention is suitable for pseudo random sequence generator field, provide a kind of pseudo random sequence generator circuit, the pseudo random sequence generator circuit includes shift LD module, 0 module of feedback logic module and row of the shift LD module is connected, and is electrically connected the power supply of the shift LD module, 0 module of the feedback logic module and the row；Solve the technical issues of pseudo random sequence generator cannot generate the pseudo-random sequence of different lengths.
Description
Technical field
The invention belongs to pseudo random sequence generator field more particularly to a kind of pseudo random sequence generator circuits.
Background technique
Pseudo-random sequence is the periodic sequence with certain stochastic behaviour, has preparatory confirmability and repeatability,
Repeatedly it can generate and replicate.Currently, widely applied pseudo-random sequence is all the period sequence generated by digital circuit
Column obtain after the processing such as filtering.The digital circuit of pseudo-random sequence is generated mainly by linear feedback shift register and discrete member
Part is constituted.The characteristic of pseudo-random sequence is determined by the series of shift register, original state, feedback logic and clock.When
After the series and clock of shift register determine, output sequence is just completely by the original state of shift register and feedback logic institute
It determines.
Summary of the invention
The purpose of the present invention is to provide a kind of pseudo random sequence generator circuits, it is intended to solve pseudo random sequence generator
The technical issues of pseudo-random sequence of different lengths cannot be generated.
The invention is realized in this way a kind of pseudo random sequence generator circuit, the pseudo random sequence generator circuit
Including shift LD module, 0 module of feedback logic module and row of the shift LD module is connected, and is electrically connected the shifting
The power supply of position registration module, 0 module of the feedback logic module and the row；
The shift LD module：For the original state of pseudo random sequence generator to be arranged and generates output pseudo-random sequence；
The feedback logic module：The pseudo-random sequence of different length is generated for controlling pseudo random sequence generator；
0 module of row：The pseudo-random sequence of full 0 is generated for excluding pseudo random sequence generator；
The power supply：For providing required voltage for modules.
A further technical scheme of the invention is that：The shift LD module includes shift register U1, shift register
U2, toggle switch S2, toggle switch S3, control switch S1, resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, resistance
R6, resistance R7, resistance R8 and resistance R9,1 stitch of the shift register U1 are separately connected 1 needle of the shift register U2
One end of foot, one end of the resistance R1 and the control switch S1,3 stitch of the shift register U1 are separately connected described
4 stitch of 8 stitch of one end of resistance R9 and the toggle switch S2, the shift register U1 are separately connected the resistance R2
One end and the toggle switch S2 7 stitch, 5 stitch of the shift register U1 are separately connected one end of the resistance R3
And 6 stitch of the toggle switch S2,6 stitch of the shift register U1 are separately connected one end of the resistance R4 and described
5 stitch of toggle switch S2,10 stitch of the shift register U1 connect 10 stitch of the shift register U2, the shifting
2 stitch of bit register U2 are separately connected one end of the resistance R5 and 8 stitch of the toggle switch S3, the shift LD
3 stitch of device U2 are separately connected one end of the resistance R6 and 7 stitch of the toggle switch S3, the shift register U2's
4 stitch are separately connected one end of the resistance R7 and 6 stitch of the toggle switch S3,5 stitch of the shift register U2
It is separately connected one end of the resistance R8 and 5 stitch of the toggle switch S3, the other end of the resistance R1, the resistance R2
The other end, the other end of the resistance R3, the other end of the resistance R4, the resistance R5 the other end, the resistance R6
The other end, the other end of the resistance R7, the other end of the resistance R8, the resistance R9 the other end, it is described displacement post
9 stitch of 9 stitch of storage U1 and the shift register U2 are all connected with the power supply, the other end of the control switch S1,
1 stitch of the toggle switch S2,2 stitch, 3 stitch, 4 stitch and the toggle switch S3 1 stitch, 2 stitch, 3 stitch, 4
Stitch is all connected with GND.
A further technical scheme of the invention is that：The feedback logic module includes feedback series switch S4, XOR gate
U3A, XOR gate U3B, XOR gate U3C, XOR gate U7A, XOR gate U7B, XOR gate U7C and XOR gate U7D, the feedback series
1 stitch of switch S4 connects 15 stitch of the shift register U1, and 2 stitch of the feedback series switch S4 connect the shifting
3 stitch of 14 stitch of bit register U1, the feedback series switch S4 connect 13 stitch of the shift register U1, described
4 stitch of feedback series switch S4 connect 12 stitch of the shift register U1, and 5 stitch of the feedback series switch S4 connect
15 stitch of the shift register U2 are connect, 6 stitch of the feedback series switch S4 connect the 14 of the shift register U2
7 stitch of stitch, the feedback series switch S4 connect 13 stitch of the shift register U2, the feedback series switch S4
8 stitch connect 12 stitch of the shift register U2, the 9 stitch connection XOR gate of the feedback series switch S4
10 stitch of the 2nd input terminal of U7D, the feedback series switch S4 connect the 1st input terminal of the XOR gate U7D, described anti-
11 stitch of feedback series switch S4 connect the 2nd input terminal of the XOR gate U7C, and 12 stitch of the feedback series switch S4 connect
Connect the 1st input terminal of the XOR gate U7C, it is the 2nd defeated to connect the XOR gate U7B for 13 stitch of the feedback series switch S4
Enter end, 14 stitch of the feedback series switch S4 connect the 1st input terminal of the XOR gate U7B, the feedback series switch
15 stitch of S4 connect the 2nd input terminal of the XOR gate U7A, and 16 stitch of the feedback series switch S4 connect the exclusive or
The 1st input terminal of door U7A, the output end of the XOR gate U7D connect the 2nd input terminal of the XOR gate U3B, the XOR gate
The output end of U7C connects the 1st input terminal of the XOR gate U3B, and the output end of the XOR gate U7B connects the XOR gate
The 2nd input terminal of U3A, the output end of the XOR gate U7A connect the 1st input terminal of the XOR gate U3B, the XOR gate
The output end of U3B connects the 2nd input terminal of the XOR gate U3C, and the output end of the XOR gate U3A connects the XOR gate
The 1st input terminal of U3C, the output end of the XOR gate U3C connect 2 stitch of the shift register U1.
A further technical scheme of the invention is that：0 module of row includes or door U4A or door U4B or door U4C or door
U5A or door U5B or door U5C or door U5D and NOT gate U6A, described or door U4A the 1st input terminal connect the shift register
15 stitch of U2, described or door U4A the 2nd input terminal connect 14 stitch of the shift register U2, and described or door U4B
1 input terminal connects 13 stitch of the shift register U2, and described or door U4B the 2nd input terminal connects the shift register
12 stitch of U2, described or door U4A output end connect described or door U4C the 1st terminals, described or door U4B output end
Described in connection or the 2nd terminals of door U4C, described or door U5A the 1st input terminal connect 12 needles of the shift register U1
Foot, described or door U5A the 2nd input terminal connect 13 stitch of the shift register U1, described or door U5B the 1st input terminal
14 stitch of the shift register U1 are connected, described or door U5B the 2nd input terminal connects 15 needles of the shift register U1
Foot, the connection of described or door U5A output end is described or the 1st terminals of door U5C, described in described or door U5B output end connection
Or the 2nd terminals of door U5C, described or door U5C output end connect described or door U5D the 1st terminals, described or door U4C
Output end connection is described or the 2nd terminals of door U5D, described or door U5D output end connect the input of the NOT gate U6A
End, the output end of the NOT gate U6A connect 10 stitch of the shift register U1.
The beneficial effects of the invention are as follows：It is arranged using 2 groups of 4 toggle switch instead of single original state, it can basis
Demand flexible setting original state, it is reasonable by switching for the different demands for generating sequence length without setting number manually again
Feedback logic module is set, the pseudo-random sequence for exporting a variety of different lengths is realized.
Detailed description of the invention
Fig. 1 is a kind of structural block diagram of pseudo random sequence generator circuit provided in an embodiment of the present invention；
Fig. 2 is a kind of electrical schematic diagram of pseudo random sequence generator circuit provided in an embodiment of the present invention.
Specific embodiment
Fig. 1-2 shows a kind of pseudo random sequence generator circuit provided by the invention, the pseudo random sequence generator
Circuit includes shift LD module, connects 0 module of feedback logic module and row of the shift LD module, and is electrically connected institute
State the power supply of 0 module of shift LD module, the feedback logic module and the row；
The shift LD module：For the original state of pseudo random sequence generator to be arranged and generates output pseudo-random sequence；
The feedback logic module：The pseudo-random sequence of different length is generated for controlling pseudo random sequence generator；
0 module of row：The pseudo-random sequence of full 0 is generated for excluding pseudo random sequence generator；
The power supply：For providing required voltage for modules.
The shift LD module include shift register U1, shift register U2, toggle switch S2, toggle switch S3,
Control switch S1, resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8 and resistance R9, institute
1 stitch for stating shift register U1 is separately connected 1 stitch of the shift register U2, one end of the resistance R1 and the control
Make switch S1 one end, 3 stitch of the shift register U1 be separately connected the resistance R9 one end and the toggle switch
8 stitch of S2,4 stitch of the shift register U1 be separately connected the resistance R2 one end and the toggle switch S2 7
Stitch, 5 stitch of the shift register U1 are separately connected one end of the resistance R3 and 6 stitch of the toggle switch S2,
6 stitch of the shift register U1 are separately connected one end of the resistance R4 and 5 stitch of the toggle switch S2, the shifting
10 stitch of bit register U1 connect 10 stitch of the shift register U2, and 2 stitch of the shift register U2 connect respectively
One end of the resistance R5 and 8 stitch of the toggle switch S3 are connect, 3 stitch of the shift register U2 are separately connected described
4 stitch of 7 stitch of one end of resistance R6 and the toggle switch S3, the shift register U2 are separately connected the resistance R7
One end and the toggle switch S3 6 stitch, 5 stitch of the shift register U2 are separately connected one end of the resistance R8
And 5 stitch of the toggle switch S3, the other end of the resistance R1, the other end of the resistance R2, the resistance R3 it is another
One end, the other end of the resistance R4, the other end of the resistance R5, the other end of the resistance R6, the resistance R7 it is another
One end, the other end of the resistance R8, the other end of the resistance R9,9 stitch of the shift register U1 and the displacement
9 stitch of register U2 are all connected with the power supply, the other end of the control switch S1,1 stitch of the toggle switch S2,2
Stitch, 3 stitch, 4 stitch and the toggle switch S3 1 stitch, 2 stitch, 3 stitch, 4 stitch be all connected with GND.It is opened by dial-up
It closes S2 and toggle switch S3 and is configured original state, determination moves to right output（Specific logic function is by shift register U1 and shifting
9 stitch of bit register U2 and S0=1 of 10 stitch, S1=0 are determined）, after powering on, shift register U1 and shift register U2 exist
Under the action of clock signal, generation output sequence is constantly moved to right.
The feedback logic module includes feedback series switch S4, XOR gate U3A, XOR gate U3B, XOR gate U3C, exclusive or
Door U7A, XOR gate U7B, XOR gate U7C and XOR gate U7D, 1 stitch of the feedback series switch S4 connect the displacement and post
2 stitch of 15 stitch of storage U1, the feedback series switch S4 connect 14 stitch of the shift register U1, the feedback
3 stitch of series switch S4 connect 13 stitch of the shift register U1, and 4 stitch of the feedback series switch S4 connect institute
12 stitch of shift register U1 are stated, 5 stitch of the feedback series switch S4 connect 15 stitch of the shift register U2,
6 stitch of the feedback series switch S4 connect 14 stitch of the shift register U2,7 needles of the feedback series switch S4
Foot connects 13 stitch of the shift register U2, and 8 stitch of the feedback series switch S4 connect the shift register U2
12 stitch, 9 stitch of the feedback series switch S4 connect the 2nd input terminal of the XOR gate U7D, and the feedback series is opened
10 stitch for closing S4 connect the 1st input terminal of the XOR gate U7D, and the 11 stitch connection of the feedback series switch S4 is described different
Or the 2nd input terminal of door U7C, 12 stitch of the feedback series switch S4 connect the 1st input terminal of the XOR gate U7C, institute
13 stitch for stating feedback series switch S4 connect the 2nd input terminal of the XOR gate U7B, 14 needles of the feedback series switch S4
Foot connects the 1st input terminal of the XOR gate U7B, and 15 stitch of the feedback series switch S4 connect the XOR gate U7A's
16 stitch of the 2nd input terminal, the feedback series switch S4 connect the 1st input terminal of the XOR gate U7A, the XOR gate
The output end of U7D connects the 2nd input terminal of the XOR gate U3B, and the output end of the XOR gate U7C connects the XOR gate
The 1st input terminal of U3B, the output end of the XOR gate U7B connect the 2nd input terminal of the XOR gate U3A, the XOR gate
The output end of U7A connects the 1st input terminal of the XOR gate U3B, and the output end of the XOR gate U3B connects the XOR gate
The 2nd input terminal of U3C, the output end of the XOR gate U3A connect the 1st input terminal of the XOR gate U3C, the XOR gate
The output end of U3C connects 2 stitch of the shift register U1.Firstly, being 2 to generate the periodn-1（N is shift register
Series）Maximum length sequence, it is desirable that the proper polynomial of pseudo random sequence generator must be n times primitive polynomial（It can pass through
It tables look-up to obtain）.According to the length requirement for wanting formation sequence, indicate that coefficient determines feedback by 8 systems of corresponding primitive polynomial
Logical relation determines the series for participating in feedback by feedback series switch S4 selection, rear to be sent into XOR gate 4070（U7A,U7B,
U7C, U7D and U3A, U3B, U3C）, sent after exclusive or is complete to 2 stitch of shift register U1（Move to right serial input terminal DSR）.
0 module of row includes or door U4A or door U4B or door U4C or door U5A or door U5B or door U5C or door
U5D and NOT gate U6A, described or door U4A the 1st input terminal connects 15 stitch of the shift register U2, described or door U4A
2nd input terminal connects 14 stitch of the shift register U2, and described or door U4B the 1st input terminal connects the shift LD
13 stitch of device U2, described or door U4B the 2nd input terminal connects 12 stitch of the shift register U2, described or door U4A
Described in output end connection or the 1st terminals of door U4C, described or door U4B output end connect described or door U4C the 2nd wiring
End, described or door U5A the 1st input terminal connect 12 stitch of the shift register U1, described or door U5A the 2nd input terminal
13 stitch of the shift register U1 are connected, described or door U5B the 1st input terminal connects 14 needles of the shift register U1
Foot, described or door U5B the 2nd input terminal connect 15 stitch of the shift register U1, described or door U5A output end connection
Described or door U5C the 1st terminals, described or door U5B output end connect described or door U5C the 2nd terminals, described or door
Described in the output end connection of U5C or the 1st terminals of door U5D, described or door U4C output end connect the described or door U5D the 2nd
Terminals, described or door U5D output end connect the input terminal of the NOT gate U6A, described in the output end connection of the NOT gate U6A
10 stitch of shift register U1.It need to point out when exporting full 0,0 circuit of row is set.By the 12 of shift register U1,13,14
With 12,13,14 and 15 stitch of 15 stitch and shift register U2, by or door 4071（Including U4A, U4B, U4C and
U5A,U5B,U5C,U5D）, NOT gate（U6A）0 circuit in a row is combined, and last output is sent to shift register U1 and displacement and is posted
The operation mode control terminal S1 of storage U2.When output is not all 0, it can be ensured that S1 remains 0（It is high electricity that S0, which is arranged, in circuit
It is flat）, mode is moved to right in continuous；When output is full 0,80 warps or the output of door 4071 are 0, then become 1 through NOT gate 4069,
Make operation mode control terminal S1 1, circuit is in and send digital modeling at this time, and the original state set before is re-fed into input
End realizes self-starting when full 0 output.
It is arranged using 2 groups of 4 toggle switch instead of single original state, it can flexible setting initial shape according to demand
State, without setting number manually again, for the different demands for generating sequence length, by switching rationally setting feedback logic module,
The pseudo-random sequence for exporting a variety of different lengths is realized, the totally 7 kinds of length of generation 3,7,15,31,63,127 and 255 may be implemented
Pseudo-random sequence.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Made any modifications, equivalent replacements, and improvements etc., should all be included in the protection scope of the present invention within mind and principle.
Claims (4)
1. a kind of pseudo random sequence generator circuit, it is characterised in that：The pseudo random sequence generator circuit includes that displacement is posted
Storing module, connects 0 module of feedback logic module and row of the shift LD module, and is electrically connected the shift LD mould
The power supply of 0 module of block, the feedback logic module and the row；
The shift LD module：For the original state of pseudo random sequence generator to be arranged and generates output pseudo-random sequence；
The feedback logic module：The pseudo-random sequence of different length is generated for controlling pseudo random sequence generator；
0 module of row：The pseudo-random sequence of full 0 is generated for excluding pseudo random sequence generator；
The power supply：For providing required voltage for modules.
2. pseudo random sequence generator circuit according to claim 1, which is characterized in that the shift LD module includes
Shift register U1, shift register U2, toggle switch S2, toggle switch S3, control switch S1, resistance R1, resistance R2, resistance
R3, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8 and resistance R9,1 stitch of the shift register U1 are separately connected
One end of 1 stitch of the shift register U2, one end of the resistance R1 and the control switch S1, the shift register
3 stitch of U1 are separately connected one end of the resistance R9 and 8 stitch of the toggle switch S2, and the 4 of the shift register U1
Stitch is separately connected one end of the resistance R2 and 7 stitch of the toggle switch S2,5 stitch point of the shift register U1
One end of the resistance R3 is not connected and 6 stitch of the toggle switch S2,6 stitch of the shift register U1 are separately connected
10 stitch of 5 stitch of one end of the resistance R4 and the toggle switch S2, the shift register U1 connect the displacement
10 stitch of register U2,2 stitch of the shift register U2 are separately connected one end of the resistance R5 and the dial-up is opened
Close 8 stitch of S3,3 stitch of the shift register U2 be separately connected the resistance R6 one end and the toggle switch S3
7 stitch, 4 stitch of the shift register U2 are separately connected one end of the resistance R7 and 6 stitch of the toggle switch S3,
5 stitch of the shift register U2 are separately connected one end of the resistance R8 and 5 stitch of the toggle switch S3, the electricity
Hinder the other end of R1, the other end of the resistance R2, the other end of the resistance R3, the other end of the resistance R4, the electricity
Hinder the other end of R5, the other end of the resistance R6, the other end of the resistance R7, the other end of the resistance R8, the electricity
The other end, 9 stitch of the shift register U1 and 9 stitch of the shift register U2 of resistance R9 are all connected with the power supply,
The other end of the control switch S1,1 stitch of the toggle switch S2,2 stitch, 3 stitch, 4 stitch and the toggle switch
1 stitch, 2 stitch, 3 stitch, 4 stitch of S3 are all connected with GND.
3. pseudo random sequence generator circuit according to claim 2, which is characterized in that the feedback logic module includes
Feed back series switch S4, XOR gate U3A, XOR gate U3B, XOR gate U3C, XOR gate U7A, XOR gate U7B, XOR gate U7C and
1 stitch of XOR gate U7D, the feedback series switch S4 connect 15 stitch of the shift register U1, the feedback series
2 stitch of switch S4 connect 14 stitch of the shift register U1, and 3 stitch of the feedback series switch S4 connect the shifting
4 stitch of 13 stitch of bit register U1, the feedback series switch S4 connect 12 stitch of the shift register U1, described
5 stitch of feedback series switch S4 connect 15 stitch of the shift register U2, and 6 stitch of the feedback series switch S4 connect
14 stitch of the shift register U2 are connect, 7 stitch of the feedback series switch S4 connect the 13 of the shift register U2
8 stitch of stitch, the feedback series switch S4 connect 12 stitch of the shift register U2, the feedback series switch S4
9 stitch connect the 2nd input terminal of the XOR gate U7D, the 10 stitch connection XOR gate of the feedback series switch S4
11 stitch of the 1st input terminal of U7D, the feedback series switch S4 connect the 2nd input terminal of the XOR gate U7C, described anti-
12 stitch of feedback series switch S4 connect the 1st input terminal of the XOR gate U7C, and 13 stitch of the feedback series switch S4 connect
Connect the 2nd input terminal of the XOR gate U7B, it is the 1st defeated to connect the XOR gate U7B for 14 stitch of the feedback series switch S4
Enter end, 15 stitch of the feedback series switch S4 connect the 2nd input terminal of the XOR gate U7A, the feedback series switch
16 stitch of S4 connect the 1st input terminal of the XOR gate U7A, and the output end of the XOR gate U7D connects the XOR gate U3B
The 2nd input terminal, the output end of the XOR gate U7C connects the 1st input terminal of the XOR gate U3B, the XOR gate U7B's
Output end connects the 2nd input terminal of the XOR gate U3A, and the output end of the XOR gate U7A connects the of the XOR gate U3B
1 input terminal, the output end of the XOR gate U3B connect the 2nd input terminal of the XOR gate U3C, the output of the XOR gate U3A
End connects the 1st input terminal of the XOR gate U3C, and the output end of the XOR gate U3C connects 2 needles of the shift register U1
Foot.
4. pseudo random sequence generator circuit according to claim 3, which is characterized in that 0 module of row includes or door
U4A or door U4B or door U4C or door U5A or door U5B or door U5C or door U5D and NOT gate U6A, it is described or the door U4A the 1st
Input terminal connects 15 stitch of the shift register U2, and described or door U4A the 2nd input terminal connects the shift register U2
14 stitch, described or door U4B the 1st input terminal connects 13 stitch of the shift register U2, described or the door U4B the 2nd
Input terminal connects 12 stitch of the shift register U2, and described or door U4A output end connects the described or door U4C the 1st and connects
Line end, described or door U4B output end connect described or door U4C the 2nd terminals, described or door U5A the 1st input terminal connection
12 stitch of the shift register U1, described or door U5A the 2nd input terminal connect 13 stitch of the shift register U1,
Described or door U5B the 1st input terminal connects 14 stitch of the shift register U1, described or door U5B the 2nd input terminal connection
15 stitch of the shift register U1, the connection of described or door U5A output end is described or the 1st terminals of door U5C, it is described or
The output end of door U5B connects described or door U5C the 2nd terminals, and described or door U5C output end connects described or door U5D
1st terminals, described or door U4C output end connect described or door U5D the 2nd terminals, and described or door U5D output end connects
The input terminal of the NOT gate U6A is connect, the output end of the NOT gate U6A connects 10 stitch of the shift register U1.
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