CN107797934B

CN107797934B - Method for processing de-allocation command and storage device

Info

Publication number: CN107797934B
Application number: CN201610804881.1A
Authority: CN
Inventors: 于松海; 蔡述楠; 郭志红; 高慧娟
Original assignee: Beijing Memblaze Technology Co Ltd
Current assignee: Beijing Memblaze Technology Co Ltd
Priority date: 2016-09-05
Filing date: 2016-09-05
Publication date: 2022-07-22
Anticipated expiration: 2036-09-05
Also published as: CN107797934A

Abstract

The invention discloses a method for processing a de-allocation command and storage equipment, relates to the technical field of storage, and solves the technical problem that the processing of the de-allocation command influences the execution of an IO command in the prior art. The method for processing the de-allocation command comprises the following steps: acquiring a logical address range indicated by the de-allocation command according to the de-allocation command; updating the FTL table, and setting the table entry of the FTL table corresponding to the logical address range indicated by the de-allocation command as a first specified value; indicating that the de-allocation command execution is complete. The method for processing the de-allocation command is applied to processing the storage device.

Description

Method for processing de-allocation command and storage device

Technical Field

The present invention relates to the field of storage technologies, and in particular, to a method, a storage device, and a computer program for processing a deallocation command and a read command.

Background

The host and the storage device can be coupled by various methods, including but not limited to, connecting the host and the storage device by, for example, SATA, IDE, USB, PCIE, NVMe (NVM Express), SAS, ethernet, fibre channel, wireless communication network, etc. The host may be an information processing device, such as a personal computer, tablet, server, portable computer, network switch, router, cellular telephone, personal digital assistant, etc., capable of communicating with the storage device in the manner described above.

FIG. 1 is a block diagram of a memory device. The solid-state storage device 102 is coupled to a host for providing storage capabilities to the host. The host and the solid-state storage device 102 may be coupled by various methods, including but not limited to, connecting the host and the solid-state storage device 102 by, for example, SATA (Serial Advanced Technology Attachment), SCSI (Small Computer System Interface), SAS (Serial Attached SCSI), IDE (Integrated Drive Electronics), USB (Universal Serial Bus), PCIE (Peripheral Component Interconnect Express, PCIE, high-speed Peripheral Component Interconnect), NVMe (NVM Express, high-speed nonvolatile storage), ethernet, fiber channel, wireless communication network, etc. The host may be an information processing device, such as a personal computer, tablet, server, portable computer, network switch, router, cellular telephone, personal digital assistant, etc., capable of communicating with the storage device in the manner described above. The storage device 102 includes an interface 103, a control section 104, one or more NVM (Non-Volatile Memory) chips 105, and a DRAM (Dynamic Random Access Memory) 110. NAND flash, phase change memory, FeRAM, MRAM, etc. are common NVMs. The interface 103 may be adapted to exchange data with a host by means such as SATA, IDE, USB, PCIE, NVMe, SAS, ethernet, fibre channel, etc. The control unit 104 is used to control data transfer between the interface 103, the NVM chip 105, and the DRAM110, and also used for memory management, host logical address to flash physical address mapping, erase leveling, bad block management, and the like. The control component 104 can be implemented in a variety of ways including software, hardware, firmware, or a combination thereof. The control unit 104 may be in the form of an FPGA (Field-programmable gate array), an ASIC (Application Specific Integrated Circuit), or a combination thereof. The control component 104 may also include a processor or controller in which software is executed to manipulate the hardware of the control component 104 to process IO commands. The control unit 104 is also coupled to the DRAM110 and has access to the data of the DRAM 110. FTL tables and/or cached IO command data may be stored in the DRAM.

The control section 104 includes a flash memory interface controller (or referred to as a flash channel controller). Flash interface controller is coupled to NVM chip 105 and issues commands to NVM chip 105 to operate NVM chip 105 in a manner that conforms to the interface protocol of NVM chip 105 and receives command execution results output from NVM chip 105. The interface protocol of the NVM chip 105 includes well-known interface protocols or standards such as "Toggle", "ONFI", etc.

The memory Target (Target) is one or more Logic units (Logic units) that share a Chip Enable (CE) signal within the NAND flash package. Each logical Unit has a Logical Unit Number (LUN). One or more dies (Die) may be included within the NAND flash memory package. Typically, each logic unit corresponds to a single die. The logical unit may include a plurality of planes (planes). Multiple planes within a logical unit may be accessed in parallel, while multiple logical units within a NAND flash memory chip may execute commands and report status independently of each other. In "Open NAND Flash Interface Specification (Revision 3.0)" available from http:// www.micron.com// media/Documents/Products/Other% 20Documents/ONFI3_0gold. ashx, references to the meaning of target, logical unit, LUN, Plane (Plane) are provided, which are part of the prior art.

Data is typically stored and read on a storage medium on a page by page basis and erased on a block by block basis. A block contains multiple pages. Pages on the storage medium (called physical pages) have a fixed size, e.g., 17664 bytes. Of course, the physical pages may have other sizes.

In a solid-state storage device, the logical addresses constitute the storage space of the solid-state storage device as perceived by upper-level software, such as an operating system. The physical address is an address for accessing a physical memory location of the solid-state memory device.

Trim commands are defined in ATA8-ACS2, and commands with the same or similar meaning are referred to in the SCSI (Small Computer System Interface) specification as UNMAP (UNMAP) and in the NVMe specification as Deallocate. Hereinafter, "de-allocate" is used to indicate data set management commands having the same or similar functionality as "trim" of ATA8-ACS2, "de-map" of SCSI, "de-allocate" of NVMe, and also to indicate commands having the same or similar functionality as occur in other or future protocols, specifications, or technologies.

In the deallocation command, a logical address range is described. After the de-allocation command is executed, there may be different effects. For example, (1) when the logical address range indicated by the deallocation command is read after the deallocation command is executed, the result is deterministic (before other write operations to that logical address range are performed); (2) after the de-allocation command is executed, when the logical address range indicated by the de-allocation command is read, the obtained result is all 0 (before other write operations to the logical address range are executed); (3) when the logical address range indicated by the deallocation command is read after the deallocation command is executed, the result can be an arbitrary value (before other write operations to the logical address range are performed). The effect of execution of the de-allocation command may be set or selected in the de-allocation command or other command.

By using the de-allocation command, the host can inform the solid state disk which logical address spaces no longer store valid data, so that the solid state disk does not need to move the invalid data when the storage space is recovered. However, in the prior art, a large number of memory access operations are required in the process of executing the deallocation command, which seriously prolongs the time for processing the deallocation command, and affects the performance of the solid state disk, thereby affecting the execution of the IO commands occurring simultaneously.

Disclosure of Invention

It is an object of the present invention to provide a method, a storage device and a computer program for processing de-allocation commands, read commands, for processing de-allocation commands at high speed without affecting the execution of simultaneous IO commands.

A first aspect of the invention provides a method of processing a deallocation command, the method comprising: acquiring a logical address range indicated by the de-allocation command according to the de-allocation command; updating the FTL table, and setting the table entry of the FTL table corresponding to the logical address range indicated by the de-allocation command as a first specified value; indicating that the de-allocation command execution is complete.

With reference to the first aspect of the present invention, in a first possible implementation manner, the method for processing a deallocation command further includes: updating an effective data unit table, wherein the effective data unit table is used for recording the data state of each physical data unit of the storage equipment; and updating the effective data unit counting table, wherein the effective data unit counting table is used for recording the number of the physical data units in an effective state in the physical block, the big block or the physical block group.

With reference to the first aspect or the first possible implementation manner of the first aspect, in a second possible implementation manner, during the updating of the FTL table, other components are prevented from accessing the entries of the FTL table being updated, or other components are prevented from accessing the entries of the FTL table being updated.

With reference to the first aspect, the first or second possible implementation manner of the first aspect, in a third possible implementation manner, the updating the FTL table includes updating a plurality of entries of the FTL table each time.

With reference to the first aspect of the present invention and one of the first to third possible implementation manners of the first aspect, in a fourth possible implementation manner, the updating the FTL table includes updating, by using DMA operation, a memory space in which the multiple entries of the FTL table are stored.

With reference to one of the first to fourth possible implementation manners of the first aspect of the present invention, in a fifth possible implementation manner, the method for processing a deallocation command further includes: updating a first priority of the physical block, the large block or the physical block group according to the effective data unit counting table, wherein the first priority is the priority for executing garbage recycling operation; and executing garbage collection operation according to the first priority.

With reference to one of the first to fifth possible implementation manners of the first aspect of the present invention, in a sixth possible implementation manner, the valid data unit table is a valid data unit bitmap, and each bit in the valid data unit bitmap is used to indicate a state of data of each physical data unit of the storage device.

With reference to one of the first to sixth possible implementation manners of the first aspect of the present invention, in a seventh possible implementation manner, the physical data unit is a physical page or a part of a physical page.

With reference to one of the fifth to seventh possible implementations of the first aspect of the present invention, in an eighth possible implementation, the physical blocks, large blocks, or groups of physical blocks that contain fewer valid data units have a higher first priority.

With reference to one of the first to eighth possible implementation manners of the first aspect of the present invention, in a ninth possible implementation manner, after the valid data unit table is updated, the deallocation command processing is instructed to be completed; alternatively, after updating the valid data unit count table, the deallocation command processing is instructed to complete.

With reference to the first aspect or one of the first to ninth possible implementation manners of the first aspect, in a tenth possible implementation manner, before the FTL table is updated, locking an entry of the FTL table corresponding to the logical address range indicated by the deallocation command; and after the FTL table is updated, unlocking the table entry of the FTL table corresponding to the logical address range indicated by the de-allocation command.

With reference to the first aspect or one of the first to tenth possible implementation manners of the first aspect, in an eleventh possible implementation manner, the method for processing a deallocation command further includes: and responding to the received read command by inquiring the FTL table to obtain a physical address corresponding to the to-be-read logical address, and if the physical address is a first specified value indicating a de-allocation state, taking a second specified value as a response to the read command.

With reference to the first aspect or one of the first to tenth possible implementation manners of the first aspect, in a twelfth possible implementation manner, the method for processing a deallocation command further includes: and responding to the received read command, inquiring an FTL table to obtain a physical address corresponding to the to-be-read logical address, and if the physical address is a first specified value indicating the deallocation state, informing the host of the invalidity, the invalidity or the one or more deallocation states of the read logical address by using state information.

With reference to the twelfth possible implementation manner of the first aspect of the present invention, in a thirteenth possible implementation manner, the method for processing a deallocation command further includes: the driver of the host generates a read result or data provided to the application reading the logical address based on the notified state information.

When the method for processing the de-allocation command provided by the first aspect of the present invention is used to process the de-allocation command, the logical address range indicated by the de-allocation command is obtained according to the de-allocation command, then the FTL table is updated, the entry of the FTL table corresponding to the logical address range indicated by the de-allocation command is set to the first specified value, and then the execution of the de-allocation command is instructed to be completed.

A second aspect of the present invention provides a method of processing a read command, the method comprising: and responding to the received read command by inquiring the FTL table to obtain a physical address corresponding to the to-be-read logical address, and if the physical address is a first specified value indicating a de-allocation state, taking a second specified value as a response to the read command.

A third aspect of the invention provides a method of processing a read command, the method comprising: and responding to the received read command, inquiring an FTL table to obtain a physical address corresponding to the logical address to be read, and if the physical address is a first specified value indicating the deallocation state, informing the host of invalidity, invalidity or one or more deallocation states of the read logical address by using state information.

With reference to the third aspect of the present invention, in a first possible implementation manner, the method for processing a read command further includes: the driver of the host generates a read result or data provided to the application reading the logical address based on the notified state information.

A fourth aspect of the present invention provides a storage device, which includes an obtaining module, an updating module, and an indicating module, where the obtaining module is configured to obtain, according to a deallocation command, a logical address range indicated by the deallocation command; the updating module is used for updating the FTL table and setting the table entry of the FTL table corresponding to the logical address range indicated by the de-allocation command as a first designated value; the indication module is used for indicating the execution completion of the de-allocation command.

A fifth aspect of the present invention provides a storage device, which includes a control unit, an interface, a DRAM, and one or more NVMs, wherein the DRAM stores therein an FTL table, the interface is configured to exchange data with the control unit, and the control unit, in response to receiving a deallocation command, obtains a logical address range indicated by the deallocation command according to the deallocation command, and updates the FTL table, sets an entry of the FTL table corresponding to the logical address range indicated by the deallocation command to a first specified value, and indicates that execution of the deallocation command is completed.

A sixth aspect of the present invention provides a computer program which, when loaded into a storage device and executed on a control unit of the storage device, comprises computer program code to make the control unit execute the method of processing a deallocation command of the first aspect or one of the first to thirteenth possible implementations of the first aspect.

A seventh aspect of the present application provides a deallocation method, comprising: step S1, obtaining the logic address range indicated by the de-allocation command according to the de-allocation command; step S2, updating an FTL table, and setting the table entry of the FTL table corresponding to the logical address range indicated by the de-allocation command as a preset value, wherein the table entry of the FTL table is used for indicating the corresponding relation between the logical address and the physical address; step S3, in response to the FTL table update, updating an effective page table, where the effective page table is used to record the state of data stored in a physical page of the storage device; and step S4, responding to the update of the effective page table, and updating the effective page count table, wherein the effective page count table is used for recording the number of the physical pages in the effective state in the physical block, the large block or the physical block group.

With reference to the seventh aspect of the present invention, in a first possible implementation manner, the deallocation method further includes: step S5, in response to the update of the effective page counting table, updating the priority of the physical block, the big block or the physical block group, wherein the priority is the priority of the physical block, the big block or the physical block group when garbage collection operation is executed; and step S6, performing garbage collection operation on the physical block, the big block or the physical block group with the highest priority.

With reference to the seventh aspect or the first possible implementation manner of the seventh aspect, in a second possible implementation manner, the step S2 includes: multiple entries of the FTL table are updated at a time.

With reference to the second possible implementation manner of the seventh aspect of the present invention, in a third possible implementation manner, during the period when one CPU updates multiple entries of an FTL table, other CPUs are prevented from accessing entries of the FTL table being updated, or other CPUs are prevented from accessing entries of the FTL table being updated.

With reference to the third possible implementation manner of the seventh aspect of the present invention, in a fourth possible implementation manner, the entries of the FTL tables whose storage spaces are consecutive are updated each time, and during the period that one CPU updates the entries of the FTL tables whose storage spaces are consecutive, other CPUs are prevented from accessing the entries of the FTL table being updated, or other CPUs are prevented from accessing the entries of the FTL table being updated.

With reference to the seventh aspect or one of the first to fourth possible implementation manners of the seventh aspect, in a fifth possible implementation manner, in step S2, a memory space storing entries of a plurality of FTL tables is updated by using a DMA operation.

With reference to the seventh aspect of the present invention or one of the first to fifth possible implementation manners of the seventh aspect, in a sixth possible implementation manner, in step S2, the preset value is 0.

With reference to the seventh aspect or one of the first to sixth possible implementation manners of the seventh aspect, in a seventh possible implementation manner, in step S2, the logical address is an address of a logical page, and the physical address is an address of a physical page.

With reference to the seventh possible implementation manner of the seventh aspect of the present invention, in an eighth possible implementation manner, if a storage space corresponding to a logical page is the same as a storage space of a physical page, in an effective page table, each bit is used to indicate validity of one physical page.

With reference to the seventh possible implementation manner of the seventh aspect of the present invention, in a ninth possible implementation manner, if the storage space of the physical page can accommodate multiple logical pages, each bit in the valid page table is used to indicate the validity of the physical storage area corresponding to the logical address.

With reference to the seventh aspect or one of the first to ninth possible implementation manners of the seventh aspect, in a tenth possible implementation manner, in step S4, the valid page count table is an array, a linear table, or a linked list.

With reference to one of the first to tenth possible implementation manners of the seventh aspect of the present invention, in an eleventh possible implementation manner, in step S6, the physical block, large block, or physical block group with an effective page number of 0 is the physical block, large block, or physical block group with the highest priority.

With reference to the seventh aspect or one of the first to eleventh possible implementation manners of the seventh aspect, in a twelfth possible implementation manner, the deallocation method further includes: after step S2, feedback to the host that the deallocation command processing is complete; alternatively, after step S4, the deallocation command processing is completed is fed back to the host.

With reference to the seventh aspect or one of the first to twelfth possible implementation manners of the seventh aspect, in a thirteenth possible implementation manner, the deallocation method further includes: locking the table entry of the FTL table corresponding to the logical address range indicated by the deallocation command between step S1 and step S2; between step S2 and step S3, the entries of the FTL table corresponding to the logical address range indicated by the deallocation command are unlocked.

With reference to the seventh aspect or one of the first to thirteenth possible implementation manners of the seventh aspect, in a fourteenth possible implementation manner, the deallocation method further includes: between step S1 and step S2, entries of the deallocation table are cleared, wherein the entries of the deallocation table are used for storing information whether each logical address is allocated.

With reference to the fourteenth possible implementation manner of the seventh aspect of the present invention, in a fifteenth possible implementation manner, the deallocation method further includes: and after clearing the deallocation table, feeding back to the host that the deallocation command processing is completed.

With reference to the fourteenth or fifteenth possible implementation manners of the seventh aspect of the present invention, in a sixteenth possible implementation manner, the deallocation method further includes: the deallocation table is updated by a DMA operation.

An eighth aspect of the present invention provides a method of processing a read command, the method comprising: and in response to receiving a read command, judging whether the logical address read by the read command is allocated or not through a de-allocation table, wherein if the read logical address is not allocated, informing the host of the invalid, illegal or in one or more de-allocation states of the read logical address through state information.

With reference to the eighth aspect of the present invention, in a first possible implementation manner, the method for processing a read command further includes: the driver of the host generates a read result or data provided to the application reading the logical address based on the notified state information.

A ninth aspect of the present invention provides a method of processing a write command, the method comprising: in response to receiving the write command, a physical address is assigned for the write command, and the FTL table, the valid data unit count table, and the deallocation table are updated with the assigned physical address.

With reference to the ninth aspect of the present invention, in a first possible implementation manner, the method for processing a write command further includes: and responding to the received write command, writing data into the physical address after the FTL table is updated, and feeding back the completion of the write command processing to the host.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the description below are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.

FIG. 1 is a block diagram of a storage device;

FIG. 2 is a diagram illustrating an FTL table before processing a de-allocation command in accordance with a second embodiment of the present invention;

FIG. 3 is a diagram illustrating an effective page table before processing a deallocation command in accordance with a second embodiment of the present invention;

FIG. 4 is a diagram illustrating a valid page count table before a deallocation command is processed according to a second embodiment of the present invention;

FIG. 5 is a flowchart of a method for processing a deallocation command in accordance with a second embodiment of the present invention;

fig. 6 is a diagram illustrating FTL table after processing a de-allocation command according to the second embodiment of the present invention;

FIG. 7 is a diagram illustrating an effective page table after processing a deallocation command according to a second embodiment of the present invention;

FIG. 8 is a diagram illustrating a valid page count table after processing a deallocation command according to a second embodiment of the present invention;

FIG. 9 is a flowchart of processing a read command according to a second embodiment of the present invention;

FIG. 10 is a diagram illustrating a deallocation table before processing a deallocation command according to a third embodiment of the present invention;

FIG. 11 is a diagram illustrating a deallocation table after a deallocation command has been processed in accordance with a third embodiment of the present invention;

FIG. 12A is a flowchart of a method for processing a deallocation command according to a third embodiment of the present invention;

FIG. 12B is a flowchart of a method for responding to a read command according to a third embodiment of the present invention;

FIG. 12C is a flowchart of a method for responding to a write command according to a third embodiment of the present invention;

FIG. 13 is a schematic view of a fourth embodiment of the invention;

fig. 14 is a diagram illustrating FTL table before processing de-allocation command in the fourth embodiment of the present invention;

FIG. 15 is a diagram illustrating an example of an effective page table before processing a deallocation command according to a fourth embodiment of the present invention;

FIG. 16 is a diagram illustrating a valid page count table before a deallocation command is processed in accordance with a fourth embodiment of the present invention;

FIG. 17 is a flowchart of a method for processing a deallocation command according to a fourth embodiment of the present invention;

fig. 18 is a diagram illustrating FTL table after processing de-allocation command in the fourth embodiment of the present invention;

FIG. 19 is a diagram illustrating an effective page table after processing a deallocation command in accordance with a fourth embodiment of the present invention;

FIG. 20 is a diagram illustrating a valid page count table after a deallocation command is processed in accordance with a fourth embodiment of the present invention;

FIG. 21 is a flowchart illustrating a method of processing a deallocation command according to a fifth embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.

Example one

A table structure storing mapping information from logical addresses to physical addresses is called an FTL table. FTL tables are important metadata in solid state storage devices. The FTL table records address mapping relationship in units of data pages in the storage device. The FTL table comprises multiple entries (or called entries) of FTL table. In one example, each FTL table entry records a corresponding relationship between a logical page address and a physical page. In another example, the table entries of each FTL table record the correspondence between consecutive logical page addresses and consecutive physical pages. In another embodiment, the corresponding relationship between the logical block address and the physical block address is recorded in the entry of each FTL table. In still another example, the FTL table records the mapping relationship between logical block addresses and physical block addresses, and/or the mapping relationship between logical page addresses and physical page addresses.

In the deallocation command, a logical address range is described. After the de-allocation command is executed, there may be different effects. For example, (1) after executing the deallocation command, when reading the logical address range indicated by the deallocation command, the result is deterministic (before performing other write operations to that logical address range); (2) after executing the deallocation command, when reading the logical address range indicated by the deallocation command, the result is all 0's (before performing other write operations to that logical address range); (3) after the deallocation command is executed, the result obtained when reading the logical address range indicated by the deallocation command can be an arbitrary value (before performing other write operations to that logical address range). The effect of execution of the de-allocation command may be set or selected in the de-allocation command or other commands. By using the de-allocation command, the host can inform the solid state disk which logical address spaces no longer store valid data, so that the solid state disk does not need to move the invalid data when the storage space is recovered.

In the solid state disk, there are various methods of executing the deallocation command. To perform the deallocation operation, the FTL entry in the FTL table indicated by the logical address range described by the deallocation command is set to a special flag (e.g., 0). For example, the logical address range indicated by the deallocation command includes 0-7 and 100-. To execute the deallocation command, the contents of the entries in the FTL table that record logical addresses 0-7 and 100 and 103 are set to 0. So that when one or more of the logical addresses LBA 0-7 or LBA 100-. It will be appreciated that the logical address range indicated by the deallocation command may be of a different unit size than that of an entry of the FTL table. For example, in the deallocation command, one logical address corresponds to 512 bytes of memory, while in the FTL table, one entry corresponds to 4KB (kilobytes) of memory.

In the embodiment according to the present invention, the erasing or garbage collection operation is performed in units of physical blocks, large blocks, or physical block groups, and the following describes in detail the erasing or garbage collection operation performed in units of physical blocks and the method for processing the de-allocation command corresponding to the erasing or garbage collection operation performed in units of large blocks, and the method for processing the de-allocation command corresponding to the erasing or garbage collection operation performed in units of physical blocks can be obtained by referring to the two contents, which are not described herein again.

Example two

In this embodiment, the memory device executes an erase or garbage collection operation in units of physical blocks. In this embodiment, a corresponding relationship between a logical page address and a physical page is recorded in an entry of each FTL table. In the solid state disk, an FTL table, a valid page table and a valid page count table are maintained. Fig. 2 is a schematic diagram of an FTL table before processing a de-allocation command in this embodiment, where the FTL table indicates a correspondence relationship between a logical page address and a physical page address. Fig. 3 is a schematic diagram of the valid page table before processing the deallocation command in this embodiment (only the valid page table of the physical block associated with the FTL table in fig. 2 is shown in fig. 3), and the valid page table records the state of the data corresponding to the logical page stored in the corresponding physical block. Fig. 4 is a schematic diagram of the valid page count table before processing the deallocation command in this embodiment, and the number of physical pages in a valid state in each physical block is recorded in the valid page count table. It should be noted that, the valid bits marked by the horizontal lines in the valid page table shown in fig. 3 indicate the physical pages corresponding to the logical addresses LBA0-LBA7 shown in fig. 2, the other valid bits not marked by the horizontal lines indicate the physical pages corresponding to the other logical addresses, and the physical pages corresponding to the invalid bits are not referenced by any logical address. In the example of fig. 3, a bitmap is used as a data structure to indicate the validity of the various physical pages of a physical block, it being understood that a variety of other data structures may be used.

Referring to fig. 2, taking physical block 1 as an example, data with logical address "LBA 0" is stored in a physical page with physical address "PBA 1-4", and therefore, in the effective page table of physical block 1 shown in fig. 3, the state of the physical page with physical address "PBA 1-4" is valid (in fig. 3, the position of row 2, column 1 is indicated by "1"). While the physical page of physical block 1 shown in FIG. 2 having physical addresses "PBA 1-0" is not referenced by any logical address, the physical page of physical address "PBA 1-0" is invalid in the valid page table of physical block 1 shown in FIG. 3 (in FIG. 3, the position of row 1, column 1 is indicated by "0"). Other similar things are not described one by one here. Correspondingly, the valid page count table in fig. 4 indicates that 5 physical pages are currently valid in

physical block

0, 9 physical pages are currently valid in

physical block

1, 0 physical page is currently valid in

physical block

2, and 11 physical pages are currently valid in physical block 3.

In this embodiment, a physical storage area in the valid page table, in which each bit is used to indicate validity, may be determined according to a relationship between a storage space corresponding to the logical page and a storage space of the physical page.

In one example, the storage space corresponding to the logical page is the same as the storage space of the physical page, and 1 bit is used to indicate the state of the corresponding physical page in the valid page table, so as to reduce the occupation of the memory space. For example, a logical page in the FTL table corresponds to 4KB memory space, while the memory space of a physical page is also 4KB (including additional out-of-band memory space), in which case each bit in the valid page table indicates the status of one physical page.

In another example, the storage space corresponding to a logical page is different from the storage space of a physical page, for example, the storage space of a physical page can hold a plurality of logical pages, the logical page corresponds to a storage space of 4KB, and the storage space of a physical page can hold a plurality of logical pages (for example, 4), in which case, each bit in the valid page table indicates the validity of the physical storage region corresponding to the logical address. For example, if physical block 1 includes 512 physical pages, then the valid page table for physical block 1 includes 2048 bits. Similarly, the number of 4KB storage spaces currently stored in the physical block, which are referenced by logical addresses in the FTL table, is recorded in the valid page count table. For example, if physical block 1 includes 512 physical pages of size 16KB, and there are 9 LBAs in the FTL table corresponding to physical addresses belonging to physical block 1, the valid page count of physical block 1 is 9.

Fig. 5 is a flowchart of a method for processing a deallocation command according to this embodiment, and as shown in fig. 5, the method for processing a deallocation command according to this embodiment includes: in response to receiving the deallocation command, the logical address range(s) (e.g., LBA0-LBA3) indicated by the deallocation command is obtained.

Entries (see also fig. 2) of the FTL table corresponding to the logical address (es) (e.g., LBA0-LBA3) are locked to prevent Garbage Collection (GC) or other tasks from accessing these entries of the FTL table at the same time, and causing errors. Of course, locking is not necessary, and if there is no possibility that multiple tasks will access the same entry of the FTL table at the same time, no error will be caused even if locking is not performed.

Entries of the FTL table corresponding to the logical address (es) (e.g., LBA0-LBA3) are cleared or set to a specified value. At this time, zero or another specified value is taken as the physical address, indicating that reading the physical address will result in the value specified for executing the deallocation command (e.g., all 0's or all specified values).

Alternatively, when the logical address range(s) indicated by the deallocation command is LBA0-LBA3, the deallocation command processing completion can be fed back to the host after completing the clearing of the FTL table entries associated with logical addresses LBA0-LBA 3.

The entries of the locked FTL table are unlocked, thereby allowing other tasks to access these entries of the FTL table.

As another optional manner, according to the update of the entry of the FTL table, the valid page table of the physical block corresponding to the physical address of the entry of the updated FTL table is updated correspondingly. For example, fig. 6 is a schematic diagram of the FTL table after processing the de-allocation command in this embodiment. While fig. 2 shows the FTL table before processing the de-allocation command. Referring to FIG. 6, in response to entries of the FTL table corresponding to LBAs 0-LBA3 being cleared, physical addresses PBA1-4, PBA3-6, PBA1-9, and PBA1-10 no longer store valid data. FIG. 7 is a diagram illustrating an effective page table after processing the deallocation command in this embodiment. While figure 3 shows the valid page table before processing the deallocation command. Accordingly, as shown in FIG. 7, in the valid page table of physical block 1, the physical pages with addresses PBA1-4, PBA1-9 and PBA1-10 of physical block 1 become invalid (e.g., the corresponding bits are set to 0), and in the valid page table of physical block 3, the physical page with address PBA3-6 of physical block 3 becomes invalid.

Since the valid page in the physical block is changed, the valid page count table is updated accordingly. For example, fig. 8 is a schematic diagram of the valid page count table after processing the deallocation command in this embodiment. Fig. 4 is a schematic diagram of the valid page count table before processing the deallocation command in this embodiment. As shown in FIG. 8, in response to entries of the FTL table corresponding to LBAs 0-LBA3 being cleared, the valid page count of physical block 1 is changed from 9 to 6, and the valid page count of physical block 3 is changed from 11 to 10. The valid page count may be used to indicate the priority of the garbage collection operation. For example, when a garbage collection operation is performed, a physical block with a low valid page count is preferentially collected. Further, for a physical block having a valid page count of 0, an erase operation may be immediately performed to reclaim the storage space. As another example, in response to an update to the valid-page count table, the priority for garbage collection of the physical block for which the number of valid pages is updated is also updated. So that when performing a garbage collection operation, the physical blocks to be collected are selected according to their garbage collection priority. The physical blocks with the smaller number of effective pages are the higher the garbage collection priority is, and are collected first. In order to maintain the effective page count table, the effective page count table can be in various data structures such as an array, a linear table, a linked list and the like. Optionally, after the update of the valid page count table is completed, the deallocation command processing is fed back to the host.

After the deallocation command is processed by using the method for processing the deallocation command, before data is written into the logical address range indicated by the deallocation command, as shown in fig. 9, in response to receiving a read command, an FTL table is queried to obtain a physical address corresponding to the logical address to be read, and if the physical address is zero, all 0 s are used as a response to the read command. At this time, when the host reads an address to which the deallocation command is applied, a predetermined result, for example, all 0 s, will be obtained. Of course, the read logical address may be indicated to the host in other ways, e.g., the read data is not provided to the host, and the read logical address is informed to the host in the status information as invalid, illegal, or in one or more deallocated states. Further, the driver of the host generates read results or data to be provided to the application reading these addresses based on the state information notified by the storage device.

In the method for processing the de-allocation command, if the de-allocation command indicates a large number of logical address ranges (e.g., LBA 10000 to LBA 20000), it is time-consuming to clear the FTL table entries, and therefore, the update operation on the FTL table entries may be accelerated in various ways. For example, multiple FTL table entries are updated at a time, and during 1 CPU updating multiple FTL table entries, other CPUs are prevented from accessing the updated FTL table entries, or are not made to attempt to access the updated FTL table entries. As another example, DMA operations are used to update the memory space storing the plurality of FTL table entries. In still another example, FTL table entries with continuous storage space are updated each time, and during the period of updating FTL table entries with continuous storage space, other operations accessing FTL table entries are blocked to reduce random access to memory, so as to speed up the updating operation of FTL table entries.

Illustratively, the FTL table, the valid page table, and the valid page count table in this embodiment may all be stored in DRAM.

EXAMPLE III

In the third embodiment, in order to efficiently process the deallocation command, a deallocation table is also maintained. Furthermore, the de-allocation table is written into the NVM, so that when the system is restarted after abnormal power failure, a correct FTL table can be obtained through the information recorded by the de-allocation table.

FIGS. 10 and 11 are schematic diagrams of a deallocation table, wherein FIG. 10 is a schematic diagram of the deallocation table prior to processing a deallocation command in an embodiment of the present invention; FIG. 11 is a diagram illustrating a deallocation table after processing a deallocation command in an embodiment of the present invention. As shown in fig. 10 and 11, in the deallocation table, information is stored corresponding to whether each logical address in the FTL table is allocated. As an example, 1-bit storage space is provided in the de-allocation table for each logical address of the FTL table.

As shown in fig. 11, when a logical address has been allocated (i.e., the logical address has a valid physical address in the FTL table), the logical address is marked as "allocated" in the deallocation table (e.g., the corresponding 1-bit storage space is set to 0); when a logical address is not allocated or a deallocation command has been applied, the logical address is marked as "deallocated" in the deallocation table (e.g., the corresponding 1-bit memory space is set to 1).

Illustratively, in the de-allocation table shown in fig. 10 corresponding to the FTL table before processing the de-allocation command shown in fig. 2, all of the logical addresses LBA0 to LBA7 in the FTL table are allocated with valid physical addresses, and thus in the de-allocation table shown in fig. 10, all of LBA0 to LBA7 are marked as "allocated" (the corresponding 1-bit storage spaces are all set to 0). In response to receiving the deallocation command, during the execution of the deallocation command on the logical address range of LBAs 0-LBA3, as shown in FIG. 11, LBAs 0-LBA3 in the deallocation table are all marked as "deallocated" (the corresponding 1-bit storage spaces are all set to 1), while LBAs 4-LBA 7 in the deallocation table are still marked as "allocated" (the corresponding 1-bit storage spaces are all set to 0). In the FTL table after processing the deallocation command as shown in FIG. 6, the physical address of the entry corresponding to logical addresses LBA0-LBA3 is set to 0. Correspondingly, the effective page table and the effective page count table are modified accordingly. As can be seen from fig. 3 and 7, the valid page tables of physical block 0 and physical block 1 are also updated accordingly, and similarly, as can be seen from fig. 4 and 8, the valid page count table is also updated accordingly.

The deallocation table in this embodiment is illustratively stored in DRAM. Optionally, the deallocation table in the DRAM is updated by a DMA operation.

FIG. 12A is a flowchart illustrating a method of processing a deallocation command according to a third embodiment of the present invention. In response to receiving the deallocation command (see 1210 in FIG. 12A), the logical address range indicated by the deallocation command (see 1212 in FIG. 12A) is obtained, e.g., the deallocation is to be performed for the logical address range of LBA0-LBA 3. The entries (see 1214 in FIG. 12A) of the deallocation table (see FIGS. 10 and 11) are updated according to the logical address range indicated by the deallocation command, e.g., the entries in the deallocation table shown in FIG. 11 that correspond to logical addresses LBA0-LBA3 are marked as "deallocated" (having a value of 1). After the deallocation table has been updated, the completion of the execution of the deallocation command is indicated to the host. Thus, in the third embodiment, the execution speed of the de-allocation command is greatly increased.

Next, according to the logical address range indicated by the deallocation command, the entries of the FTL table are updated, for example, FTL entries corresponding to one or more logical addresses indicated by the deallocation command are cleared or set to a specified value (see 1218 in fig. 12A). Optionally, before updating the FTL table, the entries of the FTL table corresponding to one or more logical addresses to be updated are also locked (see 1216 in fig. 12A), so as to avoid that other tasks read the FTL entries while the FTL entries are updated. And after the FTL table is updated, unlocking the entry of the FTL table corresponding to the updated one or more logical addresses (see 1220 in fig. 12A).

Accordingly, the valid page table (see 1222 in fig. 7 and 12A) and valid page count table (see 1224 in fig. 8 and 12A) of the physical block corresponding to the physical address of the entry of the FTL table being updated are also updated.

FIG. 12B is a flowchart illustrating a method for responding to a read command according to a third embodiment of the present invention. In the third embodiment, referring to fig. 12A, when the update of the deallocation table is completed, the host is informed that the execution of the deallocation command is completed. When the host thereafter reads the deallocated logical address, a specified indication, such as all 0 s, should be received. In FIG. 12B, in response to receiving a read command (see 1230 in FIG. 12B), the deallocation table (see FIG. 11) is queried to determine whether the logical address read by the read command is deallocated (see 1232 in FIG. 12B). If the deallocation table indicates that the read logical address is in the deallocated state, then all 0 s or other specified indications are used as a response to the read command (see 1234 in FIG. 12B). Only when the area allocation table indicates that the read logical address has been allocated, the FTL table is queried to obtain a physical address corresponding to the logical address to be read (see 1236 in fig. 12B), and data is read from the obtained physical address as a response to the read command (see 1238 in fig. 12B).

Alternatively, querying the deallocation table will increase the latency of a read operation, and it is not trivial for a read command to access an allocated logical address. To this end, the state that the solid-state storage device is executing the deallocation command is also recorded. In response to receiving the deallocation command (see 1210 in FIG. 12A), the storage device is marked as executing the deallocation command. In this case, if a read command is received, the deallocation table is first consulted (see 1232 in FIG. 12B). When the execution of the deallocation command is complete, such as after the execution of step 1218 or step 1220 in FIG. 12A is complete, the storage device is marked as having completed execution of the deallocation command. In this case, if the read command is received, step 1232 of fig. 12B is not necessarily performed, and step 1236 of fig. 12B is directly performed.

FIG. 12C is a flowchart illustrating a method for responding to a write command according to a third embodiment of the present invention. For the solid-state storage device which is not written with data, the deallocation table indicates that all the logical addresses are in the deallocation state. In response to the logical address being written with data, the table entry of the deallocation table corresponding to the logical address of the written data is modified to an allocated state. And in response to executing the deallocation command, the entry in the deallocation table for the deallocated logical address is again modified to a deallocation state. Referring to fig. 12C, when a write command is received (see 1240 in fig. 12C), a physical address is allocated for the write command, and the FTL table (see 1242 in fig. 12C) is updated with the logical address indicated by the write command and the allocated physical address. Data is written to the allocated physical address and the write command processing completion is fed back to the host (see 1244 in fig. 12C). Optionally, to reduce write command processing latency, after step 1242, the write command processing is fed back to the host before writing the data to the physical address. The valid page table and valid page count table (see 1246 in FIG. 12C) are also updated in response to the physical block being written with data. The de-allocation table is also updated, and the entry in the de-allocation table for the written logical address is set to allocated (see 1248 in FIG. 12C). In fig. 12C, the sequence of

steps

1244, 1246 and 1248 may be adjusted, and may be executed in parallel or simultaneously. Preferably, steps 1244, 1246 and 1248 occur after step 1242.

Example four

In the present embodiment, an erase or garbage collection operation is performed in units of large blocks in the storage device. FIG. 13 is a schematic diagram of a large block, constructed on every 16 Logical Units (LUNs) as shown in FIG. 13 by way of example. Each large block includes 16 physical blocks from each of 16 Logical Units (LUNs). In the example of FIG. 13, chunk 0 includes physical block 0 from each of the 16 Logical Units (LUNs), and chunk 1 includes physical block 1 from each Logical Unit (LUN).

In this embodiment, the table entry of each FTL table records the corresponding relationship between one logical address and a physical unit in one large block. Illustratively, in the FTL table, each logical address corresponds to 4KB of memory space, and each physical page in the NVM includes 4 physical units, each physical unit accommodating data corresponding to 1 logical address (optionally, further including out-of-band data such as check data). Fig. 14 is a schematic diagram of the FTL table before processing the deallocation command in this embodiment, and referring to fig. 14, PBAs 0-4 recorded in the FTL table indicate a physical unit with an address of 4 of chunk 0, PBAs 1-6 indicate a physical unit with an address of 6 of chunk 1, PBAs 0-9 recorded in the FTL table indicate a physical unit with an address of 9 of chunk 0, and PBAs 0-15 indicate a physical unit with an address of 15 of chunk 0. Of course, there are many other ways to construct the large block, and the description thereof is omitted.

As an alternative, the page stripes are constructed in large blocks, with physical pages of the same physical address within each Logical Unit (LUN) constituting a "page stripe". As shown in FIG. 13, physical pages 0-0, physical pages 0-1 … …, and physical pages 0-x comprise page stripe 0. Where physical pages 0-0, physical pages 0-1 … … physical pages 0-14 are used to store user data and physical pages 0-15 are used to store parity data calculated from all user data within the stripe. Of course, the physical page used to store parity data may be located anywhere in the page stripe, by way of example and not limitation. Similarly, in FIG. 13, physical pages 2-0, 2-1 … …, and 2-x constitute page strip 2.

In the present embodiment, a valid page table is provided for each large block for recording the state of data (data unit) corresponding to a logical address stored in the corresponding large block. Fig. 15 is a valid page table before the deallocation command is processed in this embodiment, it should be noted that in fig. 15, valid bits marked by horizontal lines in the valid page table indicate physical units corresponding to logical addresses LBA0 to LBA7 in the FTL table of fig. 14, other valid bits not marked by horizontal lines indicate physical units corresponding to other logical addresses, and physical units corresponding to invalid bits are not referenced by any logical address.

Referring to FIG. 15, taking chunk 0 as an example, the physical unit with physical address "PBA 0-4" stores data with logical address "LBA 0", so in the valid page table of chunk 0, the state of the physical unit with physical address "PBA 0-4" is valid (indicated by "1" in row 2, column 1 of the valid page table (chunk 0) in FIG. 15). While the physical location of chunk 0 shown in FIG. 15, which is addressed to "PBA 0-0", is not referenced by any logical address, the state of the physical location of address "PBA 0-0" is invalid in the valid page table of chunk 0 (indicated in FIG. 15 by "0" in column 1, row 1 of the valid page table (chunk 0)). Other similarities will not be described one by one here. Optionally, in the valid page table, 1 bit is used to indicate the state of a corresponding one of the physical units, so as to reduce the occupation of the memory space.

Fig. 16 is a valid page count table before the deallocation command is processed in the present embodiment, in which the number of physical units in the valid state in each chunk is recorded. Correspondingly, as shown in fig. 16, 9 physical units are currently valid in

chunk

0, 11 physical units are currently valid in

chunk

1, 0 physical unit is valid in

chunk

2, and 11 physical units are valid in chunk 3.

Fig. 17 is a flowchart of a method for processing a deallocation command according to this embodiment, and as shown in fig. 17, the method for processing a deallocation command according to this embodiment includes: in response to receiving the deallocation command (see 1710, FIG. 17), the logical address range(s) (e.g., LBAs 0-LBAs 3) indicated by the deallocation command is obtained (see 1720, FIG. 17).

Entries (see 1730 in fig. 17) of the FTL table corresponding to the logical address (es) (e.g., LBA0-LBA3) are locked (see 1730 in fig. 17) to prevent Garbage Collection (GC) or other tasks from accessing these entries of the FTL table at the same time and causing errors. Of course, locking is not necessary, and if there is no possibility that multiple tasks will access the same entry of the FTL table at the same time, no error will be caused even if locking is not performed.

Entries of the FTL table corresponding to the logical address (es) (e.g., LBA0-LBA3) are cleared or set to a specified value (see 1740 in fig. 17). At this time, zero or another specified value is used as the physical address, indicating that reading the physical address will acquire the value specified for executing the deallocation command (e.g., all 0's or all specified values).

Alternatively, when the logical address range(s) indicated by the deallocation command is LBA0-LBA3, the completion of the deallocation command processing may be fed back to the host after completing the clearing of the FTL table entries associated with logical addresses LBA0-LBA 3.

The entries of the locked FTL table are unlocked (see 1750 in fig. 17), thereby allowing other tasks to access these entries of the FTL table.

As another alternative, according to the update of the entry of the FTL table, the large-block valid page table corresponding to the physical address of the updated entry of the FTL table is updated accordingly (see 1760 in fig. 17). For example, fig. 18 is a schematic diagram of the FTL table after processing the de-allocation command in this embodiment. Fig. 14 is a schematic diagram of the FTL table before processing the de-allocation command in this embodiment. Referring to FIG. 18, in response to entries of the FTL table corresponding to LBA0-LBA3 being cleared, physical addresses PBA0-4, PBA1-6, PBA0-9, and PBA0-10 no longer store valid data. Accordingly, fig. 19 is a schematic diagram of the valid page table after processing the deallocation command in this embodiment. FIG. 15 is a diagram illustrating the processing of the valid page table before the deallocation command in this embodiment. As shown in FIG. 19, the physical locations of PBA0-4, PBA0-9, and PBA0-10 in the valid page table for chunk 0 become invalid (e.g., the corresponding bits are set to 0), while the physical location of PBA1-6 for chunk 1 in the valid page table for chunk 1 becomes invalid.

As the valid physical units in the large block change, the valid page count table is updated accordingly (see 1770 in fig. 17). For example, in response to the entries of the FTL tables corresponding to LBA0-LBA3 being cleared, fig. 20 is a schematic diagram of the valid page count table after processing the deallocation command in this embodiment. Fig. 16 is a diagram illustrating a valid page count table before the deallocation command is processed in this embodiment. As shown in FIG. 20, the valid page count for chunk 0 changes from 9 to 6, and the valid page count for chunk 1 changes from 11 to 10. The valid page count may be used to indicate the priority of the garbage collection operation. For example, when a garbage collection operation is performed, a large block having a low valid page count is preferentially collected. Further, for large blocks with a valid page count of 0, an erase operation may be performed immediately to reclaim storage space. As another example, in response to an update to the valid page count table, the priority for garbage collection of the large block whose number of valid pages is updated is also updated (see 1780 in fig. 17), so that when a garbage collection operation is performed, the large block to be collected is selected in accordance with the garbage collection priority of the large block. Wherein, the larger the block with less number of effective pages, the higher the garbage collection priority, the more the garbage is collected first. In order to maintain the effective page count table, the effective page count table can be in various data structures such as an array, a linear table, a linked list and the like. Optionally, after the update of the valid page count table is completed, the deallocation command processing is completed.

After the deallocation command is processed by using the method for processing a deallocation command according to the fourth embodiment of the present invention, before data is written into the logical address range indicated by the deallocation command, in response to receiving a read command, an FTL table is queried to obtain a physical address corresponding to the logical address to be read, and if the physical address is zero, all 0 s are used as a response to the read command. At this time, when the host reads the address corresponding to when the deallocation command is processed, a predetermined result, for example, all 0 s, will be obtained. Of course, the host may be indicated in other ways that the read logical address is deallocated, e.g., the host is not provided with the read data, and is informed with status information that the read logical address is invalid, illegal, or in one or more deallocated states. Further, the driver of the host generates read results or data to be provided to the application reading these addresses based on the state information notified by the storage device.

In the method for processing a deallocation command according to the fourth embodiment of the present invention, if the deallocation command indicates a large number of logical address ranges (e.g., LBA 10000 to LBA 20000), it is time-consuming to clear the entries of the FTL tables. The operation of updating the entries of the FTL table may be accelerated in various ways. For example, multiple FTL table entries are updated at a time, and during 1 CPU updating multiple FTL table entries, other CPUs are prevented from accessing the updated FTL table entries, or are not made to attempt to access the updated FTL table entries. As another example, DMA operations are used to update the memory space storing the plurality of FTL table entries. In still another example, entries of the FTL table with continuous storage space are updated each time, and during the period of updating entries of the FTL table with continuous storage space, other operations accessing entries of the FTL table are prevented to reduce random access to the memory, so as to speed up the updating operation of entries of the FTL table.

EXAMPLE five

In the fifth embodiment, the deallocation table shown in fig. 10 and 11 is used. In the deallocation table, information corresponding to whether each logical address in the FTL table is allocated is stored. As an example, 1 bit of memory space is provided in the de-allocation table for each logical address of the FTL table.

FIG. 21 is a flowchart illustrating a method of handling a deallocation command in accordance with a fifth embodiment of the present invention. In response to receiving the deallocation command (see 2110 in FIG. 21), the logical address range(s) (see 2112 in FIG. 21) indicated by the deallocation command is obtained, e.g., the deallocation is to be performed for the logical address range of LBA0-LBA 3. The entries (see 2114 in FIG. 21) of the deallocation table (see FIGS. 10 and 11) are updated according to the logical address range indicated by the deallocation command, e.g., the entries in the deallocation table shown in FIG. 11 that correspond to logical addresses LBA0-LBA3 are marked as "deallocated" (having a value of 1). After the deallocation table has been updated, the completion of the execution of the deallocation command is indicated to the host. Thus, in the fifth embodiment, the execution speed of the deallocation command is greatly improved.

Next, according to the logical address range indicated by the deallocation command, the entries of the FTL table are updated, for example, the FTL entries corresponding to one or more logical addresses indicated by the deallocation command are cleared or set to a specified value (see 2118 in fig. 21). Optionally, before updating the FTL table, the entries of the FTL table corresponding to one or more logical addresses to be updated are also locked (see 2116 in fig. 21), so as to avoid that other tasks read the FTL entries during the period when the FTL entries are updated. And after the FTL table is updated, further unlocking the entry of the FTL table corresponding to the updated one or more logical addresses (see 2120 in fig. 21).

Accordingly, the valid page table (see 2122 in fig. 7 and 21) and the valid page count table (see 2124 in fig. 8 and 21) of the large block corresponding to the physical address of the entry of the updated FTL table are also updated.

The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present invention, and shall cover the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims

1. A method for executing a deallocation command on a Solid State Disk (SSD) comprises:

acquiring a logical address range indicated by the de-allocation command according to the de-allocation command; setting or selecting an execution effect of the de-allocation command in the de-allocation command, wherein the execution effect of the de-allocation command refers to a result obtained when a logical address range indicated by the de-allocation command is read after the de-allocation command is executed, and the effect includes that a determined value, all 0 values or any value is obtained when the logical address range indicated by the de-allocation command is read after the de-allocation command is executed;

updating a deallocation table, when a logical address has been allocated, marking an entry in the deallocation table corresponding to the logical address range as allocated, and when the logical address is not allocated or a deallocation command has been applied, marking the logical address as deallocated in the deallocation table;

writing the de-allocation table into the NVM, and obtaining a correct FTL table through the information recorded by the de-allocation table when restarting after abnormal power failure;

after updating the deallocation table, indicating to the host that the deallocation command execution is complete;

updating the FTL table, and setting the table entry of the FTL table corresponding to the logical address range indicated by the de-allocation command as a first specified value;

when the FTL table is updated, and the entry of the FTL table corresponding to the logical address range indicated by the de-allocation command is set to a first specified value, the storage device is marked to finish executing the de-allocation command; under the condition that the storage device is marked to execute the de-allocation command, if the read command is received, firstly inquiring a de-allocation table, and only when the de-allocation table indicates that the read logical address is allocated, inquiring an FTL (flash translation layer) table to acquire a physical address corresponding to the logical address to be read;

under the condition that the storage device is marked to finish executing the de-allocation command, if a read command is received, directly querying an FTL (flash translation layer) table to acquire a physical address corresponding to a to-be-read logical address.

2. The method for the solid state disk to execute the deallocation command of claim 1, further comprising:

updating an effective data unit table, wherein the effective data unit table is used for recording the data state of each physical data unit of the storage equipment;

and updating the effective data unit counting table, wherein the effective data unit counting table is used for recording the number of the physical data units in an effective state in the physical block, the big block or the physical block group.

3. The method for the solid state disk to execute the deallocation command of claim 2, further comprising:

updating a first priority of the physical block, the large block or the physical block group according to the effective data unit counting table, wherein the first priority is the priority for executing garbage recycling operation;

and executing garbage collection operation according to the first priority.

4. Method for executing a deallocation command of a solid state disk according to claim 2 or 3,

after updating the valid data unit table, indicating that de-allocation command processing is complete; or,

after updating the valid data unit count table, the deallocation command processing is instructed to complete.

5. The method for the solid state disk to execute the deallocation command of claim 1, further comprising:

and responding to the received read command by inquiring an FTL table to obtain a physical address corresponding to the to-be-read logical address, and if the physical address is a first specified value indicating the de-allocation state, taking a second specified value as a response to the read command.

6. The method of claim 1, wherein the solid state disk executes the deallocation command, further comprising:

and responding to the received read command, inquiring an FTL table to obtain a physical address corresponding to the logical address to be read, and if the physical address is a first specified value indicating the deallocation state, informing the host of invalidity, invalidity or one or more deallocation states of the read logical address by using state information.

7. The storage device is characterized by comprising an acquisition module, an updating module and an indication module, wherein the acquisition module is used for acquiring a logical address range indicated by a de-allocation command according to the de-allocation command; setting or selecting an execution effect of a de-allocation command in the de-allocation command, wherein the execution effect of the de-allocation command refers to a result obtained when a logical address range indicated by the de-allocation command is read after the de-allocation command is executed, and the effect comprises that a determined value, all 0 values or any value is obtained when the logical address range indicated by the de-allocation command is read after the de-allocation command is executed;

a deallocation table updating module, configured to update the deallocation table, where when a logical address has been allocated, an entry in the deallocation table corresponding to the logical address range is marked as allocated, and when the logical address is not allocated or a deallocation command has been applied, the logical address is marked as deallocated in the deallocation table; writing the de-allocation table into the NVM, and obtaining a correct FTL table through the information recorded by the de-allocation table when the NVM is restarted after abnormal power failure;

after updating the de-allocation table, indicating the module to the host for indicating the completion of the execution of the de-allocation command;

the FTL table updating module is used for updating the FTL table and setting the table entry of the FTL table corresponding to the logical address range indicated by the de-allocation command as a first specified value;

when the FTL table is updated, and the entry of the FTL table corresponding to the logical address range indicated by the deallocation command is set to the first specified value, the storage device is marked to finish executing the deallocation command; under the condition that the storage device is marked to execute a de-allocation command, if a read command is received, firstly inquiring a de-allocation table, and only when the de-allocation table indicates that the read logical address is allocated, inquiring an FTL (flash translation layer) table to acquire a physical address corresponding to the logical address to be read;

8. A memory device comprising a control unit, an interface, a DRAM, and one or more NVMs, wherein the DRAM has an FTL table stored therein, the interface is configured to exchange data with the control unit, the control unit is configured to obtain a logical address range indicated by a deallocation command in response to receiving the deallocation command, update the deallocation table, mark an entry in the deallocation table corresponding to the logical address range as allocated when a logical address has been allocated, and mark the logical address as deallocated in the deallocation table when the logical address has not been allocated or the deallocation command has been applied; writing the de-allocation table into the NVM, and obtaining a correct FTL table through the information recorded by the de-allocation table when restarting after abnormal power failure;

setting or selecting an execution effect of the de-allocation command in the de-allocation command, wherein the execution effect of the de-allocation command refers to a result obtained when a logical address range indicated by the de-allocation command is read after the de-allocation command is executed, and the effect includes that a determined value, all 0 values or any value is obtained when the logical address range indicated by the de-allocation command is read after the de-allocation command is executed;