CN103019971A - Method of quickly responding to trim command, SSD (Solid State Disk) controller and system - Google Patents
Method of quickly responding to trim command, SSD (Solid State Disk) controller and system Download PDFInfo
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- CN103019971A CN103019971A CN2012104819874A CN201210481987A CN103019971A CN 103019971 A CN103019971 A CN 103019971A CN 2012104819874 A CN2012104819874 A CN 2012104819874A CN 201210481987 A CN201210481987 A CN 201210481987A CN 103019971 A CN103019971 A CN 103019971A
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Abstract
The invention provides a method of quickly responding to a trim command, an SSD (Solid State Disk) controller and a system. The method comprises the following steps: when the SSD controller receives the trim command issued by a host computer, the SSD controller acquires a logical address range signified by the trim command; the SSD controller modifies a state of a logical address signified by the trim command, and the state is set to be invalid; the SSD controller returns an answering signal meaning the trim command to be finished to the host computer; and after the trim command finishes the answering, the SSD controller selects a computer to modify a state of a physical address corresponding to the logical address, and the state is set to be invalid. According to the technical scheme provided by the invention, trim commands of multiple continuous large sections of data can be quickly executed, so that trim requests of the multiple large sections of data of the host computer are responded in a shorter period, the waiting time of a system is reduced and the command response efficiency is improved.
Description
Technical field
The present invention relates to technical field of memory, relate in particular to the SSD controller of a kind of method of quick response trim order and corresponding quick response trim order, respond the SSD system of trim order fast.
Background technology
Solid state hard disc (Solid State Disk, SSD) adopts non-volatile memory chip as storage medium, and physically these storage chips must carry out first erase operation before data writing.And before wiping, then need original active data on the storage block of storage chip is transferred to the other piece that has nuzzled up, this process is commonly referred to as garbage reclamation.The efficient of garbage reclamation directly affects the write performance of SSD, and garbage reclamation efficient is higher less to the impact of the write performance of SSD data writing on main frame.Garbage reclamation is most effective when the data on the piece are invalid data entirely.
For this reason, ATA(Advanced Technology Attachment, the Advanced Technology Attachment specification) newly-increased TRIM order in the agreement, it is no longer occupied that ATA TRIM order is that file system is used for which logical address of announcement apparatus, can be recovered as free space by equipment, concentrate at ata command, TRIM order is DATA MANAGEMENT SET(DMS just) subcommand of order, the DMS order is to be used for specially doing equipment optimization, when the feature of DMS attribute extreme lower position 1, transmission be exactly TRIM order;
This order issues by DATA MANAGEMENT SET order, ranges DMA(Direct Memory Access, direct memory access) protocol command.When deleted file, it is invalid one piece of data can be set as by this order, thereby improves the efficient of the follow-up garbage reclamation of SSD; Simultaneously, TRIM has reduced moving of invalid data, has reduced the wearing and tearing of storage chip, to improving the SSD life-span positive role is arranged also.
Generally speaking, the SSD controller is not immediately the physical block at TRIM data place to be carried out garbage reclamation when carrying out the TRIM order, otherwise the read/write that garbage reclamation is brought/wipe and will take long time (referring to patent CN200920227341.7 " a kind of eight channel SOC control chips for solid state hard disc " and patent US20120066447 " SCHEDULING OF I/O INAN SSD ENVIRONMENT ").The main operation of SSD controller is to revise the corresponding list item of related data, comprise the data mode table of logic-based allocation index and based on the physical state table of physical address, and when the regional extent of TRIM is very large, number of times and time that list item is revised are linear growth, and then can affect response time of order, so that order is finished is overtime; Even in the SSD controller, adopt caching technology, list item is buffered in wherein, when revising, only upgrades list item the data in the buffer memory, and can improve to a certain extent the order deadline, but still can not address the above problem at all.
Summary of the invention
For solving the technical matters that exists in the above-mentioned prior art, the invention provides the SSD controller of a kind of method of quick response trim order and corresponding quick response trim order, respond the SSD system of trim order fast, implement technical scheme provided by the present invention, can carry out rapidly continuously the trim order of a plurality of large segment datas, thereby respond in the short period of time the trim request of a plurality of large segment datas of main frame, reduce the stand-by period of system, improved command response efficient.
For solving the problems of the technologies described above, the invention provides a kind of method of quick response trim order, comprising:
When the solid-state hard disk SSD controller is received the trim order that main frame issues, obtain the ranges of logical addresses of this trim order indication;
The SSD controller is revised the state of the logical address of described trim order indication, and it is invalid that it is set to;
The SSD controller returns the answer signal that expression trim order is finished to main frame;
Trim order finish reply after, selected a good opportunity to carry out by the SSD controller state of physical address corresponding to described logical address made amendment, it is invalid that it is set to.
Wherein, described trim order finish reply after, selected a good opportunity to carry out by the SSD controller state of physical address corresponding to described logical address is made amendment, it is invalid that it is set to, comprise: do not issue at main frame in the situation of new trim order, the SSD controller is made amendment to the state of physical address corresponding to the logical address of described trim order indication, and it is invalid that it is set to; Perhaps when SSD was in idle state, the SSD controller was made amendment to the state of physical address corresponding to the logical address of described trim order indication, and it is invalid that it is set to.
Wherein, if the operation that the SSD controller is made amendment to the state of physical address corresponding to the logical address of described trim order indication is not yet finished, during the new trim order that receives that main frame issues, the then still operation of uncompleted modification physical address of SSD controller cache, the new trim order that the response main frame issues; And after described new trim order was finished, the SSD controller continued to carry out the still operation of uncompleted modification physical address.
Wherein, described SSD controller also comprises after main frame returns the answer signal that expression trim order finishes:
The SSD controller receives that main frame issues when writing the IO request, and the SSD controller obtains the physical address that can write;
The SSD controller issues write order, and the data that main frame issues are write the physical address that has distributed;
The SSD controller is revised logical address, and it is pointed to the physical address of new data writing, and this logical address of juxtaposition is effective;
The SSD controller is revised the status information of the physical address of new data writing, and it is labeled as effectively.
Wherein, described SSD controller is revised the status information of the physical address of new data writing, and also comprises after being labeled as it effectively: the SSD controller judges whether described logical address is before effective; If effectively, then revise the status information of original physical address, and it is labeled as invalid.
Wherein, described SSD controller also comprises after main frame returns the answer signal that expression trim order finishes:
The SSD controller is received main frame and is read the IO request, judges whether its logical address is before effective; If effectively, then SSD controller query mappings table obtains the residing physical address of data of host requests, and issues read command and read described data and return to main frame;
If invalid, then the SSD controller is set as determined value or arbitrary value according to the data content of setting described logical address, and data are returned to main frame.
Accordingly, the present invention also provides a kind of SSD controller of quick response trim order, comprising:
The logical address acquisition module is used for obtaining the ranges of logical addresses of this trim order indication when described SSD controller is received the trim order that main frame issues;
The logical address modified module is used for revising the state that described trim orders the logical address of indication according to the ranges of logical addresses that described logical address acquisition module obtains, and it is invalid that it is set to;
Trim command response module is used for behind the status modifier of described logical address modified module completion logic address, returns the answer signal that expression trim order is finished to main frame;
The physical address modified module, be used for described trim command response module finish to main frame reply after, select a good opportunity to carry out the state of physical address corresponding to described logical address made amendment, it is invalid that it is set to.
Wherein, described physical address modified module is used for not issuing in the situation of new trim order at main frame, and the SSD controller is made amendment to the state of physical address corresponding to the logical address of described trim order indication, and it is invalid that it is set to; Perhaps when SSD was in idle state, the SSD controller was made amendment to the state of physical address corresponding to the logical address of described trim order indication, and it is invalid that it is set to.
Wherein, described physical address modified module comprises:
Physical address is revised the unit, be used for described trim command response module finish to main frame reply after, select a good opportunity to carry out the state of physical address corresponding to described logical address made amendment, it is invalid that it is set to;
The retouching operation buffer unit, being used for revising the operation of being made amendment in the unit by the state of physical address corresponding to the logical address of described trim order indication at described physical address not yet finishes, during new trim order that described SSD controller receives again that main frame issues, buffer memory is the operation of uncompleted modification physical address still, and the new trim that issues for SSD controller response main frame orders; And after described new trim order is finished, control described physical address and revise the still operation of uncompleted modification physical address of unit continuation execution.
Wherein, described SSD controller also comprises:
Write the IO request processing module, be used for described SSD controller receive that main frame issues write the IO request time, write the IO request processing module and obtain the physical address that to write, issue write order, the data that main frame issues are write the physical address that has distributed and revised logical address, it is pointed to the physical address of new data writing, and revise the physical address of new data writing and the status information of logical address, it is labeled as effectively.
Whether wherein, the described IO request processing module of writing also is used for status information at the physical address of revising new data writing, and after being labeled as it effectively, judge before the described logical address effective; If effectively, then revise the status information of original physical address, and it is labeled as invalid.
Wherein, described SSD controller also comprises:
Read the IO request processing module, be used for receiving main frame at described SSD controller and read the IO request, judge whether its logical address is before effective; If effectively, then the query mappings table obtains the residing physical address of data of host requests, and issues read command and read described data and return to main frame; If invalid, then be set as determined value or arbitrary value according to the data content of setting described logical address, and data are returned to main frame.
Corresponding, the present invention also provides a kind of SSD system of quick response trim order, and described system comprises the SSD controller of SSD and aforesaid quick response trim order.
The SSD controller of the method for quick response trim order provided by the invention and corresponding quick response trim order, respond the SSD system of trim order fast, can carry out rapidly continuously the trim order of a plurality of large segment datas, all operations corresponding to trim order of avoiding SSD general in the prior art to finish a large segment data will take the technical matters of long period, thereby respond in the short period of time the trim request of a plurality of large segment datas of main frame, reduce the stand-by period of system, improved command response efficient.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, the below will do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art, apparently, accompanying drawing in the following describes only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing:
Fig. 1 is the method first embodiment schematic flow sheet of quick response trim order provided by the invention;
Fig. 2 is the method second embodiment schematic flow sheet of quick response trim order provided by the invention;
Fig. 3 is that main frame provided by the invention is write the IO schematic flow sheet;
Fig. 4 is that main frame provided by the invention is read the IO schematic flow sheet;
Fig. 5 is the SSD controller first example structure schematic diagram of quick response trim order provided by the invention;
Fig. 6 is the SSD controller second example structure schematic diagram of quick response trim order provided by the invention.
Embodiment
The SSD controller of the method for quick response trim order provided by the invention and corresponding quick response trim order, respond the SSD system of trim order fast, can carry out rapidly continuously the TRIM order of a plurality of large segment datas, thereby respond in the short period of time the TRIM request of a plurality of large segment datas of main frame, reduce the stand-by period of system, improved command response efficient.
Referring to Fig. 1, be the method first embodiment schematic flow sheet of quick response trim order provided by the invention, as shown in Figure 1, this method that responds fast the trim order comprises:
When step S101, SSD controller receive the trim order that main frame issues, obtain the ranges of logical addresses of this trim order indication.More specifically, the SSD controller can be revised two list items after carrying out trim, and it is invalid that the effective marker of data in the list item is set to, and these of two list items are based on the logical address index, and one is based on physical address index.For the SSD controller, the modification of logic-based allocation index list item (being the ranges of logical addresses of trim order indication) is continuous, and the efficient that list item is revised is higher; And be random based on the modification of physical address index, the efficient that list item is revised is lower;
Step S102, SSD controller revise the state of the logical address of described trim order indication, and it is invalid that it is set to;
Step S103, the SSD controller returns the answer signal that expression trim order is finished to main frame.More specifically, in the prior art, only have to finish when the SSD controller effective marker of logical address index and two list items of physical address index is put modification, just can send the answer signal that the trim order is finished to main frame; And in embodiments of the present invention, the SSD controller namely returns the answer signal that expression trim order is finished to main frame after the modification of finishing logical address index list item.Because for the SSD controller, the modification efficient of logic-based allocation index list item is higher; And lower based on the modification efficient of physical address index, so the SSD controller after the modification of finishing logical address index list item, namely returns expression trim to main frame and orders the answer signal of finishing can shorten greatly the response time that main frame trim is ordered;
Step S104, trim order finish reply after, selected a good opportunity to carry out by the SSD controller state of physical address corresponding to described logical address made amendment, it is invalid that it is set to.More specifically, in the present embodiment, for main frame, can think that order finishes as long as receive answer signal that the trim order of SSD controller feedback is finished, Host Command after this is based on all that state behind the trim operates.The SSD controller is based on the operation of the state table Change impact controller garbage reclamation of physical address, can place it in trim order finish reply after, by controller backstage select a good opportunity and trigger to carry out (under being in Idle state at SSD, or the TRIM order is carried out after finishing immediately).The like this trim order carried out of mode had both reached the effect that TRIM carries out, and had shortened again the response time of trim;
The method of quick response trim order provided by the invention, all operations corresponding to trim order of avoiding SSD controller general in the prior art to finish a large segment data will take the technical matters of long period (particularly finish the needed time is revised in the mark position of physical address), thereby can respond in the short period of time the trim request of main frame, reduce the stand-by period of system, improved command response efficient;
The method of the quick response trim order that a upper embodiment provides in actual applications, the SSD controller may appear when SSD is idle, carry out in the situation of (unmodified finishing) in the modification process of physical address state table of previous trim order, main frame issues again a new trim order;
For this problem, in method second embodiment of quick response trim order provided by the invention, will provide its settling mode;
Referring to Fig. 2, be the method second embodiment schematic flow sheet of quick response trim order provided by the invention, as shown in Figure 2, this method that responds fast the trim order comprises:
Step S201, the new trim order that SSD controller Receiving Host issues (in the present embodiment, main frame is called " new trim order " in the current trim order that issues, and the trim order that main frame was issued before described new trim order issues is called " previous trim order ")
Step S202, SSD controller judge the current modification of whether carrying out the physical address state table of previous trim order; If be judged as be, then execution in step S203; If be judged as no, execution in step S204 then;
Step S203, the SSD controller carries out buffer memory to the physical address state table retouching operation of uncompleted previous trim order;
More specifically, if the operation that the SSD controller is made amendment to the state of physical address corresponding to the logical address of previous trim order indication is not yet finished, during the new trim order that receives that main frame issues, the then still operation of uncompleted modification physical address of SSD controller cache, the new trim that issues with the response main frame orders; And after described new trim order was finished, the SSD controller continued to carry out the still operation of uncompleted modification physical address;
Step S204, SSD controller obtain the ranges of logical addresses of new trim order indication;
More specifically, the SSD controller can be revised two list items after carrying out new trim, and it is invalid that the effective marker of data in the list item is set to, and these of two list items are based on the logical address index, and one is based on physical address index.For the SSD controller, the modification of logic-based allocation index list item (being the ranges of logical addresses of trim order indication) is continuous, and the efficient that list item is revised is higher; And be random based on the modification of physical address index, the efficient that list item is revised is lower;
Step S205, SSD controller revise the state that described new trim orders the logical address of indication, and it is invalid that it is set to;
Step S206, the SSD controller returns the answer signal that the new trim order of expression is finished to main frame;
More specifically, in the prior art, only have to finish when the SSD controller effective marker of logical address index and two list items of physical address index is put modification, just can send the answer signal that the trim order is finished to main frame; And in embodiments of the present invention, the SSD controller namely returns the answer signal that expression trim order is finished to main frame after the modification of finishing logical address index list item.Because for the SSD controller, the modification efficient of logic-based allocation index list item is higher; And lower based on the modification efficient of physical address index, so the SSD controller after the modification of finishing logical address index list item, namely returns expression trim to main frame and orders the answer signal of finishing can shorten greatly the response time that main frame trim is ordered;
Step S207, new trim order finish reply after, selected a good opportunity to carry out by the SSD controller state of physical address corresponding to described logical address made amendment, it is invalid that it is set to.If before carrying out new trim order, the physical address state table retouching operation of the previous trim order of buffer memory is arranged, also needing selects a good opportunity finishes the operation of this buffer memory;
More specifically, the SSD controller is selected a good opportunity to carry out the state of physical address corresponding to logical address is made amendment, include but not limited to that the SSD controller does not issue in the situation of new trim order at main frame, or the SSD controller is under the idle state at SSD, the SSD controller is made amendment to the state of physical address corresponding to the logical address of trim order indication, and it is invalid that it is set to;
Further, in the present embodiment, for main frame, can think that order finishes as long as receive answer signal that the trim order of SSD controller feedback is finished, Host Command after this is based on all that state behind the trim operates.The SSD controller is based on the operation of the state table Change impact controller garbage reclamation of physical address, can place it in trim order finish reply after, by controller backstage select a good opportunity and trigger to carry out (under being in Idle state at SSD, or the TRIM order is carried out after finishing immediately).The like this trim order carried out of mode had both reached the effect that TRIM carries out, and had shortened again the response time of trim;
The method of quick response trim order provided by the invention, SSD controller can the uncompleted operations of buffer memory, then remove to carry out the logic mode correction of next trim order, until uncompleted operation before the continuation after finishing.Based on this, the SSD controller can be finished the continuously operation of the trim order of a plurality of large segment datas of main frame, thereby responds in the short period of time the trim request of a plurality of large segment datas of main frame, has reduced the stand-by period of system, improves command response efficient.
Better understand technical scheme of the present invention for ease of those skilled in the art, the present invention also provides main frame to write the schematic flow sheet that IO and main frame are read IO;
Referring to Fig. 3, for main frame provided by the invention is write the IO schematic flow sheet.As shown in the figure, this flow process comprises:
Step S301, SSD controller receive that main frame issues when writing the IO request, and the SSD controller obtains the physical address that can write for it;
Step S302, the SSD controller issues write order, and the data that main frame issues are write the physical address that has distributed;
Step S303, the SSD controller is revised logical address (namely revising mapping table), and it is pointed to the physical address of new data writing, and this logical address of juxtaposition is effective;
Step S304, the SSD controller is revised the status information of the physical address of new data writing, and it is labeled as effectively.
Further, based on first and second embodiment of method of quick response trim order provided by the invention, the flow process in the present embodiment also comprises:
Step S305, SSD controller whether effectively judge before the described logical address (data do not write or write but by TRIM cross then be considered as invalid); If effectively, execution in step S306 then;
Step S306 revises the status information of original physical address, and it is labeled as invalid.
Referring to Fig. 4, for main frame provided by the invention is read the IO schematic flow sheet.As shown in the figure, this flow process comprises:
Step S401, SSD controller receive main frame and read the IO request;
Step S402, SSD controller judge whether effective main frame is read before the logical address that IO request points to.If effectively, execution in step S403 then; If invalid, execution in step S405 then;
Step S403, SSD controller query mappings table obtains the residing physical address of data of host requests;
Step S404, SSD controller issue read command and read described data and return to main frame;
Step S405, the SSD controller is set as determined value or arbitrary value according to the data content of setting described logical address, and data are returned to main frame.
In conjunction with the various embodiments described above, it will be understood by those skilled in the art that, in the method for quick response trim order provided by the invention, the SSD controller is after the modification of finishing logical address index list item, namely return the answer signal that expression trim order is finished to main frame, to the status modifier of physical address by the execution of selecting a good opportunity of SSD controller, simultaneously, the SSD controller can these uncompleted operations of buffer memory, then go to carry out the logic mode correction that next trim orders, until uncompleted operation before the continuation after finishing.Based on this, the SSD controller can be finished the continuously operation of the trim order of a plurality of large segment datas of main frame, thereby responds in the short period of time the trim request of a plurality of large segment datas of main frame, has reduced the stand-by period of system, improves command response efficient.
Referring to Fig. 5, SSD controller the first example structure schematic diagram for quick response trim order provided by the invention, as shown in the figure, this SSD controller comprises: logical address acquisition module 1, logical address modified module 2, trim command response module 3 and physical address modified module 4;
Logical address acquisition module 1 is used for obtaining the ranges of logical addresses of this trim order indication when described SSD controller is received the trim order that main frame issues.More specifically, the SSD controller can be revised two list items after carrying out trim, and it is invalid that the effective marker of data in the list item is set to, and these of two list items are based on the logical address index, and one is based on physical address index.For the SSD controller, the modification of logic-based allocation index list item (being the ranges of logical addresses of trim order indication) is continuous, and the efficient that list item is revised is higher; And be random based on the modification of physical address index, the efficient that list item is revised is lower;
Logical address modified module 2 is used for revising the state that described trim orders the logical address of indication according to the ranges of logical addresses that described logical address acquisition module 1 obtains, and it is invalid that it is set to;
Trim command response module 3 is used for behind the status modifier of described logical address modified module 2 completion logic addresses, returns the answer signal that expression trim order is finished to main frame.More specifically, in the prior art, only have to finish when the SSD controller effective marker of logical address index and two list items of physical address index is put modification, trim command response module 3 just can send the answer signal that the trim order is finished to main frame; And in embodiments of the present invention, trim command response module 3 is namely returned the answer signal that expression trim order is finished to main frame after logical address modified module 2 is finished modification to logical address index list item.Because for the SSD controller, the modification efficient of logical address modified module 2 logic-based allocation index list items is higher; And physical address modified module 4 is lower based on the modification efficient of physical address index, so trim command response module 3 after logical address modified module 2 is finished modification to logical address index list item, is namely returned answer signal that expression trim order finishes to main frame and can be shortened greatly response time to main frame trim order;
Physical address modified module 4, be used for described trim command response module 3 finish to main frame reply after, select a good opportunity to carry out the state of physical address corresponding to described logical address made amendment, it is invalid that it is set to.More specifically, in the present embodiment, for main frame, can think that order finishes as long as receive answer signal that the trim order of trim command response module 3 feedback is finished, Host Command after this is based on all that state behind the trim operates.Physical address modified module 4 is based on the operation of the state table Change impact controller garbage reclamation of physical address, can place it in trim order and finish and select a good opportunity after replying and trigger and carry out (under being in Idle state at SSD, or the TRIM order is carried out after finishing immediately).The like this trim order carried out of mode had both reached the effect that TRIM carries out, and had shortened again the response time of trim;
The SSD controller of quick response trim order provided by the invention, all operations corresponding to trim order that can avoid SSD controller general in the prior art to finish a large segment data will take the technical matters of long period (particularly finish the needed time is revised in the mark position of physical address), thereby can respond in the short period of time the trim request of main frame, reduce the stand-by period of system, improved command response efficient.
The SSD controller of the quick response trim order that a upper embodiment provides in actual applications, the SSD controller may appear when SSD is idle, carry out in the situation of (unmodified finishing) in the modification process of physical address state table of previous trim order, receive again the new trim order that main frame issues.For this problem, in SSD controller second embodiment of quick response trim order provided by the invention, will provide its settling mode.Need to prove, the SSD controller of the quick response trim order that the present embodiment provides is particularly suitable for SSD and is used in conjunction with, and forms the fast SSD system of response trim order;
Referring to Fig. 6, be the SSD controller second example structure schematic diagram of quick response trim order provided by the invention.In the present embodiment, main frame is called " new trim order " in the current trim order that issues, the trim order that main frame was issued before described new trim order issues is called " previous trim order ".As shown in Figure 6, this SSD controller comprises equally: logical address acquisition module 1, logical address modified module 2, trim command response module 3 and physical address modified module 4.Module among described logical address acquisition module 1, logical address modified module 2, trim command response module 3 and the upper embodiment is basic identical, therefore repeat no more in the present embodiment, will describe emphatically the function and structure of physical address modified module 4 in the present embodiment;
Logical address acquisition module 1 is used for obtaining the ranges of logical addresses of this trim order indication when described SSD controller is received the trim order that main frame issues;
Logical address modified module 2 is used for revising the state that described trim orders the logical address of indication according to the ranges of logical addresses that described logical address acquisition module 1 obtains, and it is invalid that it is set to;
Trim command response module 3 is used for behind the status modifier of described logical address modified module 2 completion logic addresses, returns the answer signal that expression trim order is finished to main frame;
Physical address modified module 4, be used for described trim command response module 3 finish to main frame reply after, select a good opportunity to carry out the state of physical address corresponding to described logical address made amendment, it is invalid that it is set to;
More specifically, in the present embodiment, for main frame, can think that order finishes as long as receive answer signal that the trim order of trim command response module 3 feedback is finished, Host Command after this is based on all that state behind the trim operates.Physical address modified module 4 is based on the operation of the state table Change impact controller garbage reclamation of physical address, can place it in the trim order and finish to select a good opportunity to trigger after replying and carry out.Described select a good opportunity trigger to carry out include but not limited to: do not issue at main frame in the situation of new trim order and carry out; Perhaps when being in idle state, carries out SSD.The like this trim order carried out of mode had both reached the effect that TRIM carries out, and had shortened again the response time of trim;
Further, this physical address modified module 4 comprises:
Physical address is revised unit 41, be used for described trim command response module finish to main frame reply after, select a good opportunity to carry out the state of physical address corresponding to described logical address made amendment, it is invalid that it is set to;
Retouching operation buffer unit 42, be used for not yet finishing in the operation that the state of physical address corresponding to the logical address of the 41 pairs of described trim order indications in described physical address modification unit is made amendment, during new trim order that described SSD controller receives again that main frame issues, buffer memory is the operation of uncompleted modification physical address still, and the new trim that issues for SSD controller response main frame orders; And after described new trim order is finished, control described physical address and revise the unit 41 still operations of uncompleted modification physical address of continuation execution;
The method of quick response trim order provided by the invention, SSD controller can these uncompleted operations of buffer memory, then remove to carry out the logic mode correction of next trim order, until uncompleted operation before the continuation after finishing.Based on this, the SSD controller can be finished the continuously operation of the trim order of a plurality of large segment datas of main frame, thereby responds in the short period of time the trim request of a plurality of large segment datas of main frame, has reduced the stand-by period of system, improves command response efficient;
Preferably, the SSD controller that provides of the present embodiment can also comprise: write IO request processing module 5 and read IO request processing module 6;
Write IO request processing module 5, be used for described SSD controller receive that main frame issues write the IO request time, write the IO request processing module and obtain the physical address that to write, issue write order, the data that main frame issues are write the physical address that has distributed and revised logical address, it is pointed to the physical address of new data writing, and revise the physical address of new data writing and the status information of logical address, it is labeled as effectively;
Whether preferably, the described IO request processing module 5 of writing also is used for status information at the physical address of revising new data writing, and after being labeled as it effectively, judge before the described logical address effective; If effectively, then revise the status information of original physical address, and it is labeled as invalid.Writing 5 pairs of IO request processing module writes the processing procedure of IO request and can write the IO flow process referring to main frame as shown in Figure 3;
Read IO request processing module 6, be used for receiving main frame at described SSD controller and read the IO request, judge whether its logical address is before effective; If effectively, then the query mappings table obtains the residing physical address of data of host requests, and issues read command and read described data and return to main frame; If invalid, then be set as determined value or arbitrary value according to the data content of setting described logical address, and data are returned to main frame.Reading 5 pairs of IO request processing module reads the processing procedure of IO request and can read the IO flow process referring to main frame as shown in Figure 4;
The SSD controller of quick response trim order provided by the invention, it is after the modification of finishing logical address index list item, namely return the answer signal that expression trim order is finished to main frame, to the status modifier of physical address by the execution of selecting a good opportunity of SSD controller, simultaneously, the SSD controller can these uncompleted operations of buffer memory, then remove to carry out the logic mode correction of next trim order, until uncompleted operation before the continuation after finishing.Based on this, SSD controller provided by the invention can be finished the continuously operation of the trim order of a plurality of large segment datas of main frame, thereby respond in the short period of time the trim request of a plurality of large segment datas of main frame, reduced the stand-by period of system, improve command response efficient;
Need to prove, the SSD controller of the quick response trim order that the present embodiment provides is particularly suitable for SSD and is used in conjunction with, and forms the fast SSD system of response trim order.
One of ordinary skill in the art will appreciate that all or part of flow process that realizes in above-described embodiment method, to come the relevant hardware of instruction to finish by computer program, described program can be stored in the computer read/write memory medium, this program can comprise the flow process such as the embodiment of above-mentioned each side method when carrying out.Wherein, described storage medium can be magnetic disc, CD, read-only store-memory body (Read-Only Memory, ROM) or random store-memory body (Random Access Memory, RAM) etc.
Above content is in conjunction with concrete preferred implementation further description made for the present invention, can not assert that implementation of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, can also make some simple deduction or replace, all should be considered as belonging to protection scope of the present invention.
Claims (13)
1. a method that responds fast the trim order is characterized in that, comprising:
When the solid-state hard disk SSD controller is received the trim order that main frame issues, obtain the ranges of logical addresses of this trim order indication;
The SSD controller is revised the state of the logical address of described trim order indication, and it is invalid that it is set to;
The SSD controller returns the answer signal that expression trim order is finished to main frame;
Trim order finish reply after, selected a good opportunity to carry out by the SSD controller state of physical address corresponding to described logical address made amendment, it is invalid that it is set to.
2. the method for quick response trim order as claimed in claim 1 is characterized in that, described the trim order finish reply after, selected a good opportunity to carry out by the SSD controller state of physical address corresponding to described logical address made amendment, it is invalid that it is set to, and comprising:
Do not issue at main frame in the situation of new trim order, the SSD controller is made amendment to the state of physical address corresponding to the logical address of described trim order indication, and it is invalid that it is set to; Perhaps
When SSD was in idle state, the SSD controller was made amendment to the state of physical address corresponding to the logical address of described trim order indication, and it is invalid that it is set to.
3. the method for quick response trim order as claimed in claim 1, it is characterized in that, if the operation that the SSD controller is made amendment to the state of physical address corresponding to the logical address of described trim order indication is not yet finished, during the new trim order that receives that main frame issues, the then still operation of uncompleted modification physical address of SSD controller cache, the new trim order that the response main frame issues; And after described new trim order was finished, the SSD controller continued to carry out the still operation of uncompleted modification physical address.
4. such as the method for each described quick response trim order in the claims 1 to 3, it is characterized in that, described SSD controller also comprises after main frame returns the answer signal that expression trim order finishes:
The SSD controller receives that main frame issues when writing the IO request, and the SSD controller obtains the physical address that can write;
The SSD controller issues write order, and the data that main frame issues are write the physical address that has distributed;
The SSD controller is revised logical address, and it is pointed to the physical address of new data writing, and this logical address of juxtaposition is effective;
The SSD controller is revised the status information of the physical address of new data writing, and it is labeled as effectively.
5. the method for quick response trim order as claimed in claim 4 is characterized in that, described SSD controller is revised the status information of the physical address of new data writing, and also comprises after being labeled as it effectively:
The SSD controller judges whether described logical address is before effective; If effectively, then revise the status information of original physical address, and it is labeled as invalid.
6. such as the method for each described quick response trim order in the claims 1 to 3, it is characterized in that, described SSD controller also comprises after main frame returns the answer signal that expression trim order finishes:
The SSD controller is received main frame and is read the IO request, judges whether its logical address is before effective;
If effectively, then SSD controller query mappings table obtains the residing physical address of data of host requests, and issues read command and read described data and return to main frame;
If invalid, then the SSD controller is set as determined value or arbitrary value according to the data content of setting described logical address, and data are returned to main frame.
7. a SSD controller that responds fast the trim order is characterized in that, comprising:
The logical address acquisition module is used for obtaining the ranges of logical addresses of this trim order indication when described SSD controller is received the trim order that main frame issues;
The logical address modified module is used for revising the state that described trim orders the logical address of indication according to the ranges of logical addresses that described logical address acquisition module obtains, and it is invalid that it is set to;
Trim command response module is used for behind the status modifier of described logical address modified module completion logic address, returns the answer signal that expression trim order is finished to main frame;
The physical address modified module, be used for described trim command response module finish to main frame reply after, select a good opportunity to carry out the state of physical address corresponding to described logical address made amendment, it is invalid that it is set to.
8. the SSD controller of quick response trim order as claimed in claim 7 is characterized in that,
Described physical address modified module is used for not issuing in the situation of new trim order at main frame, and the SSD controller is made amendment to the state of physical address corresponding to the logical address of described trim order indication, and it is invalid that it is set to; Perhaps
When SSD was in idle state, the SSD controller was made amendment to the state of physical address corresponding to the logical address of described trim order indication, and it is invalid that it is set to.
9. the SSD controller of quick response trim order as claimed in claim 7 is characterized in that, described physical address modified module comprises:
Physical address is revised the unit, be used for described trim command response module finish to main frame reply after, select a good opportunity to carry out the state of physical address corresponding to described logical address made amendment, it is invalid that it is set to;
The retouching operation buffer unit, being used for revising the operation of being made amendment in the unit by the state of physical address corresponding to the logical address of described trim order indication at described physical address not yet finishes, during new trim order that described SSD controller receives again that main frame issues, buffer memory is the operation of uncompleted modification physical address still, and the new trim that issues for SSD controller response main frame orders; And after described new trim order is finished, control described physical address and revise the still operation of uncompleted modification physical address of unit continuation execution.
10. such as the SSD controller of each described quick response trim order in the claim 7 to 9, it is characterized in that, described SSD controller also comprises:
Write the IO request processing module, be used for described SSD controller receive that main frame issues write the IO request time, write the IO request processing module and obtain the physical address that to write, issue write order, the data that main frame issues are write the physical address that has distributed and revised logical address, it is pointed to the physical address of new data writing, and revise the physical address of new data writing and the status information of logical address, it is labeled as effectively.
11. the SSD controller of quick response trim order as claimed in claim 10, it is characterized in that, whether the described IO request processing module of writing also is used for status information at the physical address of revising new data writing, and after being labeled as it effectively, judge before the described logical address effective; If effectively, then revise the status information of original physical address, and it is labeled as invalid.
12. the SSD controller such as each described quick response trim order in the claim 7 to 9 is characterized in that, described SSD controller also comprises:
Read the IO request processing module, be used for receiving main frame at described SSD controller and read the IO request, judge whether its logical address is before effective; If effectively, then the query mappings table obtains the residing physical address of data of host requests, and issues read command and read described data and return to main frame; If invalid, then be set as determined value or arbitrary value according to the data content of setting described logical address, and data are returned to main frame.
13. a SSD system that responds fast the trim order is characterized in that, described system comprises SSD and the SSD controller of ordering such as each described quick response trim in the claim 7 to 12.
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