CN112765051B - Method, device and medium for reducing trim consumption of flash memory device - Google Patents

Method, device and medium for reducing trim consumption of flash memory device Download PDF

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Publication number
CN112765051B
CN112765051B CN202110093578.6A CN202110093578A CN112765051B CN 112765051 B CN112765051 B CN 112765051B CN 202110093578 A CN202110093578 A CN 202110093578A CN 112765051 B CN112765051 B CN 112765051B
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trim
flash memory
memory device
processing method
length
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CN112765051A (en
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曾裕
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Zhuhai Miaocun Technology Co ltd
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Zhuhai Miaocun Technology Co ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/063—Address space extension for I/O modules, e.g. memory mapped I/O
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G06F3/0616—Improving the reliability of storage systems in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0626—Reducing size or complexity of storage systems

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The invention relates to a method, a device and a medium for reducing trim consumption of a flash memory device, which comprises the following steps: analyzing the trim command received by the flash memory device to obtain the trim command length; comparing the length of the trim command with a set threshold, if the length of the trim command is less than the set threshold, executing a first trim processing method, and if the length of the trim command is more than or equal to the set threshold, executing a second trim processing method; wherein the first trim processing method performs trim processing by writing specific data to a logical address where trim is to be performed; and deleting the mapping relation of the logic address of the trim to be executed in the logic mapping table by the second trim processing method. The invention has the beneficial effects that: the write-in consumption of the small file trim command is reduced, and the performance and the service life of the NAND device are improved in the actual use process.

Description

Method, device and medium for reducing trim consumption of flash memory device
Technical Field
The invention relates to the field of computer storage equipment, in particular to a method, a device and a medium for reducing trim consumption of a flash memory device.
Background
The NAND (flash memory) device provides a trim (or discard, erase) mechanism, when a user deletes a file, an operating system can send a trim command to the NAND device, data stored before the trim can not be read by the trim address, and even if the trim is restarted after power failure, the data of the address still needs to be invalid. This requires that each time the NAND device processes a trim command, the processed result needs to be stored in the NAND device. For small files, an unmap (delete map) method is adopted and the map information is saved in the NAND device, which results in excessive write data volume and reduces the life and performance of the NAND device.
Disclosure of Invention
The invention aims to solve at least one of the technical problems in the prior art, and provides a method, a device and a medium for reducing the consumption of a trim of a flash memory device.
The technical scheme of the invention comprises a method for reducing trim consumption of a flash memory device, which is characterized by comprising the following steps: analyzing the trim command received by the flash memory device to obtain the trim command length; comparing the length of the trim command with a set threshold, if the length of the trim command is less than the set threshold, executing a first trim processing method, and if the length of the trim command is more than or equal to the set threshold, executing a second trim processing method; wherein the first trim processing method performs trim processing by writing specific data to a logical address where trim is to be performed; and deleting the mapping relation of the logical address of the trim to be executed in the logical mapping table by the second trim processing method.
According to the method for reducing the consumption of the flash memory device trim, the threshold value is set to be the length of N sectors, wherein N can be set in a self-defined mode.
The method of reducing trim consumption of a flash memory device according to, wherein the first trim processing method comprises: and writing specific data into the logical address of the to-be-executed trim by using a logical writing interface, and deleting the mapping relation of the logical address of the to-be-executed trim in the logical mapping table.
The method of reducing trim consumption of a flash memory device according to, wherein the second trim processing method comprises: and deleting the mapping relation of the logical address of the trim to be executed in the logical mapping table.
The method for reducing trim consumption of a flash memory device according to, wherein the method further comprises: and (3) refreshing all dirty logic mapping tables in the memory, and setting a check point, wherein the check point is used for data synchronization, so that the data processed by the trim is invalid when the flash memory device is electrified and restarted.
The invention also relates to a device for reducing trim consumption of a flash memory device, comprising a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor implements any of the method steps when executing the computer program.
The invention also relates to a computer-readable storage medium, in which a computer program is stored, which, when being executed by a processor, carries out any of the method steps.
The invention has the beneficial effects that: in the small file trim method, after specific data is written into trim addresses, the mapping relation of the logic addresses of trim to be executed is deleted in a logic mapping table; in the large file trim method, the mapping relation of the logic address of the trim to be executed is deleted in a logic mapping table, all dirty logic mapping tables in a memory are refreshed, and a check point is set so as to ensure that the trim still takes effect after power failure.
Drawings
The invention is further described below with reference to the accompanying drawings and examples;
FIG. 1 illustrates an overall flow diagram according to an embodiment of the invention;
FIG. 2 is a flow diagram illustrating trim processing according to an embodiment of the present invention;
fig. 3 shows a diagram of an apparatus according to an embodiment of the invention.
Detailed Description
Reference will now be made in detail to the present preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout.
In the description of the present invention, a plurality of means is one or more, a plurality of means is two or more, and greater than, less than, more than, etc. are understood as excluding the essential numbers, and greater than, less than, etc. are understood as including the essential numbers.
In the description of the present invention, the consecutive reference numbers of the method steps are for convenience of examination and understanding, and the implementation order between the steps is adjusted without affecting the technical effect achieved by the technical solution of the present invention by combining the whole technical solution of the present invention and the logical relationship between the steps.
In the description of the present invention, unless otherwise explicitly defined, terms such as set, etc. should be broadly construed, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the detailed contents of the technical solutions.
Fig. 1 shows a general flow diagram according to an embodiment of the invention, the flow comprising: analyzing the trim command received by the flash memory device to obtain the trim command length; comparing the length of the trim command with a set threshold, if the length of the trim command is less than the set threshold, executing a first trim processing method, and if the length of the trim command is more than or equal to the set threshold, executing a second trim processing method; the first trim processing method carries out trim processing by writing a logic address of the trim to be executed into specific data; and deleting the mapping relation of the logical address of the trim to be executed in the logical mapping table by the second trim processing method. The first trim processing method is used for processing small files, the second trim is used for processing large files, the large files are confirmed through the trim and a set threshold, and the set threshold can be set to be a plurality of sectors.
FIG. 2 is a flow diagram illustrating trim processing according to an embodiment of the present invention, the flow in FIG. 2 is summarized as follows: firstly, judging whether the trim operation belongs to a small file trim or a large file trim according to the data length of a trim command; for the small file trim, a logic writing interface is used for writing specific data (which is consistent with data read in an empty disk and is generally all '0' or all '1') into a logic address of the trim, the data of the address which is read again after the power failure restart is ensured to be invalid, and then the part of address unmap (a mapping relation is deleted) is used for reducing the data migration consumption in a GC (garbage collection mechanism); for a large file trim, the address unmap of the trim is needed directly, then all dirty logic mapping tables are refreshed, and finally a check point is set, so that when the power failure is restarted, the address of the trim is invalid.
Fig. 3 shows a diagram of an apparatus according to an embodiment of the invention. The apparatus comprises a memory 100 and a processor 200, wherein the processor 200 stores a computer program for performing: when a data reading request is sent to the storage device to the host, adding an MAC field in a data packet; the storage device receives the data packet and verifies whether the host is authorized. Wherein the memory 100 is used for storing data.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present invention.

Claims (6)

1. A method for reducing trim consumption of a flash memory device, the method comprising:
analyzing the trim command received by the flash memory device to obtain the trim command length;
comparing the length of the trim command with a set threshold, if the length of the trim command is less than the set threshold, executing a first trim processing method, and if the length of the trim command is more than or equal to the set threshold, executing a second trim processing method;
wherein the first trim processing method performs trim processing by writing specific data to a logical address where trim is to be performed; and deleting the mapping relation of the logical address of the trim to be executed in the logical mapping table by the second trim processing method.
2. The method of claim 1, wherein the set threshold is N sectors long, where N is customizable.
3. The method of reducing trim consumption of a flash memory device of claim 1, wherein the first trim processing method comprises:
and writing specific data into the logical address of the to-be-executed trim by using a logical writing interface, and deleting the mapping relation of the logical address of the to-be-executed trim in the logical mapping table.
4. The method of claim 1, further comprising: and (3) refreshing all dirty logic mapping tables in the memory, and setting a check point, wherein the check point is used for data synchronization, so that the data processed by the trim is invalid when the flash memory device is electrified and restarted.
5. An apparatus for reducing trim consumption of a flash memory device, the apparatus comprising a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor implements the method steps of any of claims 1-4 when executing the computer program.
6. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the method steps of any one of claims 1 to 4.
CN202110093578.6A 2021-01-22 2021-01-22 Method, device and medium for reducing trim consumption of flash memory device Active CN112765051B (en)

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CN113190472B (en) * 2021-05-27 2023-10-13 深圳忆联信息系统有限公司 Method and device for quickly reconstructing NOMAP information of solid-state storage equipment, computer equipment and storage medium

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