CN106951289A - A kind of online upgrading method, dsp controller and upgrade-system - Google Patents
A kind of online upgrading method, dsp controller and upgrade-system Download PDFInfo
- Publication number
- CN106951289A CN106951289A CN201710178931.4A CN201710178931A CN106951289A CN 106951289 A CN106951289 A CN 106951289A CN 201710178931 A CN201710178931 A CN 201710178931A CN 106951289 A CN106951289 A CN 106951289A
- Authority
- CN
- China
- Prior art keywords
- upgrading
- companion chip
- dsp controller
- dsp
- status register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Stored Programmes (AREA)
Abstract
The embodiment of the invention discloses a kind of online upgrading method, this method includes the bootstrap in leading address area in operation dsp controller；The application program in application address area is to initialize dsp controller and copy upgrading task program into the RAM of dsp controller in operation dsp controller, and, application address area is located in FLASH memory blocks built in upgrading task program in the application；The application program is run to judge whether to have in the companion chip online upgrading mark, the companion chip to show online upgrading mark after receiving the online upgrading order of host computer；If judging, the companion chip has online upgrading mark, jumps in the RAM of dsp controller to perform the upgrading task program；Operation is described to upgrade task program to control the dsp controller to obtain ROMPaq by the companion chip and be written in the application address area.The embodiment of the invention also discloses a kind of dsp controller and upgrade-system.The embodiment of the present invention can simplify updating operation and save storage resource.
Description
Technical field
The present invention relates to communication technical field, more particularly to a kind of online upgrading method, dsp controller and upgrade-system.
Background technology
Under normal circumstances, dsp software upgrading needs a Guide Engineering and an application project, and by means of emulator or
Serial ports realizes that dsp software is upgraded, but either all there is cumbersome, security not using the upgrading mode of emulator or serial ports
High the problem of.And the Guide Engineering of a burned solidification in many dsp chips, is carried out necessary during software upgrading to DSP
Traditional upgrade method is used according to the Guide Engineering of solidification, cause underaction of upgrading, it is limited using scope, although at present
Have using the method for setting up a new Guide Engineering in dsp, the guiding work of solidification is first carried out after electricity on DSP
Journey, then guiding performs new Guide Engineering and upgraded according to the upgrading mode of setting, but Guide Engineering new at present is equal
The single FLASH sectors of an independent memory space such as one are stored in, and general Guide Engineering is all smaller, takes one
Sector easily causes the wasting of resources, easily caused for big application program storage resource it is not enough in the case of.
In consideration of it, need at present it is a kind of can simplify updating operation and save storage resource online upgrading method, DSP control
Device and upgrade-system processed.
The content of the invention
In view of this, the embodiment of the present invention provides a kind of simplified updating operation and saves the online upgrading side of storage resource
Method, dsp controller and upgrade-system.
In a first aspect, the embodiments of the invention provide a kind of online upgrading method, for carrying out dsp controller in thread
Sequence is upgraded, and the dsp controller is connected by companion chip with host computer, and the companion chip is used to receive the host computer hair
The ROMPaq sent reads for the dsp controller, and methods described includes：Run leading address area in the dsp controller
Bootstrap to initialize the dsp controller；The application program in application address area in the dsp controller is run with initial
Change the dsp controller and copy upgrading task program into the RAM of the dsp controller, built in the upgrading task program
In the application program, the application address area is located in FLASH memory blocks；It is described auxiliary to judge to run the application program
Whether in chip have online upgrading mark, the companion chip to receive and show online after the online upgrading order of the host computer if helping
Upgrading mark；If judging, the companion chip has online upgrading mark, jumps in the RAM of the dsp controller to perform
The upgrading task program；Operation is described to upgrade task program to control the dsp controller to obtain by the companion chip
ROMPaq is simultaneously written in the application address area.
Preferably, the companion chip, which includes in status register, the status register, is provided with online upgrading mark
Will position, the companion chip to receive and show that online upgrading mark is specifically included after the online upgrading order of the host computer：Work as institute
Companion chip is stated to receive the online upgrading mark position in the status register after the online upgrading order of the host computer
Position；If described judge that the companion chip has online upgrading mark, jump in the RAM of the dsp controller to perform
Upgrading task program is stated to specifically include：If judging, the online upgrading flag bit in the status register of the companion chip has been put
Position, jumps in the RAM of the dsp controller to perform the upgrading task program.
Preferably, it is described to run the application program to judge whether have online upgrading mark specific in the companion chip
Including：The flag state of the online upgrading flag bit in the status register in the companion chip is read according to predetermined period；
Judge whether there is online upgrading mark in the companion chip according to the flag state of the online upgrading flag bit of reading.
Preferably, DSP ready flags position, data ready bit, DSP are additionally provided with the status register of the companion chip
Upgrading complement mark position, the operation is described to upgrade task program to control the dsp controller to obtain by the companion chip
Take ROMPaq and be written in the application address area and specifically include：Initialize the dsp controller and wipe the FLASH
The application program of memory block；DSP ready flags position in status register in companion chip described in set；Judge the auxiliary
Data ready flag bit in status register in chip whether set, the data register of the companion chip is in the shape
Frame data that host computer sends are received behind DSP ready flags position position in state register and by the data ready flag bit
Set, and the companion chip is after the data ready bit is eliminated and DSP upgrading complement marks position is not set
Shi Zaici receives next frame data that host computer is sent；If set, read from the data register in the companion chip
One frame data simultaneously remove the data ready flag bit in the status register；A frame data of the reading are parsed to obtain
To parsing information；Judge whether the parsing information is that upgrading finishes order；If the parsing information is not that upgrading finishes order,
Then the frame data read are write in the application address area according to the parsing information, and redirect execution and judge described auxiliary
The data ready flag bit helped in the status register in chip whether set the step of；If the parsing information is that upgrading is finished
DSP upgrading complement marks position in status register in order, companion chip described in set.
Preferably, the companion chip is FPGA..
Second aspect, the embodiments of the invention provide a kind of dsp controller, the dsp controller by companion chip with it is upper
Position machine connection, the companion chip is used for the ROMPaq for receiving the host computer transmission so that the dsp controller is read, institute
Stating dsp controller includes：Leading address area, application address area and RAM, the application address area are located in FLASH memory blocks, institute
State leading address area be used for store solidification bootstrap, the application address area is for storing application program, the application journey
Sequence is built-in with upgrading task program, and the RAM is used for the upgrading task program for storing copy, and the upgrading task program is used
In ROMPaq is write into the application address area, wherein, the leading address area is specifically included：First initialization unit, is used
In the initialization dsp controller；The application address area is specifically included：Second initialization unit, for initializing the DSP
Controller, the upgrading task program is built in the application program；Copy cell, for copying the upgrading task program
Into the RAM of the dsp controller；First judging unit, for judging whether there is online upgrading mark in the companion chip,
The companion chip shows online upgrading mark after receiving the online upgrading order of the host computer；First jump-transfer unit, is used for
If judging, companion chip has online upgrading mark, jumps in the RAM of the dsp controller to perform the upgrading task journey
Sequence；The RAM is specifically included：Acquiring unit, upgrading journey is obtained for controlling the dsp controller by the companion chip
Sequence；Writing unit, for the ROMPaq of acquisition to be written in the application address area.
Preferably, the companion chip, which includes in status register, the status register, is provided with online upgrading mark
Will position, by the online upgrading in the status register after companion chip receives the online upgrading order of the host computer
Flag bit set, first judging unit is specifically included：First reading unit, for reading the auxiliary according to predetermined period
The flag state of online upgrading flag bit in status register in chip；Identifying unit, for according to reading
The flag state of line upgrading flag bit judges whether there is online upgrading mark in the companion chip.
Preferably, DSP ready flags position, data ready bit, DSP are additionally provided with the status register of the companion chip
Upgrading complement mark position, the acquiring unit is specifically included：3rd initialization unit, at the beginning of being upgraded to dsp controller
Beginningization；Wipe unit, the application program for wiping the FLASH memory blocks；First set unit, for being aided in described in set
DSP ready flags position in status register in chip；Second judging unit, for judging the state in the companion chip
Data ready flag bit in register whether set, the data register of the companion chip is in the status register
Frame data that host computer sends are received behind the position of DSP ready flags position and by the data ready flag bit set, and institute
Companion chip is stated to receive again after the data ready bit is eliminated and when DSP upgrading complement marks position is not set
Next frame data that position machine is sent；Second reading unit, if for set, from the data register in the companion chip
Read a frame data；Clearing cell, for removing the shape after second reading unit reads a frame data
Data ready flag bit in state register；Said write unit is specifically included：Resolution unit, one for parsing the reading
Frame data with obtain parse information；3rd judging unit, for judging whether the parsing information is that upgrading finishes order；Burning
Unit, if not being that upgrading finishes order for the parsing information, according to the information that parses by the frame data read
Write in the application address area；Second jump-transfer unit, for will be answered when the burning unit described in frame data write-in
With the second judging unit is jumped to behind address area to perform the data ready judged in status register in the companion chip
Flag bit whether set the step of；The RAM also includes：Second set unit, if being that upgrading is finished for the parsing information
DSP upgrading complement marks position in status register in order, companion chip described in set.
Preferably, the companion chip is FPGA.
The third aspect, the embodiment of the present invention additionally provides a kind of upgrade-system, and the upgrade-system bag includes host computer, auxiliary
Chip and dsp controller as described above are helped, the dsp controller corresponds with the companion chip and carries out communication company
Connect, the companion chip is set up communication by network with the host computer and is connected；The dsp controller is used for having upgrade request
When by the companion chip obtain the ROMPaq from host computer and by the ROMPaq be written to application address area with
Realize online upgrading.
Dsp controller in the embodiment of the present invention carries out communication by companion chip and host computer and is connected, and by answering
With built-in upgrading task program in the application program in address area, the i.e. auxiliary wick when dsp controller has detected upgrade request
There is upgrading to indicate in piece, dsp controller from application address area jump to RAM in and perform the upgrading task program in RAM, and lead to
Cross and run upgrading task program control dsp controller by companion chip acquisition ROMPaq and be written to corresponding application ground
So as to complete online upgrading in the area of location.By built-in upgrading task program in the application, the long-range of dsp controller can be achieved
Online upgrading.Compared with prior art, it is not necessary to be electrically connected with dsp controller with emulator or serial ports, so as to simplify
Updating operation.Simultaneously as the upgrading task program is built in the application program in application address area, it is not necessary to extra to take
Single FLASH sectors, so as to save FLASH storage resources.
Brief description of the drawings
Technical scheme in order to illustrate more clearly the embodiments of the present invention, embodiment will be described below needed for be used
Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are some embodiments of the present invention, general for this area
For logical technical staff, on the premise of not paying creative work, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is a kind of schematic flow diagram of online upgrading method provided in an embodiment of the present invention；
Fig. 2 is the sub- schematic flow diagram of step S105 in Fig. 1；
Fig. 3 is a kind of schematic block diagram of dsp controller provided in an embodiment of the present invention；
Fig. 4 is a kind of schematic diagram of upgrade-system provided in an embodiment of the present invention；
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation is described, it is clear that described embodiment is a part of embodiment of the invention, rather than whole embodiments.Based on this hair
Embodiment in bright, the every other implementation that those of ordinary skill in the art are obtained under the premise of creative work is not made
Example, belongs to the scope of protection of the invention.
It should be appreciated that ought be in this specification and in the appended claims in use, term " comprising " and "comprising" be indicated
Described feature, entirety, step, operation, the presence of element and/or component, but be not precluded from one or more of the other feature, it is whole
Body, step, operation, element, component and/or its presence or addition for gathering.
It is a kind of schematic flow diagram of online upgrading method provided in an embodiment of the present invention referring to Fig. 1.As illustrated, should
Online upgrading method includes step S101~S105.
S101, runs the bootstrap in leading address area in the dsp controller to initialize the dsp controller.
Specifically, dsp controller supports IAP (programming of InApplication Programming application on site) function, and
Dsp controller is communicated to realize in sequence of threads upgrading for dsp controller by companion chip and host computer.Wherein, aid in
Chip need to have store function and network communicating function, and be embedded with network data transceiver module and data processing module.Network
The transmission of status information in reception and escalation process of the data transmit-receive module for dsp controller ROMPaq；Data processing mould
Block is used to pair to interact and processing with dsp controller data and status information.In embodiments of the present invention, the companion chip can be with
For FPGA (Field-Programmable Gate Array) field programmable gate array, RAM (random access
Memory) random access memory, MCU (Micro programmed Control Unit) microprogram control unit etc., are not limited herein
It is fixed.Companion chip can carry out network communication by wired mode or wireless mode with host computer and be connected.
After upper electricity or reset, dsp controller will run the bootstrap in leading address area to carry out just dsp controller
Beginningization, and after bootstrap has been performed, dsp controller will jump in application address area and perform application program.
S102, runs the application program in application address area in the dsp controller to initialize the dsp controller and copy
Shellfish upgrades task program into the RAM of the dsp controller, and the upgrading task program is built in the application program.
The memory space of dsp controller is divided into leading address area, tri- regions in application address area and RAM.Guiding ground
Location area is mutually non-overlapping with application address area, and leading address area and application address area are respectively positioned in FLASH memory blocks.Guiding ground
Location area is used for the bootstrap for storing solidification；Application address area is used to store application program, and the application program is built-in with upgrading and appointed
Business program；RAM is used for the upgrading task program for storing copy, and the upgrading task program is used to ROMPaq writing application address
Area.Needed when writing ROMPaq due to dsp controller by the original application program in the application address area in FLASH memory blocks
Wiped to write new ROMPaq, and due to upgrading built in task program in the application, once application program
It is wiped free of, upgrading task program can be also wiped free of, in order to prevent that upgrading task program is wiped free of, therefore in each run application journey
It is required for during sequence in copying upgrading task program to RAM areas from application address area.If it should be noted that in dsp controller
Including multiple RAM, then the size according to upgrading task program is needed optional one from the RAM that can store upgrading task program
So that upgrading task program is copied in selected RAM.
In embodiments of the present invention, upgrading task program includes API library function and online upgrading function.In the task that will upgrade
When program is copied in RAM, need to individually it be copied using different instructions for API library function and online upgrading function.
, it is necessary to enter line function definition in CMD files before carrying out API library function copy.Function definition in CMD files includes specifying
API library function preserves sector, the initial address of API library function, the end address of API library function and RAM in application address area
Run address.It is defined as follows：
MemCopy(&FLASH28_API_LoadStart,&FLASH28_API_LoadEnd,&FLASH28_API_
RunStart)；Then in upper electricity or reset initialization are to copy RAM to.Wherein, the main function of CMD files is to link up
The bridge of physical storage and logical address.
When being copied to online upgrading function, it is necessary to using #pragma CODE_SECTION orders, be specifically defined
It is as follows：#pragma CODE_SECTION (function name, " section name ").
S103, runs the application program to judge whether to have in the companion chip online upgrading mark, the auxiliary
Chip shows online upgrading mark after receiving the online upgrading order of the host computer.
Specifically, illustrated so that companion chip is FPGA as an example.Include 1 32 shape in FPGA data processing module
State register and 18 32 bit data registers.Data register is used to deposit the ROMPaq data received from host computer,
Status register is used to mark escalation process status information.If the SM set mode register data when data register has data
Thread position (Bit2), waits dsp controller to read.Each flag bit of status register represents implication and is defined as follows shown in table：
Wherein, set is typically by corresponding mark position 0 or puts 1.It is described as follows：
Bit0：FPGA judges whether to receive host computer online upgrading order, after online upgrading order is received, set
Upgrading flag bit in status register, i.e., put 1 by Bit0.
Bit1：FPGA initialization to data register and status register to carry out reset operation, while SM set mode is posted
FPGA ready flags position in storage, i.e., put 1 by Bit1.
Bit2：DSP ready flags position is effective, and data ready flag bit is invalid, and FPGA receives the frame that host computer is sent
Data, have received the data ready flag bit in SM set mode register after a frame data, i.e., Bit2 have been put into 1；DSP receive datas
Clear data ready flag position after, i.e., set to 0 Bit2.
Bit3~Bit5：If occur in escalation process it is abnormal, according to abnormal cause put corresponding failure code to Bit3~
Bit5。
Bit7：If dsp controller is read after online upgrading completion order data, the dsp controller set completion mark
Will position, i.e., put 1 by Bit7.
Bit8：After upgrading flag bit in dsp controller read status register is effective, dsp controller completes online
DSP ready flags position in the rearmounted bit status register of upgrading initialization, i.e., put 1 by Bit8.
In embodiments of the present invention, judge whether companion chip has online upgrading flag bit to specifically include：According to default week
Phase reads the flag state of the online upgrading flag bit in the status register in the companion chip；According to reading
Line upgrading flag bit flag state judge the online upgrading flag bit whether set.When the online upgrading in status register
Flag bit set, then have online upgrading flag bit in companion chip, then perform step S104, if in status register
Line upgrading flag bit does not have set, then does not have online upgrading flag bit in companion chip, then continue executing with step S103.
S104, jumps in the RAM of the dsp controller to perform the upgrading task program.
Specifically, when detected in step S103 in companion chip have online upgrading flag bit after, then dsp controller is redirected
Into RAM with the upgrading task program of execution copy.
S105, runs the upgrading task program and is upgraded with controlling the dsp controller to be obtained by the companion chip
Program is simultaneously written in the application address area.
Specifically, ROMPaq is used to upgrading to the application program in dsp controller and then realizing application program
Function upgrading and perfect.In embodiments of the present invention, reference picture 2, step S105 sub-process schematic diagram.Step S105 is specifically wrapped
Include step S201~S208.
S201：The application program of upgrading initialization and the erasing FLASH memory blocks is carried out to the dsp controller.
Specifically, application program is stored in the application address area in FLASH memory blocks, in certain embodiments can basis
The sector number in FLASH memory blocks shared by ROMPaq is to wipe FLASH memory blocks so as to obtaining and ROMPaq phase
The address space matched somebody with somebody, sector is the basic erasing unit in FLASH memory blocks.ROMPaq takes relative in FLASH memory blocks
The sector answered is stored.Because the size of ROMPaq may be not fully the integral multiple of sector-size, but in order to ensure
Enough address spaces are provided for ROMPaq, preferably according to all sector numbers occupied of the ROMPaq to FLASH memory blocks
Enter row address erasing.
S202：DSP ready flags position in status register in companion chip described in set.
Specifically, after the upgrading flag bit in dsp controller read status register, dsp controller passes through in state
Set mark is write in register to realize DSP ready flags position position.
S203：Judge data ready flag bit in the status register in the companion chip whether set, it is described auxiliary
The frame that host computer is sent is received after helping DSP ready flags position position of the data register of chip in the status register
Data and by the data ready flag bit set, and the companion chip is after the data ready bit is eliminated and described
DSP upgrading complement marks position receives next frame data of host computer transmission again when being not set.
Specifically, FPGA data register has been received data ready mark position after the frame data that host computer is sent
Position, dsp controller periodically judge data ready flag bit in status register in FPGA whether set, work as data ready
Flag bit set, then perform step S204.If without set, continuing executing with step S203.It should be noted that auxiliary
Chip is receiving the next of host computer transmission again after data ready bit is eliminated and when DSP upgrading complement marks position is not set
Frame data.
S204：A frame data are read from the data register in the companion chip and the Status register is removed
Data ready flag bit in device.
S205：A frame data of the reading are parsed to obtain parsing information.
Specifically, when host computer carries out ROMPaq write operation by FPGA to dsp controller, by by ROMPaq number
Transmitted according in the way of a frame data, i.e., FPGA data register receives a frame number of host computer transmission every time
According to rear, dsp controller obtains a frame data from the data register in FPGA and parses a frame data, so as to be somebody's turn to do
First address, offset address information, data length, data type, ending message that one frame data are stored in FLASH memory blocks etc.
Parse information.
S206：Judge whether the parsing information is that upgrading finishes order.
Specifically, if parsing information, which is data upgrading, finishes instruction, illustrate that ROMPaq has been received, then perform
Step S208；If the parsing information is not that upgrading finishes order, step S207 is performed.
S207：The frame data read are write in the application address area according to the parsing information, and redirects and holds
Row judge data ready flag bit in status register in the companion chip whether set the step of.
Specifically, if the parsing information is not that upgrading finishes order, illustrate that dsp controller is not upgraded also completion,
Then the frame data read are written in corresponding application address area according to the parsing information, and jump to S203 again
Perform judge data ready flag bit in status register in companion chip whether set, with etc. next frame number to be received
According to.
S208：DSP upgrading complement marks position in status register in companion chip described in set.
If it should be noted that occur in dsp controller escalation process it is abnormal, such as erasable FLASH memory blocks failure,
Deng pending data time-out etc., dsp controller can write corresponding DTC into status register, and dsp controller can be re-started
Wait is re-started upgrading by upgrading initialization, and FPGA sends fault message to host computer after receiving fault message, upper
Re-started after machine processing and issue ROMPaq data.
Dsp controller in the embodiment of the present invention carries out communication by companion chip and host computer and is connected, and by answering
With built-in upgrading task program in the application program in address area, the i.e. auxiliary wick when dsp controller has detected upgrade request
Have upgrading flag bit in piece, dsp controller from application address area jump to RAM in and perform the upgrading task program in RAM, and
Control dsp controller to obtain ROMPaq by companion chip by running the upgrading task program and be written to corresponding application
So as to complete online upgrading in address area.By built-in upgrading task program in the application, the remote of dsp controller can be achieved
Journey online upgrading.Compared with prior art, it is not necessary to be electrically connected with dsp controller with emulator or serial ports, so as to simplify
Updating operation.Simultaneously as the upgrading task program is built in the application program in application address area, it is not necessary to additionally account for
With single FLASH sectors, so as to save FLASH storage resources.
Reference picture 3, is a kind of schematic block diagram of dsp controller provided in an embodiment of the present invention.This reality as depicted
Applying the dsp controller 30 in example includes leading address area, application address area and RAM, and application address area is located at FLASH memory blocks
In.Leading address area be preferably placed in FLASH memory blocks and with application address area non-overlapping copies.Leading address area is used to store solid
The bootstrap of change, application address area is used to store application program, and the application program is built-in with upgrading task program, described
RAM is used for the upgrading task program for storing copy, and the upgrading task program is used to ROMPaq writing the application
Address area.
Wherein, leading address area specifically includes the first initialization unit 31, for initializing the dsp controller.
Application address area specifically includes the second initialization unit 32, copy cell 33, the first judging unit 34 and redirects list
Member 35.
Second initialization unit 32, for initializing the dsp controller.
Copy cell 33, for copying the upgrading task program into the RAM of the dsp controller.
First judging unit 34, for judging whether there is online upgrading mark in the companion chip, the companion chip
Online upgrading mark is shown after the online upgrading order for receiving the host computer.
First jump-transfer unit 35, if for judging that companion chip has online upgrading mark, jumping to the dsp controller
RAM in perform the upgrading task program.
Further, the companion chip, which includes in status register, the status register, is provided with online upgrading
Flag bit, by the online liter in the status register after companion chip receives the online upgrading order of the host computer
Level flag bit set, first judging unit 34 also includes the first reading unit 341 and identifying unit 342.
First reading unit 341, for read according to predetermined period in the status register in the companion chip
The flag state of line upgrading flag bit；
Identifying unit 342, the flag state for the online upgrading flag bit according to reading judges the online liter
Level flag bit whether set.
Acquiring unit 36 and writing unit 37 are specifically included in RAM.
Acquiring unit 36, ROMPaq is obtained for controlling the dsp controller by the companion chip；
Writing unit 37, for the ROMPaq of acquisition to be written in the application address area.
Further, the acquiring unit 36 is specifically included：3rd initialization unit 361, erasing unit 362, first are put
Bit location 363, the second judging unit 364, the second reading unit 365, clearing cell 366.
3rd initialization unit 361, for carrying out upgrading initialization to the dsp controller.
Wipe unit 362, the application program for wiping the FLASH memory blocks.
First set unit 363, for the DSP ready flags position in the status register in companion chip described in set.
Second judging unit 364, for judging the data ready flag bit in the status register in the companion chip
Whether set, the data register of the companion chip receives behind the DSP ready flags position position in the status register
Frame data that host computer is sent and by the data ready flag bit set, and the companion chip is in the data ready
Position is eliminated the next frame data for receiving host computer transmission when rear and described DSP upgradings complement mark position is not set again.
Second reading unit 365, if for set, described one is read from the data register in the companion chip
Frame data.
Clearing cell 366, for removing the Status register after second reading unit reads a frame data
Data ready flag bit in device.
Further, writing unit 37 specifically includes resolution unit 371, the 3rd judging unit 372, burning unit 373,
Two jump-transfer units 374 and the second set unit 375.
Resolution unit 371, for parsing a frame data of the reading with obtain parse information.
3rd judging unit 372, for judging whether the parsing information is that upgrading finishes order.
Burning unit 373, if not being that upgrading finishes order for the parsing information, will read according to the parsing information
The frame data got are write in the application address area.
Second jump-transfer unit 374, for after a frame data are write the application address area by the burning unit
Redirect perform judge data ready flag bit in status register in the companion chip whether set the step of.
Second set unit 375, if being that upgrading is finished in order, companion chip described in set for the parsing information
DSP upgrading complement marks position in status register.
Dsp controller in the embodiment of the present invention carries out communication by companion chip and host computer and is connected, and by answering
With built-in upgrading task program in the application program in address area, the i.e. auxiliary wick when dsp controller has detected upgrade request
Have upgrading flag bit in piece, dsp controller from application address area jump to RAM in and perform the upgrading task program in RAM, and
Control dsp controller to obtain ROMPaq by companion chip by running the upgrading task program and be written to corresponding application
So as to complete online upgrading in address area.By built-in upgrading task program in the application, the remote of dsp controller can be achieved
Journey online upgrading.Compared with prior art, it is not necessary to be electrically connected with dsp controller with emulator or serial ports, so as to simplify
Updating operation.Simultaneously as the upgrading task program is built in the application program in application address area, it is not necessary to additionally account for
With single FLASH sectors, so as to save FLASH storage resources.
Reference picture 4, is a kind of schematic diagram of upgrade-system provided in an embodiment of the present invention.As illustrated, the upgrade-system
40 include companion chip (not shown), dsp controller (not shown) and host computer 42.Companion chip and DSP
Controller corresponds and carries out communication connection, and companion chip is set up communication by network with the host computer and is connected.Use
When, companion chip and dsp controller are generally packaged into a terminal device 41, host computer 42 can be with one or more terminals
Equipment 41 carries out communication connection.When carrying out online upgrading to the dsp controller, dsp controller passes through the companion chip
Obtain the ROMPaq from host computer and be written to application address area to realize online upgrading by the ROMPaq.
It is apparent to those skilled in the art that, for convenience of description and succinctly, the control of foregoing description
The specific work process of device and unit processed, may be referred to the corresponding process in preceding method embodiment, will not be repeated here.
In several embodiments provided herein, it should be understood that disclosed controller and method, it can pass through
Other modes are realized.For example, appliance arrangement embodiment described above is only schematical, for example, the unit
Divide, only a kind of division of logic function there can be other dividing mode when actually realizing, such as multiple units or component
Another system can be combined or be desirably integrated into, or some features can be ignored, or do not perform.In addition, shown or beg for
The coupling each other of opinion or direct-coupling or communication connection can be by the indirect of some interfaces, appliance arrangement or unit
Coupling or communication connection or electricity, mechanical or other forms are connected.
Step in present invention method can according to actual needs the adjustment of carry out order, merge and delete.
Unit in embodiment of the present invention controller can be combined, divided and deleted according to actual needs.
The unit illustrated as separating component can be or may not be it is physically separate, it is aobvious as unit
The part shown can be or may not be physical location, you can with positioned at a place, or can also be distributed to multiple
On NE.Some or all of unit therein can be selected to realize first embodiment of the invention according to the actual needs
The purpose of scheme.
In addition, each functional unit in each embodiment of the invention can be integrated in a processing unit, can also
It is that unit is individually physically present or two or more units are integrated in a unit.It is above-mentioned integrated
Unit can both be realized in the form of hardware, it would however also be possible to employ the form of SFU software functional unit is realized.
If the integrated unit is realized using in the form of SFU software functional unit and as independent production marketing or used
When, it can be stored in a computer read/write memory medium.Understood based on such, technical scheme is substantially
The part contributed in other words to prior art, or all or part of the technical scheme can be in the form of software product
Embody, the computer software product is stored in a storage medium, including some instructions are to cause a computer
Equipment (can be personal computer, controller, or network equipment etc.) performs the complete of each embodiment methods described of the invention
Portion or part steps.And foregoing storage medium includes：USB flash disk, mobile hard disk, read-only storage (ROM, Read-Only
Memory), random access memory (RAM, RandomAccess Memory), magnetic disc or CD etc. are various can store journey
The medium of sequence code.
It is above the preferred embodiment of invention, rather than any formal limitation is done to invention.Those skilled in the art
Various equivalent changes and improvement, all equivalent changes done within the scope of the claims can be imposed on the basis of above-described embodiment
Change or modify, all should fall within the scope of invention.
Claims (10)
1. a kind of online upgrading method, for carrying out upgrading in sequence of threads to dsp controller, the dsp controller passes through auxiliary
Chip is connected with host computer, and the companion chip is used for the ROMPaq for receiving the host computer transmission so that the DSP is controlled
Device is read, it is characterised in that methods described includes：
The bootstrap in leading address area in the dsp controller is run to initialize the dsp controller；
Run the application program in application address area in the dsp controller and appointed with initializing the dsp controller and copy upgrading
Business program is into the RAM of the dsp controller, and the upgrading task program is built in the application program, the application ground
Location area is located in FLASH memory blocks；
The application program is run to judge whether to have in the companion chip online upgrading mark, the companion chip receives institute
Online upgrading mark is shown after the online upgrading order for stating host computer；
If judging, the companion chip has online upgrading mark, jumps in the RAM of the dsp controller to perform the liter
Level task program；
Operation is described to upgrade task program to control the dsp controller to obtain ROMPaq by the companion chip and write
Into the application address area.
2. the method as described in claim 1, it is characterised in that the companion chip includes status register, the state
Online upgrading flag bit is provided with register, the companion chip is shown in after receiving the online upgrading order of the host computer
Line upgrading mark is specifically included：By the Status register after companion chip receives the online upgrading order of the host computer
Online upgrading flag bit set in device；
If described judge that the companion chip has online upgrading mark, jump in the RAM of the dsp controller to perform
Upgrading task program is stated to specifically include：If judging, the online upgrading flag bit in the status register of the companion chip has been put
Position, jumps in the RAM of the dsp controller to perform the upgrading task program.
3. method as claimed in claim 2, it is characterised in that the operation application program is to judge the companion chip
In status register in online upgrading flag bit whether set is specifically included：
The flag state of the online upgrading flag bit in the status register in the companion chip is read according to predetermined period；
According to the flag state of the online upgrading flag bit of reading judge the online upgrading flag bit whether set.
4. method as claimed in claim 3, it is characterised in that be additionally provided with DSP in the status register of the companion chip
Ready flag position, data ready bit, DSP upgrading complement marks position, the operation is described to upgrade task program to control the DSP
Controller is obtained ROMPaq and is written in the application address area and specifically included by the companion chip：
Initialize the application program of the dsp controller and the erasing FLASH memory blocks；
DSP ready flags position in status register in companion chip described in set；
Judge data ready flag bit in the status register in the companion chip whether set, the number of the companion chip
According to receiving frame data that host computer sends behind DSP ready flags position position of the register in the status register and by institute
Data ready flag bit set is stated, and the companion chip is after the data ready bit is eliminated and the DSP has upgraded
Next frame data of host computer transmission are received when being not set into flag bit again；
If set, a frame data are read from the data register in the companion chip and the Status register is removed
Data ready flag bit in device；
A frame data of the reading are parsed to obtain parsing information；
Judge whether the parsing information is that upgrading finishes order；
If the parsing information is not that upgrading finishes order, the frame data read are write by institute according to the parsing information
State in application address area, and whether redirect the data ready flag bit in the status register for performing and judging in the companion chip
The step of set；
If the parsing information is that the DSP that upgrading is finished in the status register in order, companion chip described in set has upgraded
Into flag bit.
5. the method as described in claim any one of 1-4, it is characterised in that the companion chip is FPGA.
6. a kind of dsp controller, the dsp controller is connected by companion chip with host computer, the companion chip is used to connect
The ROMPaq of the host computer transmission is received so that the dsp controller is read, it is characterised in that the dsp controller includes：
Leading address area, application address area and RAM, the application address area are located in FLASH memory blocks, the leading address area
Bootstrap for storing solidification, the application address area is used to store application program, and the application program is built-in with upgrading
Task program, the RAM is used for the upgrading task program for storing copy, and the upgrading task program is used for ROMPaq
The application address area is write, wherein,
The leading address area is specifically included：
First initialization unit, for initializing the dsp controller；
The application address area is specifically included：
Second initialization unit, for initializing the dsp controller；
Copy cell, for copying the upgrading task program into the RAM of the dsp controller；
First judging unit, for judging whether there is online upgrading mark in the companion chip, the companion chip receives institute
Online upgrading mark is shown after the online upgrading order for stating host computer；
First jump-transfer unit, if for judging that companion chip has online upgrading mark, jumping to the RAM of the dsp controller
In to perform the upgrading task program；
The RAM is specifically included：
Acquiring unit, ROMPaq is obtained for controlling the dsp controller by the companion chip；
Writing unit, for the ROMPaq of acquisition to be written in the application address area.
7. dsp controller as claimed in claim 6, it is characterised in that the companion chip includes status register, described
Online upgrading flag bit is provided with status register, after the companion chip receives the online upgrading order of the host computer
By the online upgrading flag bit set in the status register, first judging unit is specifically included：
First reading unit, for reading the online upgrading mark in the status register in the companion chip according to predetermined period
The flag state of will position；
Identifying unit, the flag state for the online upgrading flag bit according to reading judges online described in companion chip
Upgrade flag bit whether set.
8. dsp controller as claimed in claim 7, it is characterised in that also set up in the status register of the companion chip
There are DSP ready flags position, data ready bit, DSP upgrading complement marks position,
The acquiring unit is specifically included：
3rd initialization unit, for carrying out upgrading initialization to the dsp controller；
Wipe unit, the application program for wiping the FLASH memory blocks；
First set unit, for the DSP ready flags position in the status register in companion chip described in set；
Whether the second judging unit, the data ready flag bit for judging in the status register in the companion chip is put
Position, the data register of the companion chip receives host computer behind the DSP ready flags position position in the status register
The frame data that send and by the data ready flag bit set, and the companion chip is clear in the data ready bit
Next frame data of host computer transmission are received when being not set except rear and described DSP upgrading complement marks position again；
Second reading unit, if for set, a frame data are read from the data register in the companion chip；
Clearing cell, for the number in the status register is removed after second reading unit reads a frame data
According to ready flag position；
Said write unit is specifically included：
Resolution unit, for parsing a frame data of the reading with obtain parse information；
3rd judging unit, for judging whether the parsing information is that upgrading finishes order；
Burning unit, if not being that upgrading finishes order for the parsing information, will read according to the parsing information
One frame data are write in the application address area；
Second jump-transfer unit, for jumping to institute after a frame data are write the application address area by the burning unit
State the second judging unit with perform judge data ready flag bit in status register in the companion chip whether set；
Second set unit, if being that upgrading finishes the state in order, companion chip described in set and posted for the parsing information
DSP upgrading complement marks position in storage.
9. the dsp controller as described in any one of claim 6~8, it is characterised in that the companion chip is FPGA.
10. a kind of upgrade-system, it is characterised in that including host computer, companion chip and as described in claim any one of 6-9
Dsp controller, the dsp controller corresponds with the companion chip and carries out communication and be connected, the companion chip with
The host computer sets up communication connection by network；The dsp controller is used to pass through the auxiliary wick when there is upgrade request
Piece obtains the ROMPaq from host computer and is written to application address area to realize online upgrading by the ROMPaq.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710178931.4A CN106951289B (en) | 2017-03-23 | 2017-03-23 | Online upgrading method, DSP controller and upgrading system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710178931.4A CN106951289B (en) | 2017-03-23 | 2017-03-23 | Online upgrading method, DSP controller and upgrading system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106951289A true CN106951289A (en) | 2017-07-14 |
| CN106951289B CN106951289B (en) | 2020-11-10 |
Family
ID=59473572
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710178931.4A Active CN106951289B (en) | 2017-03-23 | 2017-03-23 | Online upgrading method, DSP controller and upgrading system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106951289B (en) |
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107748670A (en) * | 2017-09-13 | 2018-03-02 | 国电南瑞科技股份有限公司 | Electric automobile DC charging module controller program on-line upgrading system |
| CN107885523A (en) * | 2017-11-10 | 2018-04-06 | 航宇救生装备有限公司 | A kind of serial ports upgrading software approach of fast and stable |
| CN108255538A (en) * | 2017-12-08 | 2018-07-06 | 中国航空工业集团公司成都飞机设计研究所 | A kind of method for loading two-level controller software on distributed delays System Computer in situ |
| CN109189461A (en) * | 2018-11-27 | 2019-01-11 | 上海辛格林纳新时达电机有限公司 | The programme upgrade method and elevator control system and lift facility of elevator control system |
| CN109491648A (en) * | 2018-11-19 | 2019-03-19 | 上海新时达电气股份有限公司 | The method and system and equipment of library function independent partitions in embedded software |
| CN109683941A (en) * | 2018-12-27 | 2019-04-26 | 四川九洲空管科技有限责任公司 | A kind of answering machine method for upgrading software based on single-chip on-line loaded |
| CN109710291A (en) * | 2018-12-27 | 2019-05-03 | 中国科学院长春光学精密机械与物理研究所 | A kind of aviation O-E Payload software configuration item remote upgrade method |
| CN109800007A (en) * | 2018-12-28 | 2019-05-24 | 航天信息股份有限公司 | Dsp chip online upgrading method and device |
| CN110609691A (en) * | 2018-06-15 | 2019-12-24 | 株洲中车时代电气股份有限公司 | Method for remotely updating DSP program |
| CN110659056A (en) * | 2019-09-28 | 2020-01-07 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | DSP program online updating circuit |
| CN112199109A (en) * | 2020-10-16 | 2021-01-08 | 杭州觅睿科技有限公司 | Firmware upgrading method, device, equipment and medium |
| CN112783519A (en) * | 2019-11-04 | 2021-05-11 | 航天科工惯性技术有限公司 | Application program updating method and system for measuring pup joint |
| CN112783531A (en) * | 2021-01-29 | 2021-05-11 | 湖北三江航天红峰控制有限公司 | Method for upgrading DSP (digital Signal processor) program through Ethernet under FPGA (field programmable Gate array) and DSP (digital Signal processor) framework |
| CN114112736A (en) * | 2020-08-28 | 2022-03-01 | 宝山钢铁股份有限公司 | Online measuring device and method for determining fracture elongation of low-carbon steel cold-rolled sheet |
| CN114281392A (en) * | 2022-03-04 | 2022-04-05 | 季华实验室 | Serial port upgrading method and system for multi-MCU slave station |
| CN112363746B (en) * | 2020-11-20 | 2023-06-02 | 清能德创电气技术（北京）有限公司 | Dual-core DSP online upgrading method |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030070029A1 (en) * | 2001-10-04 | 2003-04-10 | Alps Electric Co., Ltd. | Data transmission transceiver unit and program updating method therefor |
| CN101131648A (en) * | 2006-08-25 | 2008-02-27 | 深圳迈瑞生物医疗电子股份有限公司 | On-line updating method for USB interface control panel |
| CN103136028A (en) * | 2013-03-11 | 2013-06-05 | 西北工业大学 | FLASH memorizer long-distance on-line upgrade method based on field programmable gate array (FPGA) |
| CN105808283A (en) * | 2014-12-31 | 2016-07-27 | 海洋王照明科技股份有限公司 | Program updating method and device applicable to intelligent illumination equipment |
| CN105867977A (en) * | 2016-04-01 | 2016-08-17 | 天津七所精密机电技术有限公司 | DSP user program upgrading and Flash downloading method |
| CN106528203A (en) * | 2016-10-10 | 2017-03-22 | 上海无线电设备研究所 | Method for automatic program programming of multiple DSP chips |
-
2017
- 2017-03-23 CN CN201710178931.4A patent/CN106951289B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030070029A1 (en) * | 2001-10-04 | 2003-04-10 | Alps Electric Co., Ltd. | Data transmission transceiver unit and program updating method therefor |
| CN101131648A (en) * | 2006-08-25 | 2008-02-27 | 深圳迈瑞生物医疗电子股份有限公司 | On-line updating method for USB interface control panel |
| CN103136028A (en) * | 2013-03-11 | 2013-06-05 | 西北工业大学 | FLASH memorizer long-distance on-line upgrade method based on field programmable gate array (FPGA) |
| CN105808283A (en) * | 2014-12-31 | 2016-07-27 | 海洋王照明科技股份有限公司 | Program updating method and device applicable to intelligent illumination equipment |
| CN105867977A (en) * | 2016-04-01 | 2016-08-17 | 天津七所精密机电技术有限公司 | DSP user program upgrading and Flash downloading method |
| CN106528203A (en) * | 2016-10-10 | 2017-03-22 | 上海无线电设备研究所 | Method for automatic program programming of multiple DSP chips |
Cited By (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107748670A (en) * | 2017-09-13 | 2018-03-02 | 国电南瑞科技股份有限公司 | Electric automobile DC charging module controller program on-line upgrading system |
| CN107885523A (en) * | 2017-11-10 | 2018-04-06 | 航宇救生装备有限公司 | A kind of serial ports upgrading software approach of fast and stable |
| CN107885523B (en) * | 2017-11-10 | 2021-08-31 | 航宇救生装备有限公司 | Rapid and stable serial port software upgrading method |
| CN108255538A (en) * | 2017-12-08 | 2018-07-06 | 中国航空工业集团公司成都飞机设计研究所 | A kind of method for loading two-level controller software on distributed delays System Computer in situ |
| CN110609691A (en) * | 2018-06-15 | 2019-12-24 | 株洲中车时代电气股份有限公司 | Method for remotely updating DSP program |
| CN109491648A (en) * | 2018-11-19 | 2019-03-19 | 上海新时达电气股份有限公司 | The method and system and equipment of library function independent partitions in embedded software |
| CN109491648B (en) * | 2018-11-19 | 2022-05-17 | 上海新时达电气股份有限公司 | Method, system and equipment for realizing independent partition of library function in embedded software |
| CN109189461A (en) * | 2018-11-27 | 2019-01-11 | 上海辛格林纳新时达电机有限公司 | The programme upgrade method and elevator control system and lift facility of elevator control system |
| CN109710291A (en) * | 2018-12-27 | 2019-05-03 | 中国科学院长春光学精密机械与物理研究所 | A kind of aviation O-E Payload software configuration item remote upgrade method |
| CN109683941A (en) * | 2018-12-27 | 2019-04-26 | 四川九洲空管科技有限责任公司 | A kind of answering machine method for upgrading software based on single-chip on-line loaded |
| CN109710291B (en) * | 2018-12-27 | 2021-02-12 | 中国科学院长春光学精密机械与物理研究所 | Remote upgrading method for aviation photoelectric load software configuration items |
| CN109800007A (en) * | 2018-12-28 | 2019-05-24 | 航天信息股份有限公司 | Dsp chip online upgrading method and device |
| CN110659056A (en) * | 2019-09-28 | 2020-01-07 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | DSP program online updating circuit |
| CN110659056B (en) * | 2019-09-28 | 2022-12-13 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | DSP program online updating circuit |
| CN112783519B (en) * | 2019-11-04 | 2023-10-20 | 航天科工惯性技术有限公司 | Application program updating method and system for measuring nipple |
| CN112783519A (en) * | 2019-11-04 | 2021-05-11 | 航天科工惯性技术有限公司 | Application program updating method and system for measuring pup joint |
| CN114112736A (en) * | 2020-08-28 | 2022-03-01 | 宝山钢铁股份有限公司 | Online measuring device and method for determining fracture elongation of low-carbon steel cold-rolled sheet |
| CN114112736B (en) * | 2020-08-28 | 2023-11-14 | 宝山钢铁股份有限公司 | Online measuring device and method for determining fracture elongation of low-carbon steel cold-rolled sheet |
| CN112199109A (en) * | 2020-10-16 | 2021-01-08 | 杭州觅睿科技有限公司 | Firmware upgrading method, device, equipment and medium |
| CN112363746B (en) * | 2020-11-20 | 2023-06-02 | 清能德创电气技术（北京）有限公司 | Dual-core DSP online upgrading method |
| CN112783531A (en) * | 2021-01-29 | 2021-05-11 | 湖北三江航天红峰控制有限公司 | Method for upgrading DSP (digital Signal processor) program through Ethernet under FPGA (field programmable Gate array) and DSP (digital Signal processor) framework |
| CN114281392A (en) * | 2022-03-04 | 2022-04-05 | 季华实验室 | Serial port upgrading method and system for multi-MCU slave station |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106951289B (en) | 2020-11-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106951289A (en) | A kind of online upgrading method, dsp controller and upgrade-system | |
| KR100843280B1 (en) | Memory system and data transfer method thereof | |
| CN104200843B (en) | The burned device of flash memory, burned system and burned method | |
| US20180307496A1 (en) | Methods for gc (garbage collection) por (power off recovery) and apparatuses using the same | |
| US8266371B2 (en) | Non-volatile storage device, host device, non-volatile storage system, data recording method, and program | |
| CN102819442B (en) | A kind of method and system of embedded device program burn writing | |
| CN109284117A (en) | Firmware upgrade method and system and flash memory microcontroller based on flash memory microcontroller | |
| US8904094B2 (en) | Memory system in which extended function can easily be set | |
| CN110515641A (en) | The update method of server firmware, apparatus and system | |
| CN105718281A (en) | Touch screen firmware upgrading method and device | |
| US20130067455A1 (en) | Memory online update system and method | |
| CN102650949A (en) | Method and device for upgrading firmware of storage equipment | |
| CN107770299A (en) | A kind of MAC Address writes with a brush dipped in Chinese ink method, system, device and storage medium | |
| US20180275914A1 (en) | Methods for garbage collection and apparatuses using the same | |
| CN108132811B (en) | FPGA program data loading method and device | |
| CN107678770B (en) | Interface chip upgrading method and device, storage medium and processor | |
| CN105389268A (en) | Data storage system and operating method thereof | |
| CN109426511B (en) | Soft core updating method and system | |
| CN204155612U (en) | The burned device of flash memory and burned system | |
| CN102629212A (en) | Method for indirectly programming to NANDFLASH based on J-LINK | |
| US9052836B2 (en) | Memory system in which extension function can easily be set | |
| CN108334362A (en) | A kind of upgrade method of fpga chip, device and storage device | |
| CN107908418B (en) | Method for upgrading logic program of fiber channel node card and fiber channel bus equipment | |
| US8930613B2 (en) | Memory system in which extended function can easily be set | |
| CN108052337A (en) | A kind of firmware upgrade method and device of eMMC production tools |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |