CN105630700A - Storage system with second-level cache structure and reading/writing method - Google Patents
Storage system with second-level cache structure and reading/writing method Download PDFInfo
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- CN105630700A CN105630700A CN201510214742.9A CN201510214742A CN105630700A CN 105630700 A CN105630700 A CN 105630700A CN 201510214742 A CN201510214742 A CN 201510214742A CN 105630700 A CN105630700 A CN 105630700A
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Abstract
The invention provides a storage system with a second-level cache structure. The storage system comprises a host internal memory and a solid state hard disk, wherein the solid state hard disk comprises a main control chip, an NAND chip and an MRAM; the host internal memory comprises a read cache; and the MRAM comprises a write cache. The invention furthermore provides a reading/writing method which adopts the storage system with the second-level cache structure. According to the second-level cache structure and the reading/writing method which adopts the second-level cache structure, the reading operability is better; the MARM is used as the write cache, so that the data writing speed is greatly improved while the security of the data under the condition of unexpected outage is ensured; by using the read cache in the host internal memory, the limited MRAM space can be used as the write cache as much as possible, so that the cost is optimum and an expensive outage protection system is saved; and by using the MRAM as the write cache, the write frequency of the NAND is decreased, so that the NAND is protected and the service life of the NAND is prolonged. According to the storage system and the reading/writing method, a scheme with good cost-benefit ratio is provided.
Description
Technical field
The present invention relates to solid state hard disc, particularly relate to a kind of storage system with L2 cache structure and reading/writing method.
Background technology
Currently, the development of nand flash memory technology has promoted SSD industry. As it is shown in figure 1, use the technology such as HSSI High-Speed Serial Interface such as SATA, PICe between SSD and main frame. Internal by being used for storing one group of NAND chip of data, for supporting to calculate and data cached DDRDRAM (internal memory), and main control chip (SSDController) composition. Sometimes also need to circuit breaking protective system.
NAND is the storage device of a kind of monoblock read-write, the unit that minimum readable takes is page (page), minimum erasable unit is block (block), and a block is often made up of a lot of pages, and after block erasing, the page of the inside can carry out independent write operation. Write operation is very slow, more more slowly than reading, and it is more more slowly than write to wipe operation.
As in figure 2 it is shown, mobile phone is as follows with the file operation mode of computer:
(1) application software send to operating system open, close, reading and writing file instruction;
(2) file system portion in operating system is the instruction morphing instruction for reading and writing memory block of reading and writing file;
(3) NAND drives and manages software and accepts the instruction in read-write memory block district, carries out buffer memory, writes the optimizations such as equilibrium, sends to chip and read page, write the instructions such as block.
In mobile phone, NAND drives with management software usually used as the software module being closely related with operating system, runs on host chip; In a computer, NAND drives and generally runs on the main control chip of solid state hard disc with management software.
One problem of nand flash memory is that NAND has the limited life-span. The inside each page through certain number of times erasable after, will permanent failure can not be continuing with. The current trend of industry development is the capacity of NAND and packing density increases very fast, but to reduce the life-span for cost. Erasable number of times is reduced to about current 3000 time from initial 100,000 times.
Owing to the read or write speed of NAND is more more slowly than DRAM, it is also possible to utilize a part of dram space to make the buffer memory (Cache) of reading and writing, improve the performance of whole SSD. But introducing is write buffer memory and is created new problem: once there is power-off, the content not yet writing NAND in DRAM cache can be lost, and causes the damage of the even whole file system of system loss data. So costliness, bulky circuit breaking protective system (being generally made up of battery or substantial amounts of capacitor) must be used simultaneously. And logical-physical address synopsis, after there is power-off, the data being available with in NAND re-construct, although time consuming.
From described above it can be seen that the design of SSD encounters awkward: writing buffer memory if do not used, the write performance of product is had a greatly reduced quality; If using and writing buffer memory, it is necessary to use costliness to account for again the power-off protection equipment of volume, cause cost effectiveness very poor simultaneously.
MRAM is a kind of new internal memory and memory technology, it is possible to quick random read-write as SRAM/DRAM, it is also possible to forever retain data as Flash flash memory after a loss of power. The economy of MRAM is fairly good, and the silicon area that unit capacity takies has very big advantage than SRAM, also has superiority than NORFlash commonly used in this type of chip, and the advantage than embedded NOR Flash is bigger. The performance of MRAM is also fairly good, and read-write time delay is close to best SRAM, and power consumption is then best at various internal memories and memory technology. And MRAM is incompatible with standard CMOS semiconductor technique unlike DRAM and Flash. MRAM can be integrated in a chip with logic circuit.
Operating speed soon and keeps the MRAM of content can solve this problem as read-write cache after power-off; a kind of solid state hard disc mixing use DRAM and MRAM; as shown in Figure 3; or only use the solid state hard disc of MRAM; as shown in Figure 4; owing to MRAM can forever retain data after a loss of power as Flash flash memory, it is possible to do not use costliness, bulky circuit breaking protective system, thus reduce the cost of solid state hard disc.
But in following significant period of time, MRAM can than DRAM expensive a lot. Use substantial amounts of MRAM can dramatically increase the cost of product equally.
In order to improve overall performance, read and write is required for buffer memory; And the maximum value of MRAM is in that to be used as to write buffer memory, buffer memory is more big, and properties of product are more good, it is therefore desirable to find the buffer memory way that a cost effectiveness is high.
Therefore, those skilled in the art is devoted to develop the buffer structure that a kind of cost effectiveness is high, can either ensure readwrite performance, enables to again Optimum cost.
Summary of the invention
Because the drawbacks described above of prior art, the technical problem to be solved is to provide a kind of storage system with L2 cache structure, read operation performance can either be ensured, can ensure that data substantially increase the speed of data write under unexpected powering-off state while safety again; Optimum cost can also be made.
The present invention also provides for adopting reading method and the write method of the storage system with L2 cache structure of the present invention.
The present invention provides a kind of storage system, and including host memory and solid state hard disc, solid state hard disc includes main control chip, NAND chip and MRAM, and host memory includes reading buffer memory, and MRAM includes writing buffer memory.
Storage system provided by the invention, first host memory includes reading buffer memory, ensure that good read operation performance, owing to the speed of solid hard disk interface is generally slow than host memory interface rate, using the buffer memory ratio of reading in host memory to use the reading buffer memory in the DRAM/MRAM within solid state hard disc, read operation speed is faster; Secondly use MRAM as writing buffer memory, ensureing that data while data safety, also substantially increase the speed of data write under unexpected powering-off state; Host memory is used to do reading buffer memory, it is possible to make limited MRAM space be used as much as possible to write buffer memory so that Optimum cost.
Using MRAM to write buffer memory as NAND, not only speed is fast, and because safer when happening suddenly power-off, saves the circuit breaking protective system of costliness. Use MRAM to write number of times as what write that buffer memory also reduces NAND, serve protection it and the effect that increases the service life.
In a word, this is a good scheme of cost effectiveness.
Further, host memory also includes reading cache table, read cache table for store read every one page in buffer memory whether idle and busy time corresponding NAND page address.
Further, MRAM also includes writing cache table, write cache table for store write every one page in buffer memory whether idle and busy time corresponding NAND page address.
Further, MRAM is connected with the main control chip of solid state hard disc by DDRDRAM interface.
Further, MRAM is integrated in the main control chip of solid state hard disc.
The present invention provides the reading method of the storage system with L2 cache structure adopting the present invention, comprises the following steps:
(1) reading NAND page instruction is received;
(2) according to NAND page address, in reading cache table, whether search NAND page is in the reading buffer memory of host memory, if in reading buffer memory, from the corresponding data reading to read NAND page caching page, performs step (7); If not in reading buffer memory, perform step (3);
(3) according to NAND page address, in writing cache table, search for NAND page whether writing in buffer memory at MRAM, if in writing buffer memory, from writing the data reading NAND page buffer memory, perform step (5); If not in writing buffer memory, perform step (4);
(4) from NAND chip, read the data of NAND page;
(5) if reading do not have idle caching page of reading in buffer memory, buffer memory is read in cleaning;
(6) the data write free time of the NAND page read is read caching page;
(7) read operation terminates.
The present invention also provides for adopting the write method of the storage system with L2 cache structure of the present invention, comprises the following steps:
(1) receive and write NAND page instruction;
(2) according to NAND page address, in reading cache table, whether search NAND page is in the reading buffer memory of host memory, if in reading buffer memory, writes data in reading buffer memory and reads accordingly in caching page;
(3) according to NAND page address, in writing cache table, search for NAND page whether writing in buffer memory at MRAM, if in writing buffer memory, write data into write in buffer memory and write accordingly in caching page, perform step (6); If not in writing buffer memory, perform step (4);
(4) writing data into the free time writing buffer memory writes in caching page, by write cache table is write caching page respective record whether the free time is updated to busy;
(5) if the free time writing buffer memory writes caching page less than the first early warning value, buffer memory is write in cleaning;
(6) write operation terminates.
Compared with prior art, the storage system with L2 cache structure provided by the invention and reading/writing method have the advantages that
(1) first read operation performance is better, owing to the speed of solid hard disk interface is generally slow than host memory interface rate, uses the buffer memory ratio of reading in host memory to use the reading buffer memory in the DRAM/MRAM within solid state hard disc, and read operation speed is faster;
(2) secondly use MRAM as writing buffer memory, ensureing that data while safety, also substantially increase the speed of data write under unexpected powering-off state;
(3) the reading buffer memory in host memory is used, it is possible to make limited MRAM space be used as much as possible to write buffer memory. Make Optimum cost;
(4) using MRAM to write buffer memory as NAND, not only speed is fast, and because safer when happening suddenly power-off, save the circuit breaking protective system of costliness, also reduce power consumption simultaneously; Use MRAM to write number of times as what write that buffer memory also reduces NAND, serve protection it and the effect that increases the service life.
In a word, this is a good scheme of cost effectiveness.
Below with reference to accompanying drawing, the technique effect of the design of the present invention, concrete structure and generation is described further, to be fully understood from the purpose of the present invention, feature and effect.
Accompanying drawing explanation
Fig. 1 is the structural representation of solid state hard disc in prior art;
Fig. 2 is prior art file operational flowchart;
Fig. 3 is the structural representation that mixing uses the solid state hard disc of DRAM and MRAM;
Fig. 4 is the structural representation of the solid state hard disc using MRAM;
Fig. 5 is the structural representation of the storage system with L2 cache structure of one embodiment of the present of invention;
Fig. 6 is the read operation flow chart adopting the storage system with L2 cache structure shown in Fig. 5;
Fig. 7 is the write operation flow chart adopting the storage system with L2 cache structure shown in Fig. 5.
Detailed description of the invention
As shown in Figure 5, the storage system with L2 cache structure of one embodiment of the present of invention, including host memory DRAM and solid state hard disc, solid state hard disc includes main control chip, NAND chip and MRAM, host memory DRAM includes reading buffer memory, and MRAM includes writing buffer memory.
Host memory also includes reading cache table, read cache table for store read every one page in buffer memory whether idle and busy time corresponding NAND page address.
Read cache table and can also store read time or read operation frequency.
MRAM also includes writing cache table, write cache table for store write every one page in buffer memory whether idle and busy time corresponding NAND page address.
Write cache table and can also store write operation time or write operation frequency.
The storage system with L2 cache structure in the present embodiment, first read operation performance is better, owing to the speed of solid hard disk interface is generally slow than host memory interface rate, using the buffer memory ratio of reading in host memory to use the reading buffer memory in the MRAM within solid state hard disc, read operation speed is faster; Secondly use MRAM as writing buffer memory, ensureing that data while safety, also substantially increase the speed of data write under unexpected powering-off state; Use the reading buffer memory in host memory, it is possible to make limited MRAM space be used as much as possible to write buffer memory so that Optimum cost.
Using MRAM to write buffer memory as NAND, not only speed is fast, and because safer when happening suddenly power-off, saves the circuit breaking protective system of costliness. Use MRAM to write number of times as what write that buffer memory also reduces NAND, serve protection it and the effect that increases the service life.
Use DRAM and MRAM can also be mixed, as shown in Figure 3 inside solid state hard disc; MRAM can also be integrated in a chip with main control chip; The invention is not limited in this regard.
Adopt the reading method of the storage system with L2 cache structure of the present embodiment, as shown in Figure 6, comprise the following steps:
(1) reading NAND page instruction is received;
(2) according to NAND page address, in reading cache table, whether search NAND page is in the reading buffer memory of host memory, if in reading buffer memory, from the corresponding data reading to read NAND page caching page, performs step (7); If not in reading buffer memory, perform step (3);
(3) according to NAND page address, in writing cache table, search for NAND page whether writing in buffer memory at MRAM, if in writing buffer memory, from writing the data reading NAND page buffer memory, perform step (5); If not in writing buffer memory, perform step (4);
(4) from NAND chip, read the data of NAND page;
(5) if reading do not have idle caching page of reading in buffer memory, buffer memory is read in cleaning;
(6) the data write free time of the NAND page read is read caching page;
(7) read operation terminates.
Step (5) cleaning is read the method for buffer memory and be may comprise steps of:
(1) the release read operating time is the earliest or the minimum reading caching page of read operation frequency;
(2) by read cache table is read caching page relative recording whether the free time is updated to the free time.
Buffer memory is read in cleaning can also adopt additive method, the invention is not limited in this regard.
Adopt the write method of the storage system with L2 cache structure of the present embodiment, as it is shown in fig. 7, comprises following steps:
(1) receive and write NAND page instruction;
(2) according to NAND page address, in reading cache table, whether search NAND page is in the reading buffer memory of host memory, if in reading buffer memory, writes data in reading buffer memory and reads accordingly in caching page;
(3) according to NAND page address, in writing cache table, search for NAND page whether writing in buffer memory at MRAM, if in writing buffer memory, write data into write in buffer memory and write accordingly in caching page, perform step (6); If not in writing buffer memory, perform step (4);
(4) writing data into the free time writing buffer memory writes in caching page, by write cache table is write caching page respective record whether the free time is updated to busy;
(5) if the free time writing buffer memory writes caching page less than the first early warning value, buffer memory is write in cleaning;
(6) write operation terminates.
Step (2) write data in reading buffer memory in corresponding reading caching page, for keeping the data consistent reading the data in buffer memory with renewal.
Step (5) cleaning is write the method for buffer memory and be may comprise steps of:
(1) by the write operation time the earliest or the minimum data writing caching page of write operation frequency write back corresponding NAND page;
(2) caching page is write in release;
(3) by write cache table is write caching page relative recording whether the free time is updated to the free time.
Cleaning is write buffer memory and can also be adopted additive method, the invention is not limited in this regard.
The storage system with L2 cache structure provided by the invention and reading/writing method, first read operation performance is better, owing to the speed of solid hard disk interface is generally slow than host memory interface rate, using the buffer memory ratio of reading in host memory to use the reading buffer memory in the DRAM/MRAM within solid state hard disc, read operation speed is faster; Secondly use MRAM as writing buffer memory, ensureing that data while safety, also substantially increase the speed of data write under unexpected powering-off state; The reading buffer memory in host memory is used to read buffer memory, it is possible to make limited MRAM space be used as much as possible to write buffer memory. Make Optimum cost; Using MRAM to write buffer memory as NAND, not only speed is fast, and because safer when happening suddenly power-off, save the circuit breaking protective system of costliness, also reduce power consumption simultaneously; Use MRAM to write number of times as what write that buffer memory also reduces NAND, serve protection it and the effect that increases the service life; In a word, this is a good scheme of cost effectiveness.
The preferred embodiment of the present invention described in detail above. Should be appreciated that those of ordinary skill in the art just can make many modifications and variations according to the design of the present invention without creative work. Therefore, all technical staff in the art, all should in the protection domain being defined in the patent claims under this invention's idea on the basis of existing technology by the available technical scheme of logical analysis, reasoning, or a limited experiment.
Claims (7)
1. a storage system, it is characterised in that described storage system includes host memory and solid state hard disc, and described solid state hard disc includes main control chip, NAND chip and MRAM, described host memory includes reading buffer memory, and described MRAM includes writing buffer memory.
2. store system as claimed in claim 1, it is characterised in that described host memory also includes reading cache table, described reading cache table for store read every one page in buffer memory whether idle and busy time corresponding NAND page address.
3. store system as claimed in claim 1, it is characterised in that described MRAM also includes writing cache table, described in write cache table for store write every one page in buffer memory whether idle and busy time corresponding NAND page address.
4. store system as claimed in claim 1, it is characterised in that described MRAM is connected with the main control chip of described solid state hard disc by DDRDRAM interface.
5. store system as claimed in claim 1, it is characterised in that described MRAM is integrated in the main control chip of described solid state hard disc.
6. adopted the reading method of the storage system as described in any one of claim 1-5, it is characterised in that the reading method of described employing storage system comprises the following steps:
(1) reading NAND page instruction is received;
(2) according to described NAND page address, described NAND page is searched for whether in the reading buffer memory of host memory in reading cache table, if in described reading buffer memory, from corresponding described reading caching page, read the data of described NAND page, perform step (7); If not in described reading buffer memory, perform step (3);
(3) according to described NAND page address, in writing cache table, searching for described NAND page whether writing in buffer memory at MRAM, if writing in buffer memory described, from the described data write and read described NAND page buffer memory, performing step (5); If not writing in buffer memory described, perform step (4);
(4) from NAND chip, read the data of described NAND page;
(5) if reading that buffer memory does not have idle reading caching page, described reading buffer memory is cleared up;
(6) by described for the data write of the described NAND page read idle reading caching page;
(7) read operation terminates.
7. adopted the write method of the storage system as described in any one of claim 1-5, it is characterised in that the write method of described employing storage system comprises the following steps:
(1) receive and write NAND page instruction;
(2) according to described NAND page address, in reading cache table, search for described NAND page whether in the reading buffer memory of host memory, if in described reading buffer memory, write data in described reading buffer memory and read accordingly in caching page;
(3) according to described NAND page address, in writing cache table, search for described NAND page whether writing in buffer memory at MRAM, if writing in buffer memory described, writing described in writing data in buffer memory and writing accordingly in caching page, perform step (6); If not writing in buffer memory described, perform step (4);
(4) write data into described in write free time of buffer memory and write in caching page, by write write described in cache table caching page respective record whether the free time is updated to busy;
(5) if described in write free time of buffer memory and write caching page less than the first early warning value, write buffer memory described in cleaning;
(6) write operation terminates.
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| CN107832007A (en) * | 2017-10-25 | 2018-03-23 | 记忆科技(深圳)有限公司 | A kind of method of raising SSD combination properties |
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| CN112748859B (en) * | 2019-10-30 | 2023-03-21 | 上海磁宇信息科技有限公司 | MRAM-NAND controller and data writing method thereof |
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| CN117093159B (en) * | 2023-10-18 | 2024-01-26 | 同方威视科技江苏有限公司 | Method and apparatus for accelerating a storage device |
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