CN102752038A - Satellite responder - Google Patents
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- CN102752038A CN102752038A CN2012102228333A CN201210222833A CN102752038A CN 102752038 A CN102752038 A CN 102752038A CN 2012102228333 A CN2012102228333 A CN 2012102228333A CN 201210222833 A CN201210222833 A CN 201210222833A CN 102752038 A CN102752038 A CN 102752038A
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Abstract
The invention relates to a satellite responder, and belongs to the technical field of satellite measurement and control. The satellite responder comprises a reception channel part, a digital processing part, a transmission channel part and a frequency synthesizer, wherein the reception channel part comprises a lower frequency mixer A, a filter and a lower frequency mixer B; the digital processing part comprises an analogue-digital converter (A/D), a digital direct synthesizer DDS 1, a digital direct synthesizer DDS2 and a field programmable gate array (FPGA); the transmission channel part comprises a modulator; and the frequency synthesizer comprises a frequency doubling phase lock A, a frequency doubling phase lock B, a frequency doubling phase lock C, a frequency doubling phase lock D, a frequency shift phase lock A, a frequency shift phase lock B, a clock source selector and an upper mixer. By the digital technology provided by the invention, coherent forwarding functions and non-coherent forwarding functions are realized; spectrum purity and stability of a transmitter are improved; the satellite responder can be directly switched to an external high-stable clock source without converting frequency and generating phase noise loss; the phase nose characteristics of radio frequency are better; and costs are low.
Description
Technical field
The present invention relates to a kind of satellite transponder, belong to satellite survey control technology field.
Background technology
China has carried out the detector that development is upgraded at present, is used for remoter celestial body is surveyed, and comprises Venus, Mars, Jupiter etc.About 400,000 kilometers to the maximum distance of the earth on the moon, and Mars to the maximum distance of the earth about 400,000,000 kilometers, distance has been expanded 1000 times.So remote distance is had higher requirement to the sensitivity of answering machine on the star.According to budget, the sensitivity of answering machine need be superior to-150dBm on the star.And the receiving sensitivity that the present moonik CE-1/2 that has flown goes up answering machine has only reached-125dBm.
Summary of the invention
The objective of the invention is to propose a kind of satellite transponder in order to overcome the deficiency of prior art.
The objective of the invention is to realize through following technical scheme.
A kind of satellite transponder of the present invention comprises receive path part, digital processing part, transmission channel part and frequency synthesizer;
Receive path partly comprises down-conversion mixer A, filter and down-conversion mixer B; Up radiofrequency signal and frequency multiplication from the frequency synthesizer lock local oscillation signal 1 that sends of A mutually forms low frequency signal through the mixing of down-conversion mixer A; Low frequency signal is through filters; Through the signal of filters and the lock of shift frequency from frequency synthesizer mutually the local oscillation signal 2 that sends of A form intermediate-freuqncy signal and input to the digital processing part through the mixing of down-conversion mixer B;
The digital processes branch comprises analog digital converter A/D, digital frequency synthesizer DDS1, digital frequency synthesizer DDS2 and FPGA; Analog digital converter A/D receives the intermediate-freuqncy signal that partly passes over from receive path; Signal is carried out the A/D sampling, intermediate-freuqncy signal is become digital signal, then digital signal is flowed to FPGA; FPGA carries out Doppler tracking locking and demodulation to the digital signal that receives; Extract Doppler's composition, control figure frequency synthesizer DDS1 and DDS2, generate Doppler's reference signal 1 and Doppler's reference signal 2 respectively and flow to respectively the shift frequency lock mutually A lock B mutually with shift frequency; Doppler's reference signal 1 is relevant with the Doppler frequency composition in the up radiofrequency signal, accomplishes coherent carrier and catches and follow the tracks of; FPGA produces Doppler's reference signal 2 through numerical calculation; When the frequency content of Doppler's reference signal 2 and Doppler's reference signal 1 are relevant, and satisfy predetermined ratio k, realize the relevant function of transmitting-receiving of system requirements; When Doppler's reference signal 2 and Doppler's reference signal 1 are irrelevant, realize the incoherent function of transmitting-receiving of system requirements;
Transmission channel partly comprises modulator; Modulator receives the local oscillation signal 3 that sends out from frequency synthesizer, local oscillation signal 3 usefulness base band datas is modulated the output downlink radio-frequency signal; Local oscillation signal 3 are high frequency clock signals of sending of frequency multiplication lock phase B with the shift frequency lock mutually the down-Doplet reference signal sent of B pass through upper frequency mixer and carry out the radiofrequency signal that forms after the mixing;
Frequency synthesizer comprises frequency multiplication lock phase A, frequency multiplication lock phase B, frequency multiplication lock phase C, frequency multiplication lock phase D, shift frequency lock phase A, shift frequency lock phase B, clock source selection device and upper frequency mixer; The clock source selection device is selected in inner temperature compensating crystal oscillator TCXO clock and the steady clock of outside superelevation, with the clock reference of the clock of choosing as frequency synthesizer; Frequency multiplication lock phase A, frequency multiplication lock phase B, frequency multiplication lock phase C, frequency multiplication lock phase D form high frequency clock signal with the clock reference frequency multiplication respectively; Frequency multiplication lock phase C sends to shift frequency lock phase A with the high frequency clock signal that forms, and shift frequency lock phase A carries out shift frequency with the high frequency clock signal that receives and Doppler's reference signal 1, forms local oscillation signal 2; Frequency multiplication lock phase D sends to shift frequency lock phase B with the high frequency clock signal that forms, and shift frequency lock phase B carries out shift frequency with the high frequency clock signal that receives and Doppler's reference signal 2, forms the down-Doplet reference signal.
Beneficial effect
Digital technology of the present invention realizes coherent forwarding function and incoherent forwarding capability, has the characteristic of " software switching ", has strengthened flexibility; Utilize the numerical frequency complex art, produce needed working frequency points, can realize different RF spots, expanded function according to mission requirements; Transmitter spectrum purity and stability have been improved; Can be directly switch to outside high steady clock source, need not produce the loss of making an uproar mutually through frequency inverted, the radio frequency characteristic of making an uproar mutually is better; Cost is low.
Description of drawings
Fig. 1 is the composition sketch map of satellite transponder of the present invention;
Fig. 2 is the composition sketch map of frequency multiplication lock phase A;
Fig. 3 is the composition sketch map of frequency multiplication lock phase C;
Fig. 4 is the composition sketch map of shift frequency lock phase A;
Fig. 5 is the composition sketch map of frequency multiplication lock phase B;
Fig. 6 is the composition sketch map of frequency multiplication lock phase D;
Fig. 7 is the composition sketch map of shift frequency lock phase B.
Embodiment
Below in conjunction with accompanying drawing and embodiment the present invention is described further.
Embodiment
With X frequency range transmitting-receiving answering machine is example, and the forwarding of system requirements is than frequency=880/749 of the frequency/up radiofrequency signal of K=downlink radio-frequency signal; The frequency that designs up radiofrequency signal is 7115.5MHz, and the frequency that then requires downlink radio-frequency signal is 8360MHz, wherein 8360/7115.5=K.Under Coherence Mode; If there is certain Doppler frequency deviation fd=74.9KHz in the frequency of the up radiofrequency signal that answering machine receives; Then the frequency of up radiofrequency signal becomes 7115.5MHz+fd=7115.5749MHz; The frequency of the downlink radio-frequency signal of answering machine emission should become 8360.088MHz thereupon so, remains the frequency=K of the frequency/up radiofrequency signal of downlink radio-frequency signal.And under incoherent pattern, the downstream frequency of answering machine emission should remain 8360MHz.
Satellite transponder, as shown in Figure 1, comprise receive path part, digital processing part, transmission channel part and frequency synthesizer;
Internal clock source design TCXO Frequency Design is 100MHz, and the steady clock source frequency of outside superelevation is 10MHz.When the reference clock selector is selected TCXO as clock reference, obtain following design parameter.
The Frequency Design of the local oscillation signal 1 of frequency multiplication lock phase A output is 7000MHz, and the composition sketch map of frequency multiplication lock phase A is as shown in Figure 2; The course of work of frequency multiplication lock phase A is: the input clock of frequency multiplication lock phase A is from the frequency source selector, and frequency is 100MHz; Input clock is through 10 frequency dividers of software control, and frequency drops to 10MHz; The initial output signal frequency of voltage controlled oscillator (VCO) is at 7000MHz, and through 700 frequency dividers, frequency drops to 10MHz; This two-way 10MHz signal gets into phase discriminator (PD), generates the phase demodulation error signal, carries out LPF through loop filter (Loop Filter), and filtered error signal is used to regulate the output frequency of VCO; Through this frequency multiplication lock phase A circuit, make the output frequency of VCO and 100MHz clock keep locking, promptly obtain the local oscillation signal 1 of 7000MHz;
The composition sketch map of frequency multiplication lock phase C is as shown in Figure 3; The output clock frequency is 90MHz, and its course of work is with frequency multiplication lock phase A.
The composition sketch map of shift frequency lock phase A is as shown in Figure 4; The course of work of shift frequency lock phase A is: the frequency from frequency multiplication lock phase C is 90MHz, is 10M+fd from the frequency of DDS1; The initial output frequency of VCO after the 90MHz clock of C descends mixing mutually from the frequency multiplication lock, forms the low frequency signal of 10MHz at 100MHz.This low frequency signal gets into phase discriminator (PD) with the 10M+fd signal that comes from DDS1, and the error signal that phase demodulation generates is carried out LPF through loop filter (Loop Filter), and filtered error signal is used to regulate the output frequency of VCO.Through shift frequency lock phase A circuit, make the output frequency of VCO equal the output frequency sum of frequency multiplication lock phase C and DDS1, promptly obtain frequency=100M+fd of frequency+frequency multiplication lock phase C of the frequency=DDS1 of local oscillation signal 2;
Receive path partly comprises down-conversion mixer A, filter and down-conversion mixer B; Up radiofrequency signal and frequency multiplication from the frequency synthesizer lock local oscillation signal 1 that sends of A mutually forms low frequency signal through the mixing of down-conversion mixer A; Low frequency signal is through filters; Through the signal of filters and the lock of shift frequency from frequency synthesizer mutually the local oscillation signal 2 that sends of A form intermediate-freuqncy signal and input to the digital processing part through the mixing of down-conversion mixer B;
The digital processes branch comprises analog digital converter A/D, digital frequency synthesizer DDS1, digital frequency synthesizer DDS2 and FPGA; Analog digital converter A/D receives the intermediate-freuqncy signal that partly passes over from receive path; Signal is carried out the A/D sampling, intermediate-freuqncy signal is become digital signal, then digital signal is flowed to FPGA; FPGA carries out Doppler tracking locking and demodulation to the digital signal that receives; Extract Doppler's composition, control figure frequency synthesizer DDS1 and DDS2, generate Doppler's reference signal 1 and Doppler's reference signal 2 respectively and flow to respectively the shift frequency lock mutually A lock B mutually with shift frequency; Doppler's reference signal 1 is relevant with the Doppler frequency composition in the up radiofrequency signal that has received, accomplishes coherent carrier and catches and follow the tracks of; FPGA produces Doppler's reference signal 2 through numerical calculation;
The frequency of Doppler's reference signal 1 is 10MHz+fd.Fd=74.9KHz wherein, then the actual frequency of Doppler's reference signal 1 is 10.0749MHz.
Under Coherence Mode, the frequency of Doppler's reference signal 2 is 10MHz+fd*K, K=880/749 wherein, and then the actual frequency of Doppler's reference signal 2 is 10.088MHz.And under incoherent pattern, the output frequency of Doppler's reference signal 2 is fixed as 10MHz.
Transmission channel partly comprises modulator; Modulator receives the local oscillation signal 3 that sends out from frequency synthesizer, local oscillation signal 3 usefulness base band datas is modulated the output downlink radio-frequency signal; Local oscillation signal 3 are high frequency clock signals of sending of frequency multiplication lock phase B with the shift frequency lock mutually the down-Doplet reference signal sent of B pass through upper frequency mixer and carry out the radiofrequency signal that forms after the mixing;
Frequency synthesizer comprises frequency multiplication lock phase A, frequency multiplication lock phase B, frequency multiplication lock phase C, frequency multiplication lock phase D, shift frequency lock phase A, shift frequency lock phase B, clock source selection device and upper frequency mixer; The clock source selection device is selected in inner temperature compensating crystal oscillator TCXO clock and the steady clock of outside superelevation, with the clock reference of the clock of choosing as frequency synthesizer; Frequency-doubled signal forms high frequency clock signal with the clock reference frequency multiplication; Frequency multiplication lock phase C sends to shift frequency lock phase A with the high frequency clock signal that forms, and shift frequency lock phase A carries out shift frequency with the high frequency clock signal that receives and Doppler's reference signal 1, forms local oscillation signal 2; Frequency multiplication lock phase D sends to shift frequency lock phase B with the high frequency clock signal that forms, and shift frequency lock phase B carries out shift frequency with the high frequency clock signal that receives and Doppler's reference signal 2, forms the down-Doplet reference signal;
The output high power clock frequency of frequency multiplication lock phase B is designed to 8000MHz, and the composition sketch map of frequency multiplication lock phase B is as shown in Figure 5; Its course of work is with frequency multiplication lock phase A;
The output high power clock frequency of frequency multiplication lock phase D is designed to 350MHz, and the composition sketch map of frequency multiplication lock phase D is as shown in Figure 6; Its course of work is with frequency multiplication lock phase A;
The incoming frequency of shift frequency lock phase B be from the 350MHz of frequency multiplication lock phase D with from Doppler's reference signal 2 of DDS2, and it is as shown in Figure 7 that shift frequency is locked the composition sketch map of phase B; Its course of work is with shift frequency lock phase A;
And the frequency of local oscillation signal 3 is the mixing results of 8000MHz and 360MHz+fd*K, so the frequency of local oscillator 3 is 8360MHz+fd*K.Under Coherence Mode, if fd=74.9KHz, then the frequency of local oscillation signal 3 is 8360.088MHz.Under incoherent pattern, because the fixed-frequency of DDS2 output is 10MHz, so the frequency of local oscillation signal 3 is 8360MHz.
The TCXO that selects 100MHz when frequency synthesizer is during as clock reference, frequency multiplication lock phase A, frequency multiplication lock phase B, frequency multiplication lock phase C, frequency multiplication lock phase D, running parameter.As required, through software control, answering machine can switch to outside 10MHz source with the clock source at any time on the star, and each frequency multiplication lock is mutually through software instruction simultaneously, and 10 frequency dividers that it is inner change straight-through (not frequency division) into.The output frequency of each frequency multiplication lock phase is constant like this, but overall frequency all keeps the lock synchronised with the high steady source of the outside 10MHz that imports.
Claims (3)
1. a satellite transponder is characterized in that: comprise receive path part, digital processing part, transmission channel part and frequency synthesizer;
Receive path partly comprises down-conversion mixer A, filter and down-conversion mixer B; Up radiofrequency signal and frequency multiplication from the frequency synthesizer lock local oscillation signal 1 that sends of A mutually forms low frequency signal through the mixing of down-conversion mixer A; Low frequency signal is through filters; Through the signal of filters and the lock of shift frequency from frequency synthesizer mutually the local oscillation signal 2 that sends of A form intermediate-freuqncy signal and input to the digital processing part through the mixing of down-conversion mixer B;
The digital processes branch comprises analog digital converter A/D, digital frequency synthesizer DDS1, digital frequency synthesizer DDS2 and FPGA; Analog digital converter A/D receives the intermediate-freuqncy signal that partly passes over from receive path; Signal is carried out the A/D sampling, intermediate-freuqncy signal is become digital signal, then digital signal is flowed to FPGA; FPGA carries out Doppler tracking locking and demodulation to the digital signal that receives; Extract Doppler's composition, control figure frequency synthesizer DDS1 and DDS2, generate Doppler's reference signal 1 and Doppler's reference signal 2 respectively and flow to respectively the shift frequency lock mutually A lock B mutually with shift frequency; Doppler's reference signal 1 is relevant with the Doppler frequency composition in the up radiofrequency signal, accomplishes coherent carrier and catches and follow the tracks of; FPGA produces Doppler's reference signal 2 through numerical calculation; When the frequency content of Doppler's reference signal 2 and Doppler's reference signal 1 are relevant, and satisfy predetermined ratio k, realize the relevant function of transmitting-receiving of system requirements; When Doppler's reference signal 2 and Doppler's reference signal 1 are irrelevant, realize the incoherent function of transmitting-receiving of system requirements;
Transmission channel partly comprises modulator; Modulator receives the local oscillation signal 3 that sends out from frequency synthesizer, local oscillation signal 3 usefulness base band datas is modulated the output downlink radio-frequency signal; Local oscillation signal 3 are high frequency clock signals of sending of frequency multiplication lock phase B with the shift frequency lock mutually the down-Doplet reference signal sent of B pass through upper frequency mixer and carry out the radiofrequency signal that forms after the mixing;
Frequency synthesizer comprises frequency multiplication lock phase A, frequency multiplication lock phase B, frequency multiplication lock phase C, frequency multiplication lock phase D, shift frequency lock phase A, shift frequency lock phase B, clock source selection device and upper frequency mixer; The clock source selection device is selected in inner temperature compensating crystal oscillator TCXO clock and the steady clock of outside superelevation, with the clock reference of the clock of choosing as frequency synthesizer; Frequency multiplication lock phase A, frequency multiplication lock phase B, frequency multiplication lock phase C, frequency multiplication lock phase D form high frequency clock signal with the clock reference frequency multiplication respectively; Frequency multiplication lock phase C sends to shift frequency lock phase A with the high frequency clock signal that forms, and shift frequency lock phase A carries out shift frequency with the high frequency clock signal that receives and Doppler's reference signal 1, forms local oscillation signal 2; Frequency multiplication lock phase D sends to shift frequency lock phase B with the high frequency clock signal that forms, and shift frequency lock phase B carries out shift frequency with the high frequency clock signal that receives and Doppler's reference signal 2, forms the down-Doplet reference signal.
2. a kind of satellite transponder according to claim 1 is characterized in that: frequency multiplication lock phase A comprises frequency divider A, frequency divider B, phase discriminator, voltage controlled oscillator and loop filter; Obtain the signal that frequency is A behind the input clock process frequency divider A of frequency multiplication lock phase A; Obtain the signal that frequency is B behind the initial output signal process frequency divider B of voltage controlled oscillator; Frequency is that the signal of A and signal that frequency is B are through generating the phase demodulation error signal behind the phase discriminator; This error signal is carried out LPF through loop filter; Filtered error signal is used to regulate the output frequency of voltage controlled oscillator, and this output frequency and input clock keep locking, obtain local oscillation signal 1.
3. a kind of satellite transponder according to claim 1 is characterized in that: shift frequency lock phase A comprises phase discriminator, loop filter, voltage controlled oscillator and down-conversion mixer; The clock of C forms low frequency signal after descending mixing to the initial output frequency of voltage controlled oscillator with locking mutually from frequency multiplication; This low frequency signal gets into phase discriminator with the signal from DDS1; The error signal that phase demodulation generates is carried out LPF through loop filter, and filtered error signal is used to regulate the output frequency of voltage controlled oscillator, and promptly local oscillation signal 2; The frequency of local oscillation signal 2 equals the output frequency sum of frequency multiplication lock phase C and DDS1.
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102916692A (en) * | 2012-10-28 | 2013-02-06 | 中国电子科技集团公司第十研究所 | Digital phase parameter transmission method based on any transmission ratio |
| CN104092478A (en) * | 2014-06-27 | 2014-10-08 | 上海航天电子通讯设备研究所 | Satellite-borne X-frequency-band double-channel multifunctional responder |
| CN106781374A (en) * | 2016-12-01 | 2017-05-31 | 广东技术师范学院 | A kind of self adaptation frequency corrects wireless remote controller |
| CN106877887A (en) * | 2017-01-20 | 2017-06-20 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Multistation alien frequencies response reception system |
| CN109245797A (en) * | 2018-08-22 | 2019-01-18 | 西安空间无线电技术研究所 | A kind of unified carrier system signal coherence forwarding realization method and system |
| CN112947521A (en) * | 2021-02-10 | 2021-06-11 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Multifunctional simulation platform of spacecraft measurement and control system |
| CN113067599A (en) * | 2021-03-12 | 2021-07-02 | 上海航天电子有限公司 | Semi-digital USB responder device based on anti-fuse FPGA |
| CN113791556A (en) * | 2021-08-31 | 2021-12-14 | 上海卫星工程研究所 | Method and system for autonomously detecting and switching internal and external clocks of responder |
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102916692A (en) * | 2012-10-28 | 2013-02-06 | 中国电子科技集团公司第十研究所 | Digital phase parameter transmission method based on any transmission ratio |
| CN102916692B (en) * | 2012-10-28 | 2015-01-14 | 中国电子科技集团公司第十研究所 | Digital phase parameter transmission method based on any transmission ratio |
| CN104092478A (en) * | 2014-06-27 | 2014-10-08 | 上海航天电子通讯设备研究所 | Satellite-borne X-frequency-band double-channel multifunctional responder |
| CN104092478B (en) * | 2014-06-27 | 2017-04-05 | 上海航天电子通讯设备研究所 | A kind of multi-functional answering machine of spaceborne X band Dual Channels |
| CN106781374A (en) * | 2016-12-01 | 2017-05-31 | 广东技术师范学院 | A kind of self adaptation frequency corrects wireless remote controller |
| CN106877887A (en) * | 2017-01-20 | 2017-06-20 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Multistation alien frequencies response reception system |
| CN106877887B (en) * | 2017-01-20 | 2019-05-07 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Multistation alien frequencies response receives system |
| CN109245797A (en) * | 2018-08-22 | 2019-01-18 | 西安空间无线电技术研究所 | A kind of unified carrier system signal coherence forwarding realization method and system |
| CN112947521A (en) * | 2021-02-10 | 2021-06-11 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Multifunctional simulation platform of spacecraft measurement and control system |
| CN113067599A (en) * | 2021-03-12 | 2021-07-02 | 上海航天电子有限公司 | Semi-digital USB responder device based on anti-fuse FPGA |
| CN113791556A (en) * | 2021-08-31 | 2021-12-14 | 上海卫星工程研究所 | Method and system for autonomously detecting and switching internal and external clocks of responder |
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