CN102710280A - Partitioned and expanded high-speed pipelining shift dispreading method and device - Google Patents
Partitioned and expanded high-speed pipelining shift dispreading method and device Download PDFInfo
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Abstract
The invention discloses a high-speed pipelining shift dispreading method and method. The method comprises the following steps: storing a local dispreading pseudorandom sequence with length of n in an isometric local data unit; performing zero clearing on the data in the dispreading data unit with length of n; at every turn, inputting to-be-dispread data from an external data input interface; taking out every bit data sequentially from the local data unit; according to 0 or 1, performing symbolization on the bit wide expanded data to obtain the data or opposite results; numbering the taken data from the local data unit as k; according to the serial number k, adding the data obtained from the last step with the data of k-1 in the dispreading data unit respectively; storing the result in the dispreading data unit with the next serial number; for the 0 data, directly obtaining the result; for the processing result of the nth data, directly outputting the result; repeatedly executing the steps above on the inputted external data sequentially for n times, and outputting the data of dispreading data unit with the serial number of n-1.
Description
Technical field
The invention belongs to digital communication technology field, particularly a kind of high-speed flow line displacement despreading method and device that is applicable to the piecemeal arbitrarily of Resistant DS Spread Spectrum System and expands.
Background technology
In direct sequence spread spectrum communication system, low speed information source data sequence through hundred times, even after thousands of times the spread processing, directly changes the high-speed data sequence at transmitting terminal.And, change the principle of Communication System Design in the past at receiving terminal, and at first need the high-speed data that receive be carried out quick despreading, carry out subsequent demodulation again and handle.Be that the symmetry principle that it does not follow communication system (promptly at transmitting terminal elder generation spread spectrum, is modulated again.And by symmetry principle, should be in receiving terminal elder generation demodulation, despreading again), carry out despreading earlier, carry out demodulation process again.Thereby reduced by a link that high-speed data is handled, reduced implementation complexity, and improved reliability.Two tradable essence of process of its receiving terminal are that despreading and demodulation all are the property taken advantage of calculating, commutative order.Therefore, at a high speed effective despreading treatment technology is the important leverage that realizes the effective reliably working of direct sequence spread spectrum communication system.
In traditional despreader scheme, the despreading method that extensively adopts is the serial correlation method that multiplies each other by symbol.This method at first will be imported data and be kept in the shift register; Multiply each other in each corresponding position with local despread data content register of shift register then; The result deposits in the despreading output register; With all data accumulations in the despreading output register, its result is the local despread data in the shift register at last, is to be kept at the despreading result who imports the content of data and local despread data content register in the shift register.But, in practical application,, processing speed of data is required just very high as in the spread spectrum communication system of higher speed.And the serial correlation method all must be accomplished add up for N time (N is a related content length, and is integer) in one-period, can't realize when too high or related content length is long when speed.And because the local sequence of despreading is long usually, often whole despreading algorithm can not be achieved on the monolithic hardware chip of resource-constrained.Therefore, the requirement that it can not reach at a high speed simultaneously and the despreading sequence is long arbitrarily.
Summary of the invention
The present invention is directed to that existing DSSS communication control processor exists too high because of speed, the related data content is long or hardware resource limitations can't realize shortcomings such as above method when dumb, and a kind of method and apparatus that is applicable to Resistant DS Spread Spectrum System that can avoid above-mentioned shortcoming and defect is provided---be shifted despreading method and device of piecemeal and the high-speed flow line expanded arbitrarily.
The present invention takes following technical scheme:
A kind of basic high-speed flow line displacement despreading method; It may further comprise the steps: the repeated execution of steps of initialization step, input data bit width spread step, symbol treatment step, data addition and preservation treatment step and above-mentioned concrete steps, and the implementation process of this method is following:
Initialization step: the local despreading pseudo random sequence that will grow for n is kept in the isometric local data unit, and this sequence is a binary sequence; Length is the data zero clearing in the despread data unit of n, is about to its all value and is made as " 0 "; Wherein, the numbering of data cell is since 0; N is an integer, expression despreading length;
Input data bit width spread step: at every turn from the external data input interface, import input data of treating despreading, and it is saved in bit width extension unit, and accomplish the bit wide expansion; The method of bit wide expansion is: original input data is as the lowest of this longer bit wide unit, and with several bit data in the front of deficiency, replaces with the highest order of former input data;
Get the symbol treatment step: take out each Bit data in order from local data unit,,, carry out symbolism and handle, obtain the result of data itself or its negate respectively with the data of last step bit wide expansion gained according to " 0 " or " 1 "; The numbering of other data of going from local data unit, as the numbering k of these step gained data, k is an integer, 0≤k≤n-1;
Data addition treatment step: will go up step gained data, by data number k, respectively with the despread data unit in the data of reference numeral k-1 carry out addition, and the result is kept in the despread data unit of next sequence number; Because of the 0th data do not have the data of " 1 " individual sequence number corresponding,, directly obtain the result so these data do not need addition; And for the result of n data, directly output, and no longer preserve;
At last, the external data to being imported is carried out above-mentioned steps repeatedly successively, after handling n time, is numbered the data of the despread data unit of n-1, is the end product of n input data after n local despreading sequence despreading, and with its output.
At last, form corresponding stream treatment structure, data of promptly every input, output result (promptly being numbered the data in the despread data unit of n-1).Be that it is former data, remove outside the first data that the sequence of adding last new input data gained again is through long data for obtaining after the local data unit despreading of n, and circulation successively, finishes until the despreading processing.In addition, with the output result of this method,, and draw the synchronous judge mark of despreading sequence frame with the respective threshold contrast.So that after accomplishing synchronously, export the despread data of required correct sequential always.Wherein, the corresponding thresholding of frame synchronization, the signal to noise ratio that can work based on this spread spectrum system is obtained by corresponding emulation, promptly need make this thresholding can guarantee the synchronous accuracy rate more than 99%.
The invention also discloses a kind of basic high-speed flow line displacement despreading device; It comprises with lower module: the local despreading pseudo random sequence data storage that the bit wide extended menory of input data-interface, any length are n (n is any lint-long integer) is (hereinafter to be referred as local data memory; Data bit width is 1), get symbol processor (with getting sign function Sgn (.) expression), adder, overflow determining device, despreading calculation result data memory (hereinafter to be referred as the despread data memory, data bit width is j), dateout interface;
Described bit wide extended menory comprises the input interface of 1 i Bit data and this i bit input data is expanded to the memory cell of j bit, and i, j be integer, and j >=i, j are the quantization bit figure place during despreading is handled; Storage adopts the complement representation after quantizing, and the input data of i bit bit wide expand to the data of the despreading processing bit wide of j bit bit wide, adopt lowest order to represent with former, and all fill with the highest order of input data remaining j-i position; The bit wide extended menory is used for the bit wide expansion of data, increases denotable scope, reduces overflowing in calculating;
Described local data memory comprises n memory cell of storing 1 Bit data, is used to preserve local despread data;
The described symbol processor of getting is used to judge the symbol of importing data, is equivalent to the data of many bits bit wide and the multiplication of single-bit bit wide data and calculates; Get total n of symbol processor; And each processor comprises 2 input data (being respectively 1 bit and j Bit data) and 1 j bit dateout, and has following function: 1 Bit data according to input is " 0 " or " 1 ", with another j Bit data; Carry out symbol manipulation; Get j Bit data itself respectively, or the negate result of these data, and output; Wherein, inversion operation is: each bit of data is put instead, be about to transfer " 1 " of data for " 0 ", otherwise transfer " 0 " to, and in last position as a result, add data " 1 ";
Described adder is used for the addition of the data of bit bit wide more than two: to 2 input data additions, and export accumulation result; As run into and overflow, then carry out saturated processing, promptly use several maximum (be used for forward overflow) or the minimum values (be used for negative sense overflow) that can expression of this length as j, come the result after the approximate substitution addition;
The described determining device that overflows, be used to judge that adder is calculated after, whether forward appears or negative sense overflows;
Described despread data memory comprises n memory cell of storing the j Bit data, is used for preserving the ephemeral data of despreading processing procedure;
Described dateout interface comprises the data output interface of 1 j bit;
The implementation step of said basic high-speed flow line displacement despreading device is following:
At first, when initialization, length is kept in the isometric local data memory for the local despreading pseudo random sequence of n; Length is the data zero clearing in the despread data memory of n; N is an integer;
Secondly, outer input data is saved in the bit wide expander, accomplishes the bit wide expansion;
Once more, from local data memory, take out each Bit data in order,, bit wide is expanded the data of gained, carry out the symbolism operation, obtain data itself respectively according to " 0 " or " 1 ", or the negate result of data; And the numbering of the data of going from local data unit, as the numbering k of these step gained data, k is an integer, 0≤k≤n-1;
Afterwards, will go up step gained data, by data number k, respectively with the local data memory of middle reference numeral k-1 in data carry out addition calculation, obtain accumulation result; Because of the 0th data do not have the data of " 1 " individual sequence number corresponding, so these data are directly exported as a result of; For the result of n data, also need output;
At last, with above step gained result, be stored in the despread data memory of reference numeral k; Above-mentioned steps is carried out in input repeatedly successively, until through n external data input, and after above-mentioned steps is handled, is numbered the data of the despread data memory of n-1, and be n and import the end product of data after the individual local despreading sequence despreading of n, and with its output.
The high-speed flow line displacement despreading method that the invention also discloses a kind of piecemeal arbitrarily and expand, it may further comprise the steps: despread data piecemeal treatment step, comparison step, despread data output controlled step, the practical implementation process of this method is following:
At first, the aforesaid basic high-speed flow line displacement despreading method of a plurality of employings is connected into corresponding cascade stream treatment structure, data of promptly every input, the output result is as the primary data input of next stage despread unit, promptly as its input parameter 2 inputs; And the data of despreading are treated in outside input, import as its input parameter 1 respectively, and every at a distance from 1 despread data treatment step, between the external data of input, needing to adopt at interval, sequence number length is the input data of n; Through k despread data step and after n * k time despread data is handled, obtain the final long despreading result after the nk series processing that is;
Secondly, with the despreading result after the nk series processing, in comparison step, contrast, and draw the synchronous judge mark of despreading sequence frame with respective threshold; So that after accomplishing synchronously, the despread data of the accurate synchronization that control output is required; Wherein, the corresponding decision threshold of frame synchronization, the parameters such as signal to noise ratio that can work according to this spread spectrum system are obtained by software simulation, make this thresholding can guarantee the synchronous accuracy rate more than 99%;
At last, the result who judges according to comparison step, according to whether greater than decision threshold, and with despread data output, as last output result.
The present invention is piecemeal and the high-speed flow line expanded displacement despreading device arbitrarily, and it comprises with lower module: external data buffer, despread data module, comparator, the despread data o controller of temporarily storing external data;
Described external data buffer is used for the outer input data that buffer memory is treated despreading;
Described comparator is used for judging that whether the input data are greater than certain set-point;
Described despread data o controller according to external control signal, is exported required data;
Said the piecemeal arbitrarily and implementation step of the high-speed flow line expanded displacement despreading device is following:
At first, a plurality of aforesaid basic high-speed flow line displacement despreading devices are connected into corresponding stream treatment structure, data of promptly every input, the output result as the primary data input of next stage despread unit, promptly imports at " In2 " interface; And the data of despreading are treated in outside input, respectively in the input of " In1 " interface, and whenever fast at a distance from 1 despread data processing, between the external data of input, needing at interval, sequence number length is the input data of n; Through k despread data module and after n * k time flowing structure is handled, can obtain the long despreading result of nk that is;
Secondly, with its output result, in comparator, contrast, and draw the synchronous judge mark of despreading sequence frame with respective threshold;
At last, based on the control signal of comparator output, export required despread data.
The present invention has realized being applicable to the quick despreading target of Resistant DS Spread Spectrum System through above-mentioned streamline displacement despreading method or device, and simultaneously, this method or device can reduce the implementation complexity of system, have greatly improved its efficient.In addition, also can constitute the long despreading processor of longer m * n through the long despreading module of the some n of cascade (as m, m is an integer), easy-to-use FPGA hardware platforms such as (FPGA) is realized.
Description of drawings
Fig. 1 is the structure chart of the basic high-speed flow line displacement despreading method of the embodiment of the invention.
The structure chart of the high-speed flow line displacement despreading method that Fig. 2 expands for the piecemeal arbitrarily of the embodiment of the invention.
Fig. 3 is the structure chart of the basic high-speed flow line displacement despreading device of the embodiment of the invention.
The structure chart of the high-speed flow line displacement despreading device that Fig. 4 expands for the piecemeal arbitrarily of the embodiment of the invention.
Embodiment
Also in conjunction with the accompanying drawings the present invention is described in further detail below by specific embodiment.
Iterative demodulation system and method provided by the present invention can be applicable to tells the spread spectrum communication system technical field.The present invention is stored in local data unit through the initialization of local despreading pseudo random sequence successively; The external data input; Utilize the positive and negative of this external data input of local data unit Data Control; To revise the external data of symbol and the data accumulation of despread data unit by corresponding sequence number, and the result be stored in the despread data unit of next sequence number.After import through the external data of all local despread data length and adding up etc. handled, in the end a despread data unit obtained final despreading result.But below choose the high-speed flow line displacement despreading method and the system specifics embodiment of the present invention of typical piecemeal.
As shown in Figure 1, be the structure chart of the basic high-speed flow line displacement despreading method of the embodiment of the invention.When system initialization, with long for the local despreading pseudo random sequence of n C [0], C [1], C [2], C [3] ..., C [n-1] } be kept in the isometric local data unit, and this sequence is binary sequence, n is an integer.To grow in addition despread data unit for n R [0], R [1], R [2], R [3] ..., R [n-1] } and interior data zero clearing, be about to its all value and be made as " 0 "; Secondly, import input data of treating despreading from the outside at every turn, and it is saved in bit width extension unit, and accomplish the bit wide expansion.The method of bit wide expansion does, initial data is as the lowest of this longer bit wide unit, and with several bit data in front, replaces with the highest order of input data; Once more, from local data unit, take out each Bit data in order,, bit wide is expanded the data of gained, carry out the symbolism operation, obtain data itself respectively according to " 0 " or " 1 ", or the negate result of data.And the numbering of from local data unit, being fetched data, as the numbering of these step gained data, like numbering k, and k is integer, 0≤k≤n-1; Afterwards, will go up step gained data, by data number (like numbering k), respectively with local data unit in the data R [k-1] of reference numeral k-1 carry out addition, obtain the result.Note,,, directly obtain the result so these data do not need to add up with any number (or equivalent be and 0 add up) because of the 0th data do not have the data of " 1 " individual sequence number corresponding.And, also need output for the result of n data; At last, with above step gained result, be stored in the despread data unit of reference numeral k.According to the external data of being imported, carry out above-mentioned steps repeatedly successively, until importing through n external data; And after above-mentioned processing; Be numbered the data of the despread data unit of n-1, be the end product of n input data after n local despreading sequence despreading, and with its output.
As shown in Figure 2, the structure chart of the high-speed flow line displacement despreading method of expanding for the piecemeal arbitrarily of the embodiment of the invention.On embodiment basis as shown in Figure 1; With a plurality of these embodiment, form a total piecemeal arbitrarily and the high-speed flow line expanded displacement despreading method, the method includes the steps of: despread data piecemeal treatment step; Comparison step and despread data output controlled step; The practical implementation process is following: basic high-speed flow line displacement despreading method embodiment shown in Figure 1 is arranged to corresponding stream treatment structure, data of promptly every input, output result's (being the despread unit data R [n-1] of the n-1 of being numbered shown in Figure 1); As the primary data input of next stage despread unit, promptly import at " In2 " interface.And the data of despreading are treated in outside input, respectively in the input of " In1 " interface, and every at a distance from 1 despread data step, between the external data of input, needing at interval, sequence number length is the input data of n.Through k despread data piecemeal and after n * k time flowing structure as shown in Figure 1 is handled, can obtain the final long despreading result of nk that is.In addition, also need its output result is contrasted with respective threshold in comparator, and draws the synchronous judge mark of despreading sequence frame.So that after accomplishing synchronously, the despread data of the accurate synchronization that control output is required.Wherein, the corresponding decision threshold of frame synchronization, the parameters such as signal to noise ratio that can work according to this spread spectrum system are obtained by corresponding emulation, can pass through software simulation, make this thresholding can guarantee the synchronous accuracy rate more than 99%.
As shown in Figure 3, be the structure chart of the basic high-speed flow line displacement despreading device of the embodiment of the invention, this device comprises: bit wide extended menory, local despreading pseudo random sequence data storage (are called for short local data memory; The storage bit wide is 1), symbol processor (with getting sign function Sgn (.) expression), adder, overflow determining device and despreading calculation result data memory (abbreviation despread data memory, the storage bit wide is j); The implementation process of this device is following: when system initialization, length is kept at isometric local data memory { C [0], C [1] for the local despreading pseudo random sequence of n; C [2]; C [3] ..., C [n-1] } in; And this sequence is a binary sequence, and n is an integer.To grow in addition despread data memory for n R [0], R [1], R [2], R [3] ..., R [n-1] } in the data zero clearing, be about to its all value and be made as " 0 "; Secondly, data of treating despreading of input are saved in the bit wide expander with it from the outside, and accomplish the bit wide expansion.The method of bit wide expansion does, initial data is as the lowest of this longer bit wide unit, and with several bit data in front, replaces with the highest order of input data; Once more, from local data memory, take out each Bit data in order,, bit wide is expanded the data of gained, carry out the symbolism operation, obtain data itself respectively according to " 0 " or " 1 ", or the negate result of data.And the numbering of the data of going from local data unit, as the numbering of these step gained data, like numbering k, and k is integer, 0≤k≤n-1; Afterwards, will go up step gained data, by data number (like numbering k), respectively with the local data memory R [k-1] of middle reference numeral k-1 in data carry out addition calculation, obtain accumulation result.Because of the 0th data do not have the data of " 1 " individual sequence number corresponding, so these data do not need addition, directly as a result of.And, also need output for the result of n data; At last, with above step gained result, be stored in the despread data memory of reference numeral k.Above-mentioned steps is carried out in input repeatedly successively, until through n external data input, and after above-mentioned processing, is numbered the data of the despread data memory of n-1, and be n and import the end product of data after the individual local despreading sequence despreading of n, and with its output.
As shown in Figure 4; The structure chart of the high-speed flow line displacement despreading device of expanding for the piecemeal arbitrarily of the embodiment of the invention; This device comprises: temporarily store external data buffer, despread data processing module, comparator and the despreading data output controller of external data, it is on embodiment basis as shown in Figure 3, with a plurality of these embodiment; The high-speed flow line displacement despreading device of forming a total piecemeal arbitrarily and expanding; The implementation process of this device is following: basic high-speed flow line displacement despreading device shown in Figure 3 is arranged to corresponding stream treatment structure, data of promptly every input, output result's (being the data of the despreading memory R [n-1] of the n-1 of being numbered shown in Figure 3); As the primary data input of next stage despread unit, promptly import at " In2 " interface.And the data of despreading are treated in outside input, respectively in the input of " In1 " interface, and whenever fast at a distance from 1 despread data processing, between the external data of input, needing at interval, sequence number length is the input data of n.Through k despread data module and after n * k time flowing structure shown in Figure 3 is handled, can obtain the final long despreading result of nk that is.In addition, also need its output result is contrasted with respective threshold in comparator, and draws the synchronous judge mark of despreading sequence frame.So that after accomplishing synchronously, the despread data of the accurate synchronization that control output is required.Wherein, the corresponding decision threshold of frame synchronization, the parameters such as signal to noise ratio that can work according to this spread spectrum system are obtained by corresponding emulation, can pass through software simulation, make this thresholding can guarantee the synchronous accuracy rate more than 99%.
System of the present invention realizes with the mode of streamline, be applicable to that the despreading of any position despreading sequence is handled, and can carry out flexible piecemeal to required despread data length according to the actual hardware resource, and partitioned organization is consistent, and the convenient general module that adopts is realized.
The present invention has improved the treatment effeciency of despreading end in the Resistant DS Spread Spectrum System: through arbitrary-bit high-speed displacement streamline despreader; Except the realization cost that can reduce system, improve real-time, improve the processing speed; Also can realize the serially concatenated piecemeal, make things convenient for hardware to realize flexibly.
Above-mentioned several preferred embodiments of the present invention has been made detailed description; As far as those of ordinary skill in the art; Under the situation that does not break away from principle of the present invention and spirit; Can carry out multiple variation, modification, replacement and distortion to these embodiment, and these changes also fall into protection scope of the present invention.
Claims (6)
1. basic high-speed flow line displacement despreading method is characterized in that may further comprise the steps:
Initialization step: the local despreading pseudo random sequence that will grow for n is kept in the isometric local data unit, and this sequence is a binary sequence; Length is the data zero clearing in the despread data unit of n; Wherein, the numbering of data cell is since 0; N is an integer, expression despreading length;
Input data bit width spread step: at every turn from the external data input interface, import input data of treating despreading, and it is saved in bit width extension unit, and accomplish the bit wide expansion;
Get the symbol treatment step: take out each Bit data in order from local data unit,,, carry out symbolism and handle, obtain the result of data itself or its negate respectively with the data of last step bit wide expansion gained according to " 0 " or " 1 "; The numbering of other data of going from local data unit, as the numbering k of these step gained data, k is an integer, 0≤k≤n-1;
Data addition treatment step: will go up step gained data, by data number k, respectively with the despread data unit in the data of reference numeral k-1 carry out addition, and the result is kept in the despread data unit of next sequence number; The 0th directly obtains the result; And for the result of n data, directly output;
At last, the external data to being imported is carried out above-mentioned steps repeatedly successively, after handling n time, is numbered the data of the despread data unit of n-1, is the end product of n input data after n local despreading sequence despreading, and with its output.
2. basic high-speed flow line displacement despreading method as claimed in claim 1; It is characterized in that: in input data bit width spread step; The method of bit wide expansion is: original input data is as the lowest of this longer bit wide unit; And, replace with the highest order of former input data with several bit data in the front of deficiency.
3. basic high-speed flow line displacement despreading device is characterized in that comprising with lower module: the bit wide extended menory of input data-interface, arbitrarily length be the local despreading pseudo random sequence data storage of n be local data memory, get symbol processor, adder, overflow determining device, despreading calculation result data memory is despread data memory, dateout interface; The data bit width of local data memory is 1, and the data bit width of despread data memory is j;
Described bit wide extended menory comprises the input interface of 1 i Bit data and this i bit is imported the memory cell that data expand to the j bit, and i, j are integer, and j >=i, j are the quantization bit figure place during despreading is handled; Storage adopts the complement representation after quantizing, and the input data of i bit bit wide expand to the data of the despreading processing bit wide of j bit bit wide, adopt lowest order to represent with former, and all fill with the highest order of input data remaining j-i position; The bit wide extended menory is used for the bit wide expansion of data, increases denotable scope, reduces overflowing in calculating;
Described local data memory comprises n memory cell of storing 1 Bit data, is used to preserve local despread data;
The described symbol processor of getting is used to judge the symbol of importing data, is equivalent to the data of many bits bit wide and the multiplication of single-bit bit wide data and calculates; Get total n of symbol processor; And each processor comprises 2 input data and promptly is respectively 1 bit and j Bit data, 1 j bit dateout, and has following function: 1 Bit data according to input is " 0 " or " 1 ", with another j Bit data; Carry out symbol manipulation; Get j Bit data itself respectively, or the negate result of these data, and output; Wherein, inversion operation is: each bit of data is put instead, be about to transfer " 1 " of data for " 0 ", otherwise transfer " 0 " to, and in last position as a result, add data " 1 ";
Described adder is used for the addition of the data of bit bit wide more than two: to 2 input data additions, and export accumulation result;
The described determining device that overflows, be used to judge that adder is calculated after, whether forward appears or negative sense overflows;
Described despread data memory comprises n memory cell of storing the j Bit data, is used for preserving the ephemeral data of despreading processing procedure;
Described dateout interface comprises the data output interface of 1 j bit;
The implementation step of said basic high-speed flow line displacement despreading device is following:
At first, when initialization, length is kept in the isometric local data memory for the local despreading pseudo random sequence of n; Length is the data zero clearing in the despread data memory of n; N is an integer;
Secondly, outer input data is saved in the bit wide expander, accomplishes the bit wide expansion;
Once more, from local data memory, take out each Bit data in order,, bit wide is expanded the data of gained, carry out the symbolism operation, obtain data itself respectively according to " 0 " or " 1 ", or the negate result of data; And the numbering of the data of going from local data unit, as the numbering k of these step gained data, k is an integer, 0≤k≤n-1;
Afterwards, will go up step gained data, by data number k, respectively with the local data memory of middle reference numeral k-1 in data carry out addition calculation, obtain accumulation result; The 0th data are directly exported as a result of; For the result of n data, also need output;
At last, with above step gained result, be stored in the despread data memory of reference numeral k; Above-mentioned steps is carried out in input repeatedly successively, until through n external data input, and after above-mentioned steps is handled, is numbered the data of the despread data memory of n-1, and be n and import the end product of data after the individual local despreading sequence despreading of n, and with its output.
4. basic high-speed flow line displacement despreading device as claimed in claim 3; It is characterized in that: described adder, overflow if run into, then carry out saturated processing; Promptly use several maximum or the minimum values that can expression of this length, come the result after the approximate substitution addition as j; Described maximum is used for forward overflows, and minimum value is used for negative sense and overflows.
5. a but piecemeal and the high-speed flow line expanded displacement despreading method is characterized in that may further comprise the steps:
At first; A plurality of employings basic high-speed flow line displacement despreading method as claimed in claim 1 is connected into corresponding cascade stream treatment structure, that is: data of every input are exported the result; As the primary data input of next stage despread unit, promptly as its input parameter 2 inputs; And the data of despreading are treated in outside input, import as its input parameter 1 respectively, and every at a distance from 1 despread data treatment step, between the external data of input, needing to adopt at interval, sequence number length is the input data of n; Through k despread data step and after n * k time despread data is handled, obtain the final long despreading result after the nk series processing that is;
Secondly, with the despreading result after the nk series processing, in comparison step, contrast, and draw the synchronous judge mark of despreading sequence frame with respective threshold; So that after accomplishing synchronously, the despread data of the accurate synchronization that control output is required;
At last, the result who judges according to comparison step, according to whether greater than decision threshold, and with despread data output, as last output result.
6. a but piecemeal and the high-speed flow line expanded displacement despreading device is characterized in that comprising with lower module: external data buffer, despread data module, comparator, the despread data o controller of temporarily storing external data;
Described external data buffer is used for the outer input data that buffer memory is treated despreading;
Described comparator is used for judging that whether the input data are greater than certain set-point;
Described despread data o controller according to external control signal, is exported required data;
But said piecemeal and the implementation step of the high-speed flow line expanded displacement despreading device is following:
At first; A plurality of basic high-speed flow line displacement despreading devices as claimed in claim 2 are connected into corresponding stream treatment structure, that is: data of every input are exported the result; As the primary data input of next stage despread unit, promptly import at " In2 " interface; And the data of despreading are treated in outside input, respectively in the input of " In1 " interface, and whenever fast at a distance from 1 despread data processing, between the external data of input, needing at interval, sequence number length is the input data of n; Through k despread data module and after n * k time flowing structure is handled, can obtain the long despreading result of nk that is;
Secondly, with its output result, in comparator, contrast, and draw the synchronous judge mark of despreading sequence frame with respective threshold;
At last, based on the control signal of comparator output, export required despread data.
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| CN104767544A (en) * | 2014-01-02 | 2015-07-08 | 深圳市中兴微电子技术有限公司 | Method for implementing descrambling and dispreading and vector operator |
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