CN102163404B - Large-screen light emitting diode (LED) display control device and method based on synchronous dynamic random access memory (SDRAM) - Google Patents
Large-screen light emitting diode (LED) display control device and method based on synchronous dynamic random access memory (SDRAM) Download PDFInfo
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Abstract
The invention provides a large-screen light emitting diode (LED) display control device and a large-screen LED display control method based on a synchronous dynamic random access memory (SDRAM). The large-screen LED display control device comprises a coequality separation module, a first data cache module, an SDRAM controller, a second data cache module and a format conversion module which communicate with one another two by two, and a frame memory SDRAM and a control signal generation module which communicate with the first data cache module, the SDRAM controller and the second data cache module; the format conversion module communicates with an LED display screen; meanwhile, by using the frame memory SDRAM, rationally using a storage space and optimizing as well as designing a storage strategy, the conversion of display data of the large-screen LED display screen and gray scale control can be realized through data storage and read-out from a conventional red-green-blue video source; and complicated data conversion logic is not needed, so the hardware resource is saved and the use rate of the SRAM is increased.
Description
Technical field
The present invention relates to big screen LED display technique field, be specifically related to a kind of big screen LED display control unit and method based on SDRAM.
Background technology
The big screen LED display device shows product as information, is widely used in all trades and professions such as security exchange, finance, air station flight.Along with the lifting of LED material technology and technique, the LED display device becomes one of main product of information demonstration with outstanding advantage.The LED display device has its unique data display format, take Grand LED Screen as example, it might not be according to showing as scanning successively from left to right, from top to bottom in TV, its important difference is that subregion shows simultaneously, be about to LED screen body and be divided into several blocks, each block scans the demonstration data simultaneously, has so just determined that the demonstration data layout of LED display and gray-scale Control must be different from traditional tv.The LED display device is mainly two kinds of built-in gray-scale Control and non-built-in gray-scale Control in the market, the controller partial design of built-in gray-scale Control LED display device is simple, display has partly comprised gray-scale Control, so the display cost is very high, has limited its market and has used.
Summary of the invention
The deficiency that exists in order to overcome above-mentioned prior art the object of the invention is to the big screen LED display device for non-built-in gray-scale Control, and a kind of big screen LED display control unit and method based on SDRAM is provided.
In order to achieve the above object, the technical solution adopted in the present invention is:
A kind of big screen LED based on SDRAM shows the device of controlling, comprise same power and position separation module 3, the first data cache module 1, sdram controller 4, the second data cache module 2 that mutually communicates to connect in twos successively and the format converting module 6 that communicates connection with LED display 7, should show based on the big screen LED of SDRAM in addition that the device of controlling also comprise frame memory SDRAM and the control signal generation module 8 that communicates connection with described the first data cache module 1, sdram controller 4 and the second data cache module 2.
the method that described big screen LED based on SDRAM shows the device of controlling for rgb signal that will input at first through being separated into eight with the power and position data with power and position separation module 3, and temporary to the first data cache module 1 with the power and position data with these eight, and write the memory location of the corresponding present frame of frame memory SDRAM under the control of sdram controller 4, meanwhile, in frame memory SDRAM, the data of former frame are read out under the control of sdram controller 4 in the second data cache module 2, through format converting module 6, parallel data is converted to the serial data that LED display 7 needs afterwards, at last this serial data is exported to LED display 7, should show that all control signals in the method for the device of controlling were produced by control signal generation module 8 based on the big screen LED of SDRAM, and the required drive control signal of LED display 7 is produced by control signal generation module 8 also.
Described the first data cache module 1 comprises that writing control module with field fifo reads with the fifo of field the field fifo group that control module communicates connection, and this fifo writes control module and is responsible in organizing with power and position data write field fifo through eight after separating with power and position; Field fifo group comprises first fifo, second fifo, the 3rd fifo, the 4th fifo, the 5th fifo, the 6th fifo, the 7th fifo and the 8th fifo, each fifo in fifo group is responsible for eight of buffer memorys with same power and position field data corresponding to power and position data, the bit wide of each fifo equals pixel bit wide of input source, the degree of depth of each fifo for the input rgb signal one-row pixels point 1/8, namely each fifo is row cache; And a fifo reads the data cached degree of depth that control module is responsible for detecting each fifo, just reads control module by sdram controller 4 controlling filed fifo and read successively the data of specifying number and the memory location that writes respectively the corresponding present frame of frame memory SDRAM when the data cached degree of depth that a fifo is arranged surpasses predetermined threshold value from this fifo.
Described sdram controller 4 comprises with it to be read and write the ruling module and is connected the mux module to communicate writing SDRAM control module, SDRAM initialization module and reading the SDRAM control module of connection, write the generation of SDRAM control module and write the address of data correspondence in frame memory SDRAM and the write control signal of frame memory SDRAM, write in addition the field fifo that the SDRAM control module also be responsible for to control in the first data cache module 1 and read control module, make it data in fifo of field be write the memory location of the corresponding present frame of frame memory SDRAM; The SDRAM initialization module is responsible for after electrification reset, frame memory SDRAM being carried out initialization; Read the SDRAM control module produce will be from frame memory SDRAM address corresponding to sense data and the read control signal of frame memory SDRAM, read in addition the SDRAM control module also with data reading to the second data cache module 2 of the former frame of present frame in frame memory SDRAM; Read-write ruling module determines that SDRAM is in write state and still reads state; Select the mux module, it is completed and writes SDRAM control module, SDRAM initialization module and read the selection that the SDRAM control module is controlled frame memory SDRAM.
Described the second data cache module 2 comprises that Tong Qi district fifo organizes the district fifo that communicates connection and writes control module and distinguish fifo and read control module, district fifo writes the data cached degree of depth that control module is responsible for detecting each the district fifo in fifo district group, require when surpassing predetermined threshold value sdram controller 5 control in the memory location of its data of the former frame of present frame from frame memory SDRAM with the appointment number data reading of assigned address and successively buffer memory to distinguishing in fifo; District's fifo group comprises n district fifo, n by frame memory SDRAM used the maximum longitudinal frame in energy store video source divided by the quotient of the line number in LED display 7th one district, the bit wide of each district fifo equals pixel bit wide of input source, the degree of depth for the input rgb signal one-row pixels point 1/8, namely distinguishing fifo is row cache; District fifo reads control module and is responsible for the data reading in the correspondence district fifo of district fifo group and gives format converting module 6.
Described control signal generation module 8 comprises system control module and corresponding LED drive control module, all control signals in the method for the device that the big screen LED demonstration of SDRAM is controlled are produced by system control module, and the required drive control signal of LED display 7 is produced by the LED drive control module.
the storage space of described frame memory SDRAM is divided into the first storage subspace and second and stores the subspace, the former frame video source data that present frame video source data and present frame are alternately stored in the subspace is stored in the first storage subspace and second, other the first storage subspace and second is stored the subspace and is divided into again eight parts, these eight parts are as storing respectively eight of corresponding frame with the power and position data with location, power and position place, and each is with the data line of the corresponding video source of each line storage unit storage in location, power and position place, this each line storage unit is a row address, every column address in each row address in corresponding frame memory SDRAM is deposited each pixel value of corresponding input video source row data, this every column address is corresponding field column address, in depositing the process of video source in, has limit priority with location, power and position place, inferior priority is a corresponding column address, last priority level is a corresponding row address, and during data reading, at first the former frame video source that satisfies present frame is read 19 times with the power and position data amount through each after separating with power and position, be about to first with the power and position data, second with the power and position data, the 3rd with the power and position data, respectively read 1 time with the power and position data with power and position data and the 5th for the 4th, and with the 6th with power and position data reading 2 times, the 7th with power and position data reading 4 times and the 8th with power and position data reading eight times, then according to the subregion situation of LED display 7, each of correspondence is divided into address, corresponding place with location, power and position place, in reading the process of video source data, the address, place has limit priority, secondly priority is a column address, priority is a row address again, last priority level is the location, place.
The present invention includes same power and position separation module 3, the first data cache module 1, sdram controller 4, the second data cache module 2 that mutually communicates to connect in twos successively and the format converting module 6 that communicates connection with LED display 7, should show based on the big screen LED of SDRAM in addition that the device of controlling also comprise frame memory SDRAM and the control signal generation module 8 that communicates connection with described the first data cache module 1, sdram controller 4 and the second data cache module 2; Also utilize in addition frame memory SDRAM, by rationally utilizing storage space and optimal design storage policy, with traditional rgb video source by the conversion that deposits and read the demonstration data that can realize Grand LED Screen in of data and realized gray-scale Control, do not need complicated data switching logic, save hardware resource, improved the utilization rate of SDRAM.
Description of drawings
Fig. 1 is that the big screen LED based on SDRAM of the present invention shows the apparatus structure connection diagram of controlling.
Fig. 2 shows the method principle of work schematic diagram of the device of controlling for invention based on the big screen LED of SDRAM.
Embodiment
The present invention will be described in more detail below in conjunction with accompanying drawing.
As shown in Figure 1, big screen LED based on SDRAM shows the device of controlling, comprise same power and position separation module 3, the first data cache module 1, sdram controller 4, the second data cache module 2 that mutually communicates to connect in twos successively and the format converting module 6 that communicates connection with LED display 7, should show based on the big screen LED of SDRAM in addition that the device of controlling also comprise frame memory SDRAM and the control signal generation module 8 that communicates connection with described the first data cache module 1, sdram controller 4 and the second data cache module 2.as shown in Figure 2, the method that described big screen LED based on SDRAM shows the device of controlling for rgb signal that will input at first through being separated into eight with the power and position data with power and position separation module 3, and temporary to the first data cache module 1 with the power and position data with these eight, and write the memory location of the corresponding present frame of frame memory SDRAM under the control of sdram controller 4, meanwhile, in frame memory SDRAM, the data of the former frame of present frame are read out under the control of sdram controller 4 in the second data cache module 2, through format converting module 6, parallel data is converted to the serial data that LED display 7 needs afterwards, at last this serial data is exported to LED display 7, should show that all control signals in the method for the device of controlling were produced by control signal generation module 8 based on the big screen LED of SDRAM, and the required drive control signal of LED display 7 is produced by control signal generation module 8 also.Described the first data cache module 1 comprises that writing control module with field fifo reads with the fifo of field the field fifo group that control module communicates connection, and this fifo writes control module and is responsible in organizing with power and position data write field fifo through eight after separating with power and position; Field fifo group comprises first fifo, second fifo, the 3rd fifo, the 4th fifo, the 5th fifo, the 6th fifo, the 7th fifo and the 8th fifo, each fifo in fifo group is responsible for eight of buffer memorys with same power and position field data corresponding to power and position data, the bit wide of each fifo equals pixel bit wide of input source, the degree of depth of each fifo for the input rgb signal one-row pixels point 1/8, namely each fifo is row cache; And a fifo reads the data cached degree of depth that control module is responsible for detecting each fifo, just reads control module by sdram controller 4 controlling filed fifo and read successively the data of specifying number and the memory location that writes respectively the corresponding present frame of frame memory SDRAM when the data cached degree of depth that a fifo is arranged surpasses predetermined threshold value from this fifo.Described sdram controller 4 comprises with it to be read and write the ruling module and is connected the mux module to communicate writing SDRAM control module, SDRAM initialization module and reading the SDRAM control module of connection, write the generation of SDRAM control module and write the address of data correspondence in frame memory SDRAM and the write control signal of frame memory SDRAM, write in addition the field fifo that the SDRAM control module also be responsible for to control in the first data cache module 1 and read control module, make it data in fifo of field be write the memory location of the corresponding present frame of frame memory SDRAM; The SDRAM initialization module is responsible for after electrification reset, frame memory SDRAM being carried out initialization; Read the SDRAM control module and produce to read the read control signal of address corresponding to its data and frame memory SDRAM from frame memory SDRAM, read in addition the SDRAM control module also with data reading to the second data cache module 2 of the former frame of present frame in frame memory SDRAM; Read-write ruling module determines that SDRAM is in write state and still reads state; Select the mux module, it is completed and writes SDRAM control module, SDRAM initialization module and read the selection that the SDRAM control module is controlled frame memory SDRAM.Described the second data cache module 2 comprises that Tong Qi district fifo organizes the district fifo that communicates connection and writes control module and distinguish fifo and read control module, district fifo writes the data cached degree of depth that control module is responsible for detecting each the district fifo in fifo district group, require when surpassing predetermined threshold value sdram controller 5 control in the memory location of its data of the former frame of present frame from frame memory SDRAM with the appointment number data reading of assigned address and successively buffer memory to distinguishing in fifo; District's fifo group comprises n district fifo, n by frame memory SDRAM used the maximum longitudinal frame in energy store video source divided by the quotient of the line number in LED display 7th one district, the bit wide of each district fifo equals pixel bit wide of input source, the degree of depth for the input rgb signal one-row pixels point 1/8, namely distinguishing fifo is row cache; District fifo reads control module and is responsible for the data reading in the correspondence district fifo of district fifo group and gives format converting module 6.Described control signal generation module 8 comprises system control module and corresponding LED drive control module, all control signals in the method for the device that the big screen LED demonstration of SDRAM is controlled are produced by system control module, and the required drive control signal of LED display 7 is produced by the LED drive control module.the storage space of described frame memory SDRAM is divided into the first storage subspace and second and stores the subspace, the former frame video source data that present frame video source data and present frame are alternately stored in the subspace is stored in the first storage subspace and second, other the first storage subspace and second is stored the subspace and is divided into again eight parts, these eight parts are stored respectively eight of corresponding frame with the power and position data as coordination power location, place, control for convenience of read-write, each coordination is weighed the data line of the corresponding video source of each line storage unit storage in the location, place, this each line storage unit is a row address, every column address in each row address in corresponding frame memory SDRAM is deposited each pixel value of corresponding input video source row data, this every column address is corresponding field column address, in depositing the process of video source in, has limit priority with location, power and position place, inferior priority is a corresponding column address, last priority level is a corresponding row address, and during data reading, at first satisfy in the former frame video source of present frame and read 19 times with the power and position data amount through each after separating with power and position, be about to first with the power and position data, second with the power and position data, the 3rd with the power and position data, respectively read 1 time with the power and position data with power and position data and the 5th for the 4th, and with the 6th with power and position data reading 2 times, the 7th with power and position data reading 4 times and the 8th with power and position data reading eight times, then according to the subregion situation of LED display 7, each of correspondence is divided into address, corresponding place with location, power and position place, in reading the process of video source data, the address, place has limit priority, secondly priority is a column address, priority is a row address again, last priority level is the location, place.
Claims (2)
1. big screen LED display control unit based on SDRAM, it is characterized in that: comprise the same power and position separation module (3) that mutually communicates to connect in twos successively, the first data cache module (1), sdram controller (4), the second data cache module (2) and same LED display (7) communicate the format converting module (6) of connection, should show based on the big screen LED of SDRAM in addition that the device of controlling also comprised with described the first data cache module (1), sdram controller (4) and the second data cache module (2) communicate frame memory SDRAM and the control signal generation module (8) of connection, wherein,
The first data cache module (1) comprises that writing control module with field fifo reads with the fifo of field the field fifo group that control module communicates connection, and this fifo writes control module and is responsible in organizing with power and position data write field fifo through eight after separating with power and position; Field fifo group comprises first fifo, second fifo, the 3rd fifo, the 4th fifo, the 5th fifo, the 6th fifo, the 7th fifo and the 8th fifo, each fifo in fifo group is responsible for eight of buffer memorys with same power and position field data corresponding to power and position data, the bit wide of each fifo equals pixel bit wide of input source, the degree of depth of each fifo for the input rgb signal one-row pixels point 1/8, namely each fifo is row cache; And a fifo reads the data cached degree of depth that control module is responsible for detecting each fifo, just reads control module by sdram controller (4) controlling filed fifo and read successively the data of specifying number and the memory location that writes respectively the corresponding present frame of frame memory SDRAM when the data cached degree of depth that a fifo is arranged surpasses predetermined threshold value from this fifo;
Described sdram controller (4) comprises with it to be read and write the ruling module and is connected the mux module to communicate writing SDRAM control module, SDRAM initialization module and reading the SDRAM control module of connection, write the generation of SDRAM control module and write the address of data correspondence in frame memory SDRAM and the write control signal of frame memory SDRAM, write in addition the field fifo that the SDRAM control module also be responsible for to control in the first data cache module (1) and read control module, make it data in fifo of field be write the memory location of the corresponding present frame of frame memory SDRAM; The SDRAM initialization module is responsible for after electrification reset, frame memory SDRAM being carried out initialization; Read the SDRAM control module and produce to read the read control signal of address corresponding to its data and frame memory SDRAM from frame memory SDRAM, read in addition the SDRAM control module also with data reading to the second data cache module (2) of the former frame of present frame in frame memory SDRAM; Read-write ruling module determines that SDRAM is in write state and still reads state; Select the mux module, it is completed and writes SDRAM control module, SDRAM initialization module and read the selection that the SDRAM control module is controlled frame memory SDRAM;
Described the second data cache module (2) comprises that Tong Qi district fifo organizes the district fifo that communicates connection and writes control module and distinguish fifo and read control module, district fifo writes the data cached degree of depth that control module is responsible for detecting each the district fifo in fifo district group, require when surpassing predetermined threshold value sdram controller (4) control in the memory location of its data of the former frame of present frame from frame memory SDRAM with the appointment number data reading of assigned address and successively buffer memory to distinguishing in fifo; District's fifo group comprises n district fifo, n by frame memory SDRAM used the maximum longitudinal frame in energy store video source divided by the quotient of the line number in LED display (7) one districts, the bit wide of each district fifo equals pixel bit wide of input source, the degree of depth for the input rgb signal one-row pixels point 1/8, namely distinguishing fifo is row cache; District fifo reads control module and is responsible for the data reading in the correspondence district fifo of district fifo group and gives format converting module (6);
Described control signal generation module (8) comprises system control module and corresponding LED drive control module, big screen LED based on SDRAM shows that in the method for controlling, all control signals are produced by system control module, and the required drive control signal of LED display (7) is produced by the LED drive control module;
the storage space of described frame memory SDRAM is divided into the first storage subspace and second and stores the subspace, the former frame video source data that present frame video source data and present frame are alternately stored in the subspace is stored in the first storage subspace and second, other the first storage subspace and second is stored the subspace and is divided into again eight parts, these eight parts are stored respectively eight of corresponding frame with the power and position data as coordination power location, place, and each coordination is weighed the data line of the corresponding video source of each line storage unit storage in the location, place, this each line storage unit is a row address, every column address in each row address in corresponding frame memory SDRAM is deposited each pixel value of corresponding input video source row data, this every column address is corresponding field column address, in depositing the process of video source in, has limit priority with location, power and position place, inferior priority is a corresponding column address, last priority level is a corresponding row address, and during data reading, at first satisfy in the former frame video source of present frame and read 19 times with the power and position data amount through each after separating with power and position, be about to first with the power and position data, second with the power and position data, the 3rd with the power and position data, respectively read 1 time with the power and position data with power and position data and the 5th for the 4th, and with the 6th with power and position data reading 2 times, the 7th with power and position data reading 4 times and the 8th with power and position data reading eight times, then according to the subregion situation of LED display (7), each of correspondence is divided into address, corresponding place with location, power and position place, in reading the process of video source data, the address, place has limit priority, secondly priority is a column address, priority is a row address again, last priority level is the location, place.
2. the method for the big screen LED display control unit based on SDRAM according to claim 1, it is characterized in that: be separated into eight with the power and position data at first the rgb signal with input passes through with power and position separation module (3), and temporary to the first data cache module (1) with the power and position data with these eight, and write the memory location of the corresponding present frame of frame memory SDRAM under the control of sdram controller (4), meanwhile, in frame memory SDRAM, the data of the former frame of present frame are read out under the control of sdram controller (4) in the second data cache module (2), pass through afterwards format converting module (6) parallel data is converted to the serial data that LED display (7) needs, at last this serial data is exported to LED display (7).
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| CN104469241B (en) * | 2014-11-28 | 2018-01-16 | 中国航空无线电电子研究所 | A kind of device for realizing video frame rate conversion |
| CN104484149B (en) * | 2015-01-07 | 2018-01-12 | 西安诺瓦电子科技有限公司 | LED display synchronous control system off line player method and device |
| CN109992234B (en) * | 2017-12-29 | 2020-11-17 | 浙江宇视科技有限公司 | Image data reading method and device, electronic equipment and readable storage medium |
| CN108174107B (en) * | 2018-02-26 | 2020-05-12 | 厦门大学嘉庚学院 | Camera driving method based on Ryssa RX23T single-chip microcomputer |
| CN110444148A (en) * | 2019-07-30 | 2019-11-12 | 广州健飞通信有限公司 | FPGA implementation method, device and computer readable storage medium based on 256 grades of gray scale LED display screens |
| US20220036807A1 (en) * | 2020-07-31 | 2022-02-03 | Alphascale Technologies, Inc. | Apparatus and method for refreshing process in displaying images unto led panels |
| CN113157327A (en) * | 2021-04-29 | 2021-07-23 | 上海冠显光电科技有限公司 | Driving system and method capable of adapting to display modules with different sizes based on MCU |
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