AU2001257264A1 - A method and system for decreasing routing latency for switching platforms with variable configuration - Google Patents

A method and system for decreasing routing latency for switching platforms with variable configuration

Info

Publication number
AU2001257264A1
AU2001257264A1 AU2001257264A AU5726401A AU2001257264A1 AU 2001257264 A1 AU2001257264 A1 AU 2001257264A1 AU 2001257264 A AU2001257264 A AU 2001257264A AU 5726401 A AU5726401 A AU 5726401A AU 2001257264 A1 AU2001257264 A1 AU 2001257264A1
Authority
AU
Australia
Prior art keywords
variable configuration
switching platforms
routing latency
decreasing
decreasing routing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001257264A
Inventor
Thomas W. Bucht
Steve King
Chiayin Mao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Crossroads Systems Inc
Original Assignee
Crossroads Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Crossroads Systems Inc filed Critical Crossroads Systems Inc
Publication of AU2001257264A1 publication Critical patent/AU2001257264A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/60—Router architectures
AU2001257264A 2000-05-08 2001-04-25 A method and system for decreasing routing latency for switching platforms with variable configuration Abandoned AU2001257264A1 (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US20271600P 2000-05-08 2000-05-08
US60202716 2000-05-08
US60/202,716 2000-05-08
US09707443 2000-11-07
US09/707,443 US6922391B1 (en) 2000-05-08 2000-11-07 Method and system for decreasing routing latency for switching platforms with variable configuration
US09/707,443 2000-11-07
PCT/US2001/013357 WO2001086890A2 (en) 2000-05-08 2001-04-25 A method and system for decreasing routing latency for switching platforms with variable configuration

Publications (1)

Publication Number Publication Date
AU2001257264A1 true AU2001257264A1 (en) 2001-11-20

Family

ID=26897956

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001257264A Abandoned AU2001257264A1 (en) 2000-05-08 2001-04-25 A method and system for decreasing routing latency for switching platforms with variable configuration

Country Status (3)

Country Link
US (3) US6922391B1 (en)
AU (1) AU2001257264A1 (en)
WO (1) WO2001086890A2 (en)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0008195D0 (en) * 2000-04-05 2000-05-24 Power X Limited Data switching arbitration arrangements
US6922391B1 (en) * 2000-05-08 2005-07-26 Crossroads Systems Inc. Method and system for decreasing routing latency for switching platforms with variable configuration
US7733800B2 (en) * 2004-12-10 2010-06-08 Hewlett-Packard Development Company, L.P. Method and mechanism for identifying an unmanaged switch in a network
US8131871B2 (en) * 2006-01-12 2012-03-06 Cisco Technology, Inc. Method and system for the automatic reroute of data over a local area network
US7882307B1 (en) 2006-04-14 2011-02-01 Tilera Corporation Managing cache memory in a parallel processing environment
US8002756B2 (en) * 2006-12-08 2011-08-23 Becton, Dickinson And Company Method and apparatus for delivering a therapeutic substance through an injection port
US8359421B2 (en) * 2009-08-06 2013-01-22 Qualcomm Incorporated Partitioning a crossbar interconnect in a multi-channel memory system
US8665601B1 (en) 2009-09-04 2014-03-04 Bitmicro Networks, Inc. Solid state drive with improved enclosure assembly
US8447908B2 (en) 2009-09-07 2013-05-21 Bitmicro Networks, Inc. Multilevel memory bus system for solid-state mass storage
US8560804B2 (en) 2009-09-14 2013-10-15 Bitmicro Networks, Inc. Reducing erase cycles in an electronic storage device that uses at least one erase-limited memory device
US9372755B1 (en) 2011-10-05 2016-06-21 Bitmicro Networks, Inc. Adaptive power cycle sequences for data recovery
US9043669B1 (en) 2012-05-18 2015-05-26 Bitmicro Networks, Inc. Distributed ECC engine for storage media
US9423457B2 (en) 2013-03-14 2016-08-23 Bitmicro Networks, Inc. Self-test solution for delay locked loops
US9971524B1 (en) 2013-03-15 2018-05-15 Bitmicro Networks, Inc. Scatter-gather approach for parallel data transfer in a mass storage system
US9734067B1 (en) 2013-03-15 2017-08-15 Bitmicro Networks, Inc. Write buffering
US9875205B1 (en) 2013-03-15 2018-01-23 Bitmicro Networks, Inc. Network of memory systems
US9501436B1 (en) 2013-03-15 2016-11-22 Bitmicro Networks, Inc. Multi-level message passing descriptor
US9400617B2 (en) 2013-03-15 2016-07-26 Bitmicro Networks, Inc. Hardware-assisted DMA transfer with dependency table configured to permit-in parallel-data drain from cache without processor intervention when filled or drained
US9672178B1 (en) 2013-03-15 2017-06-06 Bitmicro Networks, Inc. Bit-mapped DMA transfer with dependency table configured to monitor status so that a processor is not rendered as a bottleneck in a system
US9720603B1 (en) * 2013-03-15 2017-08-01 Bitmicro Networks, Inc. IOC to IOC distributed caching architecture
US9916213B1 (en) 2013-03-15 2018-03-13 Bitmicro Networks, Inc. Bus arbitration with routing and failover mechanism
US9798688B1 (en) 2013-03-15 2017-10-24 Bitmicro Networks, Inc. Bus arbitration with routing and failover mechanism
US10120694B2 (en) 2013-03-15 2018-11-06 Bitmicro Networks, Inc. Embedded system boot from a storage device
US9934045B1 (en) 2013-03-15 2018-04-03 Bitmicro Networks, Inc. Embedded system boot from a storage device
US9430386B2 (en) 2013-03-15 2016-08-30 Bitmicro Networks, Inc. Multi-leveled cache management in a hybrid storage system
US10489318B1 (en) 2013-03-15 2019-11-26 Bitmicro Networks, Inc. Scatter-gather approach for parallel data transfer in a mass storage system
US9842024B1 (en) 2013-03-15 2017-12-12 Bitmicro Networks, Inc. Flash electronic disk with RAID controller
US9811461B1 (en) 2014-04-17 2017-11-07 Bitmicro Networks, Inc. Data storage system
US10042792B1 (en) 2014-04-17 2018-08-07 Bitmicro Networks, Inc. Method for transferring and receiving frames across PCI express bus for SSD device
US9952991B1 (en) 2014-04-17 2018-04-24 Bitmicro Networks, Inc. Systematic method on queuing of descriptors for multiple flash intelligent DMA engine operation
US10025736B1 (en) 2014-04-17 2018-07-17 Bitmicro Networks, Inc. Exchange message protocol message transmission between two devices
US10055150B1 (en) 2014-04-17 2018-08-21 Bitmicro Networks, Inc. Writing volatile scattered memory metadata to flash device
US10078604B1 (en) 2014-04-17 2018-09-18 Bitmicro Networks, Inc. Interrupt coalescing
US10552050B1 (en) 2017-04-07 2020-02-04 Bitmicro Llc Multi-dimensional computer storage system
US10693717B2 (en) * 2018-02-03 2020-06-23 Adva Optical Networking Se Assisted port identification by connection an Activation device to a physical port and detecting a state change for a particular software virtual interface

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5862338A (en) * 1996-12-30 1999-01-19 Compaq Computer Corporation Polling system that determines the status of network ports and that stores values indicative thereof
US6504817B2 (en) 1997-03-31 2003-01-07 Hewlett-Packard Company Fiber channel arbitrated loop dynamic loop sizing
US5991299A (en) * 1997-09-11 1999-11-23 3Com Corporation High speed header translation processing
US6148004A (en) 1998-02-11 2000-11-14 Mcdata Corporation Method and apparatus for establishment of dynamic ESCON connections from fibre channel frames
US6195703B1 (en) * 1998-06-24 2001-02-27 Emc Corporation Dynamic routing for performance partitioning in a data processing network
US6625121B1 (en) * 1999-04-28 2003-09-23 Cisco Technology, Inc. Dynamically delisting and relisting multicast destinations in a network switching node
US6715023B1 (en) * 1999-09-23 2004-03-30 Altera Corporation PCI bus switch architecture
US6922391B1 (en) * 2000-05-08 2005-07-26 Crossroads Systems Inc. Method and system for decreasing routing latency for switching platforms with variable configuration

Also Published As

Publication number Publication date
US20090180473A1 (en) 2009-07-16
US20050180409A1 (en) 2005-08-18
WO2001086890A2 (en) 2001-11-15
US7912053B2 (en) 2011-03-22
US6922391B1 (en) 2005-07-26
US7508756B2 (en) 2009-03-24
WO2001086890A3 (en) 2002-07-18

Similar Documents

Publication Publication Date Title
AU2001257264A1 (en) A method and system for decreasing routing latency for switching platforms with variable configuration
AU2002225674A1 (en) Method and system for switching variable sized packets
AU2001262507A1 (en) Switching system
AU2001284681A1 (en) Fluidics system
AU2001275762A1 (en) Simulation system
AU2001239746A1 (en) Group-browsing system
AU2001295809A1 (en) Telecommunications routing
AU2001294694A1 (en) System and method for seamless switching
AU2001251455A1 (en) Systems and methods for routing packets on alternate paths
AU2001295800A1 (en) Telecommunications routing
AU2001277243A1 (en) Anti-waveguide routing structure
AU2001271777A1 (en) System and methods for performing a handover between a circuit switched environment and a packet switched environment
AU2001233769A1 (en) Cost control in a telecommunications system
AU2001290141A1 (en) Variable automated response system
WO2002023370A8 (en) Optimization method and system
AU4262401A (en) Network routing and congestion control
AU2003279987A1 (en) Methods and systems for routing requests at a network switch
AU2001290416A1 (en) Switching device system, components therefore and methods relating thereto
AU2002241559A1 (en) Switching system
AU2002351159A1 (en) Method and system for a switched virtual circuit with virtual termination
AU2001283870A1 (en) Telecommunications systems
AU2001284775A1 (en) Anti-balling system
AU2001266322A1 (en) Bookmark system
AU6733300A (en) A learning-assistance system
AU2001271959A1 (en) Pallet use-conversion system