ZA98409B - Microprocessor cache consistency - Google Patents

Microprocessor cache consistency

Info

Publication number
ZA98409B
ZA98409B ZA98409A ZA98409A ZA98409B ZA 98409 B ZA98409 B ZA 98409B ZA 98409 A ZA98409 A ZA 98409A ZA 98409 A ZA98409 A ZA 98409A ZA 98409 B ZA98409 B ZA 98409B
Authority
ZA
South Africa
Prior art keywords
memory
cache consistency
microprocessor cache
cacheable
blocks
Prior art date
Application number
ZA98409A
Other languages
English (en)
Inventor
Ian Nigel Harvey
Original Assignee
Ncipher Corp Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ncipher Corp Limited filed Critical Ncipher Corp Limited
Publication of ZA98409B publication Critical patent/ZA98409B/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0837—Cache consistency protocols with software control, e.g. non-cacheable data

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Microcomputers (AREA)
  • Multi Processors (AREA)
ZA98409A 1997-07-15 1998-01-19 Microprocessor cache consistency ZA98409B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9714757A GB2318657B (en) 1997-07-15 1997-07-15 Microprocessor cache consistency

Publications (1)

Publication Number Publication Date
ZA98409B true ZA98409B (en) 1998-11-03

Family

ID=10815796

Family Applications (1)

Application Number Title Priority Date Filing Date
ZA98409A ZA98409B (en) 1997-07-15 1998-01-19 Microprocessor cache consistency

Country Status (14)

Country Link
US (1) US6138216A (de)
EP (1) EP0995155B1 (de)
JP (1) JP3295436B2 (de)
AT (1) ATE225962T1 (de)
AU (1) AU5570598A (de)
CA (1) CA2228061C (de)
DE (1) DE69808628T2 (de)
DK (1) DK0995155T3 (de)
ES (1) ES2183318T3 (de)
GB (1) GB2318657B (de)
HK (1) HK1027641A1 (de)
PT (1) PT995155E (de)
WO (1) WO1999004341A1 (de)
ZA (1) ZA98409B (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4179677B2 (ja) * 1998-09-04 2008-11-12 株式会社ルネサステクノロジ マルチプロセッサ装置
US6397301B1 (en) * 1999-12-29 2002-05-28 Intel Corporation Preventing access to secure area of a cache
US6832295B1 (en) * 2000-04-26 2004-12-14 Ncr Corporation Methods and systems for extending an application's address space
US6640233B1 (en) * 2000-08-18 2003-10-28 Network Appliance, Inc. Reserving file system blocks
US6564299B1 (en) * 2001-07-30 2003-05-13 Lsi Logic Corporation Method and apparatus for defining cacheable address ranges
US7117315B2 (en) * 2002-06-27 2006-10-03 Fujitsu Limited Method and apparatus for creating a load module and a computer product thereof
US20070050549A1 (en) * 2005-08-31 2007-03-01 Verdun Gary J Method and system for managing cacheability of data blocks to improve processor power management
US8521736B2 (en) 2005-10-26 2013-08-27 Dassault Systemes Enovia Corp. Managing hierarchies of components
JP2009053820A (ja) * 2007-08-24 2009-03-12 Nec Electronics Corp 階層型キャッシュメモリシステム
JP5194703B2 (ja) * 2007-10-16 2013-05-08 ソニー株式会社 データ処理装置及び共有メモリのアクセス方法
JP5283128B2 (ja) 2009-12-16 2013-09-04 学校法人早稲田大学 プロセッサによって実行可能なコードの生成方法、記憶領域の管理方法及びコード生成プログラム
US11270032B1 (en) 2018-12-27 2022-03-08 Thales E-Security, Inc. Tamper switch assembly and installation method thereof

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4264953A (en) * 1979-03-30 1981-04-28 Honeywell Inc. Virtual cache
US4885680A (en) * 1986-07-25 1989-12-05 International Business Machines Corporation Method and apparatus for efficiently handling temporarily cacheable data
US5091846A (en) * 1986-10-03 1992-02-25 Intergraph Corporation Cache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherency
US5321834A (en) * 1989-11-28 1994-06-14 Xerox Corporation Method and system for reclaiming unreferenced computer memory space
US5075848A (en) * 1989-12-22 1991-12-24 Intel Corporation Object lifetime control in an object-oriented memory protection mechanism
EP0598570B1 (de) * 1992-11-13 2000-01-19 National Semiconductor Corporation Mikroprozessor mit Adressbereichkonfigurationsystem und Verfahren zur Steuerung von Speichersystemoperationen mittels Adressbereichen
US5897660A (en) * 1995-04-07 1999-04-27 Intel Corporation Method for managing free physical pages that reduces trashing to improve system performance

Also Published As

Publication number Publication date
AU5570598A (en) 1999-02-10
JP2000512050A (ja) 2000-09-12
GB2318657A (en) 1998-04-29
DK0995155T3 (da) 2003-02-10
HK1027641A1 (en) 2001-01-19
EP0995155A1 (de) 2000-04-26
GB9714757D0 (en) 1997-09-17
ES2183318T3 (es) 2003-03-16
DE69808628D1 (de) 2002-11-14
CA2228061A1 (en) 1999-01-15
DE69808628T2 (de) 2003-07-10
GB2318657B (en) 1998-09-02
US6138216A (en) 2000-10-24
JP3295436B2 (ja) 2002-06-24
CA2228061C (en) 2002-09-17
ATE225962T1 (de) 2002-10-15
EP0995155B1 (de) 2002-10-09
PT995155E (pt) 2003-02-28
WO1999004341A1 (en) 1999-01-28

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