ZA901191B - Method of operating signal techniques of certain multiple accounting systems - Google Patents
Method of operating signal techniques of certain multiple accounting systemsInfo
- Publication number
- ZA901191B ZA901191B ZA901191A ZA901191A ZA901191B ZA 901191 B ZA901191 B ZA 901191B ZA 901191 A ZA901191 A ZA 901191A ZA 901191 A ZA901191 A ZA 901191A ZA 901191 B ZA901191 B ZA 901191B
- Authority
- ZA
- South Africa
- Prior art keywords
- computers
- detected
- channel
- computer
- data
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1608—Error detection by comparing the output signals of redundant hardware
- G06F11/1625—Error detection by comparing the output signals of redundant hardware in communications, e.g. transmission, interfaces
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
- G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0796—Safety measures, i.e. ensuring safe condition in the event of error, e.g. for controlling element
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
- G06F11/1443—Transmit or communication errors
Abstract
A multicomputer system comprises individual computers (R1 to R3) characterized by reliable signal quality, which communicate through two separate channels. If one channel fails, data transmission continues in single-channel operation through the remaining channel, and errors in the data are detected by higher redundancy. The individual computers (R1, R2) are associated with time monitors (Z1, Z2) which can be adjusted when an error is detected and switch off the individual computers after a maximum permissible time-interval for single channel operation. These time monitors can be reset individually when the associated computer recognizes that it can exchange data with any of the other computers in the multicomputer system through both channels. To this end, it permits the emission of test data (P2.1, P2.2) to the computers of the computer system and evaluates the acknowledgement messages (Q2.1, Q.2.2) from the latter. When its time monitor (z1) is reset, the computer (R1) resumes communication with the other computers, with the exception of the computer (R2) in which the error has been detected, in the two-channel operating mode for data transmission in which errors are not detected with high redundancy.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE3904748 | 1989-02-16 |
Publications (1)
Publication Number | Publication Date |
---|---|
ZA901191B true ZA901191B (en) | 1991-01-30 |
Family
ID=6374271
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ZA901191A ZA901191B (en) | 1989-02-16 | 1990-02-16 | Method of operating signal techniques of certain multiple accounting systems |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0458803B1 (en) |
AT (1) | ATE105954T1 (en) |
DE (1) | DE59005758D1 (en) |
DK (1) | DK0458803T3 (en) |
WO (1) | WO1990009633A1 (en) |
ZA (1) | ZA901191B (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5737515A (en) * | 1996-06-27 | 1998-04-07 | Sun Microsystems, Inc. | Method and mechanism for guaranteeing timeliness of programs |
DE10105707A1 (en) * | 2001-02-08 | 2002-09-05 | Siemens Ag | Method and device for data transmission |
US6898728B2 (en) * | 2001-09-25 | 2005-05-24 | Sun Microsystems, Inc. | System domain targeted, configurable interconnection |
US6871294B2 (en) * | 2001-09-25 | 2005-03-22 | Sun Microsystems, Inc. | Dynamically reconfigurable interconnection |
US9891277B2 (en) | 2014-09-30 | 2018-02-13 | Nxp Usa, Inc. | Secure low voltage testing |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3108871A1 (en) * | 1981-03-09 | 1982-09-16 | Siemens AG, 1000 Berlin und 8000 München | DEVICE FOR FUNCTIONAL TESTING OF A MULTIPLE COMPUTER SYSTEM |
DE3442418A1 (en) * | 1984-11-20 | 1986-05-22 | Siemens AG, 1000 Berlin und 8000 München | METHOD FOR OPERATING A SIGNAL-SECURE MULTIPLE COMPUTER SYSTEM WITH MULTIPLE SIGNAL-NON-SECURE IN / OUTPUT ASSEMBLIES |
-
1990
- 1990-02-02 DK DK90902160.2T patent/DK0458803T3/en active
- 1990-02-02 EP EP90902160A patent/EP0458803B1/en not_active Expired - Lifetime
- 1990-02-02 AT AT90902160T patent/ATE105954T1/en not_active IP Right Cessation
- 1990-02-02 WO PCT/DE1990/000073 patent/WO1990009633A1/en active IP Right Grant
- 1990-02-02 DE DE59005758T patent/DE59005758D1/en not_active Expired - Fee Related
- 1990-02-16 ZA ZA901191A patent/ZA901191B/en unknown
Also Published As
Publication number | Publication date |
---|---|
EP0458803B1 (en) | 1994-05-18 |
EP0458803A1 (en) | 1991-12-04 |
DE59005758D1 (en) | 1994-06-23 |
ATE105954T1 (en) | 1994-06-15 |
DK0458803T3 (en) | 1994-10-10 |
WO1990009633A1 (en) | 1990-08-23 |
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