ZA201407602B - Digital sensing circuit for a secondary clock signal to be monitored for clock failure with the aid of a primary clock signal - Google Patents
Digital sensing circuit for a secondary clock signal to be monitored for clock failure with the aid of a primary clock signalInfo
- Publication number
- ZA201407602B ZA201407602B ZA2014/07602A ZA201407602A ZA201407602B ZA 201407602 B ZA201407602 B ZA 201407602B ZA 2014/07602 A ZA2014/07602 A ZA 2014/07602A ZA 201407602 A ZA201407602 A ZA 201407602A ZA 201407602 B ZA201407602 B ZA 201407602B
- Authority
- ZA
- South Africa
- Prior art keywords
- clock signal
- monitored
- aid
- sensing circuit
- failure
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/08—Output circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/40—Monitoring; Error detection; Preventing or correcting improper counter operation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
- H03K3/0375—Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Testing And Monitoring For Control Systems (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Monitoring And Testing Of Nuclear Reactors (AREA)
- Measurement Of Unknown Time Intervals (AREA)
- Safety Devices In Control Systems (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102012209971A DE102012209971B3 (en) | 2012-06-14 | 2012-06-14 | Digital sampling circuit for a primary clock signal to be monitored for clock loss secondary clock signal |
PCT/EP2013/058168 WO2013185960A2 (en) | 2012-06-14 | 2013-04-19 | Digital sensing circuit for a secondary clock signal to be monitored for clock failure with the aid of a primary clock signal |
Publications (1)
Publication Number | Publication Date |
---|---|
ZA201407602B true ZA201407602B (en) | 2016-02-24 |
Family
ID=48236883
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ZA2014/07602A ZA201407602B (en) | 2012-06-14 | 2014-10-20 | Digital sensing circuit for a secondary clock signal to be monitored for clock failure with the aid of a primary clock signal |
Country Status (8)
Country | Link |
---|---|
EP (1) | EP2862279B1 (en) |
CN (1) | CN104380606B (en) |
BR (1) | BR112014030648B1 (en) |
DE (1) | DE102012209971B3 (en) |
ES (1) | ES2594775T3 (en) |
PL (1) | PL2862279T3 (en) |
WO (1) | WO2013185960A2 (en) |
ZA (1) | ZA201407602B (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110048712A (en) * | 2019-05-17 | 2019-07-23 | 湖北京邦科技有限公司 | Pulse generating device and chip including the pulse generating device |
CN111539531A (en) * | 2020-04-28 | 2020-08-14 | 济南浪潮高新科技投资发展有限公司 | Quantum bit resetting method, device, equipment and readable storage medium |
CN114448398A (en) * | 2020-11-02 | 2022-05-06 | 圣邦微电子(北京)股份有限公司 | Battery protection chip, multi-delay clock chain multiplexing circuit and method thereof |
CN114006605B (en) * | 2021-12-31 | 2022-05-10 | 峰岹科技(深圳)股份有限公司 | Single-edge delay circuit |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05191236A (en) * | 1992-01-17 | 1993-07-30 | Fujitsu Ltd | Clock interruption detection circuit |
KR950005940B1 (en) * | 1992-12-29 | 1995-06-07 | 재단법인한국전자통신연구소 | Clock monitoring circuit |
CN1148874C (en) * | 1999-12-29 | 2004-05-05 | 上海贝尔有限公司 | Clock signal pulse missing detecting circuit |
JP2002026705A (en) * | 2000-07-13 | 2002-01-25 | Mitsubishi Electric Corp | Pulse detector |
US7038508B2 (en) * | 2004-04-30 | 2006-05-02 | Intel Corporation | Methods and apparatuses for detecting clock loss in a phase-locked loop |
WO2007110099A1 (en) * | 2006-03-27 | 2007-10-04 | Freescale Semiconductor, Inc. | Apparatus for detecting clock failure and method therefor |
DE102007031131A1 (en) * | 2007-06-29 | 2009-01-08 | IHP GmbH - Innovations for High Performance Microelectronics/Institut für innovative Mikroelektronik | Clock monitoring circuit, particularly clock watch dog circuit for use with an integrated circuit, has reference clock generator, which comprises ring oscillator formed for producing reference clock signal of reference clock frequency |
CN102497200B (en) * | 2011-12-13 | 2015-04-15 | 东南大学 | Clock signal loss detecting circuit and clock signal loss detecting method |
CN202364199U (en) * | 2011-12-13 | 2012-08-01 | 东南大学 | Detection circuit for clock signal loss |
-
2012
- 2012-06-14 DE DE102012209971A patent/DE102012209971B3/en not_active Expired - Fee Related
-
2013
- 2013-04-19 PL PL13719767T patent/PL2862279T3/en unknown
- 2013-04-19 CN CN201380030604.4A patent/CN104380606B/en not_active Expired - Fee Related
- 2013-04-19 EP EP13719767.9A patent/EP2862279B1/en active Active
- 2013-04-19 BR BR112014030648-6A patent/BR112014030648B1/en not_active IP Right Cessation
- 2013-04-19 WO PCT/EP2013/058168 patent/WO2013185960A2/en active Application Filing
- 2013-04-19 ES ES13719767.9T patent/ES2594775T3/en active Active
-
2014
- 2014-10-20 ZA ZA2014/07602A patent/ZA201407602B/en unknown
Also Published As
Publication number | Publication date |
---|---|
DE102012209971B3 (en) | 2013-05-29 |
PL2862279T3 (en) | 2017-01-31 |
ES2594775T3 (en) | 2016-12-22 |
CN104380606A (en) | 2015-02-25 |
BR112014030648A2 (en) | 2017-06-27 |
EP2862279A2 (en) | 2015-04-22 |
BR112014030648B1 (en) | 2022-02-22 |
WO2013185960A3 (en) | 2014-02-20 |
EP2862279B1 (en) | 2016-07-06 |
CN104380606B (en) | 2017-04-26 |
WO2013185960A2 (en) | 2013-12-19 |
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