YU90982A - Circuit for mutual synchronization of several pcm signals centralized at one communication point - Google Patents

Circuit for mutual synchronization of several pcm signals centralized at one communication point

Info

Publication number
YU90982A
YU90982A YU00909/82A YU90982A YU90982A YU 90982 A YU90982 A YU 90982A YU 00909/82 A YU00909/82 A YU 00909/82A YU 90982 A YU90982 A YU 90982A YU 90982 A YU90982 A YU 90982A
Authority
YU
Yugoslavia
Prior art keywords
circuit
communication point
pcm signals
mutual synchronization
several pcm
Prior art date
Application number
YU00909/82A
Other languages
English (en)
Inventor
V Falzone
M Tommasi
Original Assignee
Italtel Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Italtel Spa filed Critical Italtel Spa
Publication of YU90982A publication Critical patent/YU90982A/xx

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/062Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
    • H04J3/0629Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators in a network, e.g. in combination with switching or multiplexing, slip buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Hardware Design (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
YU00909/82A 1981-04-30 1982-04-27 Circuit for mutual synchronization of several pcm signals centralized at one communication point YU90982A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8121477A IT8121477A0 (it) 1981-04-30 1981-04-30 Disposizione circuitale atta ad allineare tra loro una pluralita'di fasci pcm coerenti che pervengono ad un nodo di comunicazione.

Publications (1)

Publication Number Publication Date
YU90982A true YU90982A (en) 1985-03-20

Family

ID=11182405

Family Applications (1)

Application Number Title Priority Date Filing Date
YU00909/82A YU90982A (en) 1981-04-30 1982-04-27 Circuit for mutual synchronization of several pcm signals centralized at one communication point

Country Status (9)

Country Link
BR (1) BR8202163A (it)
DE (1) DE3216040A1 (it)
ES (1) ES8304391A1 (it)
FR (1) FR2505108A1 (it)
GB (1) GB2102251A (it)
GR (1) GR76041B (it)
IT (1) IT8121477A0 (it)
PT (1) PT74815B (it)
YU (1) YU90982A (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2601534B1 (fr) * 1986-07-10 1993-07-30 Cit Alcatel Procede et dispositif de calage en phase de trains numeriques synchrones
CA2050650A1 (en) * 1990-11-28 1992-05-29 Shahrukh S. Merchant Phase aligner

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE789775A (fr) * 1971-10-06 1973-04-06 Siemens Ag Dispositif de synchronisation mutuelle des oscillateurs de cadence de centraux d'un systeme de telecommunications pcm a multiplexage dans le temps
DE2247666C2 (de) * 1972-09-28 1975-02-20 Siemens Ag, 1000 Berlin Und 8000 Muenchen Schaltungsanordnung zur gegenseitigen Synchronisierung der In den Vermittlungsstellen eines PCM-Zeitmultlplex-FernmeMenetzes vorgesehenen Amtstaktoszillatoren
DE2641547C2 (de) * 1976-09-15 1980-11-20 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Übernahme von PCM Informationen
DE2936938C2 (de) * 1979-09-12 1987-01-08 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum Ausgleich der Phasenunterschiede zwischen dem Streckentakt auf einer mit einer PCM-Vermittlungsstelle verbindenden PCM-Zeitmultiplexleitung und dem Amtstakt dieser Vermittlungsstelle

Also Published As

Publication number Publication date
ES511762A0 (es) 1983-03-16
FR2505108A1 (fr) 1982-11-05
BR8202163A (pt) 1983-03-29
DE3216040A1 (de) 1982-11-25
IT8121477A0 (it) 1981-04-30
PT74815A (en) 1982-05-01
GR76041B (it) 1984-08-03
PT74815B (en) 1983-11-30
GB2102251A (en) 1983-01-26
ES8304391A1 (es) 1983-03-16

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