YU171288A - Circuit for bus controlling and for decoding - Google Patents

Circuit for bus controlling and for decoding

Info

Publication number
YU171288A
YU171288A YU01712/88A YU171288A YU171288A YU 171288 A YU171288 A YU 171288A YU 01712/88 A YU01712/88 A YU 01712/88A YU 171288 A YU171288 A YU 171288A YU 171288 A YU171288 A YU 171288A
Authority
YU
Yugoslavia
Prior art keywords
decoding
circuit
bus controlling
bus
controlling
Prior art date
Application number
YU01712/88A
Other languages
English (en)
Inventor
F Rendina
L Savogin
Original Assignee
Honeywell Bull Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Bull Spa filed Critical Honeywell Bull Spa
Publication of YU171288A publication Critical patent/YU171288A/xx

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/028—Arrangements specific to the transmitter end
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0292—Arrangements specific to the receiver end

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
YU01712/88A 1987-09-16 1988-09-08 Circuit for bus controlling and for decoding YU171288A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT21919/87A IT1222664B (it) 1987-09-16 1987-09-16 Circuito di pilotaggio di bus e di decodifica

Publications (1)

Publication Number Publication Date
YU171288A true YU171288A (en) 1991-04-30

Family

ID=11188786

Family Applications (1)

Application Number Title Priority Date Filing Date
YU01712/88A YU171288A (en) 1987-09-16 1988-09-08 Circuit for bus controlling and for decoding

Country Status (5)

Country Link
US (1) US4967390A (it)
EP (1) EP0307793B1 (it)
DE (1) DE3853508T2 (it)
IT (1) IT1222664B (it)
YU (1) YU171288A (it)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2657740A1 (fr) * 1990-01-26 1991-08-02 Sgs Thomson Microelectronics Procede et circuit de commande d'un bus de sortie de circuit integre.
US5287464A (en) * 1990-10-24 1994-02-15 Zilog, Inc. Semiconductor multi-device system with logic means for controlling the operational mode of a set of input/output data bus drivers
US5586302A (en) * 1991-06-06 1996-12-17 International Business Machines Corporation Personal computer system having storage controller with memory write control
US5504926A (en) * 1992-09-24 1996-04-02 Unisys Corporation Method for a host central processor and its associated controller to capture the selected one of a number of memory units via path control commands
US20100030423A1 (en) * 1999-06-17 2010-02-04 Paxgrid Telemetric Systems, Inc. Automotive telemetry protocol
US20020150050A1 (en) * 1999-06-17 2002-10-17 Nathanson Martin D. Automotive telemetry protocol
US6453373B1 (en) 1999-12-30 2002-09-17 Intel Corporation Method and apparatus for differential strobing
US10187767B2 (en) 2016-07-01 2019-01-22 Paxgrid Cdn Inc. System for authenticating and authorizing access to and accounting for wireless access vehicular environment consumption by client devices

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4376982A (en) * 1980-06-30 1983-03-15 International Business Machines Corporation Protocol for inter-processor dialog over a communication network
US4583193A (en) * 1982-02-22 1986-04-15 International Business Machines Corp. Integrated circuit mechanism for coupling multiple programmable logic arrays to a common bus
US4453229A (en) * 1982-03-11 1984-06-05 Grumman Aerospace Corporation Bus interface unit
US4737670A (en) * 1984-11-09 1988-04-12 Lsi Logic Corporation Delay control circuit
NL8502859A (nl) * 1985-10-21 1987-05-18 Philips Nv Schakelingenstelsel met hersynchronisatie van gegevens.
FR2596595B1 (fr) * 1986-03-28 1988-05-13 Radiotechnique Compelec Porte logique mos du type domino

Also Published As

Publication number Publication date
IT1222664B (it) 1990-09-12
EP0307793A2 (en) 1989-03-22
DE3853508T2 (de) 1995-08-31
IT8721919A0 (it) 1987-09-16
US4967390A (en) 1990-10-30
EP0307793B1 (en) 1995-04-05
DE3853508D1 (de) 1995-05-11
EP0307793A3 (en) 1990-04-25

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