YU105586A - Device for equalising pcm groups on entrance in communication node - Google Patents

Device for equalising pcm groups on entrance in communication node

Info

Publication number
YU105586A
YU105586A YU01055/86A YU105586A YU105586A YU 105586 A YU105586 A YU 105586A YU 01055/86 A YU01055/86 A YU 01055/86A YU 105586 A YU105586 A YU 105586A YU 105586 A YU105586 A YU 105586A
Authority
YU
Yugoslavia
Prior art keywords
equalising
entrance
communication node
pcm groups
pcm
Prior art date
Application number
YU01055/86A
Other languages
English (en)
Inventor
F Marchelli
P Sarto
Original Assignee
Italtel Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Italtel Spa filed Critical Italtel Spa
Publication of YU105586A publication Critical patent/YU105586A/xx

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
    • H04J3/0629—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators in a network, e.g. in combination with switching or multiplexing, slip buffers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
YU01055/86A 1985-07-31 1986-06-18 Device for equalising pcm groups on entrance in communication node YU105586A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT21782/85A IT1200701B (it) 1985-07-31 1985-07-31 Disposizione circuitale atta ad allineare tra di loro i fasci pcm che pervengono ad un nodo di comunicazione

Publications (1)

Publication Number Publication Date
YU105586A true YU105586A (en) 1988-12-31

Family

ID=11186772

Family Applications (1)

Application Number Title Priority Date Filing Date
YU01055/86A YU105586A (en) 1985-07-31 1986-06-18 Device for equalising pcm groups on entrance in communication node

Country Status (5)

Country Link
EP (1) EP0231202A1 (it)
GR (1) GR861642B (it)
IT (1) IT1200701B (it)
WO (1) WO1987001006A1 (it)
YU (1) YU105586A (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6388717B1 (en) 1999-01-20 2002-05-14 Harris Corporation Digital television transmitting system having data and clock recovering circuit
EP1122900A1 (en) * 2000-01-31 2001-08-08 Harris Corporation Digital television transmitting system having data and clock recovering circuit

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2546793A1 (de) * 1975-10-18 1977-04-21 Hentschel Systemgesellschaft M Verfahren und einrichtung zur rahmensynchronisation bei der uebertragung von pcm-signalen
IT1149253B (it) * 1980-09-09 1986-12-03 Sits Soc It Telecom Siemens Rete di commutazione per canali pcm
US4450572A (en) * 1982-05-07 1984-05-22 Digital Equipment Corporation Interface for serial data communications link

Also Published As

Publication number Publication date
GR861642B (en) 1986-08-01
WO1987001006A1 (en) 1987-02-12
IT1200701B (it) 1989-01-27
EP0231202A1 (en) 1987-08-12
IT8521782A0 (it) 1985-07-31

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