WO2026016830A1 - 一种通信方法、装置及系统 - Google Patents

一种通信方法、装置及系统

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Publication number
WO2026016830A1
WO2026016830A1 PCT/CN2025/105190 CN2025105190W WO2026016830A1 WO 2026016830 A1 WO2026016830 A1 WO 2026016830A1 CN 2025105190 W CN2025105190 W CN 2025105190W WO 2026016830 A1 WO2026016830 A1 WO 2026016830A1
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WIPO (PCT)
Prior art keywords
sequence
synchronization signal
denoted
signal
sequences
Prior art date
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PCT/CN2025/105190
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English (en)
French (fr)
Inventor
邹通
张旭
甘霖霄
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Publication of WO2026016830A1 publication Critical patent/WO2026016830A1/zh
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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements

Definitions

  • This application relates to the field of communication technology, and in particular to a communication method, apparatus and system.
  • synchronization signals are used for time-frequency synchronization between terminal devices and network devices.
  • a network device can send a synchronization signal (SS)/physical broadcast channel (PBCH) block (SS/PBCH block).
  • SS/PBCH block synchronization signal/physical broadcast channel block
  • the terminal device can perform time-frequency synchronization and obtain cell information (such as the physical cell identity (PCI)) to facilitate cell access.
  • the SS/PBCH block includes a primary synchronization signal (PSS), a secondary synchronization signal (SSS), and a physical broadcast channel (PBCH).
  • PSS primary synchronization signal
  • SSS secondary synchronization signal
  • PBCH physical broadcast channel
  • Terminal devices rely on a master synchronization signal for time and frequency synchronization, which makes the detection of the master synchronization signal complex. Further research is needed to reduce this complexity.
  • This application provides a communication method, apparatus, and system for reducing the complexity of detecting synchronization signals.
  • embodiments of this application provide a communication method that can be applied to a first communication device, which can be a network device or a component (such as a chip or circuit) within a network device.
  • a first communication device which can be a network device or a component (such as a chip or circuit) within a network device.
  • the first communication device generates a synchronization signal based on a first sequence and sends the synchronization signal; wherein the first sequence is ideally autocorrelated, and the set of values for the elements of the first sequence is ⁇ -A, 0, A ⁇ , where A is a constant.
  • the detection complexity of the synchronization signal can be reduced while ensuring the detection performance of the synchronization signal.
  • a synchronization signal is generated by performing DFT processing, subcarrier mapping, and IFFT processing on the first sequence, i.e., the synchronization signal is transmitted using a DFT-s-OFDM waveform.
  • generating a synchronization signal based on a first sequence includes: mapping the first sequence onto multiple subcarriers and performing IFFT processing to generate the synchronization signal.
  • a synchronization signal is generated by subcarrier mapping and IFFT processing of the first sequence, i.e., the synchronization signal is transmitted using an OFDM waveform.
  • A 1.
  • the first sequence is obtained based on a third sequence, where the set of values for the elements in the third sequence is ⁇ 0, 1, 2 ⁇ ; the first sequence is denoted as [x(n)], and the third sequence is denoted as [s(n)], and the first sequence and the third sequence satisfy:
  • the set of element values is ⁇ 0,1,2 ⁇ , 1 and -2 are congruent modulo 3, and 2 and -1 are congruent modulo 3. Therefore, the element 2 in the final generated sequence can be replaced with -1.
  • the transmission power of the synchronization signal is a first power plus a power bias, wherein the power bias is equal to...
  • L represents the length of the first sequence, and m represents the number of elements in the first sequence that have a value of 0; wherein, the first power is predefined or preconfigured.
  • L represents the length of the first sequence
  • m represents the number of elements in the first sequence that have a value of 0.
  • the first sequence is obtained based on a third sequence, where the set of values for the elements in the third sequence is ⁇ 0, 1, 2 ⁇ ; the first sequence is denoted as [x(n)], and the third sequence is denoted as [s(n)], and the first sequence and the third sequence satisfy:
  • the transmission power-related factor is multiplied by the ternary sequence (with a value set of ⁇ -1, 0, 1 ⁇ ). This helps ensure that the power of the transmitted signal is normalized.
  • the transmission power of the synchronization signal is a first power, which is predefined or preconfigured.
  • the first sequence is obtained based on a third sequence, which is one of W sequences obtained according to W recursive formulas, where W is an integer greater than 1.
  • the cross-correlation value among the W sequences is less than or equal to a first threshold. This helps to ensure the detection performance of the synchronization signal.
  • the first threshold is 0.26.
  • the W recursive formulas include any of the following:
  • s(n+5) (2s(n+2)+2s(n+1)+s(n))mod3;
  • s(n+5) (2s(n+3)+2s(n+2)+s(n+1)+s(n))mod3;
  • s(n+5) (2s(n+4)+2s(n+1)+s(n))mod3.
  • the normalized second peak of the ambiguity function of the synchronization signal is less than or equal to the second threshold, which helps to ensure the frequency offset resistance of the synchronization signal.
  • the second threshold is 0.135.
  • the length of the first sequence is 3k - 1/2, where k is an integer greater than 1.
  • the number of elements with a value of 0 in the first sequence is 40.
  • embodiments of this application provide a communication method that can be applied to a second communication device, which can be a terminal device or a component (such as a chip or circuit) within the terminal device.
  • the second communication device detects a synchronization signal, which is a signal obtained based on a first sequence; wherein the first sequence is ideally autocorrelated, and the set of values for the elements of the first sequence is ⁇ -A, 0, A ⁇ , where A is a constant.
  • the method includes: acquiring the first sequence, processing the received signal according to the first sequence to detect the synchronization signal; or, acquiring a third sequence, obtaining the first sequence according to the third sequence, processing the received signal according to the first sequence to detect the synchronization signal; or, processing the received signal according to a sequence in a set of synchronization sequences to detect the synchronization signal, wherein the sequence in the set of synchronization sequences includes the first sequence.
  • DFT Discrete Fourier Transform
  • IFFT Inverse Fast Fourier Transform
  • the terminal device can directly perform correlation processing on the received signal in the time domain, without first transforming the received signal to the frequency domain using DFT, thus greatly reducing the detection complexity of the synchronization signal. Furthermore, since the first sequence includes at least one element with a value of 0, the number of addition and/or multiplication operations in each correlation operation can be reduced, further lowering the detection complexity of the synchronization signal.
  • processing the received signal according to the first sequence includes: oversampling the first sequence and performing correlation processing on the received signal according to the oversampled sequence; or, downsampling the received signal and performing correlation processing on the downsampled signal according to the first sequence.
  • the terminal device can directly perform correlation processing on the received signal in the time domain, without first transforming the received signal to the frequency domain using DFT, thus greatly reducing the detection complexity of the synchronization signal. Furthermore, since the first sequence includes at least one element with a value of 0, the number of addition and/or multiplication operations in each correlation operation can be reduced, further lowering the detection complexity of the synchronization signal.
  • the synchronization signal is a DFT-s-OFDM waveform
  • the DFT-s-OFDM waveform is compatible with the OFDM waveforms of other channels in the current system, thereby reducing interference to other channel signals. It also enables the terminal device to directly perform correlation processing on the received signal in the time domain.
  • the terminal device can correlate the signal obtained after processing the first sequence using a DFT-s-OFDM waveform with the received signal, or it can directly oversample the first sequence (i.e., repeat sequence elements) and then correlate it with the received signal, or it can downsample the received signal and then correlate it with the first sequence.
  • the first sequence i.e., repeat sequence elements
  • processing the received signal according to the first sequence includes: mapping the first sequence onto multiple subcarriers to obtain a frequency domain sequence; performing DFT processing on the received signal to obtain a frequency domain signal; performing conjugate dot product on the frequency domain sequence and the frequency domain signal, and performing Inverse Discrete Fourier Transform (IDFT) processing on the sequence after conjugate dot product.
  • IDFT Inverse Discrete Fourier Transform
  • the second sequence includes at least one element with a value of 0, the complexity of the multiplication operation required for frequency domain detection and the complexity of IDFT can be reduced, thereby reducing the detection complexity of the synchronization signal.
  • A 1.
  • the first sequence is obtained based on a third sequence, where the set of values for the elements in the third sequence is ⁇ 0, 1, 2 ⁇ ; the first sequence is denoted as [x(n)], and the third sequence is denoted as [s(n)], and the first sequence and the third sequence satisfy:
  • L represents the length of the first sequence
  • m represents the number of elements in the first sequence that have a value of 0.
  • the first sequence is obtained based on a third sequence, where the set of values for the elements in the third sequence is ⁇ 0, 1, 2 ⁇ ; the first sequence is denoted as [x(n)], and the third sequence is denoted as [s(n)], and the first sequence and the third sequence satisfy:
  • the first sequence is obtained based on a third sequence, which is one of W sequences obtained according to W recursive formulas; wherein the cross-correlation value between the W sequences is less than or equal to a first threshold, and W is an integer greater than 1.
  • the first threshold is 0.26.
  • the W recursive formulas include any of the following:
  • s(n+5) (2s(n+2)+2s(n+1)+s(n))mod3;
  • s(n+5) (2s(n+3)+2s(n+2)+s(n+1)+s(n))mod3;
  • s(n+5) (2s(n+4)+2s(n+1)+s(n))mod3.
  • the normalized subpeak of the ambiguity function of the synchronization signal is less than or equal to a second threshold.
  • the second threshold is 0.135.
  • the length of the first sequence is 3k - 1/2, where k is an integer greater than 1.
  • the number of elements with a value of 0 in the first sequence is 40.
  • embodiments of this application provide a communication method, the method comprising: generating a synchronization signal according to a first sequence and sending the synchronization signal; processing a received signal according to the first sequence to detect the synchronization signal; wherein the first sequence is ideally autocorrelated, and the set of values for the elements of the first sequence is ⁇ -A, 0, A ⁇ , where A is a constant.
  • this application provides a communication device that has the functions involved in the first or second aspect above.
  • the communication device includes modules, units, or means corresponding to the operations involved in the first or second aspect above.
  • the functions, units, or means can be implemented by software, or by hardware, or by hardware executing corresponding software.
  • the communication device includes a processing unit and a communication unit, wherein the communication unit can be used to transmit and receive signals to enable communication between the communication device and other devices; the processing unit can be used to perform some internal operations of the communication device.
  • the functions performed by the processing unit and the communication unit can correspond to the operations involved in the first or second aspect described above.
  • the communication device includes a processor that can be coupled to a memory.
  • the memory can store necessary computer programs or instructions for implementing the functions described in the first or second aspect above.
  • the processor can execute the computer programs or instructions stored in the memory, causing the communication device to implement the methods in any possible design or implementation of the first or second aspect above, when executed.
  • the communication device includes a processor and a memory, the memory of which may store necessary computer programs or instructions for implementing the functions involved in the first or second aspect described above.
  • the processor may execute the computer programs or instructions stored in the memory, and when the computer programs or instructions are executed, cause the communication device to implement the methods in any possible design or implementation of the first or second aspect described above.
  • the communication device includes a processor and an interface circuit, wherein the processor is configured to communicate with other devices via the interface circuit and execute the methods in any possible design or implementation of the first or second aspect described above.
  • the processor can be implemented in hardware or software.
  • the processor can be a logic circuit, integrated circuit, etc.; when implemented in software, the processor can be a general-purpose processor that reads software code stored in memory.
  • the processor can be one or more processors, and one or more memories.
  • the memory can be integrated with the processor, or the memory and processor can be separate. In specific implementations, the memory can be integrated with the processor on the same chip, or it can be set on different chips. This application does not limit the type of memory or the arrangement of the memory and processor.
  • this application provides a communication system, which may include a first communication device and a second communication device; wherein the first communication device is used to perform the method described in the first aspect, and the second communication device is used to perform the method described in the second aspect.
  • this application provides a computer-readable storage medium storing a computer program (or computer-readable instructions) in which, when a computer reads and executes some or all of the computer-readable instructions, the method in any of the possible designs of the first or second aspect described above is executed.
  • a computer-readable storage medium can be any available medium that a computer can access. This includes, but is not limited to, non-transient computer-readable media, random-access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), CD-ROM or other optical disc storage, magnetic disk storage media, or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer.
  • RAM random-access memory
  • ROM read-only memory
  • EEPROM electrically erasable programmable read-only memory
  • CD-ROM or other optical disc storage magnetic disk storage media, or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer.
  • this application provides a computer program product that, when read and executed by a computer, causes the method in any of the possible designs of the first or second aspect described above to be performed.
  • this application provides a chip (or chip system) including a processor coupled to a memory storing a computer program; the processor is configured to invoke part or all of the computer program in the memory, such that the method in any of the possible designs of the first or second aspect described above is executed.
  • Figure 1 is a schematic diagram of the architecture of the communication system used in the embodiments of this application.
  • FIG. 2 is a schematic diagram of the SS/PBCH block provided in an embodiment of this application.
  • FIG. 3 is a schematic diagram of the basic structure of the feedback shift register provided in an embodiment of this application.
  • Figure 4 is a flowchart illustrating the communication method provided in the embodiments of this application.
  • Figure 5 is a schematic diagram of the ternary sequence generation architecture provided in the embodiments of this application.
  • Figure 6 is a possible exemplary block diagram of the device involved in the embodiments of this application.
  • Figure 7 is a schematic diagram of the structure of a communication device provided in an embodiment of this application.
  • the technical solutions of this application embodiment can be applied to various wireless communication systems, such as Universal Mobile Telecommunications System (UMTS), Wireless Local Area Network (WLAN), short-range wireless communication systems (such as sidelink, wireless fidelity, Wi-Fi, Bluetooth, etc.), wired networks, vehicle-to-everything (V2X) communication systems, device-to-device (D2D) communication systems, vehicle-to-everything (V2X) communication systems, and 4G (4T) wireless communication systems.
  • UMTS Universal Mobile Telecommunications System
  • WLAN Wireless Local Area Network
  • short-range wireless communication systems such as sidelink, wireless fidelity, Wi-Fi, Bluetooth, etc.
  • wired networks such as Universal Mobile Telecommunications System (UMTS), Wireless Local Area Network (WLAN), short-range wireless communication systems (such as sidelink, wireless fidelity, Wi-Fi, Bluetooth, etc.), wired networks, vehicle-to-everything (V2X) communication systems, device-to-device (D2D) communication systems, vehicle-to-everything (V
  • the following are not limited to mobile communication systems: 4G (e.g., Long Term Evolution, LTE), LTE Frequency Division Duplex (FDD), LTE Time Division Duplex (TDD), Worldwide Interoperability for Microwave Access (WiMAX), 5G (e.g., New Radio, NR), Future Communication Systems, or other similar communication systems.
  • 4G e.g., Long Term Evolution, LTE
  • LTE Frequency Division Duplex FDD
  • LTE Time Division Duplex TDD
  • WiMAX Worldwide Interoperability for Microwave Access
  • 5G e.g., New Radio, NR
  • Future Communication Systems or other similar communication systems.
  • Figure 1 is a schematic diagram of the architecture of the communication system applied in the embodiments of this application.
  • the communication system includes an access network 100.
  • the communication system may also include a core network 200 and an Internet 300.
  • the access network 100 may include at least one network device, such as 110a and 110b in Figure 1, and may also include at least one terminal device, such as 120a-120j in Figure 1.
  • 110a is a base station
  • 110b is a micro-station
  • 120a, 120e, 120f, and 120j are mobile phones
  • 120b is a car
  • 120c is a fuel dispenser
  • 120d is a home access point (HAP) deployed indoors or outdoors
  • 120g is a laptop computer
  • 120h is a printer
  • 120i is a drone.
  • the same terminal device or network device can provide different functions in different application scenarios.
  • the mobile phones in Figure 1 are 120a, 120e, 120f and 120j.
  • Mobile phone 120a can access base station 110a, connect to car 120b, communicate directly with mobile phone 120e and access HAP.
  • Car 120b can access HAP and communicate directly with mobile phone 120a.
  • Mobile phone 120f can access micro-station 110b, connect to laptop 120g and printer 120h.
  • Mobile phone 120j can control drone 120i.
  • a network device is a network-side device with wireless transceiver capabilities.
  • a network device can be a device in a radio access network (RAN) that provides wireless communication capabilities to terminal devices; this is called a RAN device.
  • the RAN can be an access network within the 3rd Generation Partnership Project (3GPP), such as 4G, 5G, or future networks.
  • 3GPP 3rd Generation Partnership Project
  • the RAN can also be an open access network (O-RAN or ORAN), a cloud radio access network (CRAN), or a communication network combining two or more of these.
  • RAN equipment can also be a base station, an evolved NodeB (eNodeB), a transmission reception point (TRP), a next-generation NodeB (gNB) in a 5G mobile communication system, a base station in a future mobile communication system, or an access node in a WiFi system, etc.
  • eNodeB evolved NodeB
  • TRP transmission reception point
  • gNB next-generation NodeB
  • RAN equipment can also be modules or units that perform some of the functions of a base station.
  • CU central unit
  • DU distributed unit
  • RU radio unit
  • the CU performs the functions of the radio resource control (RRC) and PDCP protocols of the base station, and can also perform the functions of the service data adaptation protocol (SDAP).
  • SDAP service data adaptation protocol
  • the CU can be further divided into a CU control panel (CP) (i.e., CU-CP) and a CU user panel (UP) (i.e., CU-UP).
  • CP CU control panel
  • UP CU user panel
  • the DU performs the functions of the RLC and MA layers of the base station, and can also perform some or all of the physical layer functions.
  • CP CU control panel
  • UP CU user panel
  • the DU performs the functions of the RLC and MA layers of the base station, and can also perform some or all of the physical layer functions.
  • CU and DU can be set up separately, or they can be included in the same network element, such as in a baseband unit (BBU).
  • the RU can be included in radio frequency equipment or radio frequency units, such as in a remote radio unit (RRU), an active antenna unit (AAU), or a remote radio head (RRH).
  • RRU remote radio unit
  • AAU active antenna unit
  • RRH remote radio head
  • CU, DU, or RU may have different names, but those skilled in the art will understand their meaning.
  • CU can also be called O-CU (open CU)
  • DU can also be called O-DU
  • RU can also be called O-RU.
  • the RA device can be a macro base station (as shown in Figure 1, 110a), a micro base station or an indoor station (as shown in Figure 1, 110b), or a relay node or donor node, etc.
  • the embodiments of this application do not limit the specific technology or specific device form used in the network equipment.
  • the functions of the network device can be executed by modules (such as chips) within the network device, or by a control subsystem that includes the functions of the network device.
  • This control subsystem which includes the functions of the network device, can be a control center in the aforementioned application scenarios such as smart grids, industrial control, intelligent transportation, and smart cities.
  • a terminal device is a user-side device with wireless transceiver capabilities.
  • Terminal devices can also be called terminals, user equipment (UE), mobile stations, mobile terminals, etc.
  • Terminal devices can be widely used in various scenarios, such as device-to-device (D2D), vehicle-to-everything (V2X) communication, machine-type communication (MTC), Internet of Things (IoT), virtual reality, augmented reality, industrial control, autonomous driving, telemedicine, smart grids, smart furniture, smart offices, smart wearables, smart transportation, smart cities, etc.
  • Terminal devices can be mobile phones, tablets, computers with wireless transceiver capabilities, wearable devices, vehicles, drones, helicopters, airplanes, ships, robots, robotic arms, smart home devices, etc.
  • the device used to implement the functions of the terminal device can be the terminal device itself, or it can be a device that supports the terminal device in implementing that function, such as a chip system or a combination of devices or components that can implement the functions of the terminal device.
  • This device can be installed in the terminal device.
  • the embodiments of this application do not limit the specific technology or device form used in the terminal device.
  • the functions of the terminal device can also be performed by modules (such as chips or modems) in the terminal device, or by a device containing the functions of the terminal device.
  • Network devices and terminal devices can be fixed in location or mobile. They can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; they can also be deployed on water; and they can also be deployed in the air on airplanes, balloons, and artificial satellites. The embodiments of this application do not limit the application scenarios of the network devices and terminal devices.
  • the helicopter or drone 120i in Figure 1 can be configured as a mobile network device.
  • terminal device 120i For terminal devices 120j that access the wireless access network 100 via 120i, terminal device 120i is a network device; however, for network device 110a, 120i is a terminal device. That is, 110a and 120i communicate via a wireless air interface protocol. Of course, 110a and 120i can also communicate via a network device-to-network device interface protocol. In this case, relative to 110a, 120i is also a network device. Therefore, both network devices and terminal devices can be collectively referred to as communication devices.
  • 110a and 110b in Figure 1 can be called communication devices with network device functions
  • 120a-120j in Figure 1 can be called communication devices with terminal device functions.
  • Network devices and terminal devices, network devices and network devices, and terminal devices can communicate through licensed spectrum, unlicensed spectrum, or both simultaneously, without limitation.
  • the "sequence" includes one or more elements. These elements can be represented as complex numbers, including a real part and an imaginary part; alternatively, elements can also be represented as real numbers, without any specific limitation.
  • the sequence [s(n)] contains L elements, where L is an integer greater than 1.
  • n belongs to [0, ..., L-1], that is, n ⁇ [0, ..., L-1].
  • "" represents an integer between 0 and L-1.
  • L 5
  • n 0, 1, 2, 3, 4, ...
  • the L elements in [s(n)] can be s(0), ..., s(L-1); in other words, the element numbered n in [s(n)] can be s(n).
  • this application embodiment uses a numbering method with a starting number of 0 and incrementing by a step size of 1 as an example, but it is not limited to this.
  • the numbering method can also be: starting number of 1 and incrementing by a step size of 1.
  • the numbering method can also be: starting number of X and decrementing by a step size of 1, where X is an integer greater than 1.
  • "[ ⁇ ]" and " ⁇ " can be used interchangeably to represent multiple elements, which can be understood as a set, group, or sequence, etc., and are not limited thereto.
  • c( s1 , s2 )' represents the cross-correlation value between [ s1 (n)] and [ s2 (n)] (i.e., the cross-correlation value before normalization)
  • c( s1 , s2 ) represents the cross-correlation value between [ s1 (n)] and [ s2 (n)] (i.e., the cross-correlation value after normalization)
  • abs represents taking the absolute value.
  • c( s1 , s2 )' represents the cross-correlation value between [ s1 (n)] and [ s2 (n)] (i.e., the cross-correlation value before normalization)
  • c( s1 , s2 ) represents the cross-correlation value between [ s1 (n)] and [ s2 (n)] (i.e., the cross-correlation value after normalization)
  • ⁇ is the time-domain multipath delay, with a value range of [0, L-1].
  • the SS/PBCH block includes PSS, SSS, and PBCH.
  • one SS/PBCH block occupies four orthogonal frequency division multiplexing (OFDM) symbols, such as symbols 0 to 3; in the frequency domain, one SS/PBCH block occupies 20 resource blocks (RBs) (one RB includes 12 subcarriers), which is 240 subcarriers, numbered from 0 to 239.
  • RBs resource blocks
  • the PSS is located on the middle 127 subcarriers of symbol 0
  • the SSS is located on the middle 127 subcarriers of symbol 2.
  • guard subcarriers are different guard subcarriers. The guard subcarriers are not used to carry signals.
  • Subcarriers are reserved on both sides of the SSS as guard subcarriers, as shown in Figure 2, where the blank areas on both sides of the SSS are guard subcarriers.
  • PBCH occupies all subcarriers of symbols 1 and 3, as well as a portion of the remaining subcarriers of symbol 2, excluding the subcarriers occupied by SSS (i.e., the remaining subcarriers excluding the guard subcarriers).
  • the terminal equipment Before detecting the PSS, the terminal equipment does not know the center frequency of the cell, nor has it completed the carrier frequency calibration between the terminal equipment and the network equipment. Therefore, the PSS is the signal used by the terminal equipment to determine the center frequency of the cell's carrier, and it is necessary to ensure detection performance even when there are time and frequency deviations.
  • the PSS uses an m-sequence.
  • the m-sequence is short for Longest Linear Feedback Shift Register Sequence, which is the longest-period sequence generated by a shift register with linear feedback. Generally, the longest period generated by a v-stage linear feedback shift register is equal to 2v ⁇ 1 .
  • Figure 3 shows the basic structure of a feedback shift register. The initial bit data is stored in memory, and new values are generated and added to memory through a feedback function. Assume the feedback function performs an XOR operation on all bits in memory, i.e. The output sequence is then The length of the output sequence is 2v - 1.
  • the m-sequence is determined by the initial value sequence and the primitive polynomial stored in the register.
  • the set of values for the elements in the initial value sequence is ⁇ 0,1 ⁇ , and the order of the primitive polynomial is the highest power of the polynomial.
  • mod represents the modulo operation.
  • x(i+7) (x(i+4)+x(i))mod2
  • BPSK modulation is applied to the m-sequence to obtain the PSS sequence.
  • the set of values for the elements in the PSS sequence is ⁇ 1, -1 ⁇ .
  • network devices can generate PSS signals based on the PSS sequence. For example, the network device can map the elements in the PSS sequence onto multiple subcarriers and perform inverse fast fourier transform (IFFT) processing to generate the PSS, i.e., the PSS is an OFDM waveform signal.
  • IFFT inverse fast fourier transform
  • the SSS in NR uses a gold sequence.
  • a gold sequence can be viewed as an element-wise XOR operation of two m-sequences with different primitive polynomials. Gold sequences exhibit good autocorrelation and cross-correlation properties, and their large number facilitates information carrying.
  • the generation formula can refer to existing technologies and will not be elaborated here. After generating the SSS sequence according to the SSS generation formula, the network device can generate the SSS based on the SSS sequence.
  • PSS Used for frequency synchronization and symbol-level time synchronization.
  • the PSS sequence is used to carry... It can be called the neighborhood number.
  • the set of values for is ⁇ 0, 1, 2 ⁇ . Because Since the set of values has 3 possible values, there can be 3 PSS sequences. These 3 PSS sequences can correspond to the same recursive formula, that is, these 3 PSS sequences are obtained by cyclically shifting the m sequence obtained by the same recursive formula.
  • SSS Used for carrying It can be called the neighborhood group number.
  • the set of values for is ⁇ 0, 1, 2, ..., 335 ⁇ .
  • the cell number and cell group number together determine multiple PCIs in the 5G communication system.
  • PCI (denoted as )
  • the calculation method for ) is as follows: Therefore, there are a total of 1008 PCIs.
  • PSS sequences There are three types of PSS sequences. Once the terminal device detects the PSS sequence, it can determine the... Furthermore, the terminal device will Substituting into the SSS detection, once It is confirmed that there are a total of 336 possible SSS sequences. The terminal device needs to perform cross-correlation detection using these 336 different SSS sequences, and the SSS sequence corresponding to the maximum cross-correlation value is the actual transmitted sequence. Once the terminal device successfully finds the PSS and SSS, it obtains the cell information (such as PCI), thus gaining the ability to parse the system messages contained in the SS/PBCH block.
  • cell information such as PCI
  • PBCH Used to carry system messages contained in the SS/PBCH block, such as the main information block (MIB).
  • the MIB includes information necessary for the terminal device to access the network, such as the system frame number and the initial subcarrier spacing. Since the information contained in the MIB is limited and insufficient to support the terminal device's access to the 5G cell, the terminal device must also obtain some essential system messages, such as the system information block (SIB)1.
  • SIB1 is transmitted on the physical downlink shared channel (PDSCH) with a period of 160 milliseconds. Because the terminal device has already obtained the parameters used for SIB1 transmission and the distribution of control resources scheduling it from the MIB carried in the PBCH, it can receive SIB1. In this way, the terminal device can obtain the system messages necessary to access the 5G cell and subsequently access the 5G cell.
  • SIB system information block
  • the length of the receiving window is preset.
  • the length of the receiving window can be related to the transmission period of the PSS.
  • the length of the receiving window is set to 5ms.
  • the terminal device can generate three time-domain sequences based on three PSS sequences, and use these three time-domain sequences to detect the received signal.
  • the terminal device performs subcarrier mapping and IFFT processing on the PSS sequence of length L to obtain a time-domain sequence p (in the case of no oversampling, sequence p includes L elements; in the case of oversampling, sequence p includes N elements, where N is greater than L; this example is based on oversampling).
  • the terminal device slides one sampling point at a time.
  • the signal r tmp obtained by the i-th sliding sampling point is [r(i-1), r(i), ..., r(N+i-1)].
  • the inner product of the sequence p and the sequence r tmp is taken to obtain the cross-correlation value between the sequence p and the sequence r tmp .
  • the terminal device normalizes the cross-correlation values to obtain c(p,r tmp )′, and the specific calculation formula can be found above.
  • the terminal device can sequentially slide through each of the N sampling points to obtain N cross-correlation values.
  • the terminal device Due to crystal oscillator frequency offset and the mobility of the terminal device, a frequency shift exists in the received signal. Considering the maximum crystal oscillator frequency offset (related to device characteristics) and the maximum moving speed of the terminal device, the terminal device can know the maximum frequency offset range in advance (e.g., less than or equal to twice the subcarrier spacing). Therefore, the terminal device can traverse different frequency offset values according to a step size to compensate the received signal before performing the aforementioned operations.
  • the traversal step size can be set to 0.2 times or 0.5 times the subcarrier spacing (SCS).
  • the terminal device when detecting PSS (Pressure Sequence Segment), the terminal device needs to perform correlation calculations by traversing different PSS sequences, different time delays (i.e., sampling points), and different frequency offset values. For example, if there are M frequency offset values within the maximum frequency offset range, N sampling points, and 3 PSS sequences, then traversing 3 PSS sequences, M frequency offset values, and N sampling points requires a total of 3*M*N correlation operations. According to the formula for the correlation calculation, each correlation operation requires N-1 addition operations and N multiplication operations, resulting in high detection complexity.
  • embodiments of this application provide a communication method to reduce the detection complexity of synchronization signals.
  • the transmitting side generates a synchronization signal based on a first sequence and transmits the synchronization signal; wherein, the first sequence is ideally autocorrelated, and the set of values for the elements of the first sequence is ⁇ -A, 0, A ⁇ , where A is a constant.
  • the synchronization signal can be a signal of a discrete fourier transform-spread-orthogonal frequency division multiplexing (DFT-s-OFDM) waveform.
  • DFT-s-OFDM discrete fourier transform-spread-orthogonal frequency division multiplexing
  • the synchronization signal can be an orthogonal frequency division multiplexing (OFDM) waveform.
  • OFDM orthogonal frequency division multiplexing
  • the communication method provided in this application involves a first communication device and a second communication device.
  • the first communication device is the transmitting side of a synchronization signal
  • the second communication device is the receiving side of the synchronization signal.
  • the first communication device is a network device or a component of a network device, such as a chip or chip system disposed in the network device
  • the second communication device is a terminal device or a component of a terminal device, such as a chip or chip system disposed in the terminal device.
  • This application describes the method using the example of "the first communication device being a network device and the second communication device being a terminal device”.
  • Figure 4 is a flowchart illustrating the communication method provided in this embodiment. As shown in Figure 4, the process may include:
  • the network device generates a synchronization signal based on the first sequence.
  • the synchronization signal may be a PSS, or other possible signals for time and/or frequency synchronization, without limitation.
  • a network device can first obtain a first sequence and then generate a synchronization signal based on the first sequence.
  • the network device can obtain the first sequence, such as the network device directly obtaining a predefined or preconfigured first sequence, or the network device obtaining a predefined or preconfigured third sequence and obtaining the first sequence based on the third sequence, as detailed below.
  • the first sequence is a ternary sequence, which can be generated based on a circular shift register, as shown in Figure 5, which illustrates one possible generation architecture for ternary sequences.
  • the set of element values is ⁇ 0, 1, 2 ⁇ , where 1 and -2 are congruent modulo 3, and 2 and -1 are congruent modulo 3. Therefore, element 2 in the final generated sequence can be replaced with -1.
  • the first sequence is ideally autocorrelated, and the set of values for its elements is ⁇ -A, 0, A ⁇ , where A is a constant.
  • the length of the first sequence is 3k - 1/2, where k is an integer greater than 1. When k equals 5, i.e., the length of the first sequence is 121, the number of elements with a value of 0 in the first sequence is 40.
  • A 1, meaning the set of values for the elements in the first sequence is ⁇ -1, 0, 1 ⁇ .
  • the first sequence is derived from the third sequence, where the set of values for the elements is ⁇ 0, 1, 2 ⁇ ; the first sequence is denoted as [x(n)], and the third sequence is denoted as [s(n)], satisfying the following:
  • L represents the length of the first sequence
  • m represents the number of elements in the first sequence that have a value of 0.
  • the set of possible values for the elements in the first sequence is...
  • the first sequence is obtained based on the third sequence, and the first and third sequences satisfy:
  • a fourth sequence can be obtained from the third sequence, where the set of values for the elements in the fourth sequence is ⁇ -1, 0, 1 ⁇ .
  • multiplying the fourth sequence by a transmission power correlation factor yields the first sequence, where the transmission power correlation factor is...
  • the power of the transmitted signal can be normalized.
  • the third sequence mentioned above is one of W sequences, all of which are ideal autocorrelated ternary sequences.
  • the W sequences are obtained from W recursive formulas, and there is a one-to-one correspondence between the W sequences and the W recursive formulas.
  • the W sequences include sequence 1, sequence 2, ..., sequence w
  • the W recursive formulas include recursive formula 1, recursive formula 2, ..., recursive formula w.
  • Recursive formula 1 to recursive formula w are different recursive formulas. Sequence 1 is obtained from recursive formula 1 and initial value sequence 1
  • sequence 2 is obtained from recursive formula 2 and initial value sequence 2, and so on.
  • Sequence w is obtained from recursive formula w and initial value sequence w.
  • the cross-correlation value among the W recursive formulas is less than or equal to a first threshold.
  • the cross-correlation value between different recursive formulas can refer to the cross-correlation value between sequences obtained based on different recursive formulas; that is, the cross-correlation value among the W sequences is less than or equal to the first threshold.
  • the first threshold can be set according to actual needs, for example, the first threshold is 0.26.
  • each of the W sequences has a length of 121, and the W recursive formulas can include any number of the following recursive formulas 1 to 3:
  • the third sequence is a pre-configured or pre-defined sequence.
  • the network device can directly obtain the pre-defined or pre-configured third sequence, obtain the first sequence based on the third sequence, and then generate a synchronization signal based on the first sequence.
  • the W sequences are pre-configured or pre-defined sequences.
  • the network device can select one sequence from the W sequences as the third sequence, obtain the first sequence based on the third sequence, and then generate a synchronization signal based on the first sequence.
  • the third sequence is associated with the cell identifier, for example, the third sequence is associated with...
  • the third sequence is associated with...
  • a sequence can be pre-configured or pre-defined, which is the third sequence; in this case, the pre-configured or pre-defined sequence does not need to be associated with a cell identifier.
  • W sequences can be pre-configured or pre-defined, with the third sequence being one of the W sequences; in this case, the pre-configured or pre-defined sequence can be associated with a cell identifier.
  • the first sequence is a pre-configured or pre-defined sequence.
  • the network device can directly obtain the pre-defined or pre-configured first sequence and generate a synchronization signal based on the first sequence.
  • W' sequences are pre-configured or pre-defined sequences (i.e., the synchronization sequence set includes W' sequences), and the W' sequences are obtained based on W sequences.
  • the network device selects one sequence from the W' sequences as the first sequence and generates a synchronization signal based on the first sequence.
  • a sequence can be pre-configured or pre-defined, which is the first sequence; in this case, the pre-configured or pre-defined sequence does not need to be associated with a cell identifier.
  • W' sequences can be pre-configured or pre-defined, with the first sequence being one of the W' sequences; in this case, the pre-configured or pre-defined sequence can be associated with a cell identifier.
  • the synchronization signal can be understood as a time-domain sequence. Without oversampling, the number of elements in this time-domain sequence is the same as the number of elements in the second sequence; with oversampling, the number of elements in this time-domain sequence is greater than the number of elements in the second sequence.
  • the network device performs discrete Fourier transform (DFT), subcarrier mapping, and IFFT processing on the first sequence to generate a synchronization signal.
  • DFT discrete Fourier transform
  • the network device may also perform other possible processing, which is not limited. It should be noted that the processing performed by the network device on the first sequence does not include modulation.
  • a network device performs DFT processing on a first sequence to obtain a second sequence, then maps the second sequence onto multiple subcarriers and performs IFFT processing to generate a synchronization signal.
  • the synchronization signal is a DFT-s-OFDM waveform.
  • the first sequence is denoted as [x(n)]
  • the second sequence is denoted as [y(n)].
  • the second sequence and the first sequence satisfy the following:
  • the network device performs subcarrier mapping and IFFT processing on the first sequence to generate a synchronization signal.
  • the network device may also perform other possible processing, which is not limited. It should be noted that the processing performed by the network device on the first sequence does not include modulation and DFT processing.
  • network devices map the first sequence onto multiple subcarriers and perform IFFT processing to generate a synchronization signal.
  • the synchronization signal is an OFDM waveform signal.
  • the network device can use a DFT-s-OFDM waveform to send a synchronization signal, or it can use an OFDM waveform to send a synchronization signal, following existing technology.
  • the three PSS sequences in NR can correspond to the same recursive formula; however, in this embodiment, when the waveform used is a DFT-s-OFDM waveform, if the NR protocol is used to distinguish different waveforms based on different cyclic shifts of the same sequence, it would be problematic. Three similar correlation peaks may appear during time-domain detection, leading to time-domain synchronization failure or PCI detection failure. Therefore, W sequences can correspond to different recursive formulas to ensure synchronization performance. Understandably, if the synchronization signal continues to use the OFDM waveform, the W sequences can correspond to different recursive formulas, or the W sequences can be obtained by different cyclic shifts of the same sequence.
  • the signal received by the terminal device may have a significant frequency offset. Therefore, it is necessary to evaluate the frequency offset resistance of the synchronization signal.
  • the synchronization signal refers to the synchronization signal generated by the baseband chip but not yet sent to the RF chip.
  • Frequency offset resistance is generally evaluated using the second peak of the ambiguity function; the smaller the second peak, the stronger the frequency offset resistance.
  • the normalized second peak of the ambiguity function of the synchronization signal is less than or equal to a second threshold to ensure the frequency offset resistance performance of the synchronization signal.
  • the second threshold can be set according to actual needs, for example, a second threshold of 0.135.
  • the synchronization signal generated by the network device based on the first sequence is denoted as [t(n)].
  • the expression for the fuzzy function of [t(n)] is:
  • A(f d , ⁇ ) is the fuzzy function of [t(n)]
  • f d is the frequency offset
  • ⁇ is the time-domain multipath delay
  • the value of ⁇ is in the range of [0,N-1].
  • the network device sends a synchronization signal; correspondingly, the terminal device receives the corresponding signal.
  • Terminal equipment detects synchronization signal.
  • the synchronization signal is a DFT-s-OFDM waveform signal. For this case, three possible implementations are described.
  • the terminal device performs an inner product of the sequence a ⁇ sub>1 ⁇ /sub> and the sequence r ⁇ sub>tmp ,1 ⁇ /sub> to obtain the cross-correlation value c(a ⁇ sub>1 ⁇ /sub>, r ⁇ sub> tmp ⁇ /sub> ), and normalizes it to obtain c(a ⁇ sub>1 ⁇ /sub>, r ⁇ sub>tmp ⁇ /sub> )′.
  • the terminal device downsamples the received signal to obtain sequence a3, and performs relevant processing on sequence a3 based on the first sequence.
  • the signal r ⁇ sub>tmp ⁇ /sub> [r(i-1), r(i), ..., r(N+i-1)] obtained by the terminal device at the i-th sliding sampling point is downsampled to obtain r ⁇ sub>tmp ⁇ /sub>' , which includes L elements.
  • the frequency offset value f ⁇ sub>d ⁇ /sub> 0.5*SCS
  • the frequency offset of the signal r ⁇ sub>tmp ⁇ /sub>' obtained at the i-th sliding sampling point is corrected to obtain r ⁇ sub>tmp ⁇ /sub>',1 .
  • the terminal device performs an inner product between the first sequence and the sequence r ⁇ sub>tmp ⁇ /sub>', 1 to obtain the normalized cross-correlation value between the first sequence and the sequence r ⁇ sub> tmp ⁇ /sub>', 1.
  • the terminal device can traverse multiple sequences.
  • the terminal device can traverse multiple sequences, multiple sampling points, and multiple frequency offset values to perform correlation calculations and obtain multiple cross-correlation values. Then, based on the maximum cross-correlation value among these multiple cross-correlation values, the terminal device determines the sequence actually sent by the network device (i.e., the detected synchronization signal), the delay, and the frequency offset value. It is understandable that in some scenarios, there may only be one frequency offset value or one sequence; the specifics are not limited.
  • the terminal device since the synchronization signal has a timing function, the terminal device needs to perform sliding correlation detection in the time domain.
  • Using a DFT-s-OFDM waveform for the synchronization signal allows the terminal device to directly perform correlation processing on the received signal in the time domain, without first performing DFT processing to transform the received signal to the frequency domain before processing, thus greatly reducing the detection complexity of the synchronization signal.
  • the DFT-s-OFDM waveform can be used to simulate a square wave to ensure the performance of time-domain detection.
  • the DFT-s-OFDM waveform can be used to simulate a square wave. It should be understood that the time-domain signal generated by the DFT-s-OFDM waveform of the first sequence can also undergo time-domain filtering and other operations to make the final waveform more closely match the square wave. This embodiment does not limit these possible operations.
  • the PSS sequence is obtained by BPSK modulation of the m-sequence.
  • the network device performs subcarrier mapping and IFFT processing on the PSS sequence to generate the PSS, meaning the PSS is an OFDM waveform signal.
  • the terminal device detects the PSS based on the PSS sequence. Since the set of values for the elements in the PSS sequence obtained by BPSK modulation of the m-sequence is ⁇ 1, -1 ⁇ , the elements in the PSS generated after subcarrier mapping and IFFT processing are all complex numbers, resulting in N-1 addition operations and N multiplication operations required for each correlation operation.
  • the network device performs DFT processing, subcarrier mapping, and IFFT processing on the first sequence to generate a PSS, i.e., the PSS is a signal with a DFT-s-OFDM waveform; correspondingly, the terminal device detects the PSS based on the first sequence.
  • the terminal device When using the first implementation, the terminal device performs DFT processing, subcarrier mapping, and IFFT processing on the first sequence. Furthermore, the terminal device can quantize the elements in the final time-domain sequence (i.e., quantize the elements in the time-domain sequence to 0/1/-1). Therefore, using the first implementation can also reduce the number of addition operations in each correlation operation and ignore the number of multiplication operations in each correlation operation. In other words, using the scheme in this application embodiment can reduce the number of addition and/or multiplication operations in each correlation operation, thereby reducing the detection complexity of PSS.
  • each correlation operation requires 120 addition operations and 121 multiplication operations; using the scheme in this application, each correlation operation requires 80 addition operations and 0 multiplication operations.
  • the synchronization signal is an OFDM waveform signal.
  • the terminal device performs conjugate dot product on the frequency domain sequence and the frequency domain signal, and performs IDFT processing on the sequence after conjugate dot product to determine the position of the maximum correlation peak corresponding to the frequency offset value in the time domain.
  • the actual sequence sent by the network device i.e., the detected synchronization signal
  • delay, and frequency offset value can be determined based on the positions of the maximum correlation peaks corresponding to multiple frequency offset values.
  • the network device performs subcarrier mapping and IFFT processing on the first sequence to generate the PSS, that is, the PSS is a signal with an OFDM waveform; correspondingly, the terminal device detects the PSS according to the first sequence. Since the first sequence includes at least one element with a value of 0, the complexity required for frequency domain multiplication operations and the complexity of IDFT can be reduced, thereby reducing the detection complexity of the synchronization signal.
  • step numbers in the above flowcharts are only examples of the execution process and do not constitute a restriction on the order of execution of the steps. That is, the size of each step number does not imply the order of execution; the execution order of each step should be determined by its function and internal logic. Furthermore, not all steps shown in the flowcharts are mandatory steps; some steps may be added or deleted based on actual needs.
  • the first communication device and the second communication device may include hardware structures and/or software modules corresponding to the execution of each function.
  • the embodiments of this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
  • the first communication device and the second communication device can be divided into functional units according to the above method example.
  • each function can be divided into a separate functional unit, or two or more functions can be integrated into one unit.
  • the integrated unit can be implemented in hardware or as a software functional unit.
  • FIG6 shows a possible exemplary block diagram of the device involved in the embodiments of this application.
  • the device 600 may include a processing unit 602 and a communication unit 603.
  • the processing unit 602 is used to control and manage the operation of the device 600.
  • the communication unit 603 is used to support communication between the device 600 and other devices.
  • the communication unit 603 is also called a transceiver unit, and may include a receiving unit and/or a sending unit, respectively used to perform receiving and sending operations.
  • the device 600 may also include a storage unit 601 for storing the program code and/or data of the device 600.
  • the device 600 can be the first communication device in the above embodiments.
  • the processing unit 602 can support the device 600 in performing the actions of the first communication device in the above method embodiments.
  • the processing unit 602 mainly performs the internal actions of the first communication device in the method embodiments, and the communication unit 603 can support communication between the device 600 and other devices.
  • the processing unit 602 is used to: generate a synchronization signal according to the first sequence; the communication unit 603 is used to: send the synchronization signal; wherein the first sequence is ideally autocorrelated, and the set of values for the elements of the first sequence is ⁇ -A, 0, A ⁇ , where A is a constant.
  • the processing unit 602 is specifically used to: map the first sequence onto multiple subcarriers and perform IFFT processing to generate the synchronization signal.
  • A 1.
  • the first sequence is obtained based on a third sequence, where the set of values for the elements in the third sequence is ⁇ 0, 1, 2 ⁇ ; the first sequence is denoted as [x(n)], and the third sequence is denoted as [s(n)], and the first sequence and the third sequence satisfy:
  • the transmission power of the synchronization signal is a first power plus a power bias, wherein the power bias is equal to...
  • L represents the length of the first sequence, and m represents the number of elements in the first sequence that have a value of 0; wherein, the first power is predefined or preconfigured.
  • L represents the length of the first sequence
  • m represents the number of elements in the first sequence that have a value of 0.
  • the first sequence is obtained based on a third sequence, where the set of values for the elements in the third sequence is ⁇ 0, 1, 2 ⁇ ; the first sequence is denoted as [x(n)], and the third sequence is denoted as [s(n)], and the first sequence and the third sequence satisfy:
  • the transmission power of the synchronization signal is a first power, which is predefined or preconfigured.
  • the first sequence is obtained based on a third sequence, which is one of W sequences obtained according to W recursive formulas; wherein the cross-correlation value between the W sequences is less than or equal to a first threshold, and W is an integer greater than 1.
  • the W recursive formulas include any of the following:
  • s(n+5) (2s(n+2)+2s(n+1)+s(n))mod3;
  • s(n+5) (2s(n+3)+2s(n+2)+s(n+1)+s(n))mod3;
  • s(n+5) (2s(n+4)+2s(n+1)+s(n))mod3.
  • the normalized subpeak of the ambiguity function of the synchronization signal is less than or equal to a second threshold.
  • the device 600 can be the second communication device in the above embodiments.
  • the processing unit 602 can support the device 600 in performing the actions of the second communication device in the above method embodiments.
  • the processing unit 602 mainly performs the internal actions of the second communication device in the method embodiments, and the communication unit 603 can support communication between the device 600 and other devices.
  • the processing unit 602 is used to: detect a synchronization signal, the synchronization signal being a signal obtained based on the first sequence; wherein the first sequence is ideally autocorrelated, and the set of values for the elements of the first sequence is ⁇ -A, 0, A ⁇ , where A is a constant.
  • the processing unit 602 is specifically configured to: acquire the first sequence, process the received signal according to the first sequence to detect the synchronization signal; or, acquire a third sequence, obtain the first sequence according to the third sequence, process the received signal according to the first sequence to detect the synchronization signal; or, process the received signal according to a sequence in a set of synchronization sequences to detect the synchronization signal, wherein the sequence in the set of synchronization sequences includes the first sequence.
  • DFT Discrete Fourier Transform
  • IFFT Inverse Fast Fourier Transform
  • the processing unit 602 is specifically used to: oversample the first sequence and perform correlation processing on the received signal based on the oversampled sequence; or, downsample the received signal and perform correlation processing on the downsampled signal based on the first sequence.
  • the processing unit 602 is specifically used to: map the first sequence onto multiple subcarriers to obtain a frequency domain sequence; perform DFT processing on the received signal to obtain a frequency domain signal; perform conjugate dot product on the frequency domain sequence and the frequency domain signal, and perform inverse discrete Fourier transform (IDFT) processing on the sequence after conjugate dot product.
  • DFT inverse discrete Fourier transform
  • A 1.
  • the first sequence is obtained based on a third sequence, where the set of values for the elements in the third sequence is ⁇ 0, 1, 2 ⁇ ; the first sequence is denoted as [x(n)], and the third sequence is denoted as [s(n)], and the first sequence and the third sequence satisfy:
  • L represents the length of the first sequence
  • m represents the number of elements in the first sequence that have a value of 0.
  • the first sequence is obtained based on a third sequence, where the set of values for the elements in the third sequence is ⁇ 0, 1, 2 ⁇ ; the first sequence is denoted as [x(n)], and the third sequence is denoted as [s(n)], and the first sequence and the third sequence satisfy:
  • the first sequence is obtained based on a third sequence, which is one of W sequences obtained according to W recursive formulas; wherein the cross-correlation value between the W sequences is less than or equal to a first threshold, and W is an integer greater than 1.
  • the W recursive formulas include any of the following:
  • s(n+5) (2s(n+2)+2s(n+1)+s(n))mod3;
  • s(n+5) (2s(n+3)+2s(n+2)+s(n+1)+s(n))mod3;
  • s(n+5) (2s(n+4)+2s(n+1)+s(n))mod3.
  • the normalized subpeak of the ambiguity function of the synchronization signal is less than or equal to a second threshold.
  • each unit in the device can be implemented entirely through software calls from processing elements; all units can be implemented entirely in hardware; or some units can be implemented through software calls from processing elements, and some units can be implemented in hardware.
  • each unit can be a separate processing element, or it can be integrated into a chip within the device. Alternatively, it can be stored as a program in memory, called and executed by a processing element of the device.
  • these units can be fully or partially integrated together, or implemented independently.
  • the processing element mentioned here can also be called a processor, which can be an integrated circuit with signal processing capabilities. In the implementation process, the operations of the above methods or the various units mentioned above can be implemented through integrated logic circuits in the processor element or through software calls from processing elements.
  • a unit in any of the above devices can be one or more integrated circuits configured to implement the methods described above, such as: one or more application-specific integrated circuits (ASICs), or one or more digital single-processors (DSPs), or one or more field-programmable gate arrays (FPGAs), or a combination of at least two of these forms of integrated circuits.
  • ASICs application-specific integrated circuits
  • DSPs digital single-processors
  • FPGAs field-programmable gate arrays
  • a unit in the device can be implemented in the form of a processing element scheduler
  • the processing element can be a processor, such as a general-purpose central processing unit (CPU), or other processor capable of calling programs.
  • CPU general-purpose central processing unit
  • these units can be integrated together and implemented as a System-on-a-Chip (SoC).
  • SoC System-on-a-Chip
  • this application also provides a communication device for implementing the functions of the first or second communication device described above.
  • the device may be a communication equipment or a chip within a communication equipment.
  • the device includes a processor 701 and a communication interface 702, and optionally, a memory 703.
  • FIG7 only shows the main components of the communication device.
  • the communication device may further include a memory 703 and an input/output device (not shown in the figure).
  • the processor 701 is used to execute the program code stored in the memory 703, specifically to perform the actions of the processing unit 602 described above, which will not be described in detail here.
  • the communication interface 702 is specifically used to perform the actions of the communication unit 603 described above, which will not be described in detail here.
  • Processor 701 can be a CPU, a digital processing unit, etc. Processor 701 can be used to process communication protocols and communication data, control the entire communication device, execute software programs, and process software program data, such as, but not limited to, baseband-related processing.
  • Communication interface 702 can be used for transmitting and receiving signals, such as, but not limited to, radio frequency transceiver.
  • the above-mentioned devices can be disposed on separate chips, or at least partially or entirely on the same chip.
  • processor 701 can be further divided into an analog baseband processor and a digital baseband processor.
  • the analog baseband processor can be integrated with the transceiver on the same chip, while the digital baseband processor can be disposed on a separate chip.
  • a digital baseband processor can be integrated with multiple application processors (such as, but not limited to, graphics processors, multimedia processors, etc.) on the same chip.
  • application processors such as, but not limited to, graphics processors, multimedia processors, etc.
  • SoC system-on-a-chip
  • the communication interface 702 can be a transceiver, an interface circuit such as a transceiver circuit, or a transceiver chip, etc.
  • the communication interface 702 may include radio frequency (RF) circuitry and an antenna.
  • the RF circuitry is mainly used for converting baseband signals to RF signals and processing RF signals.
  • the antenna is mainly used for transmitting and receiving RF signals in the form of electromagnetic waves.
  • Input/output devices, such as touchscreens, displays, and keyboards, are mainly used for receiving user input data and outputting data to the user.
  • Memory 703 is used to store programs executed by processor 701.
  • Memory 703 can be non-volatile memory, such as a hard disk drive (HDD) or solid-state drive (SSD), or it can be volatile memory, such as random-access memory (RAM).
  • Memory 703 can be any other medium capable of carrying or storing desired program code in the form of instructions or data structures that can be accessed by a computer, but is not limited to this.
  • the processor 701 can read the software program in the memory 703, interpret and execute the instructions of the software program, and process the data of the software program.
  • the processor 701 performs baseband processing on the data to be transmitted and outputs the baseband signal to the radio frequency (RF) circuit.
  • the RF circuit processes the baseband signal and transmits the RF signal outward in the form of electromagnetic waves through the antenna.
  • the RF circuit receives the RF signal through the antenna, converts the RF signal into a baseband signal, and outputs the baseband signal to the processor 701.
  • the processor 701 converts the baseband signal into data and processes the data.
  • the radio frequency circuitry and antenna can be set up independently of the processor performing baseband processing.
  • the radio frequency circuitry and antenna can be arranged remotely, independent of the communication device.
  • This application embodiment does not limit the specific connection medium between the communication interface 702, processor 701, and memory 703.
  • the memory 703, processor 701, and communication interface 702 are connected via a bus 704, which is represented by a thick line.
  • the connection methods between other components are only illustrative and not intended to be limiting. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, only one thick line is used in Figure 7, but this does not indicate that there is only one bus or one type of bus.
  • the communication device described above can be a standalone device or part of a larger device.
  • the communication device can be:
  • An independent integrated circuit or a chip, or a chip system or subsystem
  • a collection of one or more ICs optionally including a storage component for storing data and instructions;
  • ASIC Application-specific integrated circuit
  • “multiple” can refer to two or more. Therefore, in this application embodiment, “multiple” can also be understood as “at least two”.
  • “At least one” can be understood as one or more, such as one, two, or more.
  • “including at least one” means including one, two, or more.
  • A, B, and C then it could include A, B, C, A and B, A and C, B and C, or A, B, and C.
  • “And/or” describes the association relationship between related objects. Specifically, there can be three relationships. For example, A and/or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character "/”, unless otherwise specified, generally indicates that the preceding and following related objects have an "or" relationship.
  • system and “network” in the embodiments of this application can be used interchangeably, as can “according to” and “based on”.
  • the ordinal numbers such as “first” and “second” mentioned in the embodiments of this application are generally used to distinguish different objects and are not used to limit the order, sequence, priority, or importance of multiple objects.
  • the first communication device and the second communication device in the embodiments of this application are used to distinguish between two communication devices, and do not limit the priority or importance of these two communication devices.
  • this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
  • computer-usable storage media including but not limited to disk storage, CD-ROM, optical storage, etc.
  • These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means that implement the functions specified in one or more flowcharts and/or one or more block diagrams.
  • These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, such that the instructions, which execute on the computer or other programmable apparatus, provide steps for implementing the functions specified in one or more flowcharts and/or one or more block diagrams.

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Abstract

本申请涉及通信技术领域，公开了一种通信方法、装置及系统。其中方法包括：第一通信装置根据第一序列生成同步信号，并发送同步信号；其中，第一序列理想自相关，第一序列的元素的取值集合为{-A,0,A}，A为常数。采用上述方法，由于第一序列包括至少一个取值为0的元素，且第一序列理想自相关，从而能够在保证同步信号的检测性能的同时，降低同步信号的检测复杂度。

Description

一种通信方法、装置及系统
相关申请的交叉引用
本申请要求在2024年07月19日提交中华人民共和国国家知识产权局、申请号为202410982213.2、申请名称为“一种通信方法、装置及系统”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及通信技术领域，尤其涉及一种通信方法、装置及系统。
背景技术
无线通信系统中，同步信号用于终端设备与网络设备之间的时频同步。比如，网络设备可以发送同步信号(synchronization signal，SS)/物理广播信道(physical broadcast channel，PBCH)块(SS/PBCH block)，进而终端设备接收到SS/PBCH block后可以进行时频同步，并获取小区的信息(如物理小区号(physical cell identity，PCI))，以便于接入小区。其中，SS/PBCH block包括主同步信号(primary synchronization signal，PSS)、辅同步信号(secondary synchronization signal，SSS)和物理广播信道(physical broadcast channel，PBCH)。
终端设备基于主同步信号进行时频同步，因此，主同步信号的检测复杂度较高。如何降低主同步信号的检测复杂度，仍需进一步研究。
发明内容
本申请提供了一种通信方法、装置及系统，用于降低同步信号的检测复杂度。
第一方面，本申请实施例提供一种通信方法，该方法可以应用于第一通信装置，第一通信装置可以为网络设备或者网络设备中的组成部件(如芯片或电路)。例如，在第一方面提供的方法中，第一通信装置根据第一序列生成同步信号；发送所述同步信号；其中，所述第一序列理想自相关，所述第一序列的元素的取值集合为{-A,0,A}，A为常数。
采用上述方法，由于第一序列包括至少一个取值为0的元素，且第一序列理想自相关，从而能够在保证同步信号的检测性能的同时，降低同步信号的检测复杂度。
在一种可能的设计中，根据第一序列生成同步信号，包括：对所述第一序列进行DFT处理得到第二序列；将所述第二序列映射到多个子载波上，并进行IFFT处理，生成所述同步信号；其中，所述第一序列记为[x(n)]，所述第二序列记为[y(n)]，n＝0,1,2……L-1，所述第二序列和所述第一序列满足：
如此，通过对第一序列进行DFT处理、子载波映射和IFFT处理生成同步信号，即使用DFT-s-OFDM波形发送同步信号。
在一种可能的设计中，根据第一序列生成同步信号，包括：将所述第一序列映射到多个子载波上，并进行IFFT处理，生成所述同步信号。
如此，通过对第一序列进行子载波映射和IFFT处理生成同步信号，即使用OFDM波形发送同步信号。
在一种可能的设计中，A＝1。
在一种可能的设计中，所述第一序列是基于第三序列得到的，所述第三序列中元素的取值集合为{0,1,2}；所述第一序列记为[x(n)]，所述第三序列记为[s(n)]，所述第一序列和所述第三序列满足：
可以理解的是，对于三元序列而言，元素取值集合为{0,1,2}，1和-2是模3同余，2和-1是模3同余，因此，可以将最终生成的序列中元素2替换成-1。
在一种可能的设计中，所述同步信号的发送功率为第一功率加上功率偏置量，所述功率偏置量等于L表示所述第一序列的长度，m表示所述第一序列中取值为0的元素个数；其中，所述第一功率是预定义或预配置的。
在一种可能的设计中，L表示所述第一序列的长度，m表示所述第一序列中取值为0的元素个数。
在一种可能的设计中，所述第一序列是基于第三序列得到的，所述第三序列中元素的取值集合为{0,1,2}；所述第一序列记为[x(n)]，所述第三序列记为[s(n)]，所述第一序列和所述第三序列满足：
可以理解的是，由于三元序列中包括至少一个取值为0的元素，因此在三元序列(取值集合为{-1,0,1})的基础上乘以传输功率关联的因子便于保证发送信号的功率归一化。
在一种可能的设计中，所述同步信号的发送功率为第一功率，所述第一功率是预定义或预配置的。
在一种可能的设计中，所述第一序列是基于第三序列得到的，所述第三序列为W个序列中的一个序列，所述W个序列是根据W个递推公式得到的，W为大于1的整数。
在一种可能的设计中，所述W个序列之间的互相关值小于或等于第一阈值。如此，便于保证同步信号的检测性能。
在一种可能的设计中，所述第一阈值为0.26。
在一种可能的设计中，所述W个递推公式包括以下任意多项：
s(n+5)＝(2s(n+2)+2s(n+1)+s(n))mod3；
s(n+5)＝(2s(n+3)+2s(n+2)+s(n+1)+s(n))mod3；
s(n+5)＝(2s(n+4)+2s(n+1)+s(n))mod3。
在一种可能的设计中，所述同步信号的模糊函数的归一化次高峰小于或等于第二阈值，便于保证同步信号的抗频偏性能。
在一种可能的设计中，所述第二阈值为0.135。
在一种可能的设计中，所述第一序列的长度为3k-1/2，k为大于1的整数。
在一种可能的设计中，当k等于5时，所述第一序列中取值为0的元素个数为40。
第二方面，本申请实施例提供一种通信方法，该方法可以应用于第二通信装置，第二通信装置可以为终端设备或者终端设备中的组成部件(如芯片或电路)。例如，在第二方面提供的方法中，第二通信装置检测同步信号，所述同步信号是根据所述第一序列得到的信号；其中，所述第一序列理想自相关，所述第一序列的元素的取值集合为{-A,0,A}，A为常数。
在一种可能的设计中，包括：获取所述第一序列，根据所述第一序列处理接收到的信号，以检测出所述同步信号；或者，获取第三序列，根据所述第三序列得到所述第一序列，根据所述第一序列处理接收到的信号，以检测出所述同步信号；或者，根据同步序列集合中的序列处理接收到的信号，以检测出所述同步信号，所述同步序列集合中的序列包括所述第一序列。
在一种可能的设计中，根据所述第一序列处理接收到的信号，包括：对所述第一序列进行离散傅里叶变换DFT处理得到第二序列；将所述第二序列映射到多个子载波上，并进行逆快速傅里叶变换IFFT处理；根据IFFT处理后的序列，对接收到的信号进行相关处理；其中，所述第一序列记为[x(n)]，所述第二序列记为[y(n)]，n＝0,1,2……L-1，所述第二序列和所述第一序列满足：
如此，终端设备可以直接在时域上对接收到的信号进行相关处理，而不需要先对接收到的信号进行DFT处理变换到频域再进行处理，从而极大地降低了同步信号的检测复杂度。此外，由于第一序列包括至少一个取值为0的元素，从而能够降低每次相关运算中加法运算的次数和/或乘法运算的次数，进而降低同步信号的检测复杂度。
在一种可能的设计中，根据所述第一序列处理接收到的信号，包括：对所述第一序列进行过采样，根据过采样后的序列，对接收到的信号进行相关处理；或者，对接收到的信号进行降采样，根据所述第一序列，对降采样后的信号进行相关处理。
如此，终端设备可以直接在时域上对接收到的信号进行相关处理，而不需要先对接收到的信号进行DFT处理变换到频域再进行处理，从而极大地降低了同步信号的检测复杂度。此外，由于第一序列包括至少一个取值为0的元素，从而能够降低每次相关运算中加法运算的次数和/或乘法运算的次数，进而降低同步信号的检测复杂度。
可以理解的是，当同步信号为DFT-s-OFDM波形的信号时，即使用DFT-s-OFDM波形模拟时域方波进行同步信号的发送，因为DFT-s-OFDM波形可以与当前系统其他信道的OFDM波形的信号兼容，从而降低对其他信道信号的干扰，同时还可以使能终端设备直接在时域上对接收到的信号进行相关处理。因此，终端设备可以将第一序列经过DFT-s-OFDM波形处理后得到的信号和接收到的信号做相关，或者也可以直接对第一序列进行过采样(即进行序列元素重复)后和接收到的信号做相关，或者也可以对接收到的信号进行降采样后和第一序列做相关。
在一种可能的设计中，根据所述第一序列处理接收到的信号，包括：将所述第一序列映射到多个子载波上，得到频域序列；对接收到的信号进行DFT处理，得到频域信号；对所述频域序列和所述频域信号进行共轭点乘，并对共轭点乘后的序列进行离散傅里叶逆变换IDFT处理。
如此，由于第二序列包括至少一个取值为0的元素，从而能够降低频域检测时的乘法操作所需的复杂度以及IDFT的复杂度，进而降低同步信号的检测复杂度。
在一种可能的设计中，A＝1。
在一种可能的设计中，所述第一序列是基于第三序列得到的，所述第三序列中元素的取值集合为{0,1,2}；所述第一序列记为[x(n)]，所述第三序列记为[s(n)]，所述第一序列和所述第三序列满足：
在一种可能的设计中，L表示所述第一序列的长度，m表示所述第一序列中取值为0的元素个数。
在一种可能的设计中，所述第一序列是基于第三序列得到的，所述第三序列中元素的取值集合为{0,1,2}；所述第一序列记为[x(n)]，所述第三序列记为[s(n)]，所述第一序列和所述第三序列满足：
在一种可能的设计中，所述第一序列是基于第三序列得到的，所述第三序列为W个序列中的一个序列，所述W个序列是根据W个递推公式得到的；其中，所述W个序列之间的互相关值小于或等于第一阈值，W为大于1的整数。
在一种可能的设计中，所述第一阈值为0.26。
在一种可能的设计中，所述W个递推公式包括以下任意多项：
s(n+5)＝(2s(n+2)+2s(n+1)+s(n))mod3；
s(n+5)＝(2s(n+3)+2s(n+2)+s(n+1)+s(n))mod3；
s(n+5)＝(2s(n+4)+2s(n+1)+s(n))mod3。
在一种可能的设计中，所述同步信号的模糊函数的归一化次高峰小于或等于第二阈值。
在一种可能的设计中，所述第二阈值为0.135。
在一种可能的设计中，所述第一序列的长度为3k-1/2，k为大于1的整数。
在一种可能的设计中，当k等于5时，所述第一序列中取值为0的元素个数为40。
第三方面，本申请实施例提供一种通信方法，该方法包括：根据第一序列生成同步信号，并发送所述同步信号；根据第一序列处理接收到的信号，以检测出所述同步信号；其中，所述第一序列理想自相关，所述第一序列的元素的取值集合为{-A,0,A}，A为常数。
可以理解的是，第三方面的其它技术特征可以参照上述第一方面和第二方面中的描述，不再赘述。
第四方面，本申请提供一种通信装置，所述通信装置具备实现上述第一方面或第二方面涉及的功能，比如，所述通信装置包括执行上述第一方面或第二方面涉及操作所对应的模块或单元或手段，所述功能或单元或手段可以通过软件实现，或者通过硬件实现，也可以通过硬件执行相应的软件实现。
在一种可能的设计中，所述通信装置包括处理单元、通信单元，其中，通信单元可以用于收发信号，以实现该通信装置和其它装置之间的通信；处理单元可以用于执行该通信装置的一些内部操作。处理单元、通信单元执行的功能可以和上述第一方面或第二方面涉及的操作相对应。
在一种可能的设计中，所述通信装置包括处理器，处理器可以用于与存储器耦合。所述存储器可以保存实现上述第一方面或第二方面涉及的功能的必要计算机程序或指令。所述处理器可执行所述存储器存储的计算机程序或指令，当所述计算机程序或指令被执行时，使得所述通信装置实现上述第一方面或第二方面任意可能的设计或实现方式中的方法。
在一种可能的设计中，所述通信装置包括处理器和存储器，存储器可以保存实现上述第一方面或第二方面涉及的功能的必要计算机程序或指令。所述处理器可执行所述存储器存储的计算机程序或指令，当所述计算机程序或指令被执行时，使得所述通信装置实现上述第一方面或第二方面任意可能的设计或实现方式中的方法。
在一种可能的设计中，所述通信装置包括处理器和接口电路，其中，处理器用于通过所述接口电路与其它装置通信，并执行上述第一方面或第二方面任意可能的设计或实现方式中的方法。
可以理解地，上述第四方面中，处理器可以通过硬件来实现也可以通过软件来实现，当通过硬件实现时，该处理器可以是逻辑电路、集成电路等；当通过软件来实现时，该处理器可以是一个通用处理器，通过读取存储器中存储的软件代码来实现。此外，以上处理器可以为一个或多个，存储器可以为一个或多个。存储器可以与处理器集成在一起，或者存储器与处理器分离设置。在具体实现过程中，存储器可以与处理器集成在同一块芯片上，也可以分别设置在不同的芯片上，本申请实施例对存储器的类型以及存储器与处理器的设置方式不做限定。
第五方面，本申请提供一种通信系统，该通信系统可以包括第一通信装置和第二通信装置；其中，第一通信装置用于执行上述第一方面所述的方法，第二通信装置用于执行上述第二方面所述的方法。
第六方面，本申请提供一种计算机可读存储介质，所述计算机存储介质中存储有计算机程序(或计算机可读指令)，当计算机读取并执行部分或全部所述计算机可读指令时，上述第一方面或第二方面的任一种可能的设计中的方法被执行。
示例性的，计算机可读存储介质可以是计算机能够存取的任何可用介质。以此为例但不限于：计算机可读介质可以包括非瞬态计算机可读介质、随机存取存储器(random-access memory，RAM)、只读存储器(read-only memory，ROM)、电可擦除可编程只读存储器(electrically EPROM，EEPROM)、CD-ROM或其他光盘存储、磁盘存储介质或者其他磁存储设备、或者能够用于携带或存储具有指令或数据结构形式的期望的程序代码并能够由计算机存取的任何其他介质。
第七方面，本申请提供一种计算机程序产品，当计算机读取并执行所述计算机程序产品时，使得上述第一方面或第二方面的任一种可能的设计中的方法被执行。
第八方面，本申请提供一种芯片(或芯片系统)，所述芯片包括处理器，所述处理器与存储器耦合，所述存储器中存储有计算机程序；所述处理器用于调用所述存储器中的部分或全部所述计算机程序，使得上述第一方面或第二方面的任一种可能的设计中的方法被执行。
附图说明
图1为本申请实施例应用的通信系统的架构示意图；
图2为本申请实施例提供的SS/PBCH block示意图；
图3为本申请实施例提供的反馈移位寄存器的基本结构示意图；
图4为本申请实施例提供的通信方法所对应的流程示意图；
图5为本申请实施例提供的三元序列的生成架构示意图；
图6为本申请实施例中所涉及的装置的可能的示例性框图；
图7为本申请实施例提供的一种通信装置的结构示意图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行描述。本申请将围绕可包括多个设备、组件、模块等的系统来呈现各个方面、实施例或特征。应当理解和明白的是，各个系统可包括另外的设备、组件、模块等，并且/或者可以并不包括结合附图讨论的所有设备、组件、模块等。此外，还可以使用这些方案的组合。
在本申请实施例中，“示例性地”、“比如”等词语用于表示例子、例证或说明。本申请中被描述为“示例”的任何实施例或设计方案不应被解释为比其它实施例或设计方案更优选或更具优势。确切而言，使用“示例”一词旨在以具体方式呈现概念。本申请实施例中，“的(of)”，“相应的(corresponding，relevant)”和“对应的(corresponding)”有时可以混用，应当指出的是，在不强调其区别时，其所要表达的含义是一致的。
本申请实施例的技术方案可以应用于各种无线通信系统，例如通用移动通信系统(universal mobile telecommunications system，UMTS)、无线局域网(wireless local area network，WLAN)、短距无线通信系统(如侧行链路(sidelink)、无线保真(wireless fidelity，Wi-Fi)、蓝牙等系统)、有线网络、车到任意物体(vehicle to everything，V2X)通信系统、设备间(device-to-device，D2D)通信系统、车联网通信系统、第4代(4th generation，4G)移动通信系统(如长期演进(long term evolution，LTE)系统)、LTE频分双工(frequency division duplex，FDD)系统、LTE时分双工(time division duplex，TDD)、全球互联微波接入(worldwide interoperability for microwave access，WiMAX)通信系统、第五代(5th generation，5G)移动通信系统(如新空口(new radio，NR)系统)、未来通信系统、或其它类似的通信系统等，不予限制。本申请实施例以图1所示的通信系统为例进行描述，在将本申请实施例的技术方案应用于其它通信系统时，可以将实施例中的设备、组件、模块等替换成其它通信系统中的相应设备、组件、模块，不予限制。
图1为本申请实施例应用的通信系统的架构示意图。如图1所示，该通信系统包括接入网100。可选地，该通信系统还可以包括核心网200和互联网300。其中，接入网100可以包括至少一个网络设备，如图1中的110a和110b，还可以包括至少一个终端设备，如图1中的120a-120j。其中，110a是基站，110b是微站，120a、120e、120f和120j是手机，120b是汽车，120c是加油机，120d是布置在室内或室外的家庭接入节点(home access point，HAP)，120g是笔记本电脑，120h是打印机，120i是无人机。其中，同一个终端设备或网络设备，在不同应用场景中可以提供不同的功能。比如，图1中的手机有120a、120e、120f和120j，手机120a可以接入基站110a，连接汽车120b，与手机120e直连通信以及接入到HAP，汽车120b可以接入HAP以及与手机120a直连通信，手机120f可以接入为微站110b，连接笔记本电脑120g，连接打印机120h，手机120j可以控制无人机120i。
(1)网络设备
网络设备是一种具有无线收发功能的网络侧设备。网络设备可以是无线接入网(radio access network，RAN)中为终端设备提供无线通信功能的装置，称为RAN设备。RAN可以为第三代合作伙伴计划(3rd generation partnership project，3GPP)中的接入网，例如，4G、5G、或未来网络。RAN也可以是开放式接入网(open RAN，O-RAN或ORAN)、云无线接入网络(cloud radio access network，CRAN)、或者以上两种或两种以上网络的通信网络。
RAN设备也可以是基站(base station)、演进型基站(evolved NodeB，eNodeB)、发送接收点(transmission reception point，TRP)、5G移动通信系统中的下一代基站(next generation NodeB，gNB)、未来移动通信系统中的基站或WiFi系统中的接入节点等。
RAN设备还可以是完成基站部分功能的模块或单元，例如，可以是集中式单元(central unit，CU)，也可以是分布式单元(distributed unit，DU)，还可以是无线单元(radio unit，RU)。这里的CU完成基站的无线资源控制协议(radio resource control，RRC)和PDCP的功能，还可以完成业务数据适配协议(service data adaptation protocol，SDAP)的功能；CU可以进一步划分为CU控制面(control panel，CP)(即CU-CP)和CU用户面(user panel，UP)(即CU-UP)。DU完成基站的RLC层和MA层的功能，还可以完成部分物理层或全部物理层的功能，有关上述各个协议层的具体描述，可以参考3GPP的相关技术规范。CU和DU可以是单独设置，或者也可以包括在同一个网元中，例如基带单元(baseband unit，BBU)中。RU可以包括在射频设备或者射频单元中，例如包括在射频拉远单元(remote radio unit，RRU)、有源天线处理单元(active antenna unit，AAU)或远程射频头(remote radio head，RRH)中。在不同系统中，CU、DU或RU也可以有不同的名称，但是本领域的技术人员可以理解其含义。例如，在ORAN系统中，CU也可以称为O-CU(开放式CU)，DU也可以称为O-DU，RU也可以称为O-RU。本申请中的CU(或CU-CP、CU-UP)、DU和RU中的任一单元，可以是通过软件模块、硬件模块、或者软件模块与硬件模块结合来实现。RA设备可以是宏基站(如图1中的110a)，也可以是微基站或室内站(如图1中的110b)，还可以是中继节点或施主节点等。本申请的实施例对网络设备所采用的具体技术和具体设备形态不做限定。
在本申请的实施例中，网络设备的功能也可以由网络设备中的模块(如芯片)来执行，也可以由包含有网络设备功能的控制子系统来执行。这里的包含有网络设备功能的控制子系统可以是智能电网、工业控制、智能交通、智慧城市等上述应用场景中的控制中心。
(2)终端设备
终端设备是一种具有无线收发功能的用户侧设备。终端设备也可以称为终端、用户设备(user equipment，UE)、移动台、移动终端等。终端设备可以广泛应用于各种场景，例如，设备到设备(device-to-device，D2D)、车物(vehicle to everything，V2X)通信、机器类通信(machine-type communication，MTC)、物联网(internet of things，IOT)、虚拟现实、增强现实、工业控制、自动驾驶、远程医疗、智能电网、智能家具、智能办公、智能穿戴、智能交通、智慧城市等。终端设备可以是手机、平板电脑、带无线收发功能的电脑、可穿戴设备、车辆、无人机、直升机、飞机、轮船、机器人、机械臂、智能家居设备等。本申请实施例中，用于实现终端设备的功能的装置可以是终端设备，也可以是能够支持终端设备实现该功能的装置，例如芯片系统或可实现终端设备功能的组合器件、部件，该装置可以被安装在终端设备中。本申请的实施例对终端设备所采用的具体技术和具体设备形态不做限定。
本申请实施例中，终端设备的功能也可以由终端设备中的模块(如芯片或调制解调器)来执行，也可以由包含有终端设备功能的装置来执行。
网络设备和终端设备可以是固定位置的，也可以是可移动的。网络设备和终端设备可以部署在陆地上，包括室内或室外、手持或车载；也可以部署在水面上；还可以部署在空中的飞机、气球和人造卫星上。本申请的实施例对网络设备和终端设备的应用场景不做限定。
网络设备和终端设备的角色可以是相对的，例如，图1中的直升机或无人机120i可以被配置成移动网络设备，对于那些通过120i接入到无线接入网100的终端设备120j来说，终端设备120i是网络设备；但对于网络设备110a来说，120i是终端设备，即110a与120i之间是通过无线空口协议进行通信的。当然，110a与120i之间也可以是通过网络设备与网络设备之间的接口协议进行通信的，此时，相对于110a来说，120i也是网络设备。因此，网络设备和终端设备都可以统一称为通信装置，图1中的110a和110b可以称为具有网络设备功能的通信装置，图1中的120a-120j可以称为具有终端设备功能的通信装置。
网络设备和终端设备之间、网络设备和网络设备之间、终端设备和终端设备之间可以通过授权频谱进行通信，也可以通过免授权频谱进行通信，也可以同时通过授权频谱和免授权频谱进行通信，不做限定。
本申请描述的网络架构以及业务场景是为了更加清楚的说明本申请实施例的技术方案，并不构成对于本申请实施例提供的技术方案的限定，本领域普通技术人员可知，随着网络架构的演变和新业务场景的出现，本申请实施例提供的技术方案对于类似的技术问题，同样适用。
下面先对本申请实施例所涉及的相关术语或技术特征进行解释。这些解释是为了让本申请实施例更容易被理解，而不应该视为对本申请所要求的保护范围中的术语的严格限定。
(1)序列
本申请实施例中的“序列”包括一个或多个元素。其中，元素可以表示为复数，包括实部和虚部；或者，元素也可以表示为实数，具体不做限定。
比如，序列[s(n)]包括L个元素，L为大于1的整数。n属于[0，……，L-1]，也即是n∈[0，……，L-1]。[0，……，L-1]中的“……”表示0与L-1之间的整数，例如在L＝5时，n∈[0，1，2，3，4,]。[s(n)]中的L个元素可以分别为：s(0)，……，s(L-1)；换言之，[s(n)]中的编号为n的元素可以为s(n)。
可以理解的是，本申请实施例以起始编号为0且按照步长1进行递增的编号方式为例，但并不限定于此。例如，编号方式也可以为：起始编号为1且按照步长1进行递增。又例如，编号方式还可以为：起始编号为X且按照步长1进行递减，X为大于1的整数。“[·]”与“{·}”可以替换使用，用于表示多个元素，可理解为集合、组、或者序列等，不做限定。
(2)相关运算
如果两个序列相同，那么它们之间的相关运算称为自相关；如果两个序列不同，那么它们之间的相关运算称为互相关。
对于长度为L的序列两个序列，如[s1(n)]和[s2(n)]，在不考虑时域循环移位的情况下，[s1(n)]和[s2(n)]之间的互相关值满足如下公式：
其中，c(s1,s2)’表示[s1(n)]和[s2(n)]之间的互相关值(即归一化前的互相关值)，c(s1,s2)表示[s1(n)]和[s2(n)]之间的互相关值(即归一化后的互相关值)，abs表示求取绝对值。
在考虑时域循环移位的情况下，[s1(n)]和[s2(n)]之间的互相关值满足如下公式：
其中，c(s1,s2)’表示[s1(n)]和[s2(n)]之间的互相关值(即归一化前的互相关值)，c(s1,s2)表示[s1(n)]和[s2(n)]之间的互相关值(即归一化后的互相关值)，τ为时域多径时延，τ的取值范围为[0,L-1]。
如果上述[s1(n)]和[s2(n)]为相同的序列(或者说[s1(n)]和[s2(n)]为同一序列)，且[s1(n)]或[s2(n)]之间的自相关值c(s1,s2)满足：则可以认为[s1(n)]或[s2(n)]理想自相关。
(3)SS/PBCH block
以5G通信系统为例，SS/PBCH block包括PSS、SSS和PBCH。如图2所示，在时域上，1个SS/PBCH块占用4个正交频分复用(orthogonal frequency division multiplexing，OFDM)符号(symbol)，比如符号0～符号3；在频域上，1个SS/PBCH块占用20个资源块(resource block，RB)(一个RB包括12个子载波)，也就是240个子载波，子载波编号为0～239。PSS位于符号0的中间的127个子载波上，SSS位于符号2的中间的127个子载波上。为了保护PSS和SSS，分别有不同的保护子载波，保护子载波不用于承载信号，在SSS两侧分别留有子载波作为保护子载波，如图2中的SSS两侧的空白区域就是保护子载波。PBCH占用符号1和符号3的全部子载波，以及占用符号2的全部子载波中除了SSS所占用的子载波之外的剩余的子载波中的一部分子载波(即剩余的子载波中除了保护子载波之外的子载波)。
(4)PSS和SSS的生成
终端设备在检测PSS前，不知道小区的中心频点，也没有完成终端设备和网络设备之间的载波频率校准，因此，PSS是终端设备用来确定小区的载波的中心频率的信号，且在存在时间偏差和频率偏差的情况下要保证检测性能。
NR中的PSS采用m序列。此处对m序列进行介绍：m序列是最长线性反馈移位寄存器序列的简称，是由带线性反馈的移存器产生的周期最长的序列。一般来说，一个v级线性反馈移存器产生的最长周期等于2v-1。图3为反馈移位寄存器的基本结构，用于初始化的比特数据被存储在存储器中，通过反馈函数生成新的值并补充到存储器中。假设反馈函数为所有存储器中的比特进行异或操作，即则输出序列为输出序列的长度为2v-1。
可以理解为，m序列由寄存器中存储的初始值序列和本原多项式确定，初始值序列中元素的取值集合为{0,1}，本原多项式的阶数为多项式中最高次幂。比如，本原多项式f(x)＝x7+x+1对应的递推公式为s(t)+s(t-6)+s(t-7)＝0，由于二进制的加法都是定义为模2加，因此可以将上述递推公式转换成s(t)＝s(t-6)+s(t-7)，即本原多项式f(x)＝x7+x+1对应递推公式s(t)＝s(t-6)+s(t-7)。其中，递推公式与本原多项式一一对应，本申请实施例中的“递推公式”可以替换为“本原多项式”。
当PSS采用m序列时，PSS序列(记为[d(n)])的一种可能的生成公式如下：
d(n)＝1-2x(m)

0≤n<127
其中，mod为取余运算，的介绍参见下文，x(i+7)＝(x(i+4)+x(i))mod2，[x(6)，x(5)，x(4)，x(3)，x(2)，x(1)，x(0)]为预配置或预定义的初始值，比如[x(6)，x(5)，x(4)，x(3)，x(2)，x(1)，x(0)]＝[1,1,1,0,1,1,0]。
按照上述公式生成m序列后，对m序列进行BPSK调制，可得到PSS序列，PSS序列中元素的取值集合为{1，-1}。进而，网络设备可以根据PSS序列生成PSS，比如网络设备将PSS序列中的元素映射到多个子载波上，并进行逆快速傅里叶变换(inverse fast fourier transformation，IFFT)处理生成PSS，即PSS为OFDM波形的信号。
此外，NR中的SSS采用gold序列，gold序列可以看成是两个本原多项式不同的m序列逐元素做异或得到，gold序列有良好的自相关和互相关特性，且gold序列数目大，便于携带信息。当SSS采用gold序列时，SSS序列的生成公式可以参照现有技术，此处不再赘述。网络设备按照SSS序列的生成公式生成SSS序列后，可以根据SSS序列生成SSS。
(5)PSS、SSS和PBCH的作用
PSS：用于进行频率同步和符号级的时间同步。其中，PSS序列用于承载可以称为小区号，的取值集合为{0,1,2}。由于的取值集合中有3个取值，因此，可以有3个PSS序列。这3个PSS序列可以对应同一递推公式，即这3个PSS序列是根据同一递推公式得到的m序列进行循环移位得到的。
SSS：用于承载可以称为小区组号，的取值集合为{0,1,2,…335}。小区号和小区组号共同决定了5G通信系统中的多个PCI，PCI(记为)的计算方式为：因此总共有1008个PCI。
其中，PSS序列总共有三种，终端设备检测出PSS序列后，便可确定出进而，终端设备将代入SSS的检测，一旦确定，SSS序列总共有336种可能。终端设备需要使用336种不同的SSS序列进行互相关检测，最大互相关值对应的SSS序列即为实际发送的序列。一旦终端设备成功搜索到了PSS和SSS，也就获得了小区的信息(如PCI)，从而具备了解析SS/PBCH block中包含的系统消息的能力。
PBCH：用于承载SS/PBCH block中包含的系统消息，如主消息块(main information block，MIB)，MIB包括终端设备接入网络所必须的信息，如系统帧号、初始接入的子载波间隔等。由于MIB中包含的信息有限，还不足以支持终端设备接入5G小区，因此终端设备还必须再得到一些必备的系统消息，比如系统信息块(system information block，SIB)1。SIB1以160毫秒为周期在物理下行共享信道(physical downlink shared channel，PDSCH)上传输，由于终端设备已在PBCH所携带的MIB中获取到了SIB1传输所使用的参数以及调度它的控制资源分布情况，因此可以接收SIB1。如此，终端设备可获取到接入5G小区所必须的系统消息，后续可以接入5G小区。
由于终端设备基于PSS进行时频同步，因此PSS的检测复杂度较高。
具体来说，假设终端设备接收到的信号为[r(n)]＝[r(0),r(1),…,r(L’-1)]，其中，接收到的信号的长度L’对应接收窗的长度，接收窗的长度是预设的，比如接收窗的长度可以和PSS的发送周期有关，举个例子，接收窗的长度设置为5ms。
终端设备可以根据3个PSS序列生成3个时域序列，并使用3个时域序列对接收到的信号进行检测。以其中一个PSS序列为例，终端设备对长度为L的PSS序列进行子载波映射、IFFT处理，得到时域序列p(在未过采样的情况下，序列p包括L个元素，在过采样的情况下，序列p包括N个元素，N大于L，此处以过采样为例)。
针对于接收到的信号，终端设备每次滑动一个采样点，比如第i次滑动采样点获取到的信号rtmp＝[r(i-1),r(i),…r(N+i-1)]，将序列p和序列rtmp做内积，得到序列p和序列rtmp之间的互相关值可选地，终端设备将互相关值进行归一化得到c(p,rtmp)′，具体计算公式可以参照上文。终端设备可以依次滑动N个采样点中的每个采样点，获得N个互相关值。
由于晶振频偏和终端设备的移动性，导致接收到的信号中存在频率偏移，考虑最大的晶振频偏(和设备器件特性有关)和终端设备最大的移动速度，终端设备可以提前得知最大频偏范围(比如小于或等于两倍的子载波间隔)。进而，终端设备可以根据步长遍历不同的频偏值对接收到的信号进行补偿，然后再进行上述相关操作。遍历的步长可以设置为0.2倍或者0.5倍的子载波间隔(subcarrier spacing，SCS)，以0.5倍的子载波间隔为例，当频偏值fd＝0.5*SCS时，对第i次滑动采样点获取到的信号rtmp纠正频偏得到进而通过相关运算得到序列p和序列rtmp,1之间的互相关值c(p,rtmp,1)′。
也就是说，终端设备在检测PSS时，需要遍历不同的PSS序列、不同的时延(即采样点)、不同频偏值进行相关计算，比如最大频偏范围内共有M个频偏值，采样点的个数为N，PSS序列的个数为3，则遍历3个PSS序列、M个频偏值和N个采样点，共需进行3*M*N次相关运算。其中，根据上述相关计算的公式可知，每次相关运算需要进行N-1次加法运算和N次乘法运算，从而导致检测复杂度较高。
基于此，本申请实施例提供一种通信方法，用于降低同步信号的检测复杂度。示例性地，本申请实施例提供的通信方法中，发送侧根据第一序列生成同步信号，并发送同步信号；其中，第一序列理想自相关，第一序列的元素的取值集合为{-A,0,A}，A为常数。同步信号可以为离散傅里叶变换扩展的正交频分复用(discrete fourier transformation-spread-orthogonal frequency division multiplexing，DFT-s-OFDM)波形的信号，此种情形下，由于第一序列包括至少一个取值为0的元素，从而能够降低每次相关运算中加法运算的次数和/或乘法运算的次数，进而降低同步信号的检测复杂度。或者，同步信号可以为正交频分复用(orthogonal frequency division multiplexing，OFDM)波形的信号，此种情形下，由于第一序列包括至少一个取值为0的元素，从而能够降低频域检测时的乘法操作所需的复杂度以及离散傅里叶逆变换(inverse discrete fourier transform，IDFT)的复杂度，进而降低同步信号的检测复杂度。
本申请实施例提供的通信方法涉及第一通信装置和第二通信装置。其中，第一通信装置为同步信号的发送侧，第二通信装为同步信号的接收侧。比如，第一通信装置为网络设备或为网络设备中的组成部件，如设置于网络设备中的芯片或芯片系统等；第二通信装置为终端设备或为终端设备中的组成部件，如设置于终端设备中的芯片或芯片系统等。本申请实施例中以“第一通信装置为网络设备，第二通信装置为终端设备”为例进行描述。
图4为本申请实施例提供的通信方法所对应的流程示意图。如图4所示，该流程可以包括：
S401，网络设备根据第一序列，生成同步信号。
示例性地，同步信号可以为PSS，或者其它可能的用于时间和/或频率同步的信号，具体不做限定。
示例性地，网络设备可以先获取第一序列，进而根据第一序列生成同步信号。其中，网络设备获取第一序列的方式有多种，比如网络设备直接获取预定义或预配置的第一序列，或者网络设备获取预定义或预配置的第三序列，并根据第三序列得到第一序列，具体参见下文。
(1)对第一序列进行描述。
第一序列为三元序列，三元序列可基于循环移位寄存器生成，参见图5，为三元序列的一种可能的生成架构。图5对应的本原多项式为f(x)＝x5+x2+x+2，对应的递推公式为s(n+5)+s(n+2)+s(n+1)+2s(n)＝0，推导出s(n+5)＝(2s(n+2)+2s(n+1)+s(n))mod3。可以理解的是，对于三元序列而言，元素取值集合为{0,1,2}，1和-2是模3同余，2和-1是模3同余，因此，可以将最终生成的序列中元素2替换成-1。
其中，第一序列理想自相关，第一序列的元素的取值集合为{-A,0,A}，A为常数。第一序列的长度为3k-1/2，k为大于1的整数。当k等于5，即第一序列的长度为121时，第一序列中取值为0的元素个数为40。
比如，A＝1，即第一序列的元素的取值集合为{-1,0,1}。示例性地，第一序列是基于第三序列得到的，第三序列中元素的取值集合为{0,1,2}；第一序列记为[x(n)]，第三序列记为[s(n)]，第一序列和第三序列满足：
又比如，L表示第一序列的长度，m表示第一序列中取值为0的元素个数，即第一序列的元素的取值集合为示例性地，第一序列是基于第三序列得到的，第一序列和第三序列满足：也就是说，可以根据第三序列得到第四序列，第四序列中元素的取值集合为{-1,0,1}，进而将第四序列乘以传输功率关联的因子得到第一序列，其中，传输功率关联的因子为如此，将第四序列中的元素乘以传输功率关联的因子得到第一序列，并根据第一序列生成同步信号，可以保证发送信号的功率归一化。
上述第三序列为W个序列中的一个序列，W个序列均是理想自相关的三元序列。W个序列是根据W个递推公式得到的，W个序列与W个递推公式一一对应，W个序列是根据W个递推公式得到的。比如，W个序列包括序列1、序列2……序列w，W个递推公式包括递推公式1、递推公式2……递推公式w，递推公式1至递推公式w为不同的递推公式；序列1是根据递推公式1和初始值序列1得到的，序列2是根据递推公式2和初始值序列2得到的，以此类推，序列w是根据递推公式w和初始值序列w得到的。初始值序列1至初始值序列w可以为相同的初始值序列(比如初始值序列1至初始值序列w都是[s(4)s(3)s(2)s(1)s(0)]＝[00001])，或者也可以为不同的初始值序列。
示例性地，W个递推公式之间的互相关值小于或等于第一阈值，不同递推公式之间的互相关值可以是指，基于不同递推公式得到的序列之间的互相关值；也就是说，W个序列之间的互相关值小于或等于第一阈值。第一阈值可以根据实际需要进行设置，比如第一阈值为0.26。举个例子，W个序列中每个序列的长度都是121，W个递推公式可以包括以下递推公式1至递推公式3中的任意多项：
递推公式1：s(n+5)＝(2s(n+2)+2s(n+1)+s(n))mod3；
递推公式2：s(n+5)＝(2s(n+3)+2s(n+2)+s(n+1)+s(n))mod3；
递推公式3：s(n+5)＝(2s(n+4)+2s(n+1)+s(n))mod3。
(2)对网络设备获取第一序列的实现进行描述。
作为一种可能的实现，第三序列为预配置或预定义的序列，此种情形下，网络设备可以直接获取预定义或预配置的第三序列，并根据第三序列得到第一序列，进而根据第一序列生成同步信号。或者，W个序列为预配置或预定义的序列，此种情形下，网络设备可以从W个序列中选择一个序列作为第三序列，并根据第三序列得到第一序列，进而根据第一序列生成同步信号。
可选地，第三序列关联小区标识，比如第三序列关联举个例子，的取值集合为{0,1,2}，则可以预配置或预定义W(W＝3)个序列，这3个序列关联的不同取值，比如序列1关联“0”，序列2关联“1”，序列3关联“2”；网络设备可以根据当前小区的从3个序列中选择一个序列作为第三序列。比如，当前小区的为“1”，则网络设备可以从3个序列中选择序列2作为第三序列。
也就是说，可以预配置或预定义一个序列，该序列即为第三序列；此种情形下，预配置或预定义的序列可以不关联小区标识。或者，也可以预配置或预定义W个序列，第三序列为W个序列中的一个序列；此种情形下，预配置或预定义的序列可以关联小区标识。
作为又一种可能的实现，第一序列为预配置或预定义的序列，此种情形下，网络设备可以直接获取预定义或预配置的第一序列，并根据第一序列生成同步信号。或者，W’个序列为预配置或预定义的序列(即同步序列集合包括W’个序列)，W’个序列是根据W个序列得到的，此种情形下，网络设备从W’个序列中选择一个序列作为第一序列，并根据第一序列生成同步信号。
也就是说，可以预配置或预定义一个序列，该序列即为第一序列；此种情形下，预配置或预定义的序列可以不关联小区标识。或者，也可以预配置或预定义W’个序列，第一序列为W’个序列中的一个序列；此种情形下，预配置或预定义的序列可以关联小区标识。
(3)对“网络设备根据第一序列生成同步信号”的实现进行描述。
示例性地，同步信号可以理解为一个时域序列。在未过采样的情况下，该时域序列中的元素个数与第二序列中的元素个数相同，在过采样的情况下，该时域序列中的元素个数大于第二序列中的元素个数。本申请实施例中以过采样的情况为例进行描述，比如同步信号记为序列[t(n)]，n＝0,1,2……N-1，N大于L。
作为一种可能的实现，网络设备对第一序列进行离散傅里叶变换(discrete fourier transformation，DFT)处理、子载波映射和IFFT处理等处理，生成同步信号。可选地，网络设备还可以进行其它可能的处理，具体不做限定，需要说明的是，网络设备对第一序列进行的处理不包括调制。
比如，网络设备对第一序列进行DFT处理得到第二序列，进而将第二序列映射到多个子载波上，并进行IFFT处理，生成同步信号。此种情形下，同步信号为DFT-s-OFDM波形的信号。其中，第一序列记为[x(n)]，第二序列记为[y(n)]，第二序列和第一序列满足：
作为又一种可能的实现，网络设备对第一序列进行子载波映射和IFFT处理等处理，生成同步信号。可选地，网络设备还可以进行其它可能的处理，具体不做限定，需要说明的是，网络设备对第一序列进行的处理不包括调制和DFT处理。
比如，网络设备将第一序列映射到多个子载波上，并进行IFFT处理，生成同步信号。此种情形下，同步信号为OFDM波形的信号。
也就是说，本申请实施例中，网络设备可以使用DFT-s-OFDM波形发送同步信号，或者也可以沿用现有技术，使用OFDM波形发送同步信号。
可以理解的是，如前文所述，NR中的3个PSS序列可以对应同一递推公式；而本申请实施例中，当采用的波形为DFT-s-OFDM波形时，如果沿用NR协议中基于同一序列的不同循环移位来区分不同的时域检测时会出现三个类似的相关峰，从而会导致时域同步失败或者PCI检测失败。因此，W个序列可以对应不同的递推公式，便于保证同步性能。可理解的是，如果同步信号继续沿用OFDM波形，则W个序列可以对应不同的递推公式，或者W个序列也可以是根据同一序列的不同循环移位得到的。
(4)对同步信号的模糊函数进行描述。
由于终端设备的移动速度和晶振频偏的影响，会导致终端设备接收到的信号带有较大频偏，因此需要评估同步信号的抗频偏能力，这里的同步信号是指基带芯片生成的、尚未发送给射频芯片的同步信号。抗频偏能力一般以模糊函数的次高峰来评估，模糊函数的次高峰越小表示抗频偏能力越强。本申请实施例中，同步信号的模糊函数的归一化次高峰小于或等于第二阈值，以便于保证同步信号的抗频偏性能。其中，第二阈值可以根据实际需要进行设置，比如第二阈值为0.135。
网络设备根据第一序列生成的同步信号记为[t(n)]，[t(n)]的模糊函数的表达式为：
其中，A(fd,τ)为[t(n)]的模糊函数，fd为频偏值，τ为时域多径时延，τ的取值范围为[0,N-1]，t*(n+τ)为t(n+τ)的共轭。比如，[t(n)]的模糊函数的主高峰为A(0,0)，则A(fd,τ)′＝A(fd,τ)/A(0,0)，A(fd,τ)′是对A(fd,τ)进行归一化处理得到的。
S402，网络设备发送同步信号；相应地，终端设备接收相应的信号。
可以理解的是，同步信号由网络设备的基带芯片生成。网络设备发送同步信号包括网络设备的基带芯片将同步信号发送给网络设备的射频芯片。网络设备发送同步信号也包括网络设备的射频芯片将同步信号发送给终端设备。其中，同步信号的发送功率可以是指网络设备的射频芯片向终端设备发送同步信号所使用的功率。
本申请实施例中，为保证发送功率归一化，可以根据第三序列和传输功率关联的因子(即)得到第一序列，此种情形下，第一序列中元素的取值集合为(对应上述实现方式2)，同步信号的发送功率可以为第一功率，第一功率是预定义或预配置的。或者，第一序列中元素的取值集合为{-1,0,1}，网络设备可以对同步信号的发送功率进行控制，比如同步信号的发送功率为第一功率加上功率偏置量，功率偏置量等于
S403，终端设备检测同步信号。
示例性地，终端设备获取第一序列，并根据第一序列处理接收到的信号，以检测出同步信号；或者，终端设备获取第三序列，根据第三序列得到第一序列，根据第一序列处理接收到的信号，以检测出同步信号；又或者，终端设备根据同步序列集合中的序列处理接收到的信号，以检测出同步信号，比如同步序列集合包括W’个序列，W’个序列包括第一序列。具体实现可以参照上文中“网络设备获取第一序列”的描述。
如上所述，同步信号可以为DFT-s-OFDM波形的信号，或者也可以为OFDM波形的信号，下面分别针对这两种情形，描述“终端设备检测同步信号”的具体实现。
(1)同步信号为DFT-s-OFDM波形的信号，针对该情形，描述三种可能的实现。
第一种实现，终端设备对第一序列进行DFT处理得到第二序列，将第二序列映射到多个子载波上，并进行IFFT处理，进而根据IFFT处理后的序列(称为序列a1，在未过采样的情况下，序列a1包括L个元素，在过采样的情况下，序列a1包括N个元素，N大于L，此处以过采样为例)，对接收到的信号进行相关处理。
比如，针对于接收到的信号，终端设备第i次滑动采样点获取到的信号rtmp＝[r(i-1),r(i),…r(N+i-1)]，当频偏值fd＝0.5*SCS时，对第i次滑动采样点获取到的信号rtmp纠正频偏得到rtmp,1。终端设备将序列a1和序列rtmp,1做内积，得到序列a1和序列rtmp之间的互相关值c(a1,rtmp)，并进行归一化得到c(a1,rtmp)′。
第二种实现，终端设备直接对第一序列进行过采样(即元素重复)得到序列a2，并根据序列a2对接收到的信号进行相关处理。具体实现参照“终端设备根据序列a1对接收到的信号进行相关处理”的描述。
第三种实现，终端设备对接收到的信号进行降采样得到序列a3，并根据第一序列对序列a3进行相关处理。
比如，对于接收到的信号，终端设备第i次滑动采样点获取到的信号rtmp＝[r(i-1),r(i),…r(N+i-1)]，对rtmp进行降采样得到rtmp’，rtmp’包括L个元素。当频偏值fd＝0.5*SCS时，对第i次滑动采样点获取到的信号rtmp’纠正频偏得到rtmp’,1。终端设备将第一序列和序列rtmp’,1做内积，得到第一序列和序列rtmp’,1之间归一化后的互相关值。
上述三种实现是以第一序列为例，当预定义或预配置的序列有多个时，终端设备可以遍历多个序列。也就是说，上述三种实现中，终端设备可以遍历多个序列、多个采样点、多个频偏值进行相关计算，得到多个互相关值。进而，终端设备根据多个互相关值中的最大互相关值，确定网络设备实际发送的序列(即检测出同步信号)、时延和频偏值。可以理解的是，在一些场景中，也可以仅有一个频偏值或一个序列，具体不做限定。
本申请实施例中，一方面，由于同步信号具有定时功能，因此，终端设备需要在时域上进行滑动相关检测，同步信号采用DFT-s-OFDM波形，可以使得终端设备直接在时域上对接收到的信号进行相关处理，而不需要先对接收到的信号进行DFT处理变换到频域再进行处理，从而极大地降低了同步信号的检测复杂度。另一方面，DFT-s-OFDM波形可以用来模拟方波，以保证时域检测的性能，比如第一序列进行过采样(即元素重复)后和第一序列经过DFT-s-OFDM波形后的时域信号对比，可以发现高低电平出现的位置完全吻合，因此，DFT-s-OFDM波形可以用来模拟方波。需要理解的是，第一序列经过DFT-s-OFDM波形生成的时域信号还可以进行时域滤波等操作，以使得最终的波形和方波更加吻合，本申请实施例对这些可能的操作不做限制。
进一步地，以同步信号为PSS为例，如前文所述，目前NR中是对m序列进行BPSK调制得到PSS序列，进而网络设备对PSS序列进行子载波映射和IFFT处理生成PSS，即PSS为OFDM波形的信号；相应地，终端设备根据PSS序列对PSS进行检测。其中，由于对m序列进行BPSK调制得到的PSS序列中元素的取值集合为{1,-1}，从而使得经过子载波映射和IFFT处理生成的PSS中的元素均为复数元素，导致每次相关运算需要进行N-1次加法运算和N次乘法运算。
本申请实施例中，网络设备对第一序列进行DFT处理、子载波映射和IFFT处理生成PSS，即PSS为DFT-s-OFDM波形的信号；相应地，终端设备根据第一序列对PSS进行检测。由于第一序列理想自相关，从而能够保证PSS的检测性能；进一步地，由于第一序列包括至少一个取值为0的元素，因此，终端设备根据第一序列对接收到的信号进行相关处理，在采用上述第二种实现和第三种实现时能够减少每次相关运算中加法运算的次数；以及由于第一序列中除0元素以外的其它元素的取值为-1或1(或者其它元素的取值为或则终端设备可以将转换成-1，将转换成1)，因此，在采用上述第二种实现和第三种实现时可以忽略每次相关运算中乘法运算的次数。在采用上述第一种实现时，终端设备对第一序列进行了DFT处理、子载波映射和IFFT处理，进一步地，终端设备可以对最终得到的时域序列中的元素进行量化处理(即将时域序列中的元素量化为0/1/-1)，因此，采用第一种实现也能够减少每次相关运算中加法运算的次数以及忽略每次相关运算中乘法运算的次数。也就是说，采用本申请实施例中的方案，能够降低每次相关运算中加法运算和/或乘法运算的次数，从而降低PSS的检测复杂度。
举个例子，参见表1所示，当PSS序列的长度为121(以未过采样为例)时，采用NR中的方案，每次相关运算需要进行120次加法运算和121次乘法运算；采用本申请中的方案，每次相关运算需要进行80次加法运算和0次乘法运算。
表1：复杂度示例
由于乘法运算可以由加法器和循环移位寄存器实现，整体的与非门的数量为加法的X倍，其中X为比特量化位宽，一般为16，因此，复杂度降低的比例的计算过程：
(2)同步信号为OFDM波形的信号
终端设备将第一序列映射到多个子载波上，得到频域序列。以及，终端设备对接收到的信号进行DFT处理，得到频域信号；比如，针对于接收到的信号r＝[r(0),r(1),…,r(L’-1)]，当频偏值fd＝0.5*SCS时，终端设备对信号r纠正频偏得到信号r1，并对信号r1进行DFT处理，得到频域信号。进而，终端设备对频域序列和频域信号进行共轭点乘，并对共轭点乘后的序列进行IDFT处理，以在时域上确定该频偏值对应的最大相关峰位置。如此，遍历多个频偏值后，可以根据多个频偏值对应的最大相关峰位置，确定网络设备实际发送的序列(即检测出同步信号)、时延和频偏值。
本申请实施例中，以同步信号为PSS为例，网络设备对第一序列进行子载波映射和IFFT处理生成PSS，即PSS为OFDM波形的信号；相应地，终端设备根据第一序列对PSS进行检测。由于第一序列包括至少一个取值为0的元素，从而能够降低频域乘法操作所需的复杂度以及IDFT的复杂度，进而降低同步信号的检测复杂度。
针对于上述实施例，可以理解的是：
(1)在本申请实施例中，如果没有特殊说明以及逻辑冲突，不同示例或实现方式中的术语和/或描述具有一致性、且可以相互引用，不同的示例或实现方式中的技术特征根据其内在的逻辑关系可以组合形成新的实施例。此外，不同实现方式或不同示例之间可以相互引用或参照。
(2)本申请中涉及的各种数字编号仅为描述方便进行的区分，并不用来限制本申请的范围。上述各个流程图的步骤编号仅为执行流程的一种示例，并不构成对步骤执行的先后顺序的限制，即各步骤编号的大小并不意味着执行顺序的先后，各步骤的执行顺序应以其功能和内在逻辑确定。此外，各个流程图中所示意的步骤并非全部是必须执行的步骤，可以根据实际需要在各个流程图的基础上增添或者删除部分步骤。
上述主要从第一通信装置和第二通信装置交互的角度对本申请实施例提供的方案进行了介绍。可以理解的是，为了实现上述功能，第一通信装置和第二通信装置可以包括执行各个功能相应的硬件结构和/或软件模块。本领域技术人员应该很容易意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，本申请的实施例能够以硬件或硬件和计算机软件的结合形式来实现。某个功能究竟以硬件还是计算机软件驱动硬件的方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
本申请实施例可以根据上述方法示例对第一通信装置和第二通信装置进行功能单元的划分，例如，可以对应各个功能划分各个功能单元，也可以将两个或两个以上的功能集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
在采用集成的单元的情况下，图6示出了本申请实施例中所涉及的装置的可能的示例性框图。如图6所示，装置600可以包括：处理单元602和通信单元603。处理单元602用于对装置600的动作进行控制管理。通信单元603用于支持装置600与其他设备的通信。可选地，通信单元603也称为收发单元，可以包括接收单元和/或发送单元，分别用于执行接收和发送操作。装置600还可以包括存储单元601，用于存储装置600的程序代码和/或数据。
(1)该装置600可以为上述实施例中的第一通信装置。处理单元602可以支持装置600执行上文中各方法实施例中第一通信装置的动作。或者，处理单元602主要执行方法实施例中第一通信装置的内部动作，通信单元603可以支持装置600与其它设备之间的通信。
比如，在一个实施例中，处理单元602用于：根据第一序列生成同步信号；通信单元603用于：发送所述同步信号；其中，所述第一序列理想自相关，所述第一序列的元素的取值集合为{-A,0,A}，A为常数。
在一种可能的设计中，处理单元602具体用于：对所述第一序列进行DFT处理得到第二序列；将所述第二序列映射到多个子载波上，并进行IFFT处理，生成所述同步信号；其中，所述第一序列记为[x(n)]，所述第二序列记为[y(n)]，n＝0,1,2……L-1，所述第二序列和所述第一序列满足：
在一种可能的设计中，处理单元602具体用于：将所述第一序列映射到多个子载波上，并进行IFFT处理，生成所述同步信号。
在一种可能的设计中，A＝1。
在一种可能的设计中，所述第一序列是基于第三序列得到的，所述第三序列中元素的取值集合为{0,1,2}；所述第一序列记为[x(n)]，所述第三序列记为[s(n)]，所述第一序列和所述第三序列满足：
在一种可能的设计中，所述同步信号的发送功率为第一功率加上功率偏置量，所述功率偏置量等于L表示所述第一序列的长度，m表示所述第一序列中取值为0的元素个数；其中，所述第一功率是预定义或预配置的。
在一种可能的设计中，L表示所述第一序列的长度，m表示所述第一序列中取值为0的元素个数。
在一种可能的设计中，所述第一序列是基于第三序列得到的，所述第三序列中元素的取值集合为{0,1,2}；所述第一序列记为[x(n)]，所述第三序列记为[s(n)]，所述第一序列和所述第三序列满足：
在一种可能的设计中，所述同步信号的发送功率为第一功率，所述第一功率是预定义或预配置的。
在一种可能的设计中，所述第一序列是基于第三序列得到的，所述第三序列为W个序列中的一个序列，所述W个序列是根据W个递推公式得到的；其中，所述W个序列之间的互相关值小于或等于第一阈值，W为大于1的整数。
在一种可能的设计中，所述W个递推公式包括以下任意多项：
s(n+5)＝(2s(n+2)+2s(n+1)+s(n))mod3；
s(n+5)＝(2s(n+3)+2s(n+2)+s(n+1)+s(n))mod3；
s(n+5)＝(2s(n+4)+2s(n+1)+s(n))mod3。
在一种可能的设计中，所述同步信号的模糊函数的归一化次高峰小于或等于第二阈值。
(2)该装置600可以为上述实施例中的第二通信装置。处理单元602可以支持装置600执行上文中各方法实施例中第二通信装置的动作。或者，处理单元602主要执行方法实施例中第二通信装置的内部动作，通信单元603可以支持装置600与其它设备之间的通信。
比如，在一个实施例中，处理单元602用于：检测同步信号，所述同步信号是根据所述第一序列得到的信号；其中，所述第一序列理想自相关，所述第一序列的元素的取值集合为{-A,0,A}，A为常数。
在一种可能的设计中，处理单元602具体用于：获取所述第一序列，根据所述第一序列处理接收到的信号，以检测出所述同步信号；或者，获取第三序列，根据所述第三序列得到所述第一序列，根据所述第一序列处理接收到的信号，以检测出所述同步信号；或者，根据同步序列集合中的序列处理接收到的信号，以检测出所述同步信号，所述同步序列集合中的序列包括所述第一序列。
在一种可能的设计中，处理单元602具体用于：对所述第一序列进行离散傅里叶变换DFT处理得到第二序列；将所述第二序列映射到多个子载波上，并进行逆快速傅里叶变换IFFT处理；根据IFFT处理后的序列，对接收到的信号进行相关处理；其中，所述第一序列记为[x(n)]，所述第二序列记为[y(n)]，n＝0,1,2……L-1，所述第二序列和所述第一序列满足：
在一种可能的设计中，处理单元602具体用于：对所述第一序列进行过采样，根据过采样后的序列，对接收到的信号进行相关处理；或者，对接收到的信号进行降采样，根据所述第一序列，对降采样后的信号进行相关处理。
在一种可能的设计中，处理单元602具体用于：将所述第一序列映射到多个子载波上，得到频域序列；对接收到的信号进行DFT处理，得到频域信号；对所述频域序列和所述频域信号进行共轭点乘，并对共轭点乘后的序列进行离散傅里叶逆变换IDFT处理。
在一种可能的设计中，A＝1。
在一种可能的设计中，所述第一序列是基于第三序列得到的，所述第三序列中元素的取值集合为{0,1,2}；所述第一序列记为[x(n)]，所述第三序列记为[s(n)]，所述第一序列和所述第三序列满足：
在一种可能的设计中，L表示所述第一序列的长度，m表示所述第一序列中取值为0的元素个数。
在一种可能的设计中，所述第一序列是基于第三序列得到的，所述第三序列中元素的取值集合为{0,1,2}；所述第一序列记为[x(n)]，所述第三序列记为[s(n)]，所述第一序列和所述第三序列满足：
在一种可能的设计中，所述第一序列是基于第三序列得到的，所述第三序列为W个序列中的一个序列，所述W个序列是根据W个递推公式得到的；其中，所述W个序列之间的互相关值小于或等于第一阈值，W为大于1的整数。
在一种可能的设计中，所述W个递推公式包括以下任意多项：
s(n+5)＝(2s(n+2)+2s(n+1)+s(n))mod3；
s(n+5)＝(2s(n+3)+2s(n+2)+s(n+1)+s(n))mod3；
s(n+5)＝(2s(n+4)+2s(n+1)+s(n))mod3。
在一种可能的设计中，所述同步信号的模糊函数的归一化次高峰小于或等于第二阈值。
应理解以上装置中单元的划分仅仅是一种逻辑功能的划分，实际实现时可以全部或部分集成到一个物理实体上，也可以物理上分开。且装置中的单元可以全部以软件通过处理元件调用的形式实现；也可以全部以硬件的形式实现；还可以部分单元以软件通过处理元件调用的形式实现，部分单元以硬件的形式实现。例如，各个单元可以为单独设立的处理元件，也可以集成在装置的某一个芯片中实现，此外，也可以以程序的形式存储于存储器中，由装置的某一个处理元件调用并执行该单元的功能。此外这些单元全部或部分可以集成在一起，也可以独立实现。这里所述的处理元件又可以成为处理器，可以是一种具有信号的处理能力的集成电路。在实现过程中，上述方法的各操作或以上各个单元可以通过处理器元件中的硬件的集成逻辑电路实现或者以软件通过处理元件调用的形式实现。
在一个例子中，以上任一装置中的单元可以是被配置成实施以上方法的一个或多个集成电路，例如：一个或多个特定集成电路(application specific integrated circuit，ASIC)，或，一个或多个微处理器(digital singnal processor，DSP)，或，一个或者多个现场可编程门阵列(field programmable gate array，FPGA)，或这些集成电路形式中至少两种的组合。再如，当装置中的单元可以通过处理元件调度程序的形式实现时，该处理元件可以是处理器，比如通用中央处理器(central processing unit，CPU)，或其它可以调用程序的处理器。再如，这些单元可以集成在一起，以SoC的形式实现。
以上用于接收的单元是一种该装置的接口电路，用于从其它装置接收信号。例如，当该装置以芯片的方式实现时，该接收单元是该芯片用于从其它芯片或装置接收信号的接口电路。以上用于发送的单元是一种该装置的接口电路，用于向其它装置发送信号。例如，当该装置以芯片的方式实现时，该发送单元是该芯片用于向其它芯片或装置发送信号的接口电路。
基于相同的技术构思，本申请实施例还提供一种通信装置，该装置用于实现上述实施例中第一通信装置或第二通信装置的功能。如图7所示，该装置可以是通信设备或者通信设备中的芯片。该装置包括处理器701和通信接口702，可选地，还包括存储器703。图7仅示出了通信装置的主要部件。除处理器701和通信接口702之外，所述通信装置还可以进一步包括存储器703、以及输入输出装置(图未示意)。
处理器701用于执行存储器703存储的程序代码，具体用于执行上述处理单元602的动作，本申请在此不再赘述。通信接口702具体用于执行上述通信单元603的动作，本申请在此不再赘述。
处理器701可以是一个CPU，或者为数字处理单元等等。处理器701可用于进行对通信协议以及通信数据进行处理，以及对整个通信装置进行控制，执行软件程序，处理软件程序的数据，例如但不限于，基带相关处理。通信接口702可用于进行收发信号，例如但不限于，射频收发。上述器件可以分别设置在彼此独立的芯片上，也可以至少部分的或者全部的设置在同一块芯片上。例如，处理器701可以进一步划分为模拟基带处理器和数字基带处理器。其中，模拟基带处理器可以与收发器集成在同一块芯片上，数字基带处理器可以设置在独立的芯片上。随着集成电路技术的不断发展，可以在同一块芯片上集成的器件越来越多，例如，数字基带处理器可以与多种应用处理器(例如但不限于图形处理器，多媒体处理器等)集成在同一块芯片之上。这样的芯片可以称为系统芯片(system on chip)。将各个器件独立设置在不同的芯片上，还是整合设置在一个或者多个芯片上，往往取决于产品设计的具体需要。本发明实施例对上述器件的具体实现形式不做限定。
通信接口702可以是收发器、也可以为接口电路如收发电路等、也可以为收发芯片等等。可选的，通信接口702可以包括射频电路和天线，射频电路主要用于基带信号与射频信号的转换以及对射频信号的处理。天线主要用于收发电磁波形式的射频信号。输入输出装置，例如触摸屏、显示屏，键盘等主要用于接收用户输入的数据以及对用户输出数据。
存储器703用于存储处理器701执行的程序。存储器703可以是非易失性存储器，比如硬盘(hard disk drive，HDD)或固态硬盘(solid-state drive，SSD)等，还可以是易失性存储器(volatile memory)，例如随机存取存储器(random-access memory，RAM)。存储器703是能够用于携带或存储具有指令或数据结构形式的期望的程序代码并能够由计算机存取的任何其它介质，但不限于此。
当通信装置开机后，处理器701可以读取存储器703中的软件程序，解释并执行软件程序的指令，处理软件程序的数据。当需要通过无线发送数据时，处理器701对待发送的数据进行基带处理后，输出基带信号至射频电路，射频电路将基带信号进行射频处理后将射频信号通过天线以电磁波的形式向外发送。当有数据发送到通信装置时，射频电路通过天线接收到射频信号，将射频信号转换为基带信号，并将基带信号输出至处理器701，处理器701将基带信号转换为数据并对该数据进行处理。
在另一种实现中，所述的射频电路和天线可以独立于进行基带处理的处理器而设置，例如在分布式场景中，射频电路和天线可以与独立于通信装置，呈拉远式的布置。
本申请实施例中不限定上述通信接口702、处理器701以及存储器703之间的具体连接介质。本申请实施例在图7中以存储器703、处理器701以及通信接口702之间通过总线704连接，总线在图7中以粗线表示，其它部件之间的连接方式，仅是进行示意性说明，并不引以为限。总线可以分为地址总线、数据总线、控制总线等。为便于表示，图7中仅用一条粗线表示，但并不表示仅有一根总线或一种类型的总线。
可选的，上述通信装置可以是独立的设备或者可以是较大设备的一部分。例如所述通信装置可以是：
(1)独立的集成电路(integrated circuit，IC)，或芯片，或，芯片系统或子系统；
(2)具有一个或多个IC的集合，可选的，该IC集合也可以包括用于存储数据，指令的存储部件；
(3)专用集成电路(application specific integrated circuit，ASIC)，例如调制解调器(modem)；
(4)可嵌入在其他设备内的模块；
(5)接收机、智能终端、无线设备、手持机、移动单元、车载设备、云设备、人工智能设备等等；
(6)其他等等。
本申请实施例中“多个”可以是指两个或两个以上，鉴于此，本申请实施例中也可以将“多个”理解为“至少两个”。“至少一个”，可理解为一个或多个，例如理解为一个、两个或多个。例如，“包括至少一个”，是指包括一个、两个或多个，例如，包括A、B和C中的至少一个，那么包括的可以是A、B、C、A和B、A和C、B和C、或A、B和C。“和/或”，描述关联对象的关联关系，具体可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，字符“/”，如无特殊说明，一般表示前后关联对象是一种“或”的关系。
此外，本申请实施例中的术语“系统”和“网络”可被互换使用，“根据”和“基于”可被互换使用。本申请实施例提及的“第一”、“第二”等序数词通常用于对不同对象进行区分，不用于限定多个对象的顺序、时序、优先级或者重要程度等。例如，本申请实施例中的第一通信装置和第二通信装置用于对两个通信装置进行区别，并不限定这两个通信装置的优先级或重要程度等。
本领域内的技术人员应明白，本申请的实施例可提供为方法、系统、或计算机程序产品。因此，本申请可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且，本申请可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。
本申请是参照根据本申请的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。

Claims (29)

  1. 一种通信方法，其特征在于，所述方法包括：
    根据第一序列生成同步信号；
    发送所述同步信号；
    其中，所述第一序列理想自相关，所述第一序列的元素的取值集合为{-A,0,A}，A为常数。
  2. 根据权利要求1所述的方法，其特征在于，根据第一序列生成同步信号，包括：
    对所述第一序列进行离散傅里叶变换DFT处理得到第二序列；
    将所述第二序列映射到多个子载波上，并进行逆快速傅里叶变换IFFT处理，生成所述同步信号；
    其中，所述第一序列记为[x(n)]，所述第二序列记为[y(n)]，n＝0,1,2……L-1，所述第二序列和所述第一序列满足：
  3. 根据权利要求1所述的方法，其特征在于，根据第一序列生成同步信号，包括：
    将所述第一序列映射到多个子载波上，并进行IFFT处理，生成所述同步信号。
  4. 根据权利要求1至3中任一项所述的方法，其特征在于，A＝1。
  5. 根据权利要求4所述的方法，其特征在于，所述第一序列是基于第三序列得到的，所述第三序列中元素的取值集合为{0,1,2}；
    所述第一序列记为[x(n)]，所述第三序列记为[s(n)]，所述第一序列和所述第三序列满足：
  6. 根据权利要求4或5所述的方法，其特征在于，所述同步信号的发送功率为第一功率加上功率偏置量，所述功率偏置量等于L表示所述第一序列的长度，m表示所述第一序列中取值为0的元素个数；其中，所述第一功率是预定义或预配置的。
  7. 根据权利要求1至3中任一项所述的方法，其特征在于，L表示所述第一序列的长度，m表示所述第一序列中取值为0的元素个数。
  8. 根据权利要求7所述的方法，其特征在于，所述第一序列是基于第三序列得到的，所述第三序列中元素的取值集合为{0,1,2}；
    所述第一序列记为[x(n)]，所述第三序列记为[s(n)]，所述第一序列和所述第三序列满足：
  9. 根据权利要求7或8所述的方法，其特征在于，所述同步信号的发送功率为第一功率，所述第一功率是预定义或预配置的。
  10. 根据权利要求1至9中任一项所述的方法，其特征在于，所述第一序列是基于第三序列得到的，所述第三序列为W个序列中的一个序列，所述W个序列是根据W个递推公式得到的；
    其中，所述W个序列之间的互相关值小于或等于第一阈值，W为大于1的整数。
  11. 根据权利要求10所述的方法，其特征在于，所述W个递推公式包括以下任意多项：
    s(n+5)＝(2s(n+2)+2s(n+1)+s(n))mod3；
    s(n+5)＝(2s(n+3)+2s(n+2)+s(n+1)+s(n))mod3；
    s(n+5)＝(2s(n+4)+2s(n+1)+s(n))mod3。
  12. 根据权利要求1至11中任一项所述的方法，其特征在于，所述同步信号的模糊函数的归一化次高峰小于或等于第二阈值。
  13. 一种通信方法，其特征在于，所述方法包括：
    检测同步信号，所述同步信号是根据所述第一序列得到的信号；
    其中，所述第一序列理想自相关，所述第一序列的元素的取值集合为{-A,0,A}，A为常数。
  14. 根据权利要求13所述的方法，其特征在于，检测所述同步信号，包括：
    获取所述第一序列，根据所述第一序列处理接收到的信号，以检测出所述同步信号；或者，
    获取第三序列，根据所述第三序列得到所述第一序列，根据所述第一序列处理接收到的信号，以检测出所述同步信号；或者，
    根据同步序列集合中的序列处理接收到的信号，以检测出所述同步信号，所述同步序列集合中的序列包括所述第一序列。
  15. 根据权利要求14所述的方法，其特征在于，根据所述第一序列处理接收到的信号，包括：
    对所述第一序列进行离散傅里叶变换DFT处理得到第二序列；
    将所述第二序列映射到多个子载波上，并进行逆快速傅里叶变换IFFT处理；
    根据IFFT处理后的序列，对接收到的信号进行相关处理；
    其中，所述第一序列记为[x(n)]，所述第二序列记为[y(n)]，n＝0,1,2……L-1，所述第二序列和所述第一序列满足：
  16. 根据权利要求14所述的方法，其特征在于，根据所述第一序列处理接收到的信号，包括：
    对所述第一序列进行过采样，根据过采样后的序列，对接收到的信号进行相关处理；或者，
    对接收到的信号进行降采样，根据所述第一序列，对降采样后的信号进行相关处理。
  17. 根据权利要求14所述的方法，其特征在于，根据所述第一序列处理接收到的信号，包括：
    将所述第一序列映射到多个子载波上，得到频域序列；
    对接收到的信号进行DFT处理，得到频域信号；
    对所述频域序列和所述频域信号进行共轭点乘，并对共轭点乘后的序列进行离散傅里叶逆变换IDFT处理。
  18. 根据权利要求13至17中任一项所述的方法，其特征在于，A＝1。
  19. 根据权利要求18所述的方法，其特征在于，所述第一序列是基于第三序列得到的，所述第三序列中元素的取值集合为{0,1,2}；
    所述第一序列记为[x(n)]，所述第三序列记为[s(n)]，所述第一序列和所述第三序列满足：
  20. 根据权利要求13至17中任一项所述的方法，其特征在于，L表示所述第一序列的长度，m表示所述第一序列中取值为0的元素个数。
  21. 根据权利要求20所述的方法，其特征在于，所述第一序列是基于第三序列得到的，所述第三序列中元素的取值集合为{0,1,2}；
    所述第一序列记为[x(n)]，所述第三序列记为[s(n)]，所述第一序列和所述第三序列满足：
  22. 根据权利要求13至21中任一项所述的方法，其特征在于，所述第一序列是基于第三序列得到的，所述第三序列为W个序列中的一个序列，所述W个序列是根据W个递推公式得到的；
    其中，所述W个序列之间的互相关值小于或等于第一阈值，W为大于1的整数。
  23. 根据权利要求22所述的方法，其特征在于，所述W个递推公式包括以下任意多项：
    s(n+5)＝(2s(n+2)+2s(n+1)+s(n))mod3；
    s(n+5)＝(2s(n+3)+2s(n+2)+s(n+1)+s(n))mod3；
    s(n+5)＝(2s(n+4)+2s(n+1)+s(n))mod3。
  24. 根据权利要求13至23中任一项所述的方法，其特征在于，所述同步信号的模糊函数的归一化次高峰小于或等于第二阈值。
  25. 一种通信装置，其特征在于，包括用于执行如权利要求1至24中任一项所述方法的单元。
  26. 一种通信装置，其特征在于，包括处理器，所述处理器和存储器耦合，所述存储器中存储有计算机程序；所述处理器用于调用所述存储器中的部分或全部所述计算机程序，使得如权利要求1至24中任一项所述的方法被执行。
  27. 一种通信系统，其特征在于，所述通信系统包括第一通信装置和第二通信装置，所述第一通信装置用于执行如权利要求1至12中任一项所述的方法，所述第二通信装置用于执行如权利要求13至24中任一项所述的方法。
  28. 一种计算机可读存储介质，其特征在于，所述存储介质中存储有计算机程序，当部分或全部所述计算机程序被计算机执行时，使得如权利要求1至24中任一所述的方法被执行。
  29. 一种计算机程序产品，其特征在于，当计算机读取并执行所述计算机程序产品时，使得如权利要求1至24中任一所述的方法被执行。
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